add SDHC support in mmc driver
[u-boot-openmoko/mini2440.git] / include / video_ad7177.h
blobde3863d0896cc510f469c0fc799e554de25378f7
1 /*
2 * (C) Copyright 2000
3 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
5 * See file CREDITS for list of people who contributed to this
6 * project.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
24 #ifndef _VIDEO_AD7177_H_
25 #define _VIDEO_AD7177_H_
27 /* #define VIDEO_DEBUG_DISABLE_COLORS 0 */
29 #define VIDEO_ENCODER_NAME "Analog Devices AD7177"
31 #define VIDEO_ENCODER_I2C_RATE 100000 /* Max rate is 100 kHz */
32 #define VIDEO_ENCODER_CB_Y_CR_Y /* Use CB Y CR Y format... */
34 #define VIDEO_MODE_YUYV /* The only mode supported by this encoder */
35 #undef VIDEO_MODE_RGB
36 #define VIDEO_MODE_BPP 16
38 #ifdef VIDEO_MODE_PAL
39 #define VIDEO_ACTIVE_COLS 720
40 #define VIDEO_ACTIVE_ROWS 576
41 #define VIDEO_VISIBLE_COLS 640
42 #define VIDEO_VISIBLE_ROWS 480
43 #endif
45 #ifdef VIDEO_MODE_NTSC
46 #define VIDEO_ACTIVE_COLS 720
47 #define VIDEO_ACTIVE_ROWS 525
48 #define VIDEO_VISIBLE_COLS 640
49 #define VIDEO_VISIBLE_ROWS 400
50 #endif
52 static unsigned char
53 video_encoder_data[] = {
54 #ifdef VIDEO_MODE_NTSC
55 0x04, /* Mode Register 0 */
56 #ifdef VIDEO_DEBUG_COLORBARS
57 0xc2,
58 #else
59 0x42, /* Mode Register 1 */
60 #endif /* VIDEO_DEBUG_COLORBARS */
61 0x16, /* Subcarrier Freq 0 */
62 0x7c, /* Subcarrier Freq 1 */
63 0xf0, /* Subcarrier Freq 2 */
64 0x21, /* Subcarrier Freq 3 */
65 0x00, /* Subcarrier phase */
66 0x02, /* Timing Register 0 */
67 0x00, /* Extended Captioning 0 */
68 0x00, /* Extended Captioning 1 */
69 0x00, /* Closed Captioning 0 */
70 0x00, /* Closed Captioning 1 */
71 0x00, /* Timing Register 1 */
72 0x08, /* Mode Register 2 */
73 0x00, /* Pedestal Register 0 */
74 0x00, /* Pedestal Register 1 */
75 0x00, /* Pedestal Register 2 */
76 0x00, /* Pedestal Register 3 */
77 0x08, /* Mode Register 3 */
79 #endif /* VIDEO_MODE_NTSC */
81 #ifdef VIDEO_MODE_PAL
82 #ifdef VIDEO_MODE_RGB_OUT
84 0x69, /* Mode Register 0 */
85 #ifdef VIDEO_DEBUG_COLORBARS
86 0xc0, /* Mode Register 1 (c0) */
87 #else
88 0x40, /* Mode Register 1 (c0) */
89 #endif /* VIDEO_DEBUG_COLORBARS */
90 0xcb, /* Subcarrier Freq 0 */
91 0x8a, /* Subcarrier Freq 1 */
92 0x09, /* Subcarrier Freq 2 */
93 0x2a, /* Subcarrier Freq 3 */
94 0x00, /* Subcarrier phase */
95 0x02, /* Timing Register 0 */
96 0x00, /* Extended Captioning 0 */
97 0x00, /* Extended Captioning 1 */
98 0x00, /* Closed Captioning 0 */
99 0x00, /* Closed Captioning 1 */
100 0x00, /* Timing Register 1 */
101 0x28, /* Mode Register 2 */
102 0x00, /* Pedestal Register 0 */
103 0x00, /* Pedestal Register 1 */
104 0x00, /* Pedestal Register 2 */
105 0x00, /* Pedestal Register 3 */
106 0x08, /* Mode Register 3 */
108 #else /* ! VIDEO_MODE_RGB_OUT */
110 0x09, /* Mode Register 0 (was 01) */
111 #ifdef VIDEO_DEBUG_COLORBARS
112 0xd8, /* */
113 #else
114 0x59, /* Mode Register 1 (was 58) */
115 #endif /* VIDEO_DEBUG_COLORBARS */
116 0xcb, /* Subcarrier Freq 0 */
117 0x8a, /* Subcarrier Freq 1 */
118 0x09, /* Subcarrier Freq 2 */
119 0x2a, /* Subcarrier Freq 3 */
120 0x00, /* Subcarrier phase */
121 0x02, /* Timing Register 0 (was a) */
122 0x00, /* Extended Captioning 0 */
123 0x00, /* Extended Captioning 1 */
124 0x00, /* Closed Captioning 0 */
125 0x00, /* Closed Captioning 1 */
126 0x00, /* Timing Register 1 */
127 #ifdef VIDEO_DEBUG_LOWPOWER
128 #ifdef VIDEO_DEBUG_DISABLE_COLORS
129 0x98, /* Mode Register 2 */
130 #else
131 0x88, /* Mode Register 2 */
132 #endif /* VIDEO_DEBUG_DISABLE_COLORS */
133 #else /* ! VIDEO_DEBUG_LOWPOWER */
134 #ifdef VIDEO_DEBUG_DISABLE_COLORS
135 0x18, /* Mode Register 2 */
136 #else
137 0x08, /* Mode Register 2 */
138 #endif /* VIDEO_DEBUG_DISABLE_COLORS */
139 #endif /* VIDEO_DEBUG_LOWPOWER */
140 0x00, /* Pedestal Register 0 */
141 0x00, /* Pedestal Register 1 */
142 0x00, /* Pedestal Register 2 */
143 0x00, /* Pedestal Register 3 */
144 0x08 /* Mode Register 3 */
145 #endif /* VIDEO_MODE_RGB_OUT */
146 #endif /* VIDEO_MODE_PAL */
149 #endif /* _VIDEO_AD7177_H_ */