include/pcf50606.h

   1 #ifndef _PCF50606_H
   2 #define _PCF50606_H
   3
   4 /* Philips PCF50606 Power Managemnt Unit (PMU) driver
   5  * (C) 2006-2007 by OpenMoko, Inc.
   6  * Author: Harald Welte <laforge@openmoko.org>
   7  *
   8  */
   9
  10 enum pfc50606_regs {
  11         PCF50606_REG_ID         = 0x00,
  12         PCF50606_REG_OOCS       = 0x01,
  13         PCF50606_REG_INT1       = 0x02, /* Interrupt Status */
  14         PCF50606_REG_INT2       = 0x03, /* Interrupt Status */
  15         PCF50606_REG_INT3       = 0x04, /* Interrupt Status */
  16         PCF50606_REG_INT1M      = 0x05, /* Interrupt Mask */
  17         PCF50606_REG_INT2M      = 0x06, /* Interrupt Mask */
  18         PCF50606_REG_INT3M      = 0x07, /* Interrupt Mask */
  19         PCF50606_REG_OOCC1      = 0x08,
  20         PCF50606_REG_OOCC2      = 0x09,
  21         PCF50606_REG_RTCSC      = 0x0a, /* Second */
  22         PCF50606_REG_RTCMN      = 0x0b, /* Minute */
  23         PCF50606_REG_RTCHR      = 0x0c, /* Hour */
  24         PCF50606_REG_RTCWD      = 0x0d, /* Weekday */
  25         PCF50606_REG_RTCDT      = 0x0e, /* Day */
  26         PCF50606_REG_RTCMT      = 0x0f, /* Month */
  27         PCF50606_REG_RTCYR      = 0x10, /* Year */
  28         PCF50606_REG_RTCSCA     = 0x11, /* Alarm Second */
  29         PCF50606_REG_RTCMNA     = 0x12, /* Alarm Minute */
  30         PCF50606_REG_RTCHRA     = 0x13, /* Alarm Hour */
  31         PCF50606_REG_RTCWDA     = 0x14, /* Alarm Weekday */
  32         PCF50606_REG_RTCDTA     = 0x15, /* Alarm Day */
  33         PCF50606_REG_RTCMTA     = 0x16, /* Alarm Month */
  34         PCF50606_REG_RTCYRA     = 0x17, /* Alarm Year */
  35         PCF50606_REG_PSSC       = 0x18, /* Power sequencing */
  36         PCF50606_REG_PWROKM     = 0x19, /* PWROK mask */
  37         PCF50606_REG_PWROKS     = 0x1a, /* PWROK status */
  38         PCF50606_REG_DCDC1      = 0x1b,
  39         PCF50606_REG_DCDC2      = 0x1c,
  40         PCF50606_REG_DCDC3      = 0x1d,
  41         PCF50606_REG_DCDC4      = 0x1e,
  42         PCF50606_REG_DCDEC1     = 0x1f,
  43         PCF50606_REG_DCDEC2     = 0x20,
  44         PCF50606_REG_DCUDC1     = 0x21,
  45         PCF50606_REG_DCUDC2     = 0x22,
  46         PCF50606_REG_IOREGC     = 0x23,
  47         PCF50606_REG_D1REGC1    = 0x24,
  48         PCF50606_REG_D2REGC1    = 0x25,
  49         PCF50606_REG_D3REGC1    = 0x26,
  50         PCF50606_REG_LPREGC1    = 0x27,
  51         PCF50606_REG_LPREGC2    = 0x28,
  52         PCF50606_REG_MBCC1      = 0x29,
  53         PCF50606_REG_MBCC2      = 0x2a,
  54         PCF50606_REG_MBCC3      = 0x2b,
  55         PCF50606_REG_MBCS1      = 0x2c,
  56         PCF50606_REG_BBCC       = 0x2d,
  57         PCF50606_REG_ADCC1      = 0x2e,
  58         PCF50606_REG_ADCC2      = 0x2f,
  59         PCF50606_REG_ADCS1      = 0x30,
  60         PCF50606_REG_ADCS2      = 0x31,
  61         PCF50606_REG_ADCS3      = 0x32,
  62         PCF50606_REG_ACDC1      = 0x33,
  63         PCF50606_REG_BVMC       = 0x34,
  64         PCF50606_REG_PWMC1      = 0x35,
  65         PCF50606_REG_LEDC1      = 0x36,
  66         PCF50606_REG_LEDC2      = 0x37,
  67         PCF50606_REG_GPOC1      = 0x38,
  68         PCF50606_REG_GPOC2      = 0x39,
  69         PCF50606_REG_GPOC3      = 0x3a,
  70         PCF50606_REG_GPOC4      = 0x3b,
  71         PCF50606_REG_GPOC5      = 0x3c,
  72         __NUM_PCF50606_REGS
  73 };
  74
  75 enum pcf50606_reg_oocs {
  76         PFC50606_OOCS_ONKEY     = 0x01,
  77         PCF50606_OOCS_EXTON     = 0x02,
  78         PCF50606_OOCS_PWROKRST  = 0x04,
  79         PCF50606_OOCS_BATOK     = 0x08,
  80         PCF50606_OOCS_BACKOK    = 0x10,
  81         PCF50606_OOCS_CHGOK     = 0x20,
  82         PCF50606_OOCS_TEMPOK    = 0x40,
  83         PCF50606_OOCS_WDTEXP    = 0x80,
  84 };
  85
  86 enum pcf50606_reg_oocc1 {
  87         PCF50606_OOCC1_GOSTDBY  = 0x01,
  88         PCF50606_OOCC1_TOTRST   = 0x02,
  89         PCF50606_OOCC1_CLK32ON  = 0x04,
  90         PCF50606_OOCC1_WDTRST   = 0x08,
  91         PCF50606_OOCC1_RTCWAK   = 0x10,
  92         PCF50606_OOCC1_CHGWAK   = 0x20,
  93         PCF50606_OOCC1_EXTONWAK_HIGH    = 0x40,
  94         PCF50606_OOCC1_EXTONWAK_LOW     = 0x80,
  95         PCF50606_OOCC1_EXTONWAK_NO_WAKEUP = 0x3f,
  96 };
  97
  98 enum pcf50606_reg_oocc2 {
  99         PCF50606_OOCC2_ONKEYDB_NONE     = 0x00,
 100         PCF50606_OOCC2_ONKEYDB_14ms     = 0x01,
 101         PCF50606_OOCC2_ONKEYDB_62ms     = 0x02,
 102         PCF50606_OOCC2_ONKEYDB_500ms    = 0x03,
 103         PCF50606_OOCC2_EXTONDB_NONE     = 0x00,
 104         PCF50606_OOCC2_EXTONDB_14ms     = 0x04,
 105         PCF50606_OOCC2_EXTONDB_62ms     = 0x08,
 106         PCF50606_OOCC2_EXTONDB_500ms    = 0x0c,
 107 };
 108
 109 enum pcf50606_reg_int1 {
 110         PCF50606_INT1_ONKEYR    = 0x01, /* ONKEY rising edge */
 111         PCF50606_INT1_ONKEYF    = 0x02, /* ONKEY falling edge */
 112         PCF50606_INT1_ONKEY1S   = 0x04, /* OMKEY at least 1sec low */
 113         PCF50606_INT1_EXTONR    = 0x08, /* EXTON rising edge */
 114         PCF50606_INT1_EXTONF    = 0x10, /* EXTON falling edge */
 115         PCF50606_INT1_SECOND    = 0x40, /* RTC periodic second interrupt */
 116         PCF50606_INT1_ALARM     = 0x80, /* RTC alarm time is reached */
 117 };
 118
 119 enum pcf50606_reg_int2 {
 120         PCF50606_INT2_CHGINS    = 0x01, /* Charger inserted */
 121         PCF50606_INT2_CHGRM     = 0x02, /* Charger removed */
 122         PCF50606_INT2_CHGFOK    = 0x04, /* Fast charging OK */
 123         PCF50606_INT2_CHGERR    = 0x08, /* Error in charging mode */
 124         PCF50606_INT2_CHGFRDY   = 0x10, /* Fast charge completed */
 125         PCF50606_INT2_CHGPROT   = 0x20, /* Charging protection interrupt */
 126         PCF50606_INT2_CHGWD10S  = 0x40, /* Charger watchdig expires in 10s */
 127         PCF50606_INT2_CHGWDEXP  = 0x80, /* Charger watchdog expires */
 128 };
 129
 130 enum pcf50606_reg_int3 {
 131         PCF50606_INT3_ADCRDY    = 0x01, /* ADC conversion finished */
 132         PCF50606_INT3_ACDINS    = 0x02, /* Accessory inserted */
 133         PCF50606_INT3_ACDREM    = 0x04, /* Accessory removed */
 134         PCF50606_INT3_TSCPRES   = 0x08, /* Touch screen pressed */
 135         PCF50606_INT3_LOWBAT    = 0x40, /* Low battery voltage */
 136         PCF50606_INT3_HIGHTMP   = 0x80, /* High temperature */
 137 };
 138
 139 /* used by PSSC, PWROKM, PWROKS, */
 140 enum pcf50606_regu {
 141         PCF50606_REGU_DCD       = 0x01, /* DCD in phase 2 */
 142         PCF50606_REGU_DCDE      = 0x02, /* DCDE in phase 2 */
 143         PCF50606_REGU_DCUD      = 0x04, /* DCDU in phase 2 */
 144         PCF50606_REGU_IO        = 0x08, /* IO in phase 2 */
 145         PCF50606_REGU_D1        = 0x10, /* D1 in phase 2 */
 146         PCF50606_REGU_D2        = 0x20, /* D2 in phase 2 */
 147         PCF50606_REGU_D3        = 0x40, /* D3 in phase 2 */
 148         PCF50606_REGU_LP        = 0x80, /* LP in phase 2 */
 149 };
 150
 151 enum pcf50606_reg_dcdc4 {
 152         PCF50606_DCDC4_MODE_AUTO        = 0x00,
 153         PCF50606_DCDC4_MODE_PWM         = 0x01,
 154         PCF50606_DCDC4_MODE_PCF         = 0x02,
 155         PCF50606_DCDC4_OFF_FLOAT        = 0x00,
 156         PCF50606_DCDC4_OFF_BYPASS       = 0x04,
 157         PCF50606_DCDC4_OFF_PULLDOWN     = 0x08,
 158         PCF50606_DCDC4_CURLIM_500mA     = 0x00,
 159         PCF50606_DCDC4_CURLIM_750mA     = 0x10,
 160         PCF50606_DCDC4_CURLIM_1000mA    = 0x20,
 161         PCF50606_DCDC4_CURLIM_1250mA    = 0x30,
 162         PCF50606_DCDC4_TOGGLE           = 0x40,
 163         PCF50606_DCDC4_REGSEL_DCDC2     = 0x80,
 164 };
 165
 166 enum pcf50606_reg_dcdec2 {
 167         PCF50606_DCDEC2_MODE_AUTO       = 0x00,
 168         PCF50606_DCDEC2_MODE_PWM        = 0x01,
 169         PCF50606_DCDEC2_MODE_PCF        = 0x02,
 170         PCF50606_DCDEC2_OFF_FLOAT       = 0x00,
 171         PCF50606_DCDEC2_OFF_BYPASS      = 0x04,
 172 };
 173
 174 enum pcf50606_reg_dcudc2 {
 175         PCF50606_DCUDC2_MODE_AUTO       = 0x00,
 176         PCF50606_DCUDC2_MODE_PWM        = 0x01,
 177         PCF50606_DCUDC2_MODE_PCF        = 0x02,
 178         PCF50606_DCUDC2_OFF_FLOAT       = 0x00,
 179         PCF50606_DCUDC2_OFF_BYPASS      = 0x04,
 180 };
 181
 182 enum pcf50606_reg_adcc1 {
 183         PCF50606_ADCC1_TSCMODACT        = 0x01,
 184         PCF50606_ADCC1_TSCMODSTB        = 0x02,
 185         PCF50606_ADCC1_TRATSET          = 0x04,
 186         PCF50606_ADCC1_NTCSWAPE         = 0x08,
 187         PCF50606_ADCC1_NTCSWAOFF        = 0x10,
 188         PCF50606_ADCC1_EXTSYNCBREAK     = 0x20,
 189         /* reserved */
 190         PCF50606_ADCC1_TSCINT           = 0x80,
 191 };
 192
 193 enum pcf50606_reg_adcc2 {
 194         PCF50606_ADCC2_ADCSTART         = 0x01,
 195         /* see enum pcf50606_adcc2_adcmux */
 196         PCF50606_ADCC2_SYNC_NONE        = 0x00,
 197         PCF50606_ADCC2_SYNC_TXON        = 0x20,
 198         PCF50606_ADCC2_SYNC_PWREN1      = 0x40,
 199         PCF50606_ADCC2_SYNC_PWREN2      = 0x60,
 200         PCF50606_ADCC2_RES_10BIT        = 0x00,
 201         PCF50606_ADCC2_RES_8BIT         = 0x80,
 202 };
 203
 204 #define PCF50606_ADCC2_ADCMUX_MASK      (0xf << 1)
 205
 206 #define ADCMUX_SHIFT    1
 207 enum pcf50606_adcc2_adcmux {
 208         PCF50606_ADCMUX_BATVOLT_RES     = 0x0 << ADCMUX_SHIFT,
 209         PCF50606_ADCMUX_BATVOLT_SUBTR   = 0x1 << ADCMUX_SHIFT,
 210         PCF50606_ADCMUX_ADCIN1_RES      = 0x2 << ADCMUX_SHIFT,
 211         PCF50606_ADCMUX_ADCIN1_SUBTR    = 0x3 << ADCMUX_SHIFT,
 212         PCF50606_ADCMUX_BATTEMP         = 0x4 << ADCMUX_SHIFT,
 213         PCF50606_ADCMUX_ADCIN2          = 0x5 << ADCMUX_SHIFT,
 214         PCF50606_ADCMUX_ADCIN3          = 0x6 << ADCMUX_SHIFT,
 215         PCF50606_ADCMUX_ADCIN3_RATIO    = 0x7 << ADCMUX_SHIFT,
 216         PCF50606_ADCMUX_XPOS            = 0x8 << ADCMUX_SHIFT,
 217         PCF50606_ADCMUX_YPOS            = 0x9 << ADCMUX_SHIFT,
 218         PCF50606_ADCMUX_P1              = 0xa << ADCMUX_SHIFT,
 219         PCF50606_ADCMUX_P2              = 0xb << ADCMUX_SHIFT,
 220         PCF50606_ADCMUX_BATVOLT_ADCIN1  = 0xc << ADCMUX_SHIFT,
 221         PCF50606_ADCMUX_XY_SEQUENCE     = 0xe << ADCMUX_SHIFT,
 222         PCF50606_P1_P2_RESISTANCE       = 0xf << ADCMUX_SHIFT,
 223 };
 224
 225 enum pcf50606_adcs2 {
 226         PCF50606_ADCS2_ADCRDY           = 0x80,
 227 };
 228
 229 enum pcf50606_reg_mbcc1 {
 230         PCF50606_MBCC1_CHGAPE           = 0x01,
 231         PCF50606_MBCC1_AUTOFST          = 0x02,
 232 #define PCF50606_MBCC1_CHGMOD_MASK        0x1c
 233 #define PCF50606_MBCC1_CHGMOD_SHIFT       2
 234         PCF50606_MBCC1_CHGMOD_QUAL      = 0x00,
 235         PCF50606_MBCC1_CHGMOD_PRE       = 0x04,
 236         PCF50606_MBCC1_CHGMOD_TRICKLE   = 0x08,
 237         PCF50606_MBCC1_CHGMOD_FAST_CCCV = 0x0c,
 238         PCF50606_MBCC1_CHGMOD_FAST_NOCC = 0x10,
 239         PCF50606_MBCC1_CHGMOD_FAST_NOCV = 0x14,
 240         PCF50606_MBCC1_CHGMOD_FAST_SW   = 0x18,
 241         PCF50606_MBCC1_CHGMOD_IDLE      = 0x1c,
 242         PCF50606_MBCC1_DETMOD_LOWCHG    = 0x20,
 243         PCF50606_MBCC1_DETMOD_WDRST     = 0x40,
 244 };
 245
 246 enum pcf50606_reg_bvmc {
 247         PCF50606_BVMC_LOWBAT            = 0x01,
 248         PCF50606_BVMC_THRSHLD_NULL      = 0x00,
 249         PCF50606_BVMC_THRSHLD_2V8       = 0x02,
 250         PCF50606_BVMC_THRSHLD_2V9       = 0x04,
 251         PCF50606_BVMC_THRSHLD_3V        = 0x08,
 252         PCF50606_BVMC_THRSHLD_3V1       = 0x08,
 253         PCF50606_BVMC_THRSHLD_3V2       = 0x0a,
 254         PCF50606_BVMC_THRSHLD_3V3       = 0x0c,
 255         PCF50606_BVMC_THRSHLD_3V4       = 0x0e,
 256         PCF50606_BVMC_DISDB             = 0x10,
 257 };
 258
 259 /* this is to be provided by the board implementation */
 260 extern const u_int8_t pcf50606_initial_regs[__NUM_PCF50606_REGS];
 261
 262 void pcf50606_reg_write(u_int8_t reg, u_int8_t val);
 263
 264 u_int8_t pcf50606_reg_read(u_int8_t reg);
 265
 266 void pcf50606_reg_set_bit_mask(u_int8_t reg, u_int8_t mask, u_int8_t val);
 267 void pcf50606_reg_clear_bits(u_int8_t reg, u_int8_t bits);
 268
 269 void pcf50606_init(void);
 270 void pcf50606_charge_autofast(int on);
 271
 272 #endif /* _PCF50606_H */
 273