add SDHC support in mmc driver
[u-boot-openmoko/mini2440.git] / include / configs / smdk2440.h
blobe40adf087188375f80d7fbed0988105839380110
1 /*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 * Gary Jennejohn <gj@denx.de>
6 * David Mueller <d.mueller@elsoft.ch>
8 * Configuation settings for the SAMSUNG SMDK2440 board.
10 * See file CREDITS for list of people who contributed to this
11 * project.
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
29 #ifndef __CONFIG_H
30 #define __CONFIG_H
32 #if 0
33 /* If we want to start u-boot from usb bootloader in NOR flash */
34 #define CONFIG_SKIP_RELOCATE_UBOOT 1
35 #define CONFIG_SKIP_LOWLEVEL_INIT 1
36 #else
37 /* If we want to start u-boot directly from within NAND flash */
38 #define CONFIG_LL_INIT_NAND_ONLY
39 #define CONFIG_S3C2410_NAND_BOOT 1
40 #define CONFIG_S3C2410_NAND_SKIP_BAD 1
41 #endif
43 #define CFG_UBOOT_SIZE 0x40000 /* size of u-boot, for NAND loading */
46 * High Level Configuration Options
47 * (easy to change)
49 #define CONFIG_ARM920T 1 /* This is an ARM920T Core */
50 #define CONFIG_S3C2440 1 /* in a SAMSUNG S3C2440 SoC */
51 #define CONFIG_SMDK2440 1 /* on a SAMSUNG SMDK2440 Board */
53 /* input clock of PLL */
54 #define CONFIG_SYS_CLK_FREQ 16934400/* SMDK2440 has 16.9344MHz input clock */
57 #define USE_920T_MMU 1
58 #define CONFIG_USE_IRQ 1
59 //#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
62 * Size of malloc() pool
64 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 2048*1024)
65 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
68 * Hardware drivers
70 #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
71 #define CS8900_BASE 0x19000300
72 #define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
75 * select serial console configuration
77 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2440 */
78 #define CONFIG_HWFLOW 1
80 /************************************************************
81 * RTC
82 ************************************************************/
83 #define CONFIG_RTC_S3C24X0 1
85 /* allow to overwrite serial and ethaddr */
86 #define CONFIG_ENV_OVERWRITE
88 #define CONFIG_BAUDRATE 115200
90 /***********************************************************
91 * Command definition
92 ***********************************************************/
93 #include <config_cmd_default.h>
95 #define CONFIG_CMD_CACHE
96 #define CONFIG_CMD_DATE
97 #define CONFIG_CMD_DIAG
98 #define CONFIG_CMD_ELF
99 #define CONFIG_CMD_EXT2
100 #define CONFIG_CMD_FAT
101 #define CONFIG_CMD_JFFS2
102 #define CONFIG_CMD_MMC
103 #define CONFIG_CMD_NAND
104 #define CONFIG_CMD_PING
105 #define CONFIG_CMD_PORTIO
106 #define CONFIG_CMD_REGINFO
107 #define CONFIG_CMD_SAVES
108 #define CONFIG_CMD_USB
109 #define CONFIG_CMD_LICENSE
111 #define CONFIG_BOOTDELAY 3
112 #define CONFIG_BOOTARGS "root=/dev/mtdblock4 rootfstype=jffs2 console=ttySAC2,115200 loglevel=8"
113 #define CONFIG_ETHADDR 00:0c:20:02:0a:5b
114 #define CONFIG_NETMASK 255.255.255.0
115 #define CONFIG_IPADDR 192.168.1.100
116 #define CONFIG_SERVERIP 192.168.1.21
117 /*#define CONFIG_BOOTFILE "elinos-lart" */
118 //#define CONFIG_BOOTCOMMAND "nand read 0x32000000 0x34000 0x200000; bootm"
119 #define CONFIG_BOOTCOMMAND "nand read.e 0x32000000 0x100000 0x200000; bootm"
121 #define CONFIG_DOS_PARTITION 1
123 #if defined(CONFIG_CMD_KGDB)
124 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
125 /* what's this ? it's not used anywhere */
126 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
127 #endif
130 * Miscellaneous configurable options
132 #define CFG_LONGHELP /* undef to save memory */
133 #define CFG_PROMPT "SMDK2440 # " /* Monitor Command Prompt */
134 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
135 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
136 #define CFG_MAXARGS 32 /* max number of command args */
137 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
139 #define CFG_MEMTEST_START 0x30000000 /* memtest works on */
140 #define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
142 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
144 #define CFG_LOAD_ADDR 0x32000000 /* default load address */
146 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
147 /* it to wrap 100 times (total 1562500) to get 1 sec. */
148 #define CFG_HZ 1562500
150 /* valid baudrates */
151 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
153 /*-----------------------------------------------------------------------
154 * Stack sizes
156 * The stack sizes are set up in start.S using the settings below
158 #define CONFIG_STACKSIZE (512*1024) /* regular stack */
159 #ifdef CONFIG_USE_IRQ
160 #define CONFIG_STACKSIZE_IRQ (8*1024) /* IRQ stack */
161 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
162 #endif
164 /* IDE/ATA config */
166 #if 0
167 #define CFG_IDE_MAXBUS 1
168 #define CFG_IDE_MAXDEVICE 2
169 #define CFG_IDE_PREINIT 0
171 #define CFG_ATA_BASE_ADDR
172 #endif
174 #define CONFIG_USB_OHCI_NEW 1
175 #define CFG_USB_OHCI_CPU_INIT 1
176 #define CFG_USB_OHCI_REGS_BASE 0x49000000 /* S3C24X0_USB_HOST_BASE */
177 #define CFG_USB_OHCI_SLOT_NAME "s3c2440"
178 #define CFG_USB_OHCI_MAX_ROOT_PORTS 2
180 #define CONFIG_USB_DEVICE 1
181 #define CONFIG_USB_TTY 1
182 #define CFG_CONSOLE_IS_IN_ENV 1
183 #define CONFIG_USBD_VENDORID 0x1457 /* FIC */
184 #define CONFIG_USBD_PRODUCTID_GSERIAL 0x5120 /* gserial */
185 #define CONFIG_USBD_PRODUCTID_CDCACM 0x511b /* SMDK2440 CDC ACM */
186 #define CONFIG_USBD_MANUFACTURER "OpenMoko, Inc."
187 #define CONFIG_USBD_PRODUCT_NAME "S3C2440 Bootloader " U_BOOT_VERSION
188 #define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm\0"
189 #define CONFIG_USBD_DFU 1
190 #define CONFIG_USBD_DFU_XFER_SIZE 4096
191 #define CONFIG_USBD_DFU_INTERFACE 2
193 /*-----------------------------------------------------------------------
194 * Physical Memory Map
196 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
197 #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
198 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
200 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
202 #define CFG_FLASH_BASE PHYS_FLASH_1
204 /*-----------------------------------------------------------------------
205 * FLASH and environment organization
208 #define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
209 #if 0
210 #define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
211 #endif
213 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
214 #ifdef CONFIG_AMD_LV800
215 #define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
216 #define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
217 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
218 #endif
219 #ifdef CONFIG_AMD_LV400
220 #define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
221 #define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
222 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr of environment */
223 #endif
225 /* timeout values are in ticks */
226 #define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */
227 #define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */
229 #define CFG_ENV_IS_IN_NAND 1
230 #define CFG_ENV_SIZE 0x20000 /* 128k Total Size of Environment Sector */
231 #define CFG_ENV_OFFSET_OOB 1
232 #define CFG_PREBOOT_OVERRIDE 1
234 #define NAND_MAX_CHIPS 1
235 #define CFG_NAND_BASE 0x4e000000
236 #define CFG_MAX_NAND_DEVICE 1
238 #define CONFIG_MMC 1
239 #define CONFIG_MMC_S3C 1 /* Enabling the MMC driver */
240 #define CFG_MMC_BASE 0xff000000
242 #define CONFIG_EXT2 1
244 #define CONFIG_NEW_QT2440 0
246 /* FAT driver in u-boot is broken currently */
247 #define CONFIG_FAT 1
248 #define CONFIG_SUPPORT_VFAT
250 #if 1
251 /* JFFS2 driver */
252 #define CONFIG_JFFS2_CMDLINE 1
253 #define CONFIG_JFFS2_NAND 1
254 #define CONFIG_JFFS2_NAND_DEV 0
255 //#define CONFIG_JFFS2_NAND_OFF 0x634000
256 //#define CONFIG_JFFS2_NAND_SIZE 0x39cc000
257 #endif
259 /* ATAG configuration */
260 #define CONFIG_INITRD_TAG 1
261 #define CONFIG_SETUP_MEMORY_TAGS 1
262 #define CONFIG_CMDLINE_TAG 1
263 #if 0
264 #define CONFIG_SERIAL_TAG 1
265 #define CONFIG_REVISION_TAG 1
266 #endif
269 #if 0
270 #define CONFIG_VIDEO
271 #define CONFIG_VIDEO_S3C2410
272 #define CONFIG_CFB_CONSOLE
273 #define CONFIG_VIDEO_LOGO
274 #define CONFIG_VGA_AS_SINGLE_DEVICE
276 #define VIDEO_KBD_INIT_FCT 0
277 #define VIDEO_TSTC_FCT serial_tstc
278 #define VIDEO_GETC_FCT serial_getc
280 #define LCD_VIDEO_ADDR 0x33d00000
281 #endif
283 #define CONFIG_S3C2410_NAND_BBT 1
284 //#define CONFIG_S3C2410_NAND_HWECC 1
286 #define CFG_NAND_YAFFS_WRITE
287 #define CFG_NAND_YAFFS1_NEW_OOB_LAYOUT
289 #define MTDIDS_DEFAULT "nand0=smdk2440-nand"
290 #define MTPARTS_DEFAULT "smdk2440-nand:0x00100000(u-boot),0x00200000(kernel),0x00200000(update),0x00100000(splash),0x01400000(jffs2),-(temp)"
291 #define CFG_NAND_DYNPART_MTD_KERNEL_NAME "smdk2440-nand"
292 #define CONFIG_NAND_DYNPART
294 #endif /* __CONFIG_H */