add SDHC support in mmc driver
[u-boot-openmoko/mini2440.git] / include / configs / lpc2292sodimm.h
blobe3fef5e2ce9e0f021e5e86b6d48726f53dbffe6f
1 /*
2 * (C) Copyright 2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * Configuation settings for the LPC2292SODIMM board from Embedded Artists.
7 * See file CREDITS for list of people who contributed to this
8 * project.
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
26 #ifndef __CONFIG_H
27 #define __CONFIG_H
30 * If we are developing, we might want to start u-boot from ram
31 * so we MUST NOT initialize critical regs like mem-timing ...
33 #undef CONFIG_INIT_CRITICAL /* undef for developing */
35 #undef CONFIG_SKIP_LOWLEVEL_INIT
36 #undef CONFIG_SKIP_RELOCATE_UBOOT
39 * High Level Configuration Options
40 * (easy to change)
42 #define CONFIG_ARM7 1 /* This is a ARM7 CPU */
43 #define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
44 #define CONFIG_LPC2292
45 #undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
47 #undef CONFIG_USE_IRQ /* don't need them anymore */
50 * Size of malloc() pool
52 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
53 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
56 * Hardware drivers
60 * select serial console configuration
62 #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
67 #define CONFIG_BAUDRATE 115200
70 * BOOTP options
72 #define CONFIG_BOOTP_SUBNETMASK
73 #define CONFIG_BOOTP_GATEWAY
74 #define CONFIG_BOOTP_HOSTNAME
75 #define CONFIG_BOOTP_BOOTPATH
76 #define CONFIG_BOOTP_BOOTFILESIZE
80 * Command line configuration.
82 #include <config_cmd_default.h>
84 #define CONFIG_CMD_DHCP
85 #define CONFIG_CMD_FAT
86 #define CONFIG_CMD_MMC
87 #define CONFIG_CMD_NET
88 #define CONFIG_CMD_PING
91 #define CONFIG_MAC_PARTITION
92 #define CONFIG_DOS_PARTITION
94 #define CONFIG_BOOTDELAY 5
97 * Miscellaneous configurable options
99 #define CFG_LONGHELP /* undef to save memory */
100 #define CFG_PROMPT "LPC2292SODIMM # " /* Monitor Command Prompt */
101 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
102 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
103 #define CFG_MAXARGS 16 /* max number of command args */
104 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
106 #define CFG_MEMTEST_START 0x40000000 /* memtest works on */
107 #define CFG_MEMTEST_END 0x40000000 /* 4 ... 8 MB in DRAM */
109 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
111 #define CFG_LOAD_ADDR 0x00040000 /* default load address for */
112 /* armadillo: kernel img is here*/
114 #define CFG_SYS_CLK_FREQ 58982400 /* Hz */
115 #define CFG_HZ 2048 /* decrementer freq in Hz */
117 /* valid baudrates */
118 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
120 /*-----------------------------------------------------------------------
121 * Stack sizes
123 * The stack sizes are set up in start.S using the settings below
125 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
126 #ifdef CONFIG_USE_IRQ
127 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
128 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
129 #endif
131 /*-----------------------------------------------------------------------
132 * Physical Memory Map
134 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
135 #define PHYS_SDRAM_1 0x81000000 /* SDRAM Bank #1 */
136 #define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB SDRAM */
138 #define PHYS_FLASH_1 0x80000000 /* Flash Bank #1 */
139 #define PHYS_FLASH_SIZE 0x00200000 /* 2 MB */
141 #define CFG_FLASH_BASE PHYS_FLASH_1
143 /*-----------------------------------------------------------------------
144 * FLASH and environment organization
146 #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
147 #define CFG_MAX_FLASH_SECT 1024 /* max number of sectors on one chip */
149 /* timeout values are in ticks */
150 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
151 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
153 #define CFG_ENV_IS_IN_FLASH 1
154 #define CFG_ENV_ADDR (0x0 + 0x3C000) /* Addr of Environment Sector */
155 #define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
157 #define CONFIG_CMDLINE_TAG
158 #define CONFIG_SETUP_MEMORY_TAGS
159 #define CONFIG_INITRD_TAG
160 #define CONFIG_MMC 1
161 /* we use this ethernet chip */
162 #define CONFIG_ENC28J60
164 #endif /* __CONFIG_H */