add SDHC support in mmc driver
[u-boot-openmoko/mini2440.git] / include / configs / ep7312.h
blobf5cf477a31356437e40b13c70c8e078237e051dc
1 /*
2 * (C) Copyright 2000
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
6 * Configuation settings for the EP7312 board.
8 * See file CREDITS for list of people who contributed to this
9 * project.
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
31 * High Level Configuration Options
32 * (easy to change)
34 #define CONFIG_ARM7 1 /* This is a ARM7 CPU */
35 #define CONFIG_EP7312 1 /* on an EP7312 Board */
36 #define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
37 #undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
39 #undef CONFIG_USE_IRQ /* don't need them anymore */
42 * Size of malloc() pool
44 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
45 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
48 * Hardware drivers
50 #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
51 #define CS8900_BASE 0x20000000
52 #define CS8900_BUS16 1
53 #undef CS8900_BUS32
56 * select serial console configuration
58 #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
60 /* allow to overwrite serial and ethaddr */
61 #define CONFIG_ENV_OVERWRITE
63 #define CONFIG_BAUDRATE 9600
66 * BOOTP options
68 #define CONFIG_BOOTP_SUBNETMASK
69 #define CONFIG_BOOTP_GATEWAY
70 #define CONFIG_BOOTP_HOSTNAME
71 #define CONFIG_BOOTP_BOOTPATH
72 #define CONFIG_BOOTP_BOOTFILESIZE
76 * Command line configuration.
78 #include <config_cmd_default.h>
80 #define CONFIG_CMD_JFFS2
83 #define CONFIG_BOOTDELAY 3
84 #define CONFIG_BOOTARGS "devfs=mount root=ramfs console=ttyS0,9600"
85 #define CONFIG_ETHADDR 08:00:3e:21:c7:f7
86 /*#define CONFIG_NETMASK 255.255.0.0 */
87 /*#define CONFIG_IPADDR 172.22.2.128 */
88 /*#define CONFIG_SERVERIP 172.22.2.126 */
89 /*#define CONFIG_BOOTFILE "impa7" */
90 #define CONFIG_BOOTCOMMAND "bootp;bootm"
92 #if defined(CONFIG_CMD_KGDB)
93 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
94 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
95 #endif
98 * Miscellaneous configurable options
100 #define CFG_LONGHELP /* undef to save memory */
101 #define CFG_PROMPT "EP7312 # " /* Monitor Command Prompt */
102 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
103 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
104 #define CFG_MAXARGS 16 /* max number of command args */
105 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
107 #define CFG_MEMTEST_START 0xc0400000 /* memtest works on */
108 #define CFG_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
110 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
112 #define CFG_LOAD_ADDR 0xc0500000 /* default load address */
114 #define CFG_HZ 2000 /* decrementer freq: 2 kHz */
116 /* valid baudrates */
117 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
119 /*-----------------------------------------------------------------------
120 * Stack sizes
122 * The stack sizes are set up in start.S using the settings below
124 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
125 #ifdef CONFIG_USE_IRQ
126 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
127 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
128 #endif
130 /*-----------------------------------------------------------------------
131 * Physical Memory Map
133 #define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */
134 #define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
135 #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
137 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
138 #define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
140 #define CFG_FLASH_BASE PHYS_FLASH_1
142 /*-----------------------------------------------------------------------
143 * FLASH and environment organization
145 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
146 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
148 /* timeout values are in ticks */
149 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
150 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
152 #define CFG_ENV_IS_IN_FLASH 1
153 #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) /* Addr of Environment Sector */
154 #define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
157 * JFFS2 partitions
160 /* No command line, one static partition, whole device */
161 #undef CONFIG_JFFS2_CMDLINE
162 #define CONFIG_JFFS2_DEV "nor0"
163 #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
164 #define CONFIG_JFFS2_PART_OFFSET 0x00000000
166 /* mtdparts command line support */
167 /* Note: fake mtd_id used, no linux mtd map file */
169 #define CONFIG_JFFS2_CMDLINE
170 #define MTDIDS_DEFAULT "nor0=ep7312-0"
171 #define MTDPARTS_DEFAULT "mtdparts=ep7312-0:-(jffs2)"
174 #endif /* __CONFIG_H */