include/configs/MigoR.h

   1 /*
   2  * Configuation settings for the Renesas Solutions Migo-R board
   3  *
   4  * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25 #ifndef __MIGO_R_H
  26 #define __MIGO_R_H
  27
  28 #undef DEBUG
  29 #define CONFIG_SH               1
  30 #define CONFIG_SH4              1
  31 #define CONFIG_CPU_SH7722       1
  32 #define CONFIG_MIGO_R           1
  33
  34 #define CONFIG_CMD_LOADB
  35 #define CONFIG_CMD_LOADS
  36 #define CONFIG_CMD_FLASH
  37 #define CONFIG_CMD_MEMORY
  38 #define CONFIG_CMD_NET
  39 #define CONFIG_CMD_PING
  40 #define CONFIG_CMD_NFS
  41 #define CONFIG_CMD_DFL
  42 #define CONFIG_CMD_SDRAM
  43 #define CONFIG_CMD_ENV
  44
  45 #define CONFIG_BAUDRATE         115200
  46 #define CONFIG_BOOTDELAY        3
  47 #define CONFIG_BOOTARGS         "console=ttySC0,115200 root=1f01"
  48 #define CONFIG_NETMASK          255.255.255.0
  49 #define CONFIG_IPADDR           192.168.10.100
  50 #define CONFIG_SERVERIP         192.168.10.77
  51 #define CONFIG_GATEWAYIP        192.168.10.77
  52
  53 #define CONFIG_VERSION_VARIABLE
  54 #undef  CONFIG_SHOW_BOOT_PROGRESS
  55
  56 /* SMC9111 */
  57 #define CONFIG_DRIVER_SMC91111
  58 #define CONFIG_SMC91111_BASE    (0xB0000000)
  59
  60 /* MEMORY */
  61 #define MIGO_R_SDRAM_BASE       (0x8C000000)
  62 #define MIGO_R_FLASH_BASE_1     (0xA0000000)
  63 #define MIGO_R_FLASH_BANK_SIZE  (64 * 1024 * 1024)
  64
  65 #define CFG_LONGHELP                    /* undef to save memory */
  66 #define CFG_PROMPT              "=> "   /* Monitor Command Prompt */
  67 #define CFG_CBSIZE              256             /* Buffer size for input from the Console */
  68 #define CFG_PBSIZE              256             /* Buffer size for Console output */
  69 #define CFG_MAXARGS             16              /* max args accepted for monitor commands */
  70 #define CFG_BARGSIZE    512             /* Buffer size for Boot Arguments passed to kernel */
  71 #define CFG_BAUDRATE_TABLE      { 115200 }      /* List of legal baudrate settings for this board */
  72
  73 /* SCIF */
  74 #define CFG_SCIF_CONSOLE        1
  75 #define CONFIG_CONS_SCIF0       1
  76 #undef  CFG_CONSOLE_INFO_QUIET  /* Suppress display of console
  77                                                                    information at boot */
  78 #undef  CFG_CONSOLE_OVERWRITE_ROUTINE
  79 #undef  CFG_CONSOLE_ENV_OVERWRITE
  80
  81 #define CFG_MEMTEST_START       (MIGO_R_SDRAM_BASE)
  82 #define CFG_MEMTEST_END         (CFG_MEMTEST_START + (60 * 1024 * 1024))
  83
  84 /* Enable alternate, more extensive, memory test */
  85 #undef  CFG_ALT_MEMTEST
  86 /* Scratch address used by the alternate memory test */
  87 #undef  CFG_MEMTEST_SCRATCH
  88
  89 /* Enable temporary baudrate change while serial download */
  90 #undef  CFG_LOADS_BAUD_CHANGE
  91
  92 #define CFG_SDRAM_BASE  (MIGO_R_SDRAM_BASE)
  93 /* maybe more, but if so u-boot doesn't know about it... */
  94 #define CFG_SDRAM_SIZE  (64 * 1024 * 1024)
  95 /* default load address for scripts ?!? */
  96 #define CFG_LOAD_ADDR   (CFG_SDRAM_BASE + 16 * 1024 * 1024)
  97
  98 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
  99 #define CFG_MONITOR_BASE        (MIGO_R_FLASH_BASE_1)
 100 /* Monitor size */
 101 #define CFG_MONITOR_LEN (128 * 1024)
 102 /* Size of DRAM reserved for malloc() use */
 103 #define CFG_MALLOC_LEN  (256 * 1024)
 104 /* size in bytes reserved for initial data */
 105 #define CFG_GBL_DATA_SIZE       (256)
 106 #define CFG_BOOTMAPSZ   (8 * 1024 * 1024)
 107
 108 /* FLASH */
 109 #define CFG_FLASH_CFI
 110 #define CFG_FLASH_CFI_DRIVER
 111 #undef  CFG_FLASH_QUIET_TEST
 112 /* print 'E' for empty sector on flinfo */
 113 #define CFG_FLASH_EMPTY_INFO
 114 /* Physical start address of Flash memory */
 115 #define CFG_FLASH_BASE  (MIGO_R_FLASH_BASE_1)
 116 /* Max number of sectors on each Flash chip */
 117 #define CFG_MAX_FLASH_SECT      512
 118
 119 /* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */
 120 #define CFG_MAX_FLASH_BANKS     1
 121 #define CFG_FLASH_BANKS_LIST    { CFG_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) }
 122
 123 /* Timeout for Flash erase operations (in ms) */
 124 #define CFG_FLASH_ERASE_TOUT    (3 * 1000)
 125 /* Timeout for Flash write operations (in ms) */
 126 #define CFG_FLASH_WRITE_TOUT    (3 * 1000)
 127 /* Timeout for Flash set sector lock bit operations (in ms) */
 128 #define CFG_FLASH_LOCK_TOUT     (3 * 1000)
 129 /* Timeout for Flash clear lock bit operations (in ms) */
 130 #define CFG_FLASH_UNLOCK_TOUT   (3 * 1000)
 131
 132 /* Use hardware flash sectors protection instead of U-Boot software protection */
 133 #undef  CFG_FLASH_PROTECTION
 134 #undef  CFG_DIRECT_FLASH_TFTP
 135
 136 /* ENV setting */
 137 #define CFG_ENV_IS_IN_FLASH
 138 #define CONFIG_ENV_OVERWRITE    1
 139 #define CFG_ENV_SECT_SIZE       (128 * 1024)
 140 #define CFG_ENV_SIZE            (CFG_ENV_SECT_SIZE)
 141 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + CFG_MONITOR_LEN)
 142 /* Offset of env Flash sector relative to CFG_FLASH_BASE */
 143 #define CFG_ENV_OFFSET          (CFG_ENV_ADDR - CFG_FLASH_BASE)
 144 #define CFG_ENV_SIZE_REDUND     (CFG_ENV_SECT_SIZE)
 145
 146 /* Board Clock */
 147 #define CONFIG_SYS_CLK_FREQ     33333333
 148 #define TMU_CLK_DIVIDER         (4)     /* 4 (default), 16, 64, 256 or 1024 */
 149 #define CFG_HZ                  (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
 150
 151 #endif  /* __MIGO_R_H */