include/configs/DK1C20.h

   1 /*
   2  * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
   3  * Scott McNutt <smcnutt@psyent.com>
   4  * Stephan Linz <linz@li-pro.net>
   5  *
   6  * CompactFlash/IDE:
   7  * (C) Copyright 2004, Shlomo Kut <skut@vyyo.com>
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /***********************************************************************
  32  * Include the whole NIOS CPU configuration.
  33  *
  34  * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!!
  35  *
  36  ***********************************************************************/
  37
  38 #if     defined(CONFIG_NIOS_SAFE_32)
  39 #include <configs/DK1C20_safe_32.h>
  40 #elif   defined(CONFIG_NIOS_STANDARD_32)
  41 #include <configs/DK1C20_standard_32.h>
  42 #else
  43 #error *** CFG_ERROR: you have to setup right NIOS CPU configuration
  44 #endif
  45
  46 /*------------------------------------------------------------------------
  47  * BOARD/CPU -- TOP-LEVEL
  48  *----------------------------------------------------------------------*/
  49 #define CONFIG_NIOS             1               /* NIOS-32 core         */
  50 #define CONFIG_DK1C20           1               /* Cyclone DK-1C20 board*/
  51 #define CONFIG_SYS_CLK_FREQ     CFG_NIOS_CPU_CLK/* 50 MHz core clock    */
  52 #define CFG_HZ                  1000            /* 1 msec time tick     */
  53 #undef  CFG_CLKS_IN_HZ
  54 #define CONFIG_BOARD_EARLY_INIT_F 1     /* enable early board-spec. init*/
  55
  56 /*------------------------------------------------------------------------
  57  * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)
  58  *----------------------------------------------------------------------*/
  59 #if     (CFG_NIOS_CPU_SDRAM_SIZE != 0)
  60
  61 #define CFG_SDRAM_BASE          CFG_NIOS_CPU_SDRAM_BASE
  62 #define CFG_SDRAM_SIZE          CFG_NIOS_CPU_SDRAM_SIZE
  63
  64 #else
  65 #error *** CFG_ERROR: you have to setup any SDRAM in NIOS CPU config
  66 #endif
  67
  68 #define CFG_SRAM_BASE           CFG_NIOS_CPU_SRAM_BASE
  69 #define CFG_SRAM_SIZE           CFG_NIOS_CPU_SRAM_SIZE
  70 #define CFG_VECT_BASE           CFG_NIOS_CPU_VEC_BASE
  71
  72 /*------------------------------------------------------------------------
  73  * MEMORY ORGANIZATION - For the most part, you can put things pretty
  74  * much anywhere. This is pretty flexible for Nios. So here we make some
  75  * arbitrary choices & assume that the monitor is placed at the end of
  76  * a memory resource (so you must make sure TEXT_BASE is chosen
  77  * appropriately).
  78  *
  79  *      -The heap is placed below the monitor.
  80  *      -Global data is placed below the heap.
  81  *      -The stack is placed below global data (&grows down).
  82  *----------------------------------------------------------------------*/
  83 #define CFG_MONITOR_LEN         (256 * 1024)    /* Reserve 256k         */
  84 #define CFG_GBL_DATA_SIZE       128             /* Global data size rsvd*/
  85 #define CFG_MALLOC_LEN          (CFG_ENV_SIZE + 128*1024)
  86
  87 #define CFG_MONITOR_BASE        TEXT_BASE
  88 #define CFG_MALLOC_BASE         (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
  89 #define CFG_GBL_DATA_OFFSET     (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
  90 #define CFG_INIT_SP             CFG_GBL_DATA_OFFSET
  91
  92 /*------------------------------------------------------------------------
  93  * FLASH (AM29LV065D)
  94  *----------------------------------------------------------------------*/
  95 #if     (CFG_NIOS_CPU_FLASH_SIZE != 0)
  96
  97 #define CFG_FLASH_BASE          CFG_NIOS_CPU_FLASH_BASE
  98 #define CFG_FLASH_SIZE          CFG_NIOS_CPU_FLASH_SIZE
  99 #define CFG_MAX_FLASH_SECT      128             /* Max # sects per bank */
 100 #define CFG_MAX_FLASH_BANKS     1               /* Max # of flash banks */
 101 #define CFG_FLASH_ERASE_TOUT    8000            /* Erase timeout (msec) */
 102 #define CFG_FLASH_WRITE_TOUT    100             /* Write timeout (msec) */
 103 #define CFG_FLASH_WORD_SIZE     unsigned char   /* flash word size      */
 104
 105 #else
 106 #error *** CFG_ERROR: you have to setup any Flash memory in NIOS CPU config
 107 #endif
 108
 109 /*------------------------------------------------------------------------
 110  * ENVIRONMENT
 111  *----------------------------------------------------------------------*/
 112 #if     (CFG_NIOS_CPU_FLASH_SIZE != 0)
 113
 114 #define CFG_ENV_IS_IN_FLASH     1               /* Environment in flash */
 115 #define CFG_ENV_ADDR            CFG_FLASH_BASE  /* Mem addr of env      */
 116 #define CFG_ENV_SIZE            (64 * 1024)     /* 64 KByte (1 sector)  */
 117 #define CONFIG_ENV_OVERWRITE                    /* Serial/eth change Ok */
 118
 119 #else
 120 #define CFG_ENV_IS_NOWHERE      1               /* NO Environment       */
 121 #endif
 122
 123 /*------------------------------------------------------------------------
 124  * CONSOLE
 125  *----------------------------------------------------------------------*/
 126 #if     (CFG_NIOS_CPU_UART_NUMS != 0)
 127
 128 #define CFG_NIOS_CONSOLE        CFG_NIOS_CPU_UART0 /* 1st UART is Cons. */
 129
 130 #if     (CFG_NIOS_CPU_UART0_BR != 0)
 131 #define CFG_NIOS_FIXEDBAUD      1                  /* Baudrate is fixed */
 132 #define CONFIG_BAUDRATE         CFG_NIOS_CPU_UART0_BR
 133 #else
 134 #undef  CFG_NIOS_FIXEDBAUD
 135 #define CONFIG_BAUDRATE         115200
 136 #endif
 137
 138 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
 139
 140 #else
 141 #error *** CFG_ERROR: you have to setup at least one UART in NIOS CPU config
 142 #endif
 143
 144 /*------------------------------------------------------------------------
 145  * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc  PIT,
 146  * so an avalon bus timer is required.
 147  *----------------------------------------------------------------------*/
 148 #if     (CFG_NIOS_CPU_TIMER_NUMS != 0)
 149
 150 #if     (CFG_NIOS_CPU_TICK_TIMER == 0)
 151
 152 #define CFG_NIOS_TMRBASE        CFG_NIOS_CPU_TIMER0 /* TIMER0 as tick   */
 153 #define CFG_NIOS_TMRIRQ         CFG_NIOS_CPU_TIMER0_IRQ
 154
 155 #if     (CFG_NIOS_CPU_TIMER0_FP == 1)               /* fixed period */
 156
 157 #if     (CFG_NIOS_CPU_TIMER0_PER >= CFG_HZ)
 158 #define CFG_NIOS_TMRMS          (CFG_NIOS_CPU_TIMER0_PER / CFG_HZ)
 159 #else
 160 #error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ
 161 #endif
 162
 163 #undef  CFG_NIOS_TMRCNT /* no preloadable counter value */
 164
 165 #elif   (CFG_NIOS_CPU_TIMER0_FP == 0)               /* variable period */
 166
 167 #if     (CFG_HZ <= 1000)
 168 #define CFG_NIOS_TMRMS          (1000 / CFG_HZ)
 169 #else
 170 #error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000
 171 #endif
 172
 173 #define CFG_NIOS_TMRCNT         (CONFIG_SYS_CLK_FREQ / CFG_HZ)
 174
 175 #else
 176 #error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER0_FP correct
 177 #endif
 178
 179 #elif   (CFG_NIOS_CPU_TICK_TIMER == 1)
 180
 181 #define CFG_NIOS_TMRBASE        CFG_NIOS_CPU_TIMER1 /* TIMER1 as tick   */
 182 #define CFG_NIOS_TMRIRQ         CFG_NIOS_CPU_TIMER1_IRQ
 183
 184 #if     (CFG_NIOS_CPU_TIMER1_FP == 1)               /* fixed period */
 185
 186 #if     (CFG_NIOS_CPU_TIMER1_PER >= CFG_HZ)
 187 #define CFG_NIOS_TMRMS          (CFG_NIOS_CPU_TIMER1_PER / CFG_HZ)
 188 #else
 189 #error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ
 190 #endif
 191
 192 #undef  CFG_NIOS_TMRCNT /* no preloadable counter value */
 193
 194 #elif   (CFG_NIOS_CPU_TIMER1_FP == 0)               /* variable period */
 195
 196 #if     (CFG_HZ <= 1000)
 197 #define CFG_NIOS_TMRMS          (1000 / CFG_HZ)
 198 #else
 199 #error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000
 200 #endif
 201
 202 #define CFG_NIOS_TMRCNT         (CONFIG_SYS_CLK_FREQ / CFG_HZ)
 203
 204 #else
 205 #error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER1_FP correct
 206 #endif
 207
 208 #endif  /* CFG_NIOS_CPU_TICK_TIMER */
 209
 210 #else
 211 #error *** CFG_ERROR: you have to setup at least one TIMER in NIOS CPU config
 212 #endif
 213
 214 /*------------------------------------------------------------------------
 215  * Ethernet
 216  *----------------------------------------------------------------------*/
 217 #if     (CFG_NIOS_CPU_LAN_NUMS == 1)
 218
 219 #if     (CFG_NIOS_CPU_LAN0_TYPE == 0)           /* LAN91C111            */
 220
 221 #define CONFIG_DRIVER_SMC91111                  /* Using SMC91c111      */
 222 #undef  CONFIG_SMC91111_EXT_PHY                 /* Internal PHY         */
 223 #define CONFIG_SMC91111_BASE    (CFG_NIOS_CPU_LAN0_BASE + CFG_NIOS_CPU_LAN0_OFFS)
 224
 225 #if     (CFG_NIOS_CPU_LAN0_BUSW == 32)
 226 #define CONFIG_SMC_USE_32_BIT   1
 227 #else   /* no */
 228 #undef  CONFIG_SMC_USE_32_BIT
 229 #endif
 230
 231 #elif   (CFG_NIOS_CPU_LAN0_TYPE == 1)           /* CS8900A              */
 232
 233         /********************************************/
 234         /* !!! CS8900 is __not__ tested on NIOS !!! */
 235         /********************************************/
 236 #define CONFIG_DRIVER_CS8900                    /* Using CS8900         */
 237 #define CS8900_BASE             (CFG_NIOS_CPU_LAN0_BASE + CFG_NIOS_CPU_LAN0_OFFS)
 238
 239 #if     (CFG_NIOS_CPU_LAN0_BUSW == 32)
 240 #undef  CS8900_BUS16
 241 #define CS8900_BUS32            1
 242 #else   /* no */
 243 #define CS8900_BUS16            1
 244 #undef  CS8900_BUS32
 245 #endif
 246
 247 #else
 248 #error *** CFG_ERROR: invalid LAN0 chip type, check your NIOS CPU config
 249 #endif
 250
 251 #define CONFIG_ETHADDR          08:00:3e:26:0a:5b
 252 #define CONFIG_NETMASK          255.255.255.0
 253 #define CONFIG_IPADDR           192.168.2.21
 254 #define CONFIG_SERVERIP         192.168.2.16
 255
 256 #else
 257 #error *** CFG_ERROR: you have to setup just one LAN only or expand your config.h
 258 #endif
 259
 260 /*------------------------------------------------------------------------
 261  * STATUS LEDs
 262  *----------------------------------------------------------------------*/
 263 #if     (CFG_NIOS_CPU_PIO_NUMS != 0)
 264
 265 #if     (CFG_NIOS_CPU_LED_PIO == 0)
 266
 267 #error *** CFG_ERROR: status LEDs at PIO0 not supported, expand your config.h
 268
 269 #elif   (CFG_NIOS_CPU_LED_PIO == 1)
 270
 271 #error *** CFG_ERROR: status LEDs at PIO1 not supported, expand your config.h
 272
 273 #elif   (CFG_NIOS_CPU_LED_PIO == 2)
 274
 275 #define STATUS_LED_BASE                 CFG_NIOS_CPU_PIO2
 276 #define STATUS_LED_BITS                 CFG_NIOS_CPU_PIO2_BITS
 277 #define STATUS_LED_ACTIVE               1 /* LED on for bit == 1 */
 278
 279 #if     (CFG_NIOS_CPU_PIO2_TYPE == 1)
 280 #define STATUS_LED_WRONLY               1
 281 #else
 282 #undef  STATUS_LED_WRONLY
 283 #endif
 284
 285 #elif   (CFG_NIOS_CPU_LED_PIO == 3)
 286
 287 #error *** CFG_ERROR: status LEDs at PIO3 not supported, expand your config.h
 288
 289 #elif   (CFG_NIOS_CPU_LED_PIO == 4)
 290
 291 #error *** CFG_ERROR: status LEDs at PIO4 not supported, expand your config.h
 292
 293 #elif   (CFG_NIOS_CPU_LED_PIO == 5)
 294
 295 #error *** CFG_ERROR: status LEDs at PIO5 not supported, expand your config.h
 296
 297 #elif   (CFG_NIOS_CPU_LED_PIO == 6)
 298
 299 #error *** CFG_ERROR: status LEDs at PIO6 not supported, expand your config.h
 300
 301 #elif   (CFG_NIOS_CPU_LED_PIO == 7)
 302
 303 #error *** CFG_ERROR: status LEDs at PIO7 not supported, expand your config.h
 304
 305 #elif   (CFG_NIOS_CPU_LED_PIO == 8)
 306
 307 #error *** CFG_ERROR: status LEDs at PIO8 not supported, expand your config.h
 308
 309 #elif   (CFG_NIOS_CPU_LED_PIO == 9)
 310
 311 #error *** CFG_ERROR: status LEDs at PIO9 not supported, expand your config.h
 312
 313 #else
 314 #error *** CFG_ERROR: you have to set CFG_NIOS_CPU_LED_PIO in right case
 315 #endif
 316
 317 #define CONFIG_STATUS_LED               1 /* enable status led driver */
 318
 319 #define STATUS_LED_BIT                  (1 << 0)        /* LED[0] */
 320 #define STATUS_LED_STATE                STATUS_LED_BLINKING
 321 #define STATUS_LED_BOOT_STATE           STATUS_LED_OFF
 322 #define STATUS_LED_PERIOD               (CFG_HZ / 10)   /* ca. 1 Hz */
 323 #define STATUS_LED_BOOT                 0               /* boot LED */
 324
 325 #if     (STATUS_LED_BITS > 1)
 326 #define STATUS_LED_BIT1                 (1 << 1)        /* LED[1] */
 327 #define STATUS_LED_STATE1               STATUS_LED_OFF
 328 #define STATUS_LED_PERIOD1              (CFG_HZ / 50)   /* ca. 5 Hz */
 329 #define STATUS_LED_RED                  1               /* fail LED */
 330 #endif
 331
 332 #if     (STATUS_LED_BITS > 2)
 333 #define STATUS_LED_BIT2                 (1 << 2)        /* LED[2] */
 334 #define STATUS_LED_STATE2               STATUS_LED_OFF
 335 #define STATUS_LED_PERIOD2              (CFG_HZ / 10)   /* ca. 1 Hz */
 336 #define STATUS_LED_YELLOW               2               /* info LED */
 337 #endif
 338
 339 #if     (STATUS_LED_BITS > 3)
 340 #define STATUS_LED_BIT3                 (1 << 3)        /* LED[3] */
 341 #define STATUS_LED_STATE3               STATUS_LED_OFF
 342 #define STATUS_LED_PERIOD3              (CFG_HZ / 10)   /* ca. 1 Hz */
 343 #define STATUS_LED_GREEN                3               /* info LED */
 344 #endif
 345
 346 #define STATUS_LED_PAR                  1 /* makes status_led.h happy */
 347
 348 #endif  /* CFG_NIOS_CPU_PIO_NUMS */
 349
 350 /*------------------------------------------------------------------------
 351  * SEVEN SEGMENT LED DISPLAY
 352  *----------------------------------------------------------------------*/
 353 #if     (CFG_NIOS_CPU_PIO_NUMS != 0)
 354
 355 #if     (CFG_NIOS_CPU_SEVENSEG_PIO == 0)
 356
 357 #error *** CFG_ERROR: seven segment display at PIO0 not supported, expand your config.h
 358
 359 #elif   (CFG_NIOS_CPU_SEVENSEG_PIO == 1)
 360
 361 #error *** CFG_ERROR: seven segment display at PIO1 not supported, expand your config.h
 362
 363 #elif   (CFG_NIOS_CPU_SEVENSEG_PIO == 2)
 364
 365 #error *** CFG_ERROR: seven segment display at PIO2 not supported, expand your config.h
 366
 367 #elif   (CFG_NIOS_CPU_SEVENSEG_PIO == 3)
 368
 369 #define SEVENSEG_BASE                   CFG_NIOS_CPU_PIO3
 370 #define SEVENSEG_BITS                   CFG_NIOS_CPU_PIO3_BITS
 371 #define SEVENSEG_ACTIVE                 0 /* LED on for bit == 1 */
 372
 373 #if     (CFG_NIOS_CPU_PIO3_TYPE == 1)
 374 #define SEVENSEG_WRONLY                 1
 375 #else
 376 #undef  SEVENSEG_WRONLY
 377 #endif
 378
 379 #elif   (CFG_NIOS_CPU_SEVENSEG_PIO == 4)
 380
 381 #error *** CFG_ERROR: seven segment display at PIO4 not supported, expand your config.h
 382
 383 #elif   (CFG_NIOS_CPU_SEVENSEG_PIO == 5)
 384
 385 #error *** CFG_ERROR: seven segment display at PIO5 not supported, expand your config.h
 386
 387 #elif   (CFG_NIOS_CPU_SEVENSEG_PIO == 6)
 388
 389 #error *** CFG_ERROR: seven segment display at PIO6 not supported, expand your config.h
 390
 391 #elif   (CFG_NIOS_CPU_SEVENSEG_PIO == 7)
 392
 393 #error *** CFG_ERROR: seven segment display at PIO7 not supported, expand your config.h
 394
 395 #elif   (CFG_NIOS_CPU_SEVENSEG_PIO == 8)
 396
 397 #error *** CFG_ERROR: seven segment display at PIO8 not supported, expand your config.h
 398
 399 #elif   (CFG_NIOS_CPU_SEVENSEG_PIO == 9)
 400
 401 #error *** CFG_ERROR: seven segment display at PIO9 not supported, expand your config.h
 402
 403 #else
 404 #error *** CFG_ERROR: you have to set CFG_NIOS_CPU_SEVENSEG_PIO in right case
 405 #endif
 406
 407 #define CONFIG_SEVENSEG                 1 /* enable seven segment led driver */
 408
 409 /*
 410  * Dual 7-Segment Display pin assignment -- read more in your
 411  * "Nios Development Board Reference Manual"
 412  *
 413  *
 414  *    (U8) HI:D[15..8]     (U9) LO:D[7..0]
 415  *         ______               ______
 416  *        |  D14 |             |  D6  |
 417  *        |      |             |      |
 418  *      D9|      |D13        D1|      |D5
 419  *        |______|             |______|                  ___
 420  *        |  D8  |             |  D0  |                 | A |
 421  *        |      |             |      |                F|___|B
 422  *     D10|      |D12        D2|      |D4               | G |
 423  *        |______|             |______|                E|___|C
 424  *           D11  *               D3   *                  D  *
 425  *                D15                  D7                    DP
 426  *
 427  */
 428 #define SEVENSEG_DIGIT_HI_LO_EQUAL      1       /* high nibble equal low nibble */
 429 #define SEVENSEG_DIGIT_A                (1 << 6) /* bit 6 is segment A */
 430 #define SEVENSEG_DIGIT_B                (1 << 5) /* bit 5 is segment B */
 431 #define SEVENSEG_DIGIT_C                (1 << 4) /* bit 4 is segment C */
 432 #define SEVENSEG_DIGIT_D                (1 << 3) /* bit 3 is segment D */
 433 #define SEVENSEG_DIGIT_E                (1 << 2) /* bit 2 is segment E */
 434 #define SEVENSEG_DIGIT_F                (1 << 1) /* bit 1 is segment F */
 435 #define SEVENSEG_DIGIT_G                (1 << 0) /* bit 0 is segment G */
 436 #define SEVENSEG_DIGIT_DP               (1 << 7) /* bit 7 is decimal point */
 437
 438 #endif  /* CFG_NIOS_CPU_PIO_NUMS */
 439
 440 /*------------------------------------------------------------------------
 441  * ASMI - Active Serial Memory Interface.
 442  *
 443  * ASMI is for Cyclone devices only and only works when the configuration
 444  * is loaded via JTAG or ASMI. Please see doc/README.dk1c20 for details.
 445  *----------------------------------------------------------------------*/
 446 #define CONFIG_NIOS_ASMI                           /* Enable ASMI       */
 447 #define CFG_NIOS_ASMIBASE       CFG_NIOS_CPU_ASMI0 /* ASMI base address */
 448
 449
 450 /*
 451  * BOOTP options
 452  */
 453 #define CONFIG_BOOTP_BOOTFILESIZE
 454 #define CONFIG_BOOTP_BOOTPATH
 455 #define CONFIG_BOOTP_GATEWAY
 456 #define CONFIG_BOOTP_HOSTNAME
 457
 458
 459 /*
 460  * Command line configuration.
 461  */
 462 #include <config_cmd_default.h>
 463
 464 #define CONFIG_CMD_CDP
 465 #define CONFIG_CMD_DHCP
 466 #define CONFIG_CMD_DIAG
 467 #define CONFIG_CMD_DISPLAY
 468 #define CONFIG_CMD_EXT2
 469 #define CONFIG_CMD_FAT
 470 #define CONFIG_CMD_IDE
 471 #define CONFIG_CMD_IMMAP
 472 #define CONFIG_CMD_IRQ
 473 #define CONFIG_CMD_PING
 474 #define CONFIG_CMD_PORTIO
 475 #define CONFIG_CMD_REGINFO
 476 #define CONFIG_CMD_SAVES
 477 #define CONFIG_CMD_SDRAM
 478 #define CONFIG_CMD_SNTP
 479
 480 #undef CONFIG_CMD_NFS
 481 #undef CONFIG_CMD_XIMG
 482
 483 /*------------------------------------------------------------------------
 484  * COMPACT FLASH
 485  *----------------------------------------------------------------------*/
 486 #if defined(CONFIG_CMD_IDE)
 487 #define CONFIG_IDE_PREINIT                      /* Implement id_preinit */
 488 #define CFG_IDE_MAXBUS          1               /* 1 IDE bus            */
 489 #define CFG_IDE_MAXDEVICE       1               /* 1 drive per IDE bus  */
 490
 491 #define CFG_ATA_BASE_ADDR       0x00920a00      /* IDE/ATA base addr    */
 492 #define CFG_ATA_IDE0_OFFSET     0x0000          /* IDE0 offset          */
 493 #define CFG_ATA_DATA_OFFSET     0x0040          /* Data IO offset       */
 494 #define CFG_ATA_REG_OFFSET      0x0040          /* Register offset      */
 495 #define CFG_ATA_ALT_OFFSET      0x0100          /* Alternate reg offset */
 496 #define CFG_ATA_STRIDE          4               /* Width betwix addrs   */
 497 #define CONFIG_DOS_PARTITION
 498
 499 /* Board-specific cf regs */
 500 #define CFG_CF_PRESENT          0x009209b0      /* CF Present PIO base  */
 501 #define CFG_CF_POWER            0x009209c0      /* CF Power FET PIO base*/
 502 #define CFG_CF_ATASEL           0x009209d0      /* CF ATASEL PIO base   */
 503
 504 #endif
 505
 506 /*------------------------------------------------------------------------
 507  * KGDB
 508  *----------------------------------------------------------------------*/
 509 #if defined(CONFIG_CMD_KGDB)
 510 #define CONFIG_KGDB_BAUDRATE    9600
 511 #endif
 512
 513 /*------------------------------------------------------------------------
 514  * MISC
 515  *----------------------------------------------------------------------*/
 516 #define CFG_LONGHELP                        /* undef to save memory     */
 517 #define CFG_PROMPT              "DK1C20 > " /* Monitor Command Prompt   */
 518 #define CFG_CBSIZE              256         /* Console I/O Buffer Size  */
 519 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 520 #define CFG_MAXARGS             16          /* max number of command args*/
 521 #define CFG_BARGSIZE            CFG_CBSIZE  /* Boot Argument Buffer Size */
 522
 523 #if     (CFG_SRAM_SIZE != 0)
 524 #define CFG_LOAD_ADDR           CFG_SRAM_BASE   /* Default load address */
 525 #else
 526 #undef  CFG_LOAD_ADDR
 527 #endif
 528
 529 #if     (CFG_SDRAM_SIZE != 0)
 530 #define CFG_MEMTEST_START       CFG_SDRAM_BASE  /* SDRAM til stack area */
 531 #define CFG_MEMTEST_END         (CFG_INIT_SP - (1024 * 1024)) /* 1MB stack */
 532 #else
 533 #undef  CFG_MEMTEST_START
 534 #undef  CFG_MEMTEST_END
 535 #endif
 536
 537 /*
 538  * JFFS2 partitions
 539  *
 540  */
 541 /* No command line, one static partition, whole device */
 542 #undef CONFIG_JFFS2_CMDLINE
 543 #define CONFIG_JFFS2_DEV                "nor0"
 544 #define CONFIG_JFFS2_PART_SIZE          0xFFFFFFFF
 545 #define CONFIG_JFFS2_PART_OFFSET        0x00000000
 546
 547 /* mtdparts command line support */
 548 /*
 549 #define CONFIG_JFFS2_CMDLINE
 550 #define MTDIDS_DEFAULT          ""
 551 #define MTDPARTS_DEFAULT        ""
 552 */
 553
 554 #endif  /* __CONFIG_H */