include/configs/AP1000.h

   1 /*
   2  * AMIRIX.h: AMIRIX specific config options
   3  *
   4  * Author : Frank Smith (smith at amirix dot com)
   5  *
   6  * Derived from : other configuration header files in this tree
   7  *
   8  * This software may be used and distributed according to the terms of
   9  * the GNU General Public License (GPL) version 2, incorporated herein by
  10  * reference. Drivers based on or derived from this code fall under the GPL
  11  * and must retain the authorship, copyright and this license notice. This
  12  * file is not a complete program and may only be used when the entire
  13  * program is licensed under the GPL.
  14  *
  15  */
  16
  17 #ifndef __CONFIG_H
  18 #define __CONFIG_H
  19
  20 /*
  21  * High Level Configuration Options
  22  * (easy to change)
  23  */
  24
  25 #define CONFIG_405      1               /* This is a PPC405 CPU     */
  26 #define CONFIG_4xx      1               /* ...member of PPC4xx family   */
  27
  28 #define CONFIG_AP1000   1               /* ...on an AP1000 board    */
  29
  30 #define CONFIG_PCI      1
  31
  32 #define CFG_HUSH_PARSER 1               /* use "hush" command parser    */
  33 #define CFG_PROMPT              "0> "
  34 #define CFG_PROMPT_HUSH_PS2     "> "
  35
  36 #define CONFIG_COMMAND_EDIT     1
  37 #define CONFIG_COMMAND_HISTORY  1
  38 #define CONFIG_COMPLETE_ADDRESSES 1
  39
  40 #define CFG_ENV_IS_IN_FLASH     1
  41 #define CFG_FLASH_USE_BUFFER_WRITE
  42
  43 #ifdef CFG_ENV_IS_IN_NVRAM
  44 #undef CFG_ENV_IS_IN_FLASH
  45 #else
  46 #ifdef CFG_ENV_IS_IN_FLASH
  47 #undef CFG_ENV_IS_IN_NVRAM
  48 #endif
  49 #endif
  50
  51 #define CONFIG_BAUDRATE         57600
  52 #define CONFIG_BOOTDELAY        3       /* autoboot after 3 seconds */
  53
  54 #define CONFIG_BOOTCOMMAND      ""      /* autoboot command */
  55
  56 /* Size (bytes) of interrupt driven serial port buffer.
  57  * Set to 0 to use polling instead of interrupts.
  58  * Setting to 0 will also disable RTS/CTS handshaking.
  59  */
  60 #undef  CONFIG_SERIAL_SOFTWARE_FIFO
  61
  62 #define CONFIG_BOOTARGS         "console=ttyS0,57600"
  63
  64 #define CONFIG_LOADS_ECHO       1       /* echo on for serial download  */
  65 #define CFG_LOADS_BAUD_CHANGE   1       /* allow baudrate change        */
  66
  67
  68 /*
  69  * BOOTP options
  70  */
  71 #define CONFIG_BOOTP_BOOTFILESIZE
  72 #define CONFIG_BOOTP_BOOTPATH
  73 #define CONFIG_BOOTP_GATEWAY
  74 #define CONFIG_BOOTP_HOSTNAME
  75
  76 /*
  77  * Command line configuration.
  78  */
  79 #include <config_cmd_default.h>
  80
  81 #define CONFIG_CMD_ASKENV
  82 #define CONFIG_CMD_DHCP
  83 #define CONFIG_CMD_ELF
  84 #define CONFIG_CMD_IRQ
  85 #define CONFIG_CMD_MVENV
  86 #define CONFIG_CMD_PCI
  87 #define CONFIG_CMD_PING
  88
  89
  90 #undef CONFIG_WATCHDOG                  /* watchdog disabled        */
  91
  92 #define CONFIG_SYS_CLK_FREQ     30000000
  93
  94 #define CONFIG_SPD_EEPROM       1       /* use SPD EEPROM for setup    */
  95
  96 /*
  97  * Miscellaneous configurable options
  98  */
  99 #define CFG_LONGHELP                    /* undef to save memory     */
 100 #if defined(CONFIG_CMD_KGDB)
 101 #define CFG_CBSIZE      1024            /* Console I/O Buffer Size  */
 102 #else
 103 #define CFG_CBSIZE      256             /* Console I/O Buffer Size      */
 104 #endif
 105 /* usually: (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) */
 106 #define CFG_PBSIZE      (CFG_CBSIZE+4+16)       /* Print Buffer Size */
 107 #define CFG_MAXARGS     16              /* max number of command args   */
 108 #define CFG_BARGSIZE    CFG_CBSIZE      /* Boot Argument Buffer Size    */
 109
 110 #define CFG_ALT_MEMTEST         1
 111 #define CFG_MEMTEST_START       0x00400000      /* memtest works on */
 112 #define CFG_MEMTEST_END         0x01000000      /* 4 ... 16 MB in DRAM  */
 113
 114 /*
 115  * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1.
 116  * If CFG_405_UART_ERRATA_59, then UART divisor is 31.
 117  * Otherwise, UART divisor is determined by CPU Clock and CFG_BASE_BAUD value.
 118  * The Linux BASE_BAUD define should match this configuration.
 119  *    baseBaud = cpuClock/(uartDivisor*16)
 120  * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock,
 121  * set Linux BASE_BAUD to 403200.
 122  */
 123 #undef  CFG_EXT_SERIAL_CLOCK            /* external serial clock */
 124 #undef  CFG_405_UART_ERRATA_59          /* 405GP/CR Rev. D silicon */
 125
 126 #define CFG_NS16550_CLK         40000000
 127 #define CFG_DUART_CHAN          0
 128 #define CFG_NS16550_COM1        (0x4C000000 + 0x1000)
 129 #define CFG_NS16550_COM2        (0x4C800000 + 0x1000)
 130 #define CFG_NS16550_REG_SIZE    4
 131 #define CFG_NS16550             1
 132 #define CFG_INIT_CHAN1          1
 133 #define CFG_INIT_CHAN2          0
 134
 135 /* The following table includes the supported baudrates */
 136 #define CFG_BAUDRATE_TABLE  \
 137     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 138
 139 #define CFG_LOAD_ADDR           0x00200000      /* default load address */
 140 #define CFG_EXTBDINFO           1               /* To use extended board_into (bd_t) */
 141
 142 #define CFG_HZ                  1000            /* decrementer freq: 1 ms ticks */
 143
 144 /*-----------------------------------------------------------------------
 145  * Start addresses for the final memory configuration
 146  * (Set up by the startup code)
 147  * Please note that CFG_SDRAM_BASE _must_ start at 0
 148  */
 149 #define CFG_SDRAM_BASE          0x00000000
 150 #define CFG_FLASH_BASE          0x20000000
 151 #define CFG_MONITOR_BASE        TEXT_BASE
 152 #define CFG_MONITOR_LEN         (192 * 1024)    /* Reserve 196 kB for Monitor   */
 153 #define CFG_MALLOC_LEN          (128 * 1024)    /* Reserve 128 kB for malloc()  */
 154
 155 /*
 156  * For booting Linux, the board info and command line data
 157  * have to be in the first 8 MB of memory, since this is
 158  * the maximum mapped by the Linux kernel during initialization.
 159  */
 160 #define CFG_BOOTMAPSZ           (8 << 20)       /* Initial Memory map for Linux */
 161 /*-----------------------------------------------------------------------
 162  * FLASH organization
 163  */
 164 #define CFG_FLASH_CFI           1
 165 #define CFG_PROGFLASH_BASE      CFG_FLASH_BASE
 166 #define CFG_CONFFLASH_BASE      0x24000000
 167
 168 #define CFG_MAX_FLASH_BANKS     2       /* max number of memory banks       */
 169 #define CFG_MAX_FLASH_SECT      256     /* max number of sectors on one chip    */
 170
 171 #define CFG_FLASH_ERASE_TOUT    120000  /* Timeout for Flash Erase (in ms)  */
 172 #define CFG_FLASH_WRITE_TOUT    500     /* Timeout for Flash Write (in ms)      */
 173
 174 #define CFG_FLASH_PROTECTION    1       /* use hardware protection          */
 175
 176 /* BEG ENVIRONNEMENT FLASH */
 177 #ifdef CFG_ENV_IS_IN_FLASH
 178 #define CFG_ENV_OFFSET          0x00040000 /* Offset of Environment Sector      */
 179 #define CFG_ENV_SIZE            0x1000  /* Total Size of Environment Sector */
 180 #define CFG_ENV_SECT_SIZE       0x20000 /* see README - env sector total size   */
 181 #endif
 182 /* END ENVIRONNEMENT FLASH */
 183 /*-----------------------------------------------------------------------
 184  * NVRAM organization
 185  */
 186 #define CFG_NVRAM_BASE_ADDR     0xf0000000      /* NVRAM base address   */
 187 #define CFG_NVRAM_SIZE          0x1ff8          /* NVRAM size   */
 188
 189 #ifdef CFG_ENV_IS_IN_NVRAM
 190 #define CFG_ENV_SIZE            0x1000          /* Size of Environment vars */
 191 #define CFG_ENV_ADDR        \
 192     (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CFG_ENV_SIZE)   /* Env  */
 193 #endif
 194
 195 /*
 196  * Init Memory Controller:
 197  *
 198  * BR0/1 and OR0/1 (FLASH)
 199  */
 200
 201 #define FLASH_BASE0_PRELIM      CFG_FLASH_BASE  /* FLASH bank #0        */
 202 #define FLASH_BASE1_PRELIM      0               /* FLASH bank #1        */
 203
 204 /* Configuration Port location */
 205 #define CONFIG_PORT_ADDR        0xF0000500
 206
 207 /*-----------------------------------------------------------------------
 208  * Definitions for initial stack pointer and data area (in DPRAM)
 209  */
 210
 211 #define CFG_INIT_RAM_ADDR       0x400000  /* inside of SDRAM                     */
 212 #define CFG_INIT_RAM_END        0x2000  /* End of used area in RAM             */
 213 #define CFG_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
 214 #define CFG_GBL_DATA_OFFSET     (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 215 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
 216
 217 /*-----------------------------------------------------------------------
 218  * Definitions for Serial Presence Detect EEPROM address
 219  * (to get SDRAM settings)
 220  */
 221 #define SPD_EEPROM_ADDRESS      0x50
 222
 223 /*
 224  * Internal Definitions
 225  *
 226  * Boot Flags
 227  */
 228 #define BOOTFLAG_COLD   0x01            /* Normal Power-On: Boot from FLASH */
 229 #define BOOTFLAG_WARM   0x02            /* Software reboot              */
 230
 231 #if defined(CONFIG_CMD_KGDB)
 232 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 233 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 234 #endif
 235
 236 /* JFFS2 stuff */
 237
 238 #define CFG_JFFS2_FIRST_BANK    0
 239 #define CFG_JFFS2_NUM_BANKS     1
 240 #define CFG_JFFS2_FIRST_SECTOR  1
 241
 242 #define CONFIG_NET_MULTI
 243 #define CONFIG_E1000
 244
 245 #define CFG_ETH_DEV_FN          0x0800
 246 #define CFG_ETH_IOBASE          0x31000000
 247 #define CFG_ETH_MEMBASE         0x32000000
 248
 249 #endif  /* __CONFIG_H */