add SDHC support in mmc driver
[u-boot-openmoko/mini2440.git] / include / asm-nios2 / opcodes.h
blob211f8ba9dd592be48588ef38ad25c3d9b6a1a599
1 /*
2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
3 * Scott McNutt <smcnutt@psyent.com>
5 * See file CREDITS for list of people who contributed to this
6 * project.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
24 #ifndef __ASM_NIOS2_OPCODES_H_
25 #define __ASM_NIOS2_OPCODES_H_
27 #define OPCODE_OP(inst) ((inst) & 0x3f)
28 #define OPCODE_OPX(inst) (((inst)>>11) & 0x3f)
29 #define OPCODE_RA(inst) (((inst)>>27) & 01f)
30 #define OPCODE_RB(inst) (((inst)>>22) & 01f)
31 #define OPCODE_RC(inst) (((inst)>>17) & 01f)
33 /* I-TYPE (immediate) and J-TYPE (jump) opcodes
35 #define OPCODE_CALL 0x00
36 #define OPCODE_LDBU 0x03
37 #define OPCODE_ADDI 0x04
38 #define OPCODE_STB 0x05
39 #define OPCODE_BR 0x06
40 #define OPCODE_LDB 0x07
41 #define OPCODE_CMPGEI 0x08
42 #define OPCODE_LDHU 0x0B
43 #define OPCODE_ANDI 0x0C
44 #define OPCODE_STH 0x0D
45 #define OPCODE_BGE 0x0E
46 #define OPCODE_LDH 0x0F
47 #define OPCODE_CMPLTI 0x10
48 #define OPCODE_XORI 0x1C
49 #define OPCODE_ORI 0x14
50 #define OPCODE_STW 0x15
51 #define OPCODE_BLT 0x16
52 #define OPCODE_LDW 0x17
53 #define OPCODE_CMPNEI 0x18
54 #define OPCODE_BNE 0x1E
55 #define OPCODE_CMPEQI 0x20
56 #define OPCODE_LDBUIO 0x23
57 #define OPCODE_MULI 0x24
58 #define OPCODE_STBIO 0x25
59 #define OPCODE_BEQ 0x26
60 #define OPCODE_LDBIO 0x27
61 #define OPCODE_CMPGEUI 0x28
62 #define OPCODE_ANDHI 0x2C
63 #define OPCODE_STHIO 0x2D
64 #define OPCODE_BGEU 0x2E
65 #define OPCODE_LDHIO 0x2F
66 #define OPCODE_CMPLTUI 0x30
67 #define OPCODE_CUSTOM 0x32
68 #define OPCODE_INITD 0x33
69 #define OPCODE_ORHI 0x34
70 #define OPCODE_STWIO 0x35
71 #define OPCODE_BLTU 0x36
72 #define OPCODE_LDWIO 0x37
73 #define OPCODE_RTYPE 0x3A
74 #define OPCODE_LDHUIO 0x2B
75 #define OPCODE_FLUSHD 0x3B
76 #define OPCODE_XORHI 0x3C
78 /* R-Type (register) OPX field encodings
80 #define OPCODE_ERET 0x01
81 #define OPCODE_ROLI 0x02
82 #define OPCODE_ROL 0x03
83 #define OPCODE_FLUSHP 0x04
84 #define OPCODE_RET 0x05
85 #define OPCODE_NOR 0x06
86 #define OPCODE_MULXUU 0x07
87 #define OPCODE_CMPGE 0x08
88 #define OPCODE_BRET 0x09
89 #define OPCODE_ROR 0x0B
90 #define OPCODE_FLUSHI 0x0C
91 #define OPCODE_JMP 0x0D
92 #define OPCODE_AND 0x0E
94 #define OPCODE_CMPLT 0x10
95 #define OPCODE_SLLI 0x12
96 #define OPCODE_SLL 0x13
97 #define OPCODE_OR 0x16
98 #define OPCODE_MULXSU 0x17
99 #define OPCODE_CMPNE 0x18
100 #define OPCODE_SRLI 0x1A
101 #define OPCODE_SRL 0x1B
102 #define OPCODE_NEXTPC 0x1C
103 #define OPCODE_CALLR 0x1D
104 #define OPCODE_XOR 0x1E
105 #define OPCODE_MULXSS 0x1F
107 #define OPCODE_CMPEQ 0x20
108 #define OPCODE_CMPLTU 0x30
109 #define OPCODE_ADD 0x31
110 #define OPCODE_DIVU 0x24
111 #define OPCODE_DIV 0x25
112 #define OPCODE_RDCTL 0x26
113 #define OPCODE_MUL 0x27
114 #define OPCODE_CMPGEU 0x28
115 #define OPCODE_TRAP 0x2D
116 #define OPCODE_WRCTL 0x2E
118 #define OPCODE_BREAK 0x34
119 #define OPCODE_SYNC 0x36
120 #define OPCODE_INITI 0x29
121 #define OPCODE_SUB 0x39
122 #define OPCODE_SRAI 0x3A
123 #define OPCODE_SRA 0x3B
125 /*Full instruction encodings for R-Type, without the R's ;-)
127 * TODO: BREAK, BRET, ERET, RET, SYNC (as needed)
129 #define OPC_TRAP 0x003b683a
131 #endif /* __ASM_NIOS2_OPCODES_H_ */