3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
10 * Michel Pollet <buserror@gmail.com>
12 * See file CREDITS for list of people who contributed to this
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 DECLARE_GLOBAL_DATA_PTR
;
36 /* FCLK = 405 MHz, HCLK = 101 MHz, PCLK = 50 MHz, UCLK = 48 MHz */
46 static inline void delay (unsigned long loops
)
48 __asm__
volatile ("1:\n"
50 "bne 1b":"=r" (loops
):"0" (loops
));
54 * Miscellaneous platform dependent initialisations
59 S3C24X0_CLOCK_POWER
* const clk_power
= S3C24X0_GetBase_CLOCK_POWER();
60 S3C24X0_GPIO
* const gpio
= S3C24X0_GetBase_GPIO();
62 /* to reduce PLL lock time, adjust the LOCKTIME register */
63 clk_power
->LOCKTIME
= 0xFFFFFF;
64 clk_power
->CLKDIVN
= CLKDIVN_VAL
;
67 clk_power
->UPLLCON
= ((U_M_MDIV
<< 12) + (U_M_PDIV
<< 4) + U_M_SDIV
);
68 /* some delay between MPLL and UPLL */
71 clk_power
->MPLLCON
= ((M_MDIV
<< 12) + (M_PDIV
<< 4) + M_SDIV
);
73 /* some delay between MPLL and UPLL */
76 gpio
->GPACON
= 0x007FFFFF;
77 // port B outputs reconfigured
79 (0x1 << 0) | // GPB0 OUT TOUT0 PWM Buzzer
80 (0x1 << 2) | // GPB1 OUT LCD
81 (0x1 << 4) | // GPB2 OUT L3MODE
82 (0x1 << 6) | // GBP3 OUT L3DATA
83 (0x1 << 8) | // GBP4 OUT L3CLOCK
84 (0x1 << 10) | // GBP5 OUT LED1
85 (0x1 << 12) | // GBP6 OUT LED2
86 (0x1 << 14) | // GBP7 OUT LED3
87 (0x1 << 16) | // GBP8 OUT LED4
88 (0x2 << 18) | // GBP9 --- nXDACK0 CON5 EBI
89 (0x2 << 20) | // GBP10 --- nXDREQ0 CON5 EBI
91 gpio
->GPBUP
= (1 << 10) - 1; // disable pullup on all 10 pins
94 // lcd signals on C and D
95 gpio
->GPCCON
= 0xAAAAAAAA;
96 gpio
->GPCUP
= 0xFFFFFFFF;
97 gpio
->GPDCON
= 0xAAAAAAAA;
98 gpio
->GPDUP
= 0xFFFFFFFF;
99 // port E is set for all it's special functions (i2c, spi etc)
100 gpio
->GPECON
= 0xAAAAAAAA;
101 gpio
->GPEUP
= 0x0000FFFF;
104 (0x1 << 0) | // GPG0 EINT0 OUT
105 (0x1 << 2) | // GPG1 EINT1 OUT
106 (0x1 << 4) | // GPG2 EINT2 OUT
107 (0x1 << 6) | // GPG3 EINT3 OUT
108 (0x1 << 8) | // GPG4 EINT4 OUT
109 (0x1 << 10) | // GPG5 EINT5 OUT
110 (0x1 << 12) | // GPG6 EINT6 OUT
111 (0x0 << 14) | // GPG7 EINT7 IN DM9000
114 gpio
->GPFUP
= ((1 << 7) - 1) // all disabled
115 & ~( 1 << 7 ) // but for the ethernet one, we need it.
119 (0x0 << 0) | // GPG0 EINT8 IN Key1
120 (0x1 << 2) | // GPG1 EINT9 OUT Con5
121 (0x1 << 4) | // GPG2 EINT10 OUT
122 (0x0 << 6) | // GPG3 EINT11 IN Key2
123 (0x1 << 8) | // GPG4 EINT12 OUT
124 (0x0 << 10) | // GPG5 EINT13 IN Key3
125 (0x0 << 12) | // GPG6 EINT14 IN Key4
126 (0x0 << 14) | // GPG7 EINT15 IN Key5
127 (0x1 << 16) | // GPG8 EINT16 OUT nCD_SD
128 (0x1 << 18) | // GPG9 EINT17 OUT
129 (0x1 << 20) | // GPG10 EINT18 OUT
130 (0x0 << 22) | // GPG11 EINT19 IN Key6
131 (0x0 << 24) | // GPG12 EINT18 IN // Datasheet says GPG[12..15] need to be inputs
132 (0x0 << 26) | // GPG13 EINT18 IN // hard pullups
133 (0x0 << 28) | // GPG14 EINT18 IN
134 (0x0 << 30) | // GPG15 EINT18 IN
136 gpio
->GPGUP
= (1 << 15) -1; // disable pullups for all pins
139 (0x2 << 0) | // GPH0 nCTS0 ---
140 (0x2 << 2) | // GPH1 nRTS0 ---
141 (0x2 << 4) | // GPH2 TXD0 ---
142 (0x2 << 6) | // GPH3 RXD0 ---
143 (0x2 << 8) | // GPH4 TXD1 ---
144 (0x2 << 10) | // GPH5 RXD1 ---
145 (0x2 << 12) | // GPH6 [TXD2] nRTS1
146 (0x2 << 14) | // GPH7 [RXD2] nCTS1
147 (0x1 << 16) | // GPH8 UEXTCLK OUT
148 (0x1 << 18) | // GPH9 CLKOUT0 OUT
149 (0x1 << 20) | // GPH10 CLKOUT1 OUT
151 gpio
->GPHUP
= (1 << 10) - 1; // disable pullups for all pins
153 gpio
->EXTINT0
=0x22222222;
154 gpio
->EXTINT1
=0x22222222;
155 gpio
->EXTINT2
=0x22222222;
158 /* USB Device Part */
159 /*GPGCON is reset for USB Device */
160 gpio
->GPGCON
= (gpio
->GPGCON
& ~(3 << 24)) | (1 << 24); /* Output Mode */
161 gpio
->GPGUP
= gpio
->GPGUP
| ( 1 << 12); /* Pull up disable */
163 gpio
->GPGDAT
|= ( 1 << 12) ;
164 gpio
->GPGDAT
&= ~( 1 << 12) ;
166 gpio
->GPGDAT
|= ( 1 << 12) ;
169 /* arch number of SMDK2440-Board */
170 // gd->bd->bi_arch_number = MACH_TYPE_S3C2440;
171 #ifndef MACH_TYPE_MINI2440
172 #define MACH_TYPE_MINI2440 1999 /* from kernel post 2.6.28 */
174 gd
->bd
->bi_arch_number
= MACH_TYPE_MINI2440
;
176 /* adress of boot parameters */
177 gd
->bd
->bi_boot_params
= 0x30000100;
187 gd
->bd
->bi_dram
[0].start
= PHYS_SDRAM_1
;
188 gd
->bd
->bi_dram
[0].size
= PHYS_SDRAM_1_SIZE
;
193 /* The sum of all part_size[]s must equal to the NAND size, i.e., 0x4000000.
194 "initrd" is sized such that it can hold two uncompressed 16 bit 640*480
195 images: 640*480*2*2 = 1228800 < 1245184. */
197 unsigned int dynpart_size
[] = {
198 CFG_UBOOT_SIZE
, 0x20000, 0x200000, 0xa0000, 0x3d5c000-CFG_UBOOT_SIZE
, 0 };
199 char *dynpart_names
[] = {
200 "u-boot", "u-boot_env", "kernel", "splash", "rootfs", NULL
};