| blob | d5757c93a3eeaea0abbb1657d42e81036f81441a |
1 [options]\r
2 \r
3 version: 1.343\r
4 file_version: 1.332\r
5 project_name: "test"\r
6 full_library_folder: "c:\program files\freepcb\lib"\r
7 CAM_folder: ""\r
8 ses_file_path: ""\r
9 SMT_connect_copper: "0"\r
10 dsn_flags: "0"\r
11 dsn_bounds_poly: "0"\r
12 dsn_signals_poly: "0"\r
13 autosave_interval: 0\r
14 netlist_import_flags: 451\r
15 units: MIL\r
16 \r
17 visible_grid_spacing: 5080000.000000\r
18 visible_grid_item: 100MIL\r
19 visible_grid_item: 125MIL\r
20 visible_grid_item: 200MIL\r
21 visible_grid_item: 250MIL\r
22 visible_grid_item: 400MIL\r
23 visible_grid_item: 500MIL\r
24 visible_grid_item: 1000MIL\r
25 visible_grid_item: 1MM\r
26 visible_grid_item: 2MM\r
27 visible_grid_item: 2.5MM\r
28 visible_grid_item: 4MM\r
29 visible_grid_item: 5MM\r
30 visible_grid_item: 10MM\r
31 visible_grid_item: 20MM\r
32 visible_grid_item: 25MM\r
33 visible_grid_item: 40MM\r
34 visible_grid_item: 50MM\r
35 visible_grid_item: 100MM\r
36 \r
37 placement_grid_spacing: 2540000.000000\r
38 placement_grid_item: 10MIL\r
39 placement_grid_item: 20MIL\r
40 placement_grid_item: 25MIL\r
41 placement_grid_item: 40MIL\r
42 placement_grid_item: 50MIL\r
43 placement_grid_item: 100MIL\r
44 placement_grid_item: 200MIL\r
45 placement_grid_item: 250MIL\r
46 placement_grid_item: 400MIL\r
47 placement_grid_item: 500MIL\r
48 placement_grid_item: 1000MIL\r
49 placement_grid_item: 0.1MM\r
50 placement_grid_item: 0.2MM\r
51 placement_grid_item: 0.25MM\r
52 placement_grid_item: 0.4MM\r
53 placement_grid_item: 0.5MM\r
54 placement_grid_item: 1MM\r
55 placement_grid_item: 2MM\r
56 placement_grid_item: 2.5MM\r
57 placement_grid_item: 4MM\r
58 placement_grid_item: 5MM\r
59 placement_grid_item: 10MM\r
60 \r
61 routing_grid_spacing: 508000.000000\r
62 routing_grid_item: 1MIL\r
63 routing_grid_item: 2MIL\r
64 routing_grid_item: 2.5MIL\r
65 routing_grid_item: 3.33330709MIL\r
66 routing_grid_item: 4MIL\r
67 routing_grid_item: 5MIL\r
68 routing_grid_item: 6.66649606MIL\r
69 routing_grid_item: 10MIL\r
70 routing_grid_item: 12.5MIL\r
71 routing_grid_item: 16.66649606MIL\r
72 routing_grid_item: 20MIL\r
73 routing_grid_item: 25MIL\r
74 routing_grid_item: 40MIL\r
75 routing_grid_item: 50MIL\r
76 routing_grid_item: 0.01MM\r
77 routing_grid_item: 0.02MM\r
78 routing_grid_item: 0.04MM\r
79 routing_grid_item: 0.05MM\r
80 routing_grid_item: 0.1MM\r
81 routing_grid_item: 0.2MM\r
82 routing_grid_item: 0.25MM\r
83 routing_grid_item: 0.4MM\r
84 routing_grid_item: 0.5MM\r
85 routing_grid_item: 1MM\r
86 routing_grid_item: 2MM\r
87 routing_grid_item: 2.5MM\r
88 routing_grid_item: 4MM\r
89 routing_grid_item: 5MM\r
90 routing_grid_item: 10MM\r
91 \r
92 snap_angle: 45\r
93 \r
94 fp_visible_grid_spacing: 5080000.000000\r
95 fp_visible_grid_item: 100MIL\r
96 fp_visible_grid_item: 125MIL\r
97 fp_visible_grid_item: 200MIL\r
98 fp_visible_grid_item: 250MIL\r
99 fp_visible_grid_item: 400MIL\r
100 fp_visible_grid_item: 500MIL\r
101 fp_visible_grid_item: 1000MIL\r
102 fp_visible_grid_item: 1MM\r
103 fp_visible_grid_item: 2MM\r
104 fp_visible_grid_item: 2.5MM\r
105 fp_visible_grid_item: 4MM\r
106 fp_visible_grid_item: 5MM\r
107 fp_visible_grid_item: 10MM\r
108 fp_visible_grid_item: 20MM\r
109 fp_visible_grid_item: 25MM\r
110 fp_visible_grid_item: 40MM\r
111 fp_visible_grid_item: 50MM\r
112 fp_visible_grid_item: 100MM\r
113 \r
114 fp_placement_grid_spacing: 2540000.000000\r
115 fp_placement_grid_item: 10MIL\r
116 fp_placement_grid_item: 20MIL\r
117 fp_placement_grid_item: 25MIL\r
118 fp_placement_grid_item: 40MIL\r
119 fp_placement_grid_item: 50MIL\r
120 fp_placement_grid_item: 100MIL\r
121 fp_placement_grid_item: 200MIL\r
122 fp_placement_grid_item: 250MIL\r
123 fp_placement_grid_item: 400MIL\r
124 fp_placement_grid_item: 500MIL\r
125 fp_placement_grid_item: 1000MIL\r
126 fp_placement_grid_item: 0.1MM\r
127 fp_placement_grid_item: 0.2MM\r
128 fp_placement_grid_item: 0.25MM\r
129 fp_placement_grid_item: 0.4MM\r
130 fp_placement_grid_item: 0.5MM\r
131 fp_placement_grid_item: 1MM\r
132 fp_placement_grid_item: 2MM\r
133 fp_placement_grid_item: 2.5MM\r
134 fp_placement_grid_item: 4MM\r
135 fp_placement_grid_item: 5MM\r
136 fp_placement_grid_item: 10MM\r
137 \r
138 fp_snap_angle: 45\r
139 \r
140 fill_clearance: 254000\r
141 mask_clearance: 203200\r
142 thermal_width: 254000\r
143 min_silkscreen_width: 127000\r
144 board_outline_width: 127000\r
145 hole_clearance: 381000\r
146 pilot_diameter: 254000\r
147 annular_ring_for_pins: 177800\r
148 annular_ring_for_vias: 127000\r
149 shrink_paste_mask: 0\r
150 cam_flags: 1\r
151 cam_layers: 15732735\r
152 cam_drill_file: 1\r
153 cam_units: 2\r
154 cam_n_x: 1\r
155 cam_n_y: 1\r
156 cam_space_x: 0\r
157 cam_space_y: 0\r
158 \r
159 report_options: 0\r
160 drc_check_unrouted: 0\r
161 drc_trace_width: 254000\r
162 drc_pad_pad: 254000\r
163 drc_pad_trace: 254000\r
164 drc_trace_trace: 254000\r
165 drc_hole_copper: 381000\r
166 drc_annular_ring_pins: 177800\r
167 drc_annular_ring_vias: 127000\r
168 drc_board_edge_copper: 635000\r
169 drc_board_edge_hole: 635000\r
170 drc_hole_hole: 635000\r
171 drc_copper_copper: 254000\r
172 \r
173 default_trace_width: 254000\r
174 default_via_pad_width: 711200\r
175 default_via_hole_width: 355600\r
176 n_width_menu: 7\r
177 width_menu_item: 1 152400 711200 355600\r
178 width_menu_item: 2 203200 711200 355600\r
179 width_menu_item: 3 254000 711200 355600\r
180 width_menu_item: 4 304800 711200 355600\r
181 width_menu_item: 5 381000 711200 355600\r
182 width_menu_item: 6 508000 711200 355600\r
183 width_menu_item: 7 635000 711200 355600\r
184 \r
185 n_copper_layers: 2\r
186 layer_info: "selection" 0 255 255 255 1\r
187 layer_info: "background" 1 0 0 0 1\r
188 layer_info: "visible grid" 2 255 255 255 1\r
189 layer_info: "highlight" 3 255 255 255 1\r
190 layer_info: "DRC error" 4 255 128 64 1\r
191 layer_info: "board outline" 5 0 0 255 1\r
192 layer_info: "rat line" 6 255 0 255 1\r
193 layer_info: "top silk" 7 255 255 0 1\r
194 layer_info: "bottom silk" 8 255 192 192 1\r
195 layer_info: "top sm cutout" 9 160 160 160 1\r
196 layer_info: "bot sm cutout" 10 95 95 95 1\r
197 layer_info: "thru pad" 11 0 0 255 1\r
198 layer_info: "top copper" 12 0 255 0 1\r
199 layer_info: "bottom copper" 13 255 0 0 1\r
200 \r
201 [footprints]\r
202 \r
203 name: "14DIP300"\r
204 author: "Ivex"\r
205 source: "DIGIKEY CATALOG NO. 941, PAGE 64"\r
206 units: MIL\r
207 sel_rect: -58 -35 658 335\r
208 ref_text: 50 -100 150 270 7\r
209 centroid: 0 300 150\r
210 outline_polyline: 7 -50 50\r
211 next_corner: 650 50 0\r
212 next_corner: 650 250 0\r
213 next_corner: -50 250 0\r
214 close_polyline: 0\r
215 outline_polyline: 7 -50 100\r
216 next_corner: 0 100 0\r
217 next_corner: 0 200 0\r
218 next_corner: -50 200 0\r
219 close_polyline: 0\r
220 n_pins: 14\r
221 pin: "1" 28 0 0 0\r
222 top_pad: 2 55 27 27 0\r
223 inner_pad: 1 55 27 27 0\r
224 bottom_pad: 2 55 27 27 0\r
225 pin: "2" 28 100 0 0\r
226 top_pad: 1 55 27 27 0\r
227 inner_pad: 1 55 27 27 0\r
228 bottom_pad: 1 55 27 27 0\r
229 pin: "3" 28 200 0 0\r
230 top_pad: 1 55 27 27 0\r
231 inner_pad: 1 55 27 27 0\r
232 bottom_pad: 1 55 27 27 0\r
233 pin: "4" 28 300 0 0\r
234 top_pad: 1 55 27 27 0\r
235 inner_pad: 1 55 27 27 0\r
236 bottom_pad: 1 55 27 27 0\r
237 pin: "5" 28 400 0 0\r
238 top_pad: 1 55 27 27 0\r
239 inner_pad: 1 55 27 27 0\r
240 bottom_pad: 1 55 27 27 0\r
241 pin: "6" 28 500 0 0\r
242 top_pad: 1 55 27 27 0\r
243 inner_pad: 1 55 27 27 0\r
244 bottom_pad: 1 55 27 27 0\r
245 pin: "7" 28 600 0 0\r
246 top_pad: 1 55 27 27 0\r
247 inner_pad: 1 55 27 27 0\r
248 bottom_pad: 1 55 27 27 0\r
249 pin: "8" 28 600 300 0\r
250 top_pad: 1 55 27 27 0\r
251 inner_pad: 1 55 27 27 0\r
252 bottom_pad: 1 55 27 27 0\r
253 pin: "9" 28 500 300 0\r
254 top_pad: 1 55 27 27 0\r
255 inner_pad: 1 55 27 27 0\r
256 bottom_pad: 1 55 27 27 0\r
257 pin: "10" 28 400 300 0\r
258 top_pad: 1 55 27 27 0\r
259 inner_pad: 1 55 27 27 0\r
260 bottom_pad: 1 55 27 27 0\r
261 pin: "11" 28 300 300 0\r
262 top_pad: 1 55 27 27 0\r
263 inner_pad: 1 55 27 27 0\r
264 bottom_pad: 1 55 27 27 0\r
265 pin: "12" 28 200 300 0\r
266 top_pad: 1 55 27 27 0\r
267 inner_pad: 1 55 27 27 0\r
268 bottom_pad: 1 55 27 27 0\r
269 pin: "13" 28 100 300 0\r
270 top_pad: 1 55 27 27 0\r
271 inner_pad: 1 55 27 27 0\r
272 bottom_pad: 1 55 27 27 0\r
273 pin: "14" 28 0 300 0\r
274 top_pad: 1 55 27 27 0\r
275 inner_pad: 1 55 27 27 0\r
276 bottom_pad: 1 55 27 27 0\r
277 \r
278 name: "1X2HDR-100"\r
279 author: "Ivex"\r
280 source: "PRINTED CIRCUIT DESIGN METHODS PAGE 411"\r
281 units: MIL\r
282 sel_rect: -33 -33 33 133\r
283 ref_text: 50 0 160 0 7\r
284 centroid: 0 0 50\r
285 n_pins: 2\r
286 pin: "1" 28 0 0 0\r
287 top_pad: 2 50 25 25 0\r
288 inner_pad: 1 50 25 25 0\r
289 bottom_pad: 2 50 25 25 0\r
290 pin: "2" 28 0 100 0\r
291 top_pad: 1 50 25 25 0\r
292 inner_pad: 1 50 25 25 0\r
293 bottom_pad: 1 50 25 25 0\r
294 \r
295 name: "RC07"\r
296 author: "Ivex"\r
297 source: "DIGITAL PRINTED CIRCUIT DESIGN & DRAFTING, PAGE 408"\r
298 units: MIL\r
299 sel_rect: -45 -57 545 57\r
300 ref_text: 50 250 99 0 7\r
301 centroid: 0 250 0\r
302 outline_polyline: 7 109 49\r
303 next_corner: 391 49 0\r
304 next_corner: 391 -49 0\r
305 next_corner: 109 -49 0\r
306 close_polyline: 0\r
307 n_pins: 2\r
308 pin: "1" 35 0 0 0\r
309 top_pad: 1 75 37 37 0\r
310 inner_pad: 1 75 37 37 0\r
311 bottom_pad: 1 75 37 37 0\r
312 pin: "2" 35 500 0 0\r
313 top_pad: 1 75 37 37 0\r
314 inner_pad: 1 75 37 37 0\r
315 bottom_pad: 1 75 37 37 0\r
316 \r
317 [board]\r
318 \r
319 [solder_mask_cutouts]\r
320 \r
321 \r
322 [parts]\r
323 \r
324 part: V1\r
325 ref_text: 1270000 177800 0 0 4064000\r
326 package: "1X2HDR-100"\r
327 shape: "1X2HDR-100"\r
328 pos: 8458200 64338200 0 0 0\r
329 \r
330 part: V2\r
331 ref_text: 1270000 177800 0 0 4064000\r
332 package: "1X2HDR-100"\r
333 shape: "1X2HDR-100"\r
334 pos: 8458200 71958200 0 0 0\r
335 \r
336 part: V3\r
337 ref_text: 1270000 177800 0 0 4064000\r
338 package: "1X2HDR-100"\r
339 shape: "1X2HDR-100"\r
340 pos: 8458200 79578200 0 0 0\r
341 \r
342 part: V4\r
343 ref_text: 1270000 177800 0 0 4064000\r
344 package: "1X2HDR-100"\r
345 shape: "1X2HDR-100"\r
346 pos: 8458200 87198200 0 0 0\r
347 \r
348 part: V$XX11$Vdd\r
349 ref_text: 1270000 177800 0 0 4064000\r
350 package: "1X2HDR-100"\r
351 shape: "1X2HDR-100"\r
352 pos: 8458200 94818200 0 0 0\r
353 \r
354 part: V$XX11$Vss\r
355 ref_text: 1270000 177800 0 0 4064000\r
356 package: "1X2HDR-100"\r
357 shape: "1X2HDR-100"\r
358 pos: 8458200 102438200 0 0 0\r
359 \r
360 part: X_IC_0_CD4007\r
361 ref_text: 1270000 177800 270 -2540000 3810000\r
362 package: "14DIP300"\r
363 shape: "14DIP300"\r
364 pos: -148971000 82346800 0 90 0\r
365 \r
366 part: X_IC_1_CD4007\r
367 ref_text: 1270000 177800 270 -2540000 3810000\r
368 package: "14DIP300"\r
369 shape: "14DIP300"\r
370 pos: -78740000 76200000 0 90 0\r
371 \r
372 part: X_IC_2_CD4007\r
373 ref_text: 1270000 177800 270 -2540000 3810000\r
374 package: "14DIP300"\r
375 shape: "14DIP300"\r
376 pos: -149860000 109220000 0 90 0\r
377 \r
378 part: X_IC_3_CD4007\r
379 ref_text: 1270000 177800 270 -2540000 3810000\r
380 package: "14DIP300"\r
381 shape: "14DIP300"\r
382 pos: -78740000 109220000 0 90 0\r
383 \r
384 part: X_IC_7_CD4016\r
385 ref_text: 1270000 177800 270 -2540000 3810000\r
386 package: "14DIP300"\r
387 shape: "14DIP300"\r
388 pos: -30480000 109220000 0 90 0\r
389 \r
390 part: RX$XX1$XXdecoder$XX1pti1$Xinv$RP\r
391 ref_text: 1270000 177800 0 6350000 2514600\r
392 package: "RC07"\r
393 shape: "RC07"\r
394 pos: -135712200 44577000 0 90 0\r
395 \r
396 part: RX$XX1$XXdecoder$XX1pti1$Xinv$RN\r
397 ref_text: 1270000 177800 0 6350000 2514600\r
398 package: "RC07"\r
399 shape: "RC07"\r
400 pos: -128092200 44577000 0 90 0\r
401 \r
402 part: RX$XX1$XXdecoder$XX1pti2$Xinv$RP\r
403 ref_text: 1270000 177800 0 6350000 2514600\r
404 package: "RC07"\r
405 shape: "RC07"\r
406 pos: -120472200 44577000 0 90 0\r
407 \r
408 part: RX$XX1$XXdecoder$XX1pti2$Xinv$RN\r
409 ref_text: 1270000 177800 0 6350000 2514600\r
410 package: "RC07"\r
411 shape: "RC07"\r
412 pos: -112852200 44577000 0 90 0\r
413 \r
414 part: RX$XX1$XXdecoder$XXinti$Xinv$RP\r
415 ref_text: 1270000 177800 0 6350000 2514600\r
416 package: "RC07"\r
417 shape: "RC07"\r
418 pos: -105232200 44577000 0 90 0\r
419 \r
420 part: RX$XX1$XXdecoder$XXinti$Xinv$RN\r
421 ref_text: 1270000 177800 0 6350000 2514600\r
422 package: "RC07"\r
423 shape: "RC07"\r
424 pos: -97612200 44577000 0 90 0\r
425 \r
426 part: RX$XX1$XXdecoder$XX0pti$Xinv$RP\r
427 ref_text: 1270000 177800 0 6350000 2514600\r
428 package: "RC07"\r
429 shape: "RC07"\r
430 pos: -89992200 44577000 0 90 0\r
431 \r
432 part: RX$XX1$XXdecoder$XX0pti$Xinv$RN\r
433 ref_text: 1270000 177800 0 6350000 2514600\r
434 package: "RC07"\r
435 shape: "RC07"\r
436 pos: -82372200 44577000 0 90 0\r
437 \r
438 part: RX$XX1$XXdecoder$XX0sti$Xinv$RP\r
439 ref_text: 1270000 177800 0 6350000 2514600\r
440 package: "RC07"\r
441 shape: "RC07"\r
442 pos: -74752200 44577000 0 90 0\r
443 \r
444 part: RX$XX1$XXdecoder$XX0sti$Xinv$RN\r
445 ref_text: 1270000 177800 0 6350000 2514600\r
446 package: "RC07"\r
447 shape: "RC07"\r
448 pos: -67132200 44577000 0 90 0\r
449 \r
450 part: RX$XX1$XXdecoder$XX0tnand$XX1$RP\r
451 ref_text: 1270000 177800 0 6350000 2514600\r
452 package: "RC07"\r
453 shape: "RC07"\r
454 pos: -59512200 44577000 0 90 0\r
455 \r
456 part: RX$XX1$XXdecoder$XX0tnand$XX1$RN\r
457 ref_text: 1270000 177800 0 6350000 2514600\r
458 package: "RC07"\r
459 shape: "RC07"\r
460 pos: -51892200 44577000 0 90 0\r
461 \r
462 part: RX$XX1$XXdecoder$XX0tnand$XX2$Xinv$RP\r
463 ref_text: 1270000 177800 0 6350000 2514600\r
464 package: "RC07"\r
465 shape: "RC07"\r
466 pos: -44272200 44577000 0 90 0\r
467 \r
468 part: RX$XX1$XXdecoder$XX0tnand$XX2$Xinv$RN\r
469 ref_text: 1270000 177800 0 6350000 2514600\r
470 package: "RC07"\r
471 shape: "RC07"\r
472 pos: -36652200 44577000 0 90 0\r
473 \r
474 [nets]\r
475 \r
476 net: "XX1$XXdecoder$XX1pti2$STI_Out" 2 1 0 0 0 0 1\r
477 pin: 1 RX$XX1$XXdecoder$XX1pti2$Xinv$RP.2\r
478 pin: 2 RX$XX1$XXdecoder$XX1pti2$Xinv$RN.1\r
479 connect: 1 1 0 1 0\r
480 vtx: 1 -112852200 44577000 11 0 0 0 0\r
481 seg: 1 6 0 0 0\r
482 vtx: 2 -120472200 31877000 11 0 0 0 0\r
483 \r
484 net: "XX1$XXdecoder$XX1pti1$NTI_Out" 2 1 0 0 0 0 1\r
485 pin: 1 X_IC_0_CD4007.8\r
486 pin: 2 RX$XX1$XXdecoder$XX1pti1$Xinv$RN.2\r
487 connect: 1 1 0 1 0\r
488 vtx: 1 -128092200 31877000 11 0 0 0 0\r
489 seg: 1 6 0 0 0\r
490 vtx: 2 -141351000 67106800 11 0 0 0 0\r
491 \r
492 net: "XX1$XXdecoder$XX0tnand$XX1$NN" 3 2 0 0 0 0 1\r
493 pin: 1 X_IC_3_CD4007.5\r
494 pin: 2 X_IC_3_CD4007.8\r
495 pin: 3 RX$XX1$XXdecoder$XX0tnand$XX1$RN.2\r
496 connect: 1 1 0 1 0\r
497 vtx: 1 -71120000 93980000 11 0 0 0 0\r
498 seg: 1 6 0 0 0\r
499 vtx: 2 -78740000 99060000 11 0 0 0 0\r
500 connect: 2 2 1 1 0\r
501 vtx: 1 -51892200 31877000 11 0 0 0 0\r
502 seg: 1 6 0 0 0\r
503 vtx: 2 -71120000 93980000 11 0 0 0 0\r
504 \r
505 net: "XX1$XXdecoder$XX1pti1$STI_Out" 2 1 0 0 0 0 1\r
506 pin: 1 RX$XX1$XXdecoder$XX1pti1$Xinv$RP.2\r
507 pin: 2 RX$XX1$XXdecoder$XX1pti1$Xinv$RN.1\r
508 connect: 1 1 0 1 0\r
509 vtx: 1 -128092200 44577000 11 0 0 0 0\r
510 seg: 1 6 0 0 0\r
511 vtx: 2 -135712200 31877000 11 0 0 0 0\r
512 \r
513 net: "XX1$XXdecoder$XX0tnand$XX1$NP" 2 1 0 0 0 0 1\r
514 pin: 1 X_IC_3_CD4007.1\r
515 pin: 2 RX$XX1$XXdecoder$XX0tnand$XX1$RP.1\r
516 connect: 1 1 0 1 0\r
517 vtx: 1 -59512200 44577000 11 0 0 0 0\r
518 seg: 1 6 0 0 0\r
519 vtx: 2 -78740000 109220000 11 0 0 0 0\r
520 \r
521 net: "XX1$XXdecoder$XXinti$PTI_Out" 2 1 0 0 0 0 1\r
522 pin: 1 X_IC_1_CD4007.13\r
523 pin: 2 RX$XX1$XXdecoder$XXinti$Xinv$RP.1\r
524 connect: 1 1 0 1 0\r
525 vtx: 1 -105232200 44577000 11 0 0 0 0\r
526 seg: 1 6 0 0 0\r
527 vtx: 2 -71120000 73660000 11 0 0 0 0\r
528 \r
529 net: "XX1$XXdecoder$XXinti$STI_Out" 2 1 0 0 0 0 1\r
530 pin: 1 RX$XX1$XXdecoder$XXinti$Xinv$RP.2\r
531 pin: 2 RX$XX1$XXdecoder$XXinti$Xinv$RN.1\r
532 connect: 1 1 0 1 0\r
533 vtx: 1 -97612200 44577000 11 0 0 0 0\r
534 seg: 1 6 0 0 0\r
535 vtx: 2 -105232200 31877000 11 0 0 0 0\r
536 \r
537 net: "XX1$XXdecoder$XX0pti$NTI_Out" 2 1 0 0 0 0 1\r
538 pin: 1 X_IC_1_CD4007.5\r
539 pin: 2 RX$XX1$XXdecoder$XX0pti$Xinv$RN.2\r
540 connect: 1 1 0 1 0\r
541 vtx: 1 -82372200 31877000 11 0 0 0 0\r
542 seg: 1 6 0 0 0\r
543 vtx: 2 -78740000 66040000 11 0 0 0 0\r
544 \r
545 net: "XX1$XXdecoder$XX0sti$NTI_Out" 2 1 0 0 0 0 1\r
546 pin: 1 X_IC_2_CD4007.8\r
547 pin: 2 RX$XX1$XXdecoder$XX0sti$Xinv$RN.2\r
548 connect: 1 1 0 1 0\r
549 vtx: 1 -67132200 31877000 11 0 0 0 0\r
550 seg: 1 6 0 0 0\r
551 vtx: 2 -142240000 93980000 11 0 0 0 0\r
552 \r
553 net: "$G_Vss" 10 9 0 0 0 0 1\r
554 pin: 1 V$XX11$Vss.2\r
555 pin: 2 X_IC_0_CD4007.4\r
556 pin: 3 X_IC_0_CD4007.7\r
557 pin: 4 X_IC_1_CD4007.4\r
558 pin: 5 X_IC_1_CD4007.7\r
559 pin: 6 X_IC_2_CD4007.4\r
560 pin: 7 X_IC_2_CD4007.7\r
561 pin: 8 X_IC_3_CD4007.4\r
562 pin: 9 X_IC_3_CD4007.7\r
563 pin: 10 X_IC_7_CD4016.7\r
564 connect: 1 8 7 1 0\r
565 vtx: 1 -78740000 93980000 11 0 0 0 0\r
566 seg: 1 6 0 0 0\r
567 vtx: 2 -78740000 101600000 11 0 0 0 0\r
568 connect: 2 4 3 1 0\r
569 vtx: 1 -78740000 60960000 11 0 0 0 0\r
570 seg: 1 6 0 0 0\r
571 vtx: 2 -78740000 68580000 11 0 0 0 0\r
572 connect: 3 2 1 1 0\r
573 vtx: 1 -148971000 67106800 11 0 0 0 0\r
574 seg: 1 6 0 0 0\r
575 vtx: 2 -148971000 74726800 11 0 0 0 0\r
576 connect: 4 6 5 1 0\r
577 vtx: 1 -149860000 93980000 11 0 0 0 0\r
578 seg: 1 6 0 0 0\r
579 vtx: 2 -149860000 101600000 11 0 0 0 0\r
580 connect: 5 6 1 1 0\r
581 vtx: 1 -149860000 93980000 11 0 0 0 0\r
582 seg: 1 6 0 0 0\r
583 vtx: 2 -148971000 74726800 11 0 0 0 0\r
584 connect: 6 8 3 1 0\r
585 vtx: 1 -78740000 93980000 11 0 0 0 0\r
586 seg: 1 6 0 0 0\r
587 vtx: 2 -78740000 68580000 11 0 0 0 0\r
588 connect: 7 9 8 1 0\r
589 vtx: 1 -30480000 93980000 11 0 0 0 0\r
590 seg: 1 6 1 0 0\r
591 vtx: 2 -78740000 93980000 11 0 0 0 0\r
592 connect: 8 3 2 1 0\r
593 vtx: 1 -78740000 68580000 11 0 0 0 0\r
594 seg: 1 6 0 0 0\r
595 vtx: 2 -148971000 67106800 11 0 0 0 0\r
596 connect: 9 9 0 1 0\r
597 vtx: 1 -30480000 93980000 11 0 0 0 0\r
598 seg: 1 6 0 0 0\r
599 vtx: 2 8458200 104978200 11 0 0 0 0\r
600 \r
601 net: "$G_Vdd" 9 8 0 0 0 0 1\r
602 pin: 1 V$XX11$Vdd.1\r
603 pin: 2 X_IC_0_CD4007.2\r
604 pin: 3 X_IC_0_CD4007.14\r
605 pin: 4 X_IC_1_CD4007.2\r
606 pin: 5 X_IC_1_CD4007.14\r
607 pin: 6 X_IC_2_CD4007.2\r
608 pin: 7 X_IC_2_CD4007.14\r
609 pin: 8 X_IC_3_CD4007.14\r
610 pin: 9 X_IC_7_CD4016.14\r
611 connect: 1 4 3 1 0\r
612 vtx: 1 -71120000 76200000 11 0 0 0 0\r
613 seg: 1 6 0 0 0\r
614 vtx: 2 -78740000 73660000 11 0 0 0 0\r
615 connect: 2 6 5 1 0\r
616 vtx: 1 -142240000 109220000 11 0 0 0 0\r
617 seg: 1 6 0 0 0\r
618 vtx: 2 -149860000 106680000 11 0 0 0 0\r
619 connect: 3 2 1 1 0\r
620 vtx: 1 -141351000 82346800 11 0 0 0 0\r
621 seg: 1 6 0 0 0\r
622 vtx: 2 -148971000 79806800 11 0 0 0 0\r
623 connect: 4 5 2 1 0\r
624 vtx: 1 -149860000 106680000 11 0 0 0 0\r
625 seg: 1 6 0 0 0\r
626 vtx: 2 -141351000 82346800 11 0 0 0 0\r
627 connect: 5 7 4 1 0\r
628 vtx: 1 -71120000 109220000 11 0 0 0 0\r
629 seg: 1 6 0 0 0\r
630 vtx: 2 -71120000 76200000 11 0 0 0 0\r
631 connect: 6 8 7 1 0\r
632 vtx: 1 -22860000 109220000 11 0 0 0 0\r
633 seg: 1 6 0 0 0\r
634 vtx: 2 -71120000 109220000 11 0 0 0 0\r
635 connect: 7 3 2 1 0\r
636 vtx: 1 -78740000 73660000 11 0 0 0 0\r
637 seg: 1 6 0 0 0\r
638 vtx: 2 -141351000 82346800 11 0 0 0 0\r
639 connect: 8 8 0 1 0\r
640 vtx: 1 -22860000 109220000 11 0 0 0 0\r
641 seg: 1 6 0 0 0\r
642 vtx: 2 8458200 94818200 11 0 0 0 0\r
643 \r
644 net: "XX1$XXdecoder$N0sti" 3 2 0 0 0 0 1\r
645 pin: 1 X_IC_3_CD4007.3\r
646 pin: 2 RX$XX1$XXdecoder$XX0sti$Xinv$RP.2\r
647 pin: 3 RX$XX1$XXdecoder$XX0sti$Xinv$RN.1\r
648 connect: 1 2 1 1 0\r
649 vtx: 1 -67132200 44577000 11 0 0 0 0\r
650 seg: 1 6 0 0 0\r
651 vtx: 2 -74752200 31877000 11 0 0 0 0\r
652 connect: 2 2 0 1 0\r
653 vtx: 1 -67132200 44577000 11 0 0 0 0\r
654 seg: 1 6 0 0 0\r
655 vtx: 2 -78740000 104140000 11 0 0 0 0\r
656 \r
657 net: "XX1$XXdecoder$XX0sti$PTI_Out" 2 1 0 0 0 0 1\r
658 pin: 1 X_IC_2_CD4007.13\r
659 pin: 2 RX$XX1$XXdecoder$XX0sti$Xinv$RP.1\r
660 connect: 1 1 0 1 0\r
661 vtx: 1 -74752200 44577000 11 0 0 0 0\r
662 seg: 1 6 0 0 0\r
663 vtx: 2 -142240000 106680000 11 0 0 0 0\r
664 \r
665 net: "XX1$XXdecoder$XX0pti$STI_Out" 2 1 0 0 0 0 1\r
666 pin: 1 RX$XX1$XXdecoder$XX0pti$Xinv$RP.2\r
667 pin: 2 RX$XX1$XXdecoder$XX0pti$Xinv$RN.1\r
668 connect: 1 1 0 1 0\r
669 vtx: 1 -82372200 44577000 11 0 0 0 0\r
670 seg: 1 6 0 0 0\r
671 vtx: 2 -89992200 31877000 11 0 0 0 0\r
672 \r
673 net: "XX1$CTRL_A" 3 2 0 0 0 0 1\r
674 pin: 1 X_IC_1_CD4007.8\r
675 pin: 2 X_IC_7_CD4016.13\r
676 pin: 3 RX$XX1$XXdecoder$XXinti$Xinv$RN.2\r
677 connect: 1 1 0 1 0\r
678 vtx: 1 -22860000 106680000 11 0 0 0 0\r
679 seg: 1 6 0 0 0\r
680 vtx: 2 -71120000 60960000 11 0 0 0 0\r
681 connect: 2 2 0 1 0\r
682 vtx: 1 -97612200 31877000 11 0 0 0 0\r
683 seg: 1 6 0 0 0\r
684 vtx: 2 -71120000 60960000 11 0 0 0 0\r
685 \r
686 net: "XX1$XXdecoder$XX0tnand$P001" 3 2 0 0 0 0 1\r
687 pin: 1 X_IC_2_CD4007.3\r
688 pin: 2 RX$XX1$XXdecoder$XX0tnand$XX1$RP.2\r
689 pin: 3 RX$XX1$XXdecoder$XX0tnand$XX1$RN.1\r
690 connect: 1 2 1 1 0\r
691 vtx: 1 -51892200 44577000 11 0 0 0 0\r
692 seg: 1 6 0 0 0\r
693 vtx: 2 -59512200 31877000 11 0 0 0 0\r
694 connect: 2 2 0 1 0\r
695 vtx: 1 -51892200 44577000 11 0 0 0 0\r
696 seg: 1 6 0 0 0\r
697 vtx: 2 -149860000 104140000 11 0 0 0 0\r
698 \r
699 net: "XX1$XXdecoder$N0tnand" 3 2 0 0 0 0 1\r
700 pin: 1 X_IC_1_CD4007.3\r
701 pin: 2 RX$XX1$XXdecoder$XX0tnand$XX2$Xinv$RP.2\r
702 pin: 3 RX$XX1$XXdecoder$XX0tnand$XX2$Xinv$RN.1\r
703 connect: 1 2 1 1 0\r
704 vtx: 1 -36652200 44577000 11 0 0 0 0\r
705 seg: 1 6 0 0 0\r
706 vtx: 2 -44272200 31877000 11 0 0 0 0\r
707 connect: 2 2 0 1 0\r
708 vtx: 1 -36652200 44577000 11 0 0 0 0\r
709 seg: 1 6 0 0 0\r
710 vtx: 2 -78740000 71120000 11 0 0 0 0\r
711 \r
712 net: "Q" 3 2 0 0 0 0 1\r
713 pin: 1 X_IC_7_CD4016.2\r
714 pin: 2 X_IC_7_CD4016.3\r
715 pin: 3 X_IC_7_CD4016.9\r
716 connect: 1 1 0 1 0\r
717 vtx: 1 -30480000 104140000 11 0 0 0 0\r
718 seg: 1 6 1 0 0\r
719 vtx: 2 -30480000 106680000 11 0 0 0 0\r
720 connect: 2 2 1 1 0\r
721 vtx: 1 -22860000 96520000 11 0 0 0 0\r
722 seg: 1 6 0 0 0\r
723 vtx: 2 -30480000 104140000 11 0 0 0 0\r
724 \r
725 net: "XX1$XXdecoder$XX0tnand$XX2$NTI_Out" 2 1 0 0 0 0 1\r
726 pin: 1 X_IC_2_CD4007.5\r
727 pin: 2 RX$XX1$XXdecoder$XX0tnand$XX2$Xinv$RN.2\r
728 connect: 1 1 0 1 0\r
729 vtx: 1 -36652200 31877000 11 0 0 0 0\r
730 seg: 1 6 0 0 0\r
731 vtx: 2 -149860000 99060000 11 0 0 0 0\r
732 \r
733 net: "XX1$XXdecoder$N1" 3 2 0 0 0 0 1\r
734 pin: 1 X_IC_0_CD4007.3\r
735 pin: 2 X_IC_0_CD4007.13\r
736 pin: 3 RX$XX1$XXdecoder$XX1pti1$Xinv$RP.1\r
737 connect: 1 1 0 1 0\r
738 vtx: 1 -141351000 79806800 11 0 0 0 0\r
739 seg: 1 6 0 0 0\r
740 vtx: 2 -148971000 77266800 11 0 0 0 0\r
741 connect: 2 2 1 1 0\r
742 vtx: 1 -135712200 44577000 11 0 0 0 0\r
743 seg: 1 6 0 0 0\r
744 vtx: 2 -141351000 79806800 11 0 0 0 0\r
745 \r
746 net: "XX1$CTRL_B" 3 2 0 0 0 0 1\r
747 pin: 1 X_IC_1_CD4007.1\r
748 pin: 2 X_IC_7_CD4016.6\r
749 pin: 3 RX$XX1$XXdecoder$XX0pti$Xinv$RP.1\r
750 connect: 1 1 0 1 0\r
751 vtx: 1 -30480000 96520000 11 0 0 0 0\r
752 seg: 1 6 1 0 0\r
753 vtx: 2 -78740000 76200000 11 0 0 0 0\r
754 connect: 2 2 1 1 0\r
755 vtx: 1 -89992200 44577000 11 0 0 0 0\r
756 seg: 1 6 0 0 0\r
757 vtx: 2 -30480000 96520000 11 0 0 0 0\r
758 \r
759 net: "A" 2 1 0 0 0 0 1\r
760 pin: 1 V1.1\r
761 pin: 2 X_IC_7_CD4016.1\r
762 connect: 1 1 0 1 0\r
763 vtx: 1 -30480000 109220000 11 0 0 0 0\r
764 seg: 1 6 0 0 0\r
765 vtx: 2 8458200 64338200 11 0 0 0 0\r
766 \r
767 net: "0" 6 5 0 0 0 0 1\r
768 pin: 1 V1.2\r
769 pin: 2 V2.2\r
770 pin: 3 V3.2\r
771 pin: 4 V4.2\r
772 pin: 5 V$XX11$Vdd.2\r
773 pin: 6 V$XX11$Vss.1\r
774 connect: 1 5 4 1 0\r
775 vtx: 1 8458200 102438200 11 0 0 0 0\r
776 seg: 1 6 0 0 0\r
777 vtx: 2 8458200 97358200 11 0 0 0 0\r
778 connect: 2 1 0 1 0\r
779 vtx: 1 8458200 74498200 11 0 0 0 0\r
780 seg: 1 6 0 0 0\r
781 vtx: 2 8458200 66878200 11 0 0 0 0\r
782 connect: 3 2 1 1 0\r
783 vtx: 1 8458200 82118200 11 0 0 0 0\r
784 seg: 1 6 0 0 0\r
785 vtx: 2 8458200 74498200 11 0 0 0 0\r
786 connect: 4 4 3 1 0\r
787 vtx: 1 8458200 97358200 11 0 0 0 0\r
788 seg: 1 6 0 0 0\r
789 vtx: 2 8458200 89738200 11 0 0 0 0\r
790 connect: 5 3 2 1 0\r
791 vtx: 1 8458200 89738200 11 0 0 0 0\r
792 seg: 1 6 0 0 0\r
793 vtx: 2 8458200 82118200 11 0 0 0 0\r
794 \r
795 net: "XX1$CTRL_C" 3 2 0 0 0 0 1\r
796 pin: 1 X_IC_0_CD4007.1\r
797 pin: 2 X_IC_7_CD4016.5\r
798 pin: 3 RX$XX1$XXdecoder$XX1pti2$Xinv$RP.1\r
799 connect: 1 2 1 1 0\r
800 vtx: 1 -120472200 44577000 11 0 0 0 0\r
801 seg: 1 6 0 0 0\r
802 vtx: 2 -30480000 99060000 11 0 0 0 0\r
803 connect: 2 1 0 1 0\r
804 vtx: 1 -30480000 99060000 11 0 0 0 0\r
805 seg: 1 6 0 0 0\r
806 vtx: 2 -148971000 82346800 11 0 0 0 0\r
807 \r
808 net: "XX1$XXdecoder$XX0tnand$XX2$PTI_Out" 2 1 0 0 0 0 1\r
809 pin: 1 X_IC_2_CD4007.1\r
810 pin: 2 RX$XX1$XXdecoder$XX0tnand$XX2$Xinv$RP.1\r
811 connect: 1 1 0 1 0\r
812 vtx: 1 -44272200 44577000 11 0 0 0 0\r
813 seg: 1 6 0 0 0\r
814 vtx: 2 -149860000 109220000 11 0 0 0 0\r
815 \r
816 net: "S" 5 4 0 0 0 0 1\r
817 pin: 1 V4.1\r
818 pin: 2 X_IC_0_CD4007.6\r
819 pin: 3 X_IC_1_CD4007.6\r
820 pin: 4 X_IC_2_CD4007.6\r
821 pin: 5 X_IC_3_CD4007.6\r
822 connect: 1 3 1 1 0\r
823 vtx: 1 -149860000 96520000 11 0 0 0 0\r
824 seg: 1 6 0 0 0\r
825 vtx: 2 -148971000 69646800 11 0 0 0 0\r
826 connect: 2 4 2 1 0\r
827 vtx: 1 -78740000 96520000 11 0 0 0 0\r
828 seg: 1 6 0 0 0\r
829 vtx: 2 -78740000 63500000 11 0 0 0 0\r
830 connect: 3 2 1 1 0\r
831 vtx: 1 -78740000 63500000 11 0 0 0 0\r
832 seg: 1 6 0 0 0\r
833 vtx: 2 -148971000 69646800 11 0 0 0 0\r
834 connect: 4 2 0 1 0\r
835 vtx: 1 -78740000 63500000 11 0 0 0 0\r
836 seg: 1 6 0 0 0\r
837 vtx: 2 8458200 87198200 11 0 0 0 0\r
838 \r
839 net: "B" 2 1 0 0 0 0 1\r
840 pin: 1 V2.1\r
841 pin: 2 X_IC_7_CD4016.8\r
842 connect: 1 1 0 1 0\r
843 vtx: 1 -22860000 93980000 11 0 0 0 0\r
844 seg: 1 6 0 0 0\r
845 vtx: 2 8458200 71958200 11 0 0 0 0\r
846 \r
847 net: "XX1$XXdecoder$XX0tnand$XX1$NI" 2 1 0 0 0 0 1\r
848 pin: 1 X_IC_3_CD4007.2\r
849 pin: 2 X_IC_3_CD4007.13\r
850 connect: 1 1 0 1 0\r
851 vtx: 1 -71120000 106680000 11 0 0 0 0\r
852 seg: 1 6 0 0 0\r
853 vtx: 2 -78740000 106680000 11 0 0 0 0\r
854 \r
855 net: "XX1$XXdecoder$XX1pti2$NTI_Out" 2 1 0 0 0 0 1\r
856 pin: 1 X_IC_0_CD4007.5\r
857 pin: 2 RX$XX1$XXdecoder$XX1pti2$Xinv$RN.2\r
858 connect: 1 1 0 1 0\r
859 vtx: 1 -112852200 31877000 11 0 0 0 0\r
860 seg: 1 6 0 0 0\r
861 vtx: 2 -148971000 72186800 11 0 0 0 0\r
862 \r
863 net: "C" 2 1 0 0 0 0 1\r
864 pin: 1 V3.1\r
865 pin: 2 X_IC_7_CD4016.4\r
866 connect: 1 1 0 1 0\r
867 vtx: 1 -30480000 101600000 11 0 0 0 0\r
868 seg: 1 6 0 0 0\r
869 vtx: 2 8458200 79578200 11 0 0 0 0\r
870 \r
871 [texts]\r
872 \r
873 [end]\r