| blob | ce3391623e3013d045ae9fa3203502a8f6ef6a6c |
1 [options]\r
2 \r
3 version: 1.343\r
4 file_version: 1.332\r
5 project_name: "dtflop-ms_test"\r
6 full_library_folder: "c:\program files\freepcb\lib"\r
7 CAM_folder: ""\r
8 ses_file_path: "Z:\trinary\code\bb\dtflop-ms_test.ses"\r
9 SMT_connect_copper: "0"\r
10 dsn_flags: "0"\r
11 dsn_bounds_poly: "0"\r
12 dsn_signals_poly: "0"\r
13 autosave_interval: 0\r
14 netlist_import_flags: 451\r
15 units: MIL\r
16 \r
17 visible_grid_spacing: 5080000.000000\r
18 visible_grid_item: 100MIL\r
19 visible_grid_item: 125MIL\r
20 visible_grid_item: 200MIL\r
21 visible_grid_item: 250MIL\r
22 visible_grid_item: 400MIL\r
23 visible_grid_item: 500MIL\r
24 visible_grid_item: 1000MIL\r
25 visible_grid_item: 1MM\r
26 visible_grid_item: 2MM\r
27 visible_grid_item: 2.5MM\r
28 visible_grid_item: 4MM\r
29 visible_grid_item: 5MM\r
30 visible_grid_item: 10MM\r
31 visible_grid_item: 20MM\r
32 visible_grid_item: 25MM\r
33 visible_grid_item: 40MM\r
34 visible_grid_item: 50MM\r
35 visible_grid_item: 100MM\r
36 \r
37 placement_grid_spacing: 2540000.000000\r
38 placement_grid_item: 10MIL\r
39 placement_grid_item: 20MIL\r
40 placement_grid_item: 25MIL\r
41 placement_grid_item: 40MIL\r
42 placement_grid_item: 50MIL\r
43 placement_grid_item: 100MIL\r
44 placement_grid_item: 200MIL\r
45 placement_grid_item: 250MIL\r
46 placement_grid_item: 400MIL\r
47 placement_grid_item: 500MIL\r
48 placement_grid_item: 1000MIL\r
49 placement_grid_item: 0.1MM\r
50 placement_grid_item: 0.2MM\r
51 placement_grid_item: 0.25MM\r
52 placement_grid_item: 0.4MM\r
53 placement_grid_item: 0.5MM\r
54 placement_grid_item: 1MM\r
55 placement_grid_item: 2MM\r
56 placement_grid_item: 2.5MM\r
57 placement_grid_item: 4MM\r
58 placement_grid_item: 5MM\r
59 placement_grid_item: 10MM\r
60 \r
61 routing_grid_spacing: 508000.000000\r
62 routing_grid_item: 1MIL\r
63 routing_grid_item: 2MIL\r
64 routing_grid_item: 2.5MIL\r
65 routing_grid_item: 3.33326772MIL\r
66 routing_grid_item: 4MIL\r
67 routing_grid_item: 5MIL\r
68 routing_grid_item: 6.66629921MIL\r
69 routing_grid_item: 10MIL\r
70 routing_grid_item: 12.5MIL\r
71 routing_grid_item: 16.66629921MIL\r
72 routing_grid_item: 20MIL\r
73 routing_grid_item: 25MIL\r
74 routing_grid_item: 40MIL\r
75 routing_grid_item: 50MIL\r
76 routing_grid_item: 0.01MM\r
77 routing_grid_item: 0.02MM\r
78 routing_grid_item: 0.04MM\r
79 routing_grid_item: 0.05MM\r
80 routing_grid_item: 0.1MM\r
81 routing_grid_item: 0.2MM\r
82 routing_grid_item: 0.25MM\r
83 routing_grid_item: 0.4MM\r
84 routing_grid_item: 0.5MM\r
85 routing_grid_item: 1MM\r
86 routing_grid_item: 2MM\r
87 routing_grid_item: 2.5MM\r
88 routing_grid_item: 4MM\r
89 routing_grid_item: 5MM\r
90 routing_grid_item: 10MM\r
91 \r
92 snap_angle: 45\r
93 \r
94 fp_visible_grid_spacing: 5080000.000000\r
95 fp_visible_grid_item: 100MIL\r
96 fp_visible_grid_item: 125MIL\r
97 fp_visible_grid_item: 200MIL\r
98 fp_visible_grid_item: 250MIL\r
99 fp_visible_grid_item: 400MIL\r
100 fp_visible_grid_item: 500MIL\r
101 fp_visible_grid_item: 1000MIL\r
102 fp_visible_grid_item: 1MM\r
103 fp_visible_grid_item: 2MM\r
104 fp_visible_grid_item: 2.5MM\r
105 fp_visible_grid_item: 4MM\r
106 fp_visible_grid_item: 5MM\r
107 fp_visible_grid_item: 10MM\r
108 fp_visible_grid_item: 20MM\r
109 fp_visible_grid_item: 25MM\r
110 fp_visible_grid_item: 40MM\r
111 fp_visible_grid_item: 50MM\r
112 fp_visible_grid_item: 100MM\r
113 \r
114 fp_placement_grid_spacing: 2540000.000000\r
115 fp_placement_grid_item: 10MIL\r
116 fp_placement_grid_item: 20MIL\r
117 fp_placement_grid_item: 25MIL\r
118 fp_placement_grid_item: 40MIL\r
119 fp_placement_grid_item: 50MIL\r
120 fp_placement_grid_item: 100MIL\r
121 fp_placement_grid_item: 200MIL\r
122 fp_placement_grid_item: 250MIL\r
123 fp_placement_grid_item: 400MIL\r
124 fp_placement_grid_item: 500MIL\r
125 fp_placement_grid_item: 1000MIL\r
126 fp_placement_grid_item: 0.1MM\r
127 fp_placement_grid_item: 0.2MM\r
128 fp_placement_grid_item: 0.25MM\r
129 fp_placement_grid_item: 0.4MM\r
130 fp_placement_grid_item: 0.5MM\r
131 fp_placement_grid_item: 1MM\r
132 fp_placement_grid_item: 2MM\r
133 fp_placement_grid_item: 2.5MM\r
134 fp_placement_grid_item: 4MM\r
135 fp_placement_grid_item: 5MM\r
136 fp_placement_grid_item: 10MM\r
137 \r
138 fp_snap_angle: 45\r
139 \r
140 fill_clearance: 254000\r
141 mask_clearance: 203200\r
142 thermal_width: 254000\r
143 min_silkscreen_width: 127000\r
144 board_outline_width: 127000\r
145 hole_clearance: 381000\r
146 pilot_diameter: 254000\r
147 annular_ring_for_pins: 177800\r
148 annular_ring_for_vias: 127000\r
149 shrink_paste_mask: 0\r
150 cam_flags: 1\r
151 cam_layers: 4095\r
152 cam_drill_file: 1\r
153 cam_units: 2\r
154 cam_n_x: 1\r
155 cam_n_y: 1\r
156 cam_space_x: 0\r
157 cam_space_y: 0\r
158 \r
159 report_options: 0\r
160 drc_check_unrouted: 0\r
161 drc_trace_width: 254000\r
162 drc_pad_pad: 254000\r
163 drc_pad_trace: 254000\r
164 drc_trace_trace: 254000\r
165 drc_hole_copper: 381000\r
166 drc_annular_ring_pins: 177800\r
167 drc_annular_ring_vias: 127000\r
168 drc_board_edge_copper: 635000\r
169 drc_board_edge_hole: 635000\r
170 drc_hole_hole: 635000\r
171 drc_copper_copper: 254000\r
172 \r
173 default_trace_width: 254000\r
174 default_via_pad_width: 711200\r
175 default_via_hole_width: 355600\r
176 n_width_menu: 7\r
177 width_menu_item: 1 152400 711200 355600\r
178 width_menu_item: 2 203200 711200 355600\r
179 width_menu_item: 3 254000 711200 355600\r
180 width_menu_item: 4 304800 711200 355600\r
181 width_menu_item: 5 381000 711200 355600\r
182 width_menu_item: 6 508000 711200 355600\r
183 width_menu_item: 7 635000 711200 355600\r
184 \r
185 n_copper_layers: 2\r
186 layer_info: "selection" 0 255 255 255 1\r
187 layer_info: "background" 1 0 0 0 1\r
188 layer_info: "visible grid" 2 255 255 255 1\r
189 layer_info: "highlight" 3 255 255 255 1\r
190 layer_info: "DRC error" 4 255 128 64 1\r
191 layer_info: "board outline" 5 0 0 255 1\r
192 layer_info: "rat line" 6 255 0 255 1\r
193 layer_info: "top silk" 7 255 255 0 1\r
194 layer_info: "bottom silk" 8 255 192 192 1\r
195 layer_info: "top sm cutout" 9 160 160 160 1\r
196 layer_info: "bot sm cutout" 10 95 95 95 1\r
197 layer_info: "thru pad" 11 0 0 255 1\r
198 layer_info: "top copper" 12 0 255 0 1\r
199 layer_info: "bottom copper" 13 255 0 0 1\r
200 \r
201 [footprints]\r
202 \r
203 name: "14DIP300"\r
204 author: "Ivex"\r
205 source: "DIGIKEY CATALOG NO. 941, PAGE 64"\r
206 units: MIL\r
207 sel_rect: -58 -35 658 335\r
208 ref_text: 50 -100 150 270 7\r
209 centroid: 0 300 150\r
210 outline_polyline: 7 -50 50\r
211 next_corner: 650 50 0\r
212 next_corner: 650 250 0\r
213 next_corner: -50 250 0\r
214 close_polyline: 0\r
215 outline_polyline: 7 -50 100\r
216 next_corner: 0 100 0\r
217 next_corner: 0 200 0\r
218 next_corner: -50 200 0\r
219 close_polyline: 0\r
220 n_pins: 14\r
221 pin: "1" 28 0 0 0\r
222 top_pad: 2 55 27 27 0\r
223 inner_pad: 1 55 27 27 0\r
224 bottom_pad: 2 55 27 27 0\r
225 pin: "2" 28 100 0 0\r
226 top_pad: 1 55 27 27 0\r
227 inner_pad: 1 55 27 27 0\r
228 bottom_pad: 1 55 27 27 0\r
229 pin: "3" 28 200 0 0\r
230 top_pad: 1 55 27 27 0\r
231 inner_pad: 1 55 27 27 0\r
232 bottom_pad: 1 55 27 27 0\r
233 pin: "4" 28 300 0 0\r
234 top_pad: 1 55 27 27 0\r
235 inner_pad: 1 55 27 27 0\r
236 bottom_pad: 1 55 27 27 0\r
237 pin: "5" 28 400 0 0\r
238 top_pad: 1 55 27 27 0\r
239 inner_pad: 1 55 27 27 0\r
240 bottom_pad: 1 55 27 27 0\r
241 pin: "6" 28 500 0 0\r
242 top_pad: 1 55 27 27 0\r
243 inner_pad: 1 55 27 27 0\r
244 bottom_pad: 1 55 27 27 0\r
245 pin: "7" 28 600 0 0\r
246 top_pad: 1 55 27 27 0\r
247 inner_pad: 1 55 27 27 0\r
248 bottom_pad: 1 55 27 27 0\r
249 pin: "8" 28 600 300 0\r
250 top_pad: 1 55 27 27 0\r
251 inner_pad: 1 55 27 27 0\r
252 bottom_pad: 1 55 27 27 0\r
253 pin: "9" 28 500 300 0\r
254 top_pad: 1 55 27 27 0\r
255 inner_pad: 1 55 27 27 0\r
256 bottom_pad: 1 55 27 27 0\r
257 pin: "10" 28 400 300 0\r
258 top_pad: 1 55 27 27 0\r
259 inner_pad: 1 55 27 27 0\r
260 bottom_pad: 1 55 27 27 0\r
261 pin: "11" 28 300 300 0\r
262 top_pad: 1 55 27 27 0\r
263 inner_pad: 1 55 27 27 0\r
264 bottom_pad: 1 55 27 27 0\r
265 pin: "12" 28 200 300 0\r
266 top_pad: 1 55 27 27 0\r
267 inner_pad: 1 55 27 27 0\r
268 bottom_pad: 1 55 27 27 0\r
269 pin: "13" 28 100 300 0\r
270 top_pad: 1 55 27 27 0\r
271 inner_pad: 1 55 27 27 0\r
272 bottom_pad: 1 55 27 27 0\r
273 pin: "14" 28 0 300 0\r
274 top_pad: 1 55 27 27 0\r
275 inner_pad: 1 55 27 27 0\r
276 bottom_pad: 1 55 27 27 0\r
277 \r
278 name: "1X2HDR-100"\r
279 author: "Ivex"\r
280 source: "PRINTED CIRCUIT DESIGN METHODS PAGE 411"\r
281 units: MIL\r
282 sel_rect: -33 -33 33 133\r
283 ref_text: 50 0 160 0 7\r
284 centroid: 0 0 50\r
285 n_pins: 2\r
286 pin: "1" 28 0 0 0\r
287 top_pad: 2 50 25 25 0\r
288 inner_pad: 1 50 25 25 0\r
289 bottom_pad: 2 50 25 25 0\r
290 pin: "2" 28 0 100 0\r
291 top_pad: 1 50 25 25 0\r
292 inner_pad: 1 50 25 25 0\r
293 bottom_pad: 1 50 25 25 0\r
294 \r
295 name: "RC07"\r
296 author: "Ivex"\r
297 source: "DIGITAL PRINTED CIRCUIT DESIGN & DRAFTING, PAGE 408"\r
298 units: MIL\r
299 sel_rect: -45 -57 545 57\r
300 ref_text: 50 250 99 0 7\r
301 centroid: 0 250 0\r
302 outline_polyline: 7 109 49\r
303 next_corner: 391 49 0\r
304 next_corner: 391 -49 0\r
305 next_corner: 109 -49 0\r
306 close_polyline: 0\r
307 n_pins: 2\r
308 pin: "1" 35 0 0 0\r
309 top_pad: 1 75 37 37 0\r
310 inner_pad: 1 75 37 37 0\r
311 bottom_pad: 1 75 37 37 0\r
312 pin: "2" 35 500 0 0\r
313 top_pad: 1 75 37 37 0\r
314 inner_pad: 1 75 37 37 0\r
315 bottom_pad: 1 75 37 37 0\r
316 \r
317 [board]\r
318 \r
319 outline: 4 0\r
320 corner: 1 -78740000 139700000 0\r
321 corner: 2 -2540000 139700000 0\r
322 corner: 3 -2540000 88900000 0\r
323 corner: 4 -78740000 88900000 0\r
324 \r
325 [solder_mask_cutouts]\r
326 \r
327 \r
328 [parts]\r
329 \r
330 part: Vclk\r
331 ref_text: 2540000 254000 0 2540000 0\r
332 package: "1X2HDR-100"\r
333 shape: "1X2HDR-100"\r
334 pos: -74930000 115570000 0 0 0\r
335 \r
336 part: Vd\r
337 ref_text: 2540000 254000 0 2540000 0\r
338 package: "1X2HDR-100"\r
339 shape: "1X2HDR-100"\r
340 pos: -74930000 123190000 0 0 0\r
341 \r
342 part: Vdd\r
343 ref_text: 1905000 190500 0 2540000 0\r
344 package: "1X2HDR-100"\r
345 shape: "1X2HDR-100"\r
346 pos: -74930000 107950000 0 0 0\r
347 \r
348 part: Vss\r
349 ref_text: 1905000 190500 0 2540000 0\r
350 package: "1X2HDR-100"\r
351 shape: "1X2HDR-100"\r
352 pos: -74930000 102870000 0 0 0\r
353 \r
354 part: X_IC_0_CD4007\r
355 ref_text: 1270000 177800 270 -2540000 -3810000\r
356 package: "14DIP300"\r
357 shape: "14DIP300"\r
358 pos: -50800000 109220000 0 90 0\r
359 \r
360 part: X_IC_1_CD4007\r
361 ref_text: 1270000 177800 270 -2540000 -3810000\r
362 package: "14DIP300"\r
363 shape: "14DIP300"\r
364 pos: -27940000 109220000 0 90 0\r
365 \r
366 part: X_IC_2_CD4007\r
367 ref_text: 1270000 177800 270 -2540000 -3810000\r
368 package: "14DIP300"\r
369 shape: "14DIP300"\r
370 pos: -27940000 132080000 0 90 0\r
371 \r
372 part: X_IC_15_CD4016\r
373 ref_text: 1270000 177800 270 -2540000 -3810000\r
374 package: "14DIP300"\r
375 shape: "14DIP300"\r
376 pos: -50800000 132080000 0 90 0\r
377 \r
378 part: RP2\r
379 ref_text: 1270000 177800 0 7620000 2514600\r
380 package: "RC07"\r
381 shape: "RC07"\r
382 pos: -55880000 119380000 0 270 0\r
383 \r
384 part: RN2\r
385 ref_text: 1270000 177800 0 7620000 2514600\r
386 package: "RC07"\r
387 shape: "RC07"\r
388 pos: -63500000 132080000 0 90 0\r
389 \r
390 part: RP4\r
391 ref_text: 1270000 177800 0 7620000 2514600\r
392 package: "RC07"\r
393 shape: "RC07"\r
394 pos: -63500000 106680000 0 90 0\r
395 \r
396 part: RN4\r
397 ref_text: 1270000 177800 0 7620000 2514600\r
398 package: "RC07"\r
399 shape: "RC07"\r
400 pos: -55880000 93980000 0 270 0\r
401 \r
402 part: RP3\r
403 ref_text: 1270000 177800 0 7620000 2514600\r
404 package: "RC07"\r
405 shape: "RC07"\r
406 pos: -6350000 93980000 0 270 0\r
407 \r
408 part: RN3\r
409 ref_text: 1270000 177800 0 7620000 2514600\r
410 package: "RC07"\r
411 shape: "RC07"\r
412 pos: -13970000 106680000 0 90 0\r
413 \r
414 part: RP1\r
415 ref_text: 1270000 177800 0 6350000 2514600\r
416 package: "RC07"\r
417 shape: "RC07"\r
418 pos: -35560000 129540000 0 90 0\r
419 \r
420 part: RN1\r
421 ref_text: 1270000 177800 0 6350000 2514600\r
422 package: "RC07"\r
423 shape: "RC07"\r
424 pos: -35560000 106680000 0 90 0\r
425 \r
426 part: RP5\r
427 ref_text: 1270000 177800 0 7620000 2514600\r
428 package: "RC07"\r
429 shape: "RC07"\r
430 pos: -13970000 129540000 0 90 0\r
431 \r
432 part: RN5\r
433 ref_text: 1270000 177800 0 7620000 2514600\r
434 package: "RC07"\r
435 shape: "RC07"\r
436 pos: -6350000 116840000 0 270 0\r
437 \r
438 part: Vq\r
439 ref_text: 1270000 177800 0 0 4064000\r
440 package: ""\r
441 shape: "1X2HDR-100"\r
442 pos: -10160000 109220000 0 0 0\r
443 \r
444 [nets]\r
445 \r
446 net: "Xflipflop$tg_D" 3 2 0 508000 711200 355600 1\r
447 pin: 1 X_IC_0_CD4007.3\r
448 pin: 2 X_IC_15_CD4016.2\r
449 pin: 3 X_IC_15_CD4016.9\r
450 connect: 1 2 1 1 0\r
451 vtx: 1 -43180000 119380000 11 0 0 0 0\r
452 seg: 1 6 0 0 0\r
453 vtx: 2 -50800000 129540000 11 0 0 0 0\r
454 connect: 2 2 0 1 0\r
455 vtx: 1 -43180000 119380000 11 0 0 0 0\r
456 seg: 1 6 0 0 0\r
457 vtx: 2 -50800000 104140000 11 0 0 0 0\r
458 \r
459 net: "D" 2 1 0 508000 711200 355600 1\r
460 pin: 1 Vd.1\r
461 pin: 2 X_IC_15_CD4016.8\r
462 connect: 1 1 0 1 0\r
463 vtx: 1 -43180000 116840000 11 0 0 0 0\r
464 seg: 1 6 0 0 0\r
465 vtx: 2 -74930000 123190000 11 0 0 0 0\r
466 \r
467 net: "Xflipflop$XX1$PTI_Out" 2 1 0 508000 711200 355600 1\r
468 pin: 1 X_IC_1_CD4007.1\r
469 pin: 2 RP1.1\r
470 connect: 1 1 0 1 0\r
471 vtx: 1 -35560000 129540000 11 0 0 0 0\r
472 seg: 1 6 0 0 0\r
473 vtx: 2 -27940000 109220000 11 0 0 0 0\r
474 \r
475 net: "Xflipflop$XX5$NTI_Out" 2 1 0 508000 711200 355600 1\r
476 pin: 1 X_IC_2_CD4007.8\r
477 pin: 2 RN5.2\r
478 connect: 1 1 0 1 0\r
479 vtx: 1 -6350000 129540000 11 0 0 0 0\r
480 seg: 1 6 0 0 0\r
481 vtx: 2 -20320000 116840000 11 0 0 0 0\r
482 \r
483 net: "Xflipflop$XX5$PTI_Out" 2 1 0 508000 711200 355600 1\r
484 pin: 1 X_IC_2_CD4007.13\r
485 pin: 2 RP5.1\r
486 connect: 1 1 0 1 0\r
487 vtx: 1 -13970000 129540000 11 0 0 0 0\r
488 seg: 1 6 0 0 0\r
489 vtx: 2 -20320000 129540000 11 0 0 0 0\r
490 \r
491 net: "Xflipflop$_Q_slave" 3 2 0 508000 711200 355600 1\r
492 pin: 1 X_IC_15_CD4016.11\r
493 pin: 2 RP1.2\r
494 pin: 3 RN1.1\r
495 connect: 1 2 1 1 0\r
496 vtx: 1 -35560000 106680000 11 0 0 0 0\r
497 seg: 1 6 0 0 0\r
498 vtx: 2 -35560000 116840000 11 0 0 0 0\r
499 connect: 2 1 0 1 0\r
500 vtx: 1 -35560000 116840000 11 0 0 0 0\r
501 seg: 1 6 0 0 0\r
502 vtx: 2 -43180000 124460000 11 0 0 0 0\r
503 \r
504 net: "Xflipflop$XX4$NTI_Out" 2 1 0 508000 711200 355600 1\r
505 pin: 1 X_IC_0_CD4007.5\r
506 pin: 2 RN4.2\r
507 connect: 1 1 0 1 0\r
508 vtx: 1 -55880000 106680000 11 0 0 0 0\r
509 seg: 1 6 0 0 0\r
510 vtx: 2 -50800000 99060000 11 0 0 0 0\r
511 \r
512 net: "Xflipflop$_C" 4 3 0 508000 711200 355600 1\r
513 pin: 1 X_IC_15_CD4016.6\r
514 pin: 2 X_IC_15_CD4016.12\r
515 pin: 3 RP5.2\r
516 pin: 4 RN5.1\r
517 connect: 1 3 2 1 0\r
518 vtx: 1 -6350000 116840000 11 0 0 0 0\r
519 seg: 1 6 0 0 0\r
520 vtx: 2 -13970000 116840000 11 0 0 0 0\r
521 connect: 2 1 0 1 0\r
522 vtx: 1 -43180000 127000000 11 0 0 0 0\r
523 seg: 1 6 0 0 0\r
524 vtx: 2 -50800000 119380000 11 0 0 0 0\r
525 connect: 3 2 1 1 0\r
526 vtx: 1 -13970000 116840000 11 0 0 0 0\r
527 seg: 1 6 0 0 0\r
528 vtx: 2 -43180000 127000000 11 0 0 0 0\r
529 \r
530 net: "Xflipflop$XX4$PTI_Out" 2 1 0 508000 711200 355600 1\r
531 pin: 1 X_IC_0_CD4007.1\r
532 pin: 2 RP4.1\r
533 connect: 1 1 0 1 0\r
534 vtx: 1 -63500000 106680000 11 0 0 0 0\r
535 seg: 1 6 0 0 0\r
536 vtx: 2 -50800000 109220000 11 0 0 0 0\r
537 \r
538 net: "Xflipflop$tg_master" 4 3 0 508000 711200 355600 1\r
539 pin: 1 X_IC_0_CD4007.6\r
540 pin: 2 X_IC_15_CD4016.3\r
541 pin: 3 RP4.2\r
542 pin: 4 RN4.1\r
543 connect: 1 3 0 1 0\r
544 vtx: 1 -55880000 93980000 11 0 0 0 0\r
545 seg: 1 6 0 0 0\r
546 vtx: 2 -50800000 96520000 11 0 0 0 0\r
547 connect: 2 3 2 1 0\r
548 vtx: 1 -55880000 93980000 11 0 0 0 0\r
549 seg: 1 6 0 0 0\r
550 vtx: 2 -63500000 93980000 11 0 0 0 0\r
551 connect: 3 1 0 1 0\r
552 vtx: 1 -50800000 127000000 11 0 0 0 0\r
553 seg: 1 6 0 0 0\r
554 vtx: 2 -50800000 96520000 11 0 0 0 0\r
555 \r
556 net: "$G_Vdd" 7 6 0 508000 711200 355600 1\r
557 pin: 1 Vdd.1\r
558 pin: 2 X_IC_0_CD4007.2\r
559 pin: 3 X_IC_0_CD4007.14\r
560 pin: 4 X_IC_1_CD4007.2\r
561 pin: 5 X_IC_1_CD4007.14\r
562 pin: 6 X_IC_2_CD4007.14\r
563 pin: 7 X_IC_15_CD4016.14\r
564 connect: 1 4 3 1 0\r
565 vtx: 1 -20320000 109220000 11 0 0 0 0\r
566 seg: 1 6 0 0 0\r
567 vtx: 2 -27940000 106680000 11 0 0 0 0\r
568 connect: 2 2 1 1 0\r
569 vtx: 1 -43180000 109220000 11 0 0 0 0\r
570 seg: 1 6 0 0 0\r
571 vtx: 2 -50800000 106680000 11 0 0 0 0\r
572 connect: 3 3 2 1 0\r
573 vtx: 1 -27940000 106680000 11 0 0 0 0\r
574 seg: 1 6 0 0 0\r
575 vtx: 2 -43180000 109220000 11 0 0 0 0\r
576 connect: 4 6 2 1 0\r
577 vtx: 1 -43180000 132080000 11 0 0 0 0\r
578 seg: 1 6 0 0 0\r
579 vtx: 2 -43180000 109220000 11 0 0 0 0\r
580 connect: 5 5 4 1 0\r
581 vtx: 1 -20320000 132080000 11 0 0 0 0\r
582 seg: 1 6 0 0 0\r
583 vtx: 2 -20320000 109220000 11 0 0 0 0\r
584 connect: 6 1 0 1 0\r
585 vtx: 1 -50800000 106680000 11 0 0 0 0\r
586 seg: 1 6 0 0 0\r
587 vtx: 2 -74930000 107950000 11 0 0 0 0\r
588 \r
589 net: "$G_Vss" 7 6 0 508000 711200 355600 1\r
590 pin: 1 Vss.2\r
591 pin: 2 X_IC_0_CD4007.4\r
592 pin: 3 X_IC_0_CD4007.7\r
593 pin: 4 X_IC_1_CD4007.4\r
594 pin: 5 X_IC_1_CD4007.7\r
595 pin: 6 X_IC_2_CD4007.7\r
596 pin: 7 X_IC_15_CD4016.7\r
597 connect: 1 4 3 1 0\r
598 vtx: 1 -27940000 93980000 11 0 0 0 0\r
599 seg: 1 6 0 0 0\r
600 vtx: 2 -27940000 101600000 11 0 0 0 0\r
601 connect: 2 2 1 1 0\r
602 vtx: 1 -50800000 93980000 11 0 0 0 0\r
603 seg: 1 6 0 0 0\r
604 vtx: 2 -50800000 101600000 11 0 0 0 0\r
605 connect: 3 5 3 1 0\r
606 vtx: 1 -27940000 116840000 11 0 0 0 0\r
607 seg: 1 6 0 0 0\r
608 vtx: 2 -27940000 101600000 11 0 0 0 0\r
609 connect: 4 6 1 1 0\r
610 vtx: 1 -50800000 116840000 11 0 0 0 0\r
611 seg: 1 6 0 0 0\r
612 vtx: 2 -50800000 101600000 11 0 0 0 0\r
613 connect: 5 3 1 1 0\r
614 vtx: 1 -27940000 101600000 11 0 0 0 0\r
615 seg: 1 6 0 0 0\r
616 vtx: 2 -50800000 101600000 11 0 0 0 0\r
617 connect: 6 6 0 1 0\r
618 vtx: 1 -50800000 116840000 11 0 0 0 0\r
619 seg: 1 6 0 0 0\r
620 vtx: 2 -74930000 105410000 11 0 0 0 0\r
621 \r
622 net: "Xflipflop$XX3$NTI_Out" 2 1 0 508000 711200 355600 1\r
623 pin: 1 X_IC_1_CD4007.8\r
624 pin: 2 RN3.2\r
625 connect: 1 1 0 1 0\r
626 vtx: 1 -13970000 93980000 11 0 0 0 0\r
627 seg: 1 6 0 0 0\r
628 vtx: 2 -20320000 93980000 11 0 0 0 0\r
629 \r
630 net: "Xflipflop$XX3$PTI_Out" 2 1 0 508000 711200 355600 1\r
631 pin: 1 X_IC_1_CD4007.13\r
632 pin: 2 RP3.1\r
633 connect: 1 1 0 1 0\r
634 vtx: 1 -6350000 93980000 11 0 0 0 0\r
635 seg: 1 6 0 0 0\r
636 vtx: 2 -20320000 106680000 11 0 0 0 0\r
637 \r
638 net: "Xflipflop$tg_slave" 3 2 0 508000 711200 355600 1\r
639 pin: 1 X_IC_1_CD4007.6\r
640 pin: 2 X_IC_15_CD4016.4\r
641 pin: 3 X_IC_15_CD4016.10\r
642 connect: 1 2 1 1 0\r
643 vtx: 1 -43180000 121920000 11 0 0 0 0\r
644 seg: 1 6 0 0 0\r
645 vtx: 2 -50800000 124460000 11 0 0 0 0\r
646 connect: 2 2 0 1 0\r
647 vtx: 1 -43180000 121920000 11 0 0 0 0\r
648 seg: 1 6 0 0 0\r
649 vtx: 2 -27940000 96520000 11 0 0 0 0\r
650 \r
651 net: "Xflipflop$XX2$NTI_Out" 2 1 0 508000 711200 355600 1\r
652 pin: 1 X_IC_0_CD4007.8\r
653 pin: 2 RN2.2\r
654 connect: 1 1 0 1 0\r
655 vtx: 1 -63500000 119380000 11 0 0 0 0\r
656 seg: 1 6 0 0 0\r
657 vtx: 2 -43180000 93980000 11 0 0 0 0\r
658 \r
659 net: "Q" 4 3 0 508000 711200 355600 1\r
660 pin: 1 X_IC_1_CD4007.3\r
661 pin: 2 RP3.2\r
662 pin: 3 RN3.1\r
663 pin: 4 Vq.1\r
664 connect: 1 3 2 1 0\r
665 vtx: 1 -10160000 109220000 11 0 0 0 0\r
666 seg: 1 6 0 0 0\r
667 vtx: 2 -13970000 106680000 11 0 0 0 0\r
668 connect: 2 3 1 1 0\r
669 vtx: 1 -10160000 109220000 11 0 0 0 0\r
670 seg: 1 6 0 0 0\r
671 vtx: 2 -6350000 106680000 11 0 0 0 0\r
672 connect: 3 2 0 1 0\r
673 vtx: 1 -13970000 106680000 11 0 0 0 0\r
674 seg: 1 6 0 0 0\r
675 vtx: 2 -27940000 104140000 11 0 0 0 0\r
676 \r
677 net: "Xflipflop$XX2$PTI_Out" 2 1 0 508000 711200 355600 1\r
678 pin: 1 X_IC_0_CD4007.13\r
679 pin: 2 RP2.1\r
680 connect: 1 1 0 1 0\r
681 vtx: 1 -55880000 119380000 11 0 0 0 0\r
682 seg: 1 6 0 0 0\r
683 vtx: 2 -43180000 106680000 11 0 0 0 0\r
684 \r
685 net: "0" 5 4 0 508000 711200 355600 1\r
686 pin: 1 Vclk.2\r
687 pin: 2 Vd.2\r
688 pin: 3 Vdd.2\r
689 pin: 4 Vss.1\r
690 pin: 5 Vq.2\r
691 connect: 1 1 0 1 0\r
692 vtx: 1 -74930000 125730000 11 0 0 0 0\r
693 seg: 1 6 0 0 0\r
694 vtx: 2 -74930000 118110000 11 0 0 0 0\r
695 connect: 2 2 0 1 0\r
696 vtx: 1 -74930000 110490000 11 0 0 0 0\r
697 seg: 1 6 0 0 0\r
698 vtx: 2 -74930000 118110000 11 0 0 0 0\r
699 connect: 3 3 2 1 0\r
700 vtx: 1 -74930000 102870000 11 0 0 0 0\r
701 seg: 1 6 0 0 0\r
702 vtx: 2 -74930000 110490000 11 0 0 0 0\r
703 connect: 4 4 2 1 0\r
704 vtx: 1 -10160000 111760000 11 0 0 0 0\r
705 seg: 1 6 0 0 0\r
706 vtx: 2 -74930000 110490000 11 0 0 0 0\r
707 \r
708 net: "CLK" 4 3 0 508000 711200 355600 1\r
709 pin: 1 Vclk.1\r
710 pin: 2 X_IC_2_CD4007.6\r
711 pin: 3 X_IC_15_CD4016.5\r
712 pin: 4 X_IC_15_CD4016.13\r
713 connect: 1 3 2 1 0\r
714 vtx: 1 -43180000 129540000 11 0 0 0 0\r
715 seg: 1 6 0 0 0\r
716 vtx: 2 -50800000 121920000 11 0 0 0 0\r
717 connect: 2 3 1 1 0\r
718 vtx: 1 -43180000 129540000 11 0 0 0 0\r
719 seg: 1 6 0 0 0\r
720 vtx: 2 -27940000 119380000 11 0 0 0 0\r
721 connect: 3 2 0 1 0\r
722 vtx: 1 -50800000 121920000 11 0 0 0 0\r
723 seg: 1 6 0 0 0\r
724 vtx: 2 -74930000 115570000 11 0 0 0 0\r
725 \r
726 net: "Xflipflop$XX1$NTI_Out" 2 1 0 508000 711200 355600 1\r
727 pin: 1 X_IC_1_CD4007.5\r
728 pin: 2 RN1.2\r
729 connect: 1 1 0 1 0\r
730 vtx: 1 -35560000 93980000 11 0 0 0 0\r
731 seg: 1 6 0 0 0\r
732 vtx: 2 -27940000 99060000 11 0 0 0 0\r
733 \r
734 net: "Xflipflop$_Q_master" 3 2 0 508000 711200 355600 1\r
735 pin: 1 X_IC_15_CD4016.1\r
736 pin: 2 RP2.2\r
737 pin: 3 RN2.1\r
738 connect: 1 1 0 1 0\r
739 vtx: 1 -55880000 132080000 11 0 0 0 0\r
740 seg: 1 6 0 0 0\r
741 vtx: 2 -50800000 132080000 11 0 0 0 0\r
742 connect: 2 2 1 1 0\r
743 vtx: 1 -63500000 132080000 11 0 0 0 0\r
744 seg: 1 6 0 0 0\r
745 vtx: 2 -55880000 132080000 11 0 0 0 0\r
746 \r
747 [texts]\r
748 \r
749 [end]\r