5 project_name: "Logic_Board"
\r
6 full_library_folder: "c:\program files\freepcb\lib"
\r
7 CAM_folder: "Z:\trinary\bb\CAM-Logic"
\r
8 ses_file_path: "Z:\trinary\bb\Logic_Board.ses"
\r
9 SMT_connect_copper: "0"
\r
11 dsn_bounds_poly: "0"
\r
12 dsn_signals_poly: "0"
\r
13 autosave_interval: 0
\r
14 netlist_import_flags: 487
\r
17 visible_grid_spacing: 2540000.000000
\r
18 visible_grid_item: 100MIL
\r
19 visible_grid_item: 125MIL
\r
20 visible_grid_item: 200MIL
\r
21 visible_grid_item: 250MIL
\r
22 visible_grid_item: 400MIL
\r
23 visible_grid_item: 500MIL
\r
24 visible_grid_item: 1000MIL
\r
25 visible_grid_item: 1MM
\r
26 visible_grid_item: 2MM
\r
27 visible_grid_item: 2.5MM
\r
28 visible_grid_item: 4MM
\r
29 visible_grid_item: 5MM
\r
30 visible_grid_item: 10MM
\r
31 visible_grid_item: 20MM
\r
32 visible_grid_item: 25MM
\r
33 visible_grid_item: 40MM
\r
34 visible_grid_item: 50MM
\r
35 visible_grid_item: 100MM
\r
37 placement_grid_spacing: 2540000.000000
\r
38 placement_grid_item: 10MIL
\r
39 placement_grid_item: 20MIL
\r
40 placement_grid_item: 25MIL
\r
41 placement_grid_item: 40MIL
\r
42 placement_grid_item: 50MIL
\r
43 placement_grid_item: 100MIL
\r
44 placement_grid_item: 200MIL
\r
45 placement_grid_item: 250MIL
\r
46 placement_grid_item: 400MIL
\r
47 placement_grid_item: 500MIL
\r
48 placement_grid_item: 1000MIL
\r
49 placement_grid_item: 0.1MM
\r
50 placement_grid_item: 0.2MM
\r
51 placement_grid_item: 0.25MM
\r
52 placement_grid_item: 0.4MM
\r
53 placement_grid_item: 0.5MM
\r
54 placement_grid_item: 1MM
\r
55 placement_grid_item: 2MM
\r
56 placement_grid_item: 2.5MM
\r
57 placement_grid_item: 4MM
\r
58 placement_grid_item: 5MM
\r
59 placement_grid_item: 10MM
\r
61 routing_grid_spacing: 508000.000000
\r
62 routing_grid_item: 1MIL
\r
63 routing_grid_item: 2MIL
\r
64 routing_grid_item: 2.5MIL
\r
65 routing_grid_item: 3.33330709MIL
\r
66 routing_grid_item: 4MIL
\r
67 routing_grid_item: 5MIL
\r
68 routing_grid_item: 6.6661811MIL
\r
69 routing_grid_item: 10MIL
\r
70 routing_grid_item: 12.5MIL
\r
71 routing_grid_item: 16.6661811MIL
\r
72 routing_grid_item: 20MIL
\r
73 routing_grid_item: 25MIL
\r
74 routing_grid_item: 40MIL
\r
75 routing_grid_item: 50MIL
\r
76 routing_grid_item: 0.01MM
\r
77 routing_grid_item: 0.02MM
\r
78 routing_grid_item: 0.04MM
\r
79 routing_grid_item: 0.05MM
\r
80 routing_grid_item: 0.1MM
\r
81 routing_grid_item: 0.2MM
\r
82 routing_grid_item: 0.25MM
\r
83 routing_grid_item: 0.4MM
\r
84 routing_grid_item: 0.5MM
\r
85 routing_grid_item: 1MM
\r
86 routing_grid_item: 2MM
\r
87 routing_grid_item: 2.5MM
\r
88 routing_grid_item: 4MM
\r
89 routing_grid_item: 5MM
\r
90 routing_grid_item: 10MM
\r
94 fp_visible_grid_spacing: 5080000.000000
\r
95 fp_visible_grid_item: 100MIL
\r
96 fp_visible_grid_item: 125MIL
\r
97 fp_visible_grid_item: 200MIL
\r
98 fp_visible_grid_item: 250MIL
\r
99 fp_visible_grid_item: 400MIL
\r
100 fp_visible_grid_item: 500MIL
\r
101 fp_visible_grid_item: 1000MIL
\r
102 fp_visible_grid_item: 1MM
\r
103 fp_visible_grid_item: 2MM
\r
104 fp_visible_grid_item: 2.5MM
\r
105 fp_visible_grid_item: 4MM
\r
106 fp_visible_grid_item: 5MM
\r
107 fp_visible_grid_item: 10MM
\r
108 fp_visible_grid_item: 20MM
\r
109 fp_visible_grid_item: 25MM
\r
110 fp_visible_grid_item: 40MM
\r
111 fp_visible_grid_item: 50MM
\r
112 fp_visible_grid_item: 100MM
\r
114 fp_placement_grid_spacing: 2540000.000000
\r
115 fp_placement_grid_item: 10MIL
\r
116 fp_placement_grid_item: 20MIL
\r
117 fp_placement_grid_item: 25MIL
\r
118 fp_placement_grid_item: 40MIL
\r
119 fp_placement_grid_item: 50MIL
\r
120 fp_placement_grid_item: 100MIL
\r
121 fp_placement_grid_item: 200MIL
\r
122 fp_placement_grid_item: 250MIL
\r
123 fp_placement_grid_item: 400MIL
\r
124 fp_placement_grid_item: 500MIL
\r
125 fp_placement_grid_item: 1000MIL
\r
126 fp_placement_grid_item: 0.1MM
\r
127 fp_placement_grid_item: 0.2MM
\r
128 fp_placement_grid_item: 0.25MM
\r
129 fp_placement_grid_item: 0.4MM
\r
130 fp_placement_grid_item: 0.5MM
\r
131 fp_placement_grid_item: 1MM
\r
132 fp_placement_grid_item: 2MM
\r
133 fp_placement_grid_item: 2.5MM
\r
134 fp_placement_grid_item: 4MM
\r
135 fp_placement_grid_item: 5MM
\r
136 fp_placement_grid_item: 10MM
\r
140 fill_clearance: 254000
\r
141 mask_clearance: 203200
\r
142 thermal_width: 254000
\r
143 min_silkscreen_width: 127000
\r
144 board_outline_width: 127000
\r
145 hole_clearance: 381000
\r
146 pilot_diameter: 254000
\r
147 annular_ring_for_pins: 177800
\r
148 annular_ring_for_vias: 127000
\r
149 shrink_paste_mask: 0
\r
151 cam_layers: 7340095
\r
160 drc_check_unrouted: 1
\r
161 drc_trace_width: 254000
\r
162 drc_pad_pad: 254000
\r
163 drc_pad_trace: 254000
\r
164 drc_trace_trace: 254000
\r
165 drc_hole_copper: 381000
\r
166 drc_annular_ring_pins: 177800
\r
167 drc_annular_ring_vias: 127000
\r
168 drc_board_edge_copper: 635000
\r
169 drc_board_edge_hole: 635000
\r
170 drc_hole_hole: 635000
\r
171 drc_copper_copper: 254000
\r
173 default_trace_width: 254000
\r
174 default_via_pad_width: 711200
\r
175 default_via_hole_width: 355600
\r
177 width_menu_item: 1 152400 711200 355600
\r
178 width_menu_item: 2 203200 711200 355600
\r
179 width_menu_item: 3 254000 711200 355600
\r
180 width_menu_item: 4 304800 711200 355600
\r
181 width_menu_item: 5 381000 711200 355600
\r
182 width_menu_item: 6 508000 711200 355600
\r
183 width_menu_item: 7 635000 711200 355600
\r
186 layer_info: "selection" 0 255 255 255 1
\r
187 layer_info: "background" 1 0 0 0 1
\r
188 layer_info: "visible grid" 2 255 255 255 1
\r
189 layer_info: "highlight" 3 255 255 255 1
\r
190 layer_info: "DRC error" 4 255 128 64 1
\r
191 layer_info: "board outline" 5 0 0 255 1
\r
192 layer_info: "rat line" 6 255 0 255 1
\r
193 layer_info: "top silk" 7 255 255 0 1
\r
194 layer_info: "bottom silk" 8 255 192 192 1
\r
195 layer_info: "top sm cutout" 9 160 160 160 1
\r
196 layer_info: "bot sm cutout" 10 95 95 95 1
\r
197 layer_info: "thru pad" 11 0 0 255 1
\r
198 layer_info: "top copper" 12 0 255 0 1
\r
199 layer_info: "bottom copper" 13 255 0 0 1
\r
203 name: "1X2HDR-100-40"
\r
204 author: "Coupillie Rudy"
\r
206 sel_rect: -45 -45 45 145
\r
207 ref_text: 50 0 160 0 7
\r
211 top_pad: 4 70 35 35 15
\r
212 inner_pad: 1 70 25 25 0
\r
213 bottom_pad: 4 70 35 35 15
\r
214 pin: "2" 40 0 100 0
\r
215 top_pad: 1 70 25 25 0
\r
216 inner_pad: 1 70 25 25 0
\r
217 bottom_pad: 1 70 25 25 0
\r
221 source: "DIGIKEY CATALOG NO. 941, PAGE 64"
\r
223 sel_rect: -58 -35 658 335
\r
224 ref_text: 50 -100 150 270 7
\r
225 centroid: 0 300 150
\r
226 outline_polyline: 7 -50 50
\r
227 next_corner: 650 50 0
\r
228 next_corner: 650 250 0
\r
229 next_corner: -50 250 0
\r
231 outline_polyline: 7 -50 100
\r
232 next_corner: 0 100 0
\r
233 next_corner: 0 200 0
\r
234 next_corner: -50 200 0
\r
238 top_pad: 2 55 27 27 0
\r
239 inner_pad: 1 55 27 27 0
\r
240 bottom_pad: 2 55 27 27 0
\r
241 pin: "2" 28 100 0 0
\r
242 top_pad: 1 55 27 27 0
\r
243 inner_pad: 1 55 27 27 0
\r
244 bottom_pad: 1 55 27 27 0
\r
245 pin: "3" 28 200 0 0
\r
246 top_pad: 1 55 27 27 0
\r
247 inner_pad: 1 55 27 27 0
\r
248 bottom_pad: 1 55 27 27 0
\r
249 pin: "4" 28 300 0 0
\r
250 top_pad: 1 55 27 27 0
\r
251 inner_pad: 1 55 27 27 0
\r
252 bottom_pad: 1 55 27 27 0
\r
253 pin: "5" 28 400 0 0
\r
254 top_pad: 1 55 27 27 0
\r
255 inner_pad: 1 55 27 27 0
\r
256 bottom_pad: 1 55 27 27 0
\r
257 pin: "6" 28 500 0 0
\r
258 top_pad: 1 55 27 27 0
\r
259 inner_pad: 1 55 27 27 0
\r
260 bottom_pad: 1 55 27 27 0
\r
261 pin: "7" 28 600 0 0
\r
262 top_pad: 1 55 27 27 0
\r
263 inner_pad: 1 55 27 27 0
\r
264 bottom_pad: 1 55 27 27 0
\r
265 pin: "8" 28 600 300 0
\r
266 top_pad: 1 55 27 27 0
\r
267 inner_pad: 1 55 27 27 0
\r
268 bottom_pad: 1 55 27 27 0
\r
269 pin: "9" 28 500 300 0
\r
270 top_pad: 1 55 27 27 0
\r
271 inner_pad: 1 55 27 27 0
\r
272 bottom_pad: 1 55 27 27 0
\r
273 pin: "10" 28 400 300 0
\r
274 top_pad: 1 55 27 27 0
\r
275 inner_pad: 1 55 27 27 0
\r
276 bottom_pad: 1 55 27 27 0
\r
277 pin: "11" 28 300 300 0
\r
278 top_pad: 1 55 27 27 0
\r
279 inner_pad: 1 55 27 27 0
\r
280 bottom_pad: 1 55 27 27 0
\r
281 pin: "12" 28 200 300 0
\r
282 top_pad: 1 55 27 27 0
\r
283 inner_pad: 1 55 27 27 0
\r
284 bottom_pad: 1 55 27 27 0
\r
285 pin: "13" 28 100 300 0
\r
286 top_pad: 1 55 27 27 0
\r
287 inner_pad: 1 55 27 27 0
\r
288 bottom_pad: 1 55 27 27 0
\r
289 pin: "14" 28 0 300 0
\r
290 top_pad: 1 55 27 27 0
\r
291 inner_pad: 1 55 27 27 0
\r
292 bottom_pad: 1 55 27 27 0
\r
294 name: "5X2HDR-100-40"
\r
295 author: "Coupillie Rudy"
\r
297 sel_rect: -45 -45 445 145
\r
298 ref_text: 50 200 160 0 7
\r
302 top_pad: 4 70 35 35 15
\r
303 inner_pad: 1 70 25 25 0
\r
304 bottom_pad: 4 70 35 35 15
\r
305 pin: "2" 40 0 100 0
\r
306 top_pad: 1 70 25 25 0
\r
307 inner_pad: 1 70 25 25 0
\r
308 bottom_pad: 1 70 25 25 0
\r
309 pin: "3" 40 100 0 0
\r
310 top_pad: 1 70 25 25 0
\r
311 inner_pad: 1 70 25 25 0
\r
312 bottom_pad: 1 70 25 25 0
\r
313 pin: "4" 40 100 100 0
\r
314 top_pad: 1 70 25 25 0
\r
315 inner_pad: 1 70 25 25 0
\r
316 bottom_pad: 1 70 25 25 0
\r
317 pin: "5" 40 200 0 0
\r
318 top_pad: 1 70 25 25 0
\r
319 inner_pad: 1 70 25 25 0
\r
320 bottom_pad: 1 70 25 25 0
\r
321 pin: "6" 40 200 100 0
\r
322 top_pad: 1 70 25 25 0
\r
323 inner_pad: 1 70 25 25 0
\r
324 bottom_pad: 1 70 25 25 0
\r
325 pin: "7" 40 300 0 0
\r
326 top_pad: 1 70 25 25 0
\r
327 inner_pad: 1 70 25 25 0
\r
328 bottom_pad: 1 70 25 25 0
\r
329 pin: "8" 40 300 100 0
\r
330 top_pad: 1 70 25 25 0
\r
331 inner_pad: 1 70 25 25 0
\r
332 bottom_pad: 1 70 25 25 0
\r
333 pin: "9" 40 400 0 0
\r
334 top_pad: 1 70 25 25 0
\r
335 inner_pad: 1 70 25 25 0
\r
336 bottom_pad: 1 70 25 25 0
\r
337 pin: "10" 40 400 100 0
\r
338 top_pad: 1 70 25 25 0
\r
339 inner_pad: 1 70 25 25 0
\r
340 bottom_pad: 1 70 25 25 0
\r
342 name: "2X2HDR-100-40"
\r
343 author: "Coupillie Rudy"
\r
345 sel_rect: -45 -45 145 145
\r
346 ref_text: 50 50 160 0 7
\r
350 top_pad: 4 70 35 35 15
\r
351 inner_pad: 1 70 25 25 0
\r
352 bottom_pad: 4 70 35 35 15
\r
353 pin: "2" 40 0 100 0
\r
354 top_pad: 1 70 25 25 0
\r
355 inner_pad: 1 70 25 25 0
\r
356 bottom_pad: 1 70 25 25 0
\r
357 pin: "3" 40 100 0 0
\r
358 top_pad: 1 70 25 25 0
\r
359 inner_pad: 1 70 25 25 0
\r
360 bottom_pad: 1 70 25 25 0
\r
361 pin: "4" 40 100 100 0
\r
362 top_pad: 1 70 25 25 0
\r
363 inner_pad: 1 70 25 25 0
\r
364 bottom_pad: 1 70 25 25 0
\r
368 source: "DIGITAL PRINTED CIRCUIT DESIGN & DRAFTING, PAGE 408"
\r
370 sel_rect: -45 -57 545 57
\r
371 ref_text: 50 250 99 0 7
\r
373 outline_polyline: 7 109 49
\r
374 next_corner: 391 49 0
\r
375 next_corner: 391 -49 0
\r
376 next_corner: 109 -49 0
\r
380 top_pad: 1 75 37 37 0
\r
381 inner_pad: 1 75 37 37 0
\r
382 bottom_pad: 1 75 37 37 0
\r
383 pin: "2" 35 500 0 0
\r
384 top_pad: 1 75 37 37 0
\r
385 inner_pad: 1 75 37 37 0
\r
386 bottom_pad: 1 75 37 37 0
\r
391 corner: 1 -63500000 40640000 0
\r
392 corner: 2 78740000 40640000 0
\r
393 corner: 3 78740000 -73660000 0
\r
394 corner: 4 -38100000 -73660000 0
\r
395 corner: 5 -63500000 -73660000 0
\r
397 [solder_mask_cutouts]
\r
403 ref_text: 1270000 177800 270 -1854200 -2794000
\r
404 package: "14DIP300"
\r
406 pos: -45466000 36245800 0 90 0
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409 ref_text: 1270000 177800 0 6350000 2514600
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412 pos: -34874200 33782000 0 0 0
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415 ref_text: 1270000 177800 0 6350000 2006600
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418 pos: -22174200 21082000 0 180 0
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421 ref_text: 1270000 177800 0 6350000 2514600
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424 pos: -48133000 36195000 0 180 0
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427 ref_text: 1270000 177800 0 6350000 2514600
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430 pos: -60833000 26035000 0 0 0
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433 ref_text: 1270000 177800 270 -1854200 -2794000
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434 package: "14DIP300"
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439 ref_text: 1270000 177800 0 6350000 2006600
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457 ref_text: 1270000 177800 0 6350000 2514600
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463 ref_text: 1270000 177800 270 -2108200 -3429000
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464 package: "14DIP300"
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469 ref_text: 1270000 177800 0 6350000 2260600
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494 package: "14DIP300"
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523 ref_text: 1270000 177800 270 -1778000 -2794000
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524 package: "14DIP300"
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529 ref_text: 1270000 177800 270 -1778000 -3048000
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530 package: "14DIP300"
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535 ref_text: 1270000 177800 270 -1778000 -2794000
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536 package: "14DIP300"
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547 ref_text: 1270000 177800 0 6350000 2514600
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586 pos: -17780000 2794000 0 0 0
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589 ref_text: 1270000 177800 270 -2540000 -3810000
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590 package: "14DIP300"
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595 ref_text: 1270000 177800 270 -2540000 -3810000
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596 package: "14DIP300"
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601 ref_text: 1270000 177800 270 -2540000 -3810000
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602 package: "14DIP300"
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607 ref_text: 1270000 177800 270 -2540000 -3810000
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608 package: "14DIP300"
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613 ref_text: 1270000 177800 0 6350000 -2565400
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619 ref_text: 1270000 177800 0 6350000 -2565400
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625 ref_text: 1270000 177800 0 6350000 -2565400
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631 ref_text: 1270000 177800 0 6350000 -2565400
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634 pos: 20828000 -49784000 0 180 0
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637 ref_text: 1270000 177800 0 6350000 -2565400
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640 pos: -2032000 -49784000 0 180 0
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643 ref_text: 1270000 177800 0 6350000 -2565400
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646 pos: -14732000 -67564000 0 0 0
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649 ref_text: 1270000 177800 0 6350000 2514600
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652 pos: 48768000 -67564000 0 180 0
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655 ref_text: 1270000 177800 0 6350000 2514600
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658 pos: 23368000 -67564000 0 180 0
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661 ref_text: 1270000 177800 0 6350000 -2565400
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664 pos: -27432000 -49784000 0 180 0
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667 ref_text: 1270000 177800 0 6350000 -2565400
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670 pos: -45212000 -49784000 0 180 0
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673 ref_text: 1270000 177800 270 -2540000 -1270000
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674 package: "14DIP300"
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676 pos: 29972000 -43688000 0 0 0
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679 ref_text: 1270000 177800 270 -2540000 -3810000
\r
680 package: "14DIP300"
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682 pos: 59436000 -38608000 0 0 0
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685 ref_text: 1270000 177800 0 6350000 2514600
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688 pos: 32512000 -33528000 0 270 0
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691 ref_text: 1270000 177800 0 6350000 2514600
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697 ref_text: 1270000 177800 0 6350000 -2565400
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703 ref_text: 1270000 177800 0 6350000 -2565400
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706 pos: 59436000 -43688000 0 0 0
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709 ref_text: 1270000 177800 270 -2540000 -1270000
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710 package: "14DIP300"
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712 pos: 29972000 15240000 0 0 0
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715 ref_text: 1270000 177800 270 -2540000 -1270000
\r
716 package: "14DIP300"
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727 ref_text: 1270000 177800 0 6350000 2514600
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733 ref_text: 1270000 177800 0 6350000 2514600
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736 pos: 51816000 27940000 0 90 0
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739 ref_text: 1270000 177800 0 6350000 2514600
\r
742 pos: 59436000 15240000 0 0 0
\r
745 ref_text: 1270000 177800 270 -2540000 -1270000
\r
746 package: "14DIP300"
\r
748 pos: 29972000 -15240000 0 0 0
\r
751 ref_text: 1270000 177800 270 -2540000 -1270000
\r
752 package: "14DIP300"
\r
754 pos: 59436000 -10160000 0 0 0
\r
757 ref_text: 1270000 177800 0 6350000 2514600
\r
760 pos: 32512000 -5080000 0 270 0
\r
763 ref_text: 1270000 177800 0 6350000 2514600
\r
766 pos: 45212000 7620000 0 90 0
\r
769 ref_text: 1270000 177800 0 6350000 2514600
\r
772 pos: 51816000 -2540000 0 90 0
\r
775 ref_text: 1270000 177800 0 6350000 2514600
\r
778 pos: 59436000 -15240000 0 0 0
\r
781 ref_text: 1270000 177800 0 4318000 1016000
\r
783 shape: "2X2HDR-100-40"
\r
784 pos: -30480000 26416000 0 0 0
\r
787 ref_text: 1270000 177800 0 -6096000 1016000
\r
789 shape: "2X2HDR-100-40"
\r
790 pos: -55880000 19304000 0 0 0
\r
793 ref_text: 1270000 177800 0 1270000 4064000
\r
795 shape: "2X2HDR-100-40"
\r
796 pos: -31496000 6096000 0 0 0
\r
799 ref_text: 1270000 177800 0 -6096000 1016000
\r
801 shape: "2X2HDR-100-40"
\r
802 pos: -55880000 -1016000 0 0 0
\r
805 ref_text: 1270000 177800 0 4318000 1016000
\r
807 shape: "2X2HDR-100-40"
\r
808 pos: -31496000 -15240000 0 0 0
\r
811 ref_text: 1270000 177800 0 1270000 4064000
\r
813 shape: "2X2HDR-100-40"
\r
814 pos: -55880000 -21336000 0 0 0
\r
817 ref_text: 1270000 177800 0 4318000 1016000
\r
819 shape: "2X2HDR-100-40"
\r
820 pos: -31496000 -34544000 0 0 0
\r
823 ref_text: 1270000 177800 0 -6858000 1016000
\r
825 shape: "2X2HDR-100-40"
\r
826 pos: -55880000 -42672000 0 0 0
\r
829 ref_text: 1905000 254000 0 -2032000 6096000
\r
831 shape: "1X2HDR-100-40"
\r
832 pos: 56896000 -60960000 0 0 0
\r
835 ref_text: 1905000 254000 0 -762000 -5080000
\r
837 shape: "2X2HDR-100-40"
\r
838 pos: -12192000 -7112000 0 0 0
\r
841 ref_text: 1905000 254000 0 2032000 5080000
\r
843 shape: "5X2HDR-100-40"
\r
844 pos: 18288000 0 0 270 0
\r
847 ref_text: 1905000 254000 0 -3810000 5080000
\r
849 shape: "2X2HDR-100-40"
\r
850 pos: 1016000 -34544000 0 0 0
\r
854 net: "PTI2_$G2" 3 2 0 0 0 0 1
\r
855 pin: 1 IC_CD4007_11.1
\r
859 vtx: 1 -48133000 15875000 11 0 0 0 0
\r
860 seg: 1 12 254000 0 0
\r
861 vtx: 2 -46977300 15875000 0 0 0 0 0
\r
862 seg: 2 12 254000 0 0
\r
863 vtx: 3 -46926500 15925800 0 0 0 0 0
\r
864 seg: 3 12 254000 0 0
\r
865 vtx: 4 -45466000 15925800 11 0 0 0 0
\r
867 vtx: 1 -53340000 1524000 11 0 0 0 0
\r
868 seg: 1 13 254000 0 0
\r
869 vtx: 2 -53340000 10668000 0 0 0 0 0
\r
870 seg: 2 13 254000 0 0
\r
871 vtx: 3 -48133000 15875000 11 0 0 0 0
\r
873 net: "STI1_$G2" 3 2 0 0 0 0 1
\r
878 vtx: 1 -28956000 6096000 11 0 0 0 0
\r
879 seg: 1 13 254000 0 0
\r
880 vtx: 2 -26955750 4095750 0 0 0 0 0
\r
881 seg: 2 13 254000 0 0
\r
882 vtx: 3 -22174200 4095750 0 0 0 0 10301
\r
883 seg: 3 13 254000 0 0
\r
884 vtx: 4 -22174200 13462000 11 0 0 0 0
\r
885 connect: 2 1 -1 1 0
\r
886 vtx: 1 -22174200 762000 11 0 0 0 0
\r
887 seg: 1 13 254000 0 0
\r
888 vtx: 2 -22174200 4095750 0 0 0 0 10301
\r
890 net: "NTI2" 3 2 0 0 0 0 1
\r
891 pin: 1 IC_CD4007_10.5
\r
895 vtx: 1 -48133000 26035000 11 0 0 0 0
\r
896 seg: 1 12 254000 0 0
\r
897 vtx: 2 -45516800 26035000 0 0 0 0 0
\r
898 seg: 2 12 254000 0 0
\r
899 vtx: 3 -45466000 26085800 11 0 0 0 0
\r
901 vtx: 1 -55880000 19304000 11 0 0 0 0
\r
902 seg: 1 13 254000 0 0
\r
903 vtx: 2 -54228746 17652746 0 0 0 0 0
\r
904 seg: 2 13 254000 0 0
\r
905 vtx: 3 -52656232 17652746 0 0 0 0 0
\r
906 seg: 3 13 254000 0 0
\r
907 vtx: 4 -48133000 22175978 0 0 0 0 0
\r
908 seg: 4 13 254000 0 0
\r
909 vtx: 5 -48133000 26035000 11 0 0 0 0
\r
911 net: "XX1$XXtnor1$NP" 2 1 0 0 0 0 1
\r
912 pin: 1 IC_CD4007_20.1
\r
915 vtx: 1 48768000 -67564000 11 0 0 0 0
\r
916 seg: 1 13 254000 0 0
\r
917 vtx: 2 46585378 -65381378 0 0 0 0 0
\r
918 seg: 2 13 254000 0 0
\r
919 vtx: 3 34341816 -65381378 0 0 0 0 0
\r
920 seg: 3 13 254000 0 0
\r
921 vtx: 4 24828500 -55868062 0 0 0 0 0
\r
922 seg: 4 13 254000 0 0
\r
923 vtx: 5 24828500 -54864000 0 0 0 0 0
\r
924 seg: 5 13 254000 0 0
\r
925 vtx: 6 23368000 -54864000 11 0 0 0 0
\r
927 net: "DEC_IN" 3 2 0 0 0 0 1
\r
928 pin: 1 IC_CD4007_22.6
\r
929 pin: 2 IC_CD4007_23.6
\r
932 vtx: 1 -1524000 -21082000 11 0 0 0 0
\r
933 seg: 1 13 254000 0 0
\r
934 vtx: 2 -5447030 -17158970 0 0 0 0 0
\r
935 seg: 2 13 254000 0 0
\r
936 vtx: 3 -5447030 -6421120 0 0 0 0 0
\r
937 seg: 3 13 254000 0 0
\r
938 vtx: 4 -8959342 -2908808 0 0 0 0 15523
\r
939 seg: 4 13 254000 0 0
\r
940 vtx: 5 -8959342 4437126 0 0 0 0 0
\r
941 seg: 5 13 254000 0 0
\r
942 vtx: 6 -3302000 10094468 0 0 0 0 0
\r
943 seg: 6 13 254000 0 0
\r
944 vtx: 7 -3302000 20574000 0 0 0 0 0
\r
945 seg: 7 13 254000 0 0
\r
946 vtx: 8 -1778000 22098000 11 0 0 0 0
\r
947 connect: 2 2 -1 2 0
\r
948 vtx: 1 -12192000 -4572000 11 0 0 0 0
\r
949 seg: 1 13 254000 0 0
\r
950 vtx: 2 -10528808 -2908808 0 0 0 0 0
\r
951 seg: 2 13 254000 0 0
\r
952 vtx: 3 -8959342 -2908808 0 0 0 0 15523
\r
954 net: "XX1$XX0nor$NN" 3 2 0 0 0 0 1
\r
955 pin: 1 IC_CD4007_24.5
\r
956 pin: 2 IC_CD4007_24.8
\r
959 vtx: 1 5842000 -2286000 11 0 0 0 0
\r
960 seg: 1 12 254000 0 0
\r
961 vtx: 2 3302000 -2286000 0 0 0 0 0
\r
962 seg: 2 12 254000 0 0
\r
963 vtx: 3 -1778000 2794000 11 0 0 0 0
\r
965 vtx: 1 -5080000 2794000 11 0 0 0 0
\r
966 seg: 1 12 254000 0 0
\r
967 vtx: 2 -1778000 2794000 11 0 0 0 0
\r
969 net: "TAND_1Y_$G10" 3 2 0 0 0 0 1
\r
974 vtx: 1 15748000 5080000 11 0 0 0 0
\r
975 seg: 1 13 254000 0 0
\r
976 vtx: 2 13195300 7632700 0 0 0 0 0
\r
977 seg: 2 13 254000 0 0
\r
978 vtx: 3 13195300 12286996 0 0 0 0 0
\r
979 seg: 3 13 254000 0 0
\r
980 vtx: 4 32512000 31603442 0 0 0 0 0
\r
981 seg: 4 13 254000 0 0
\r
982 vtx: 5 32512000 38100000 11 0 0 0 0
\r
984 vtx: 1 45212000 38100000 11 0 0 0 0
\r
985 seg: 1 12 254000 0 0
\r
986 vtx: 2 32512000 38100000 11 0 0 0 0
\r
988 net: "STI2_$G2" 3 2 0 0 0 0 1
\r
993 vtx: 1 -60833000 5715000 11 0 0 0 0
\r
994 seg: 1 13 254000 0 0
\r
995 vtx: 2 -60833000 15875000 11 0 0 0 0
\r
997 vtx: 1 -53340000 -1016000 11 0 0 0 0
\r
998 seg: 1 12 254000 0 0
\r
999 vtx: 2 -53340000 -1124712 0 0 0 0 0
\r
1000 seg: 2 12 254000 0 0
\r
1001 vtx: 3 -54889908 -2674620 0 0 0 0 0
\r
1002 seg: 3 12 254000 0 0
\r
1003 vtx: 4 -56859170 -2674620 0 0 0 0 0
\r
1004 seg: 4 12 254000 0 0
\r
1005 vtx: 5 -60833000 1299210 0 0 0 0 0
\r
1006 seg: 5 12 254000 0 0
\r
1007 vtx: 6 -60833000 5715000 11 0 0 0 0
\r
1009 net: "Vss" 27 26 0 0 0 0 1
\r
1010 pin: 1 IC_CD4007_10.4
\r
1011 pin: 2 IC_CD4007_10.7
\r
1012 pin: 3 IC_CD4007_22.4
\r
1013 pin: 4 IC_CD4007_22.7
\r
1014 pin: 5 IC_CD4007_23.7
\r
1015 pin: 6 IC_CD4007_24.4
\r
1016 pin: 7 IC_CD4007_24.7
\r
1017 pin: 8 IC_CD4007_18.4
\r
1018 pin: 9 IC_CD4007_18.7
\r
1019 pin: 10 IC_CD4007_19.7
\r
1020 pin: 11 IC_CD4007_20.4
\r
1021 pin: 12 IC_CD4007_20.7
\r
1022 pin: 13 IC_CD4007_21.4
\r
1023 pin: 14 IC_CD4007_21.7
\r
1024 pin: 15 IC_CD4007_25.7
\r
1025 pin: 16 IC_CD4007_26.7
\r
1026 pin: 17 IC_CD4007_11.4
\r
1027 pin: 18 IC_CD4007_11.7
\r
1028 pin: 19 IC_CD4007_12.4
\r
1029 pin: 20 IC_CD4007_12.7
\r
1030 pin: 21 IC_CD4007_16.4
\r
1031 pin: 22 IC_CD4007_16.7
\r
1032 pin: 23 IC_CD4007_27.7
\r
1033 pin: 24 IC_CD4007_28.7
\r
1034 pin: 25 IC_CD4007_29.7
\r
1035 pin: 26 IC_CD4007_30.7
\r
1037 connect: 1 16 0 6 0
\r
1038 vtx: 1 -45466000 8305800 11 0 0 0 0
\r
1039 seg: 1 13 254000 0 0
\r
1040 vtx: 2 -44005500 9766300 0 0 0 0 0
\r
1041 seg: 2 13 254000 0 0
\r
1042 vtx: 3 -44005500 22024848 0 0 0 0 0
\r
1043 seg: 3 13 254000 0 0
\r
1044 vtx: 4 -44226226 22245574 0 0 0 0 11798
\r
1045 seg: 4 13 254000 0 0
\r
1046 vtx: 5 -44002452 22469348 0 0 0 0 0
\r
1047 seg: 5 13 254000 0 0
\r
1048 vtx: 6 -44002452 27162252 0 0 0 0 0
\r
1049 seg: 6 13 254000 0 0
\r
1050 vtx: 7 -45466000 28625800 11 0 0 0 0
\r
1051 connect: 2 3 2 3 0
\r
1052 vtx: 1 -1778000 19558000 11 0 0 0 0
\r
1053 seg: 1 12 254000 0 0
\r
1054 vtx: 2 -314452 21021548 0 0 0 0 0
\r
1055 seg: 2 12 254000 0 0
\r
1056 vtx: 3 -314452 25714452 0 0 0 0 0
\r
1057 seg: 3 12 254000 0 0
\r
1058 vtx: 4 -1778000 27178000 11 0 0 0 0
\r
1059 connect: 3 5 3 3 0
\r
1060 vtx: 1 -1778000 5334000 11 0 0 0 0
\r
1061 seg: 1 13 254000 0 0
\r
1062 vtx: 2 -311912 6800088 0 0 0 0 0
\r
1063 seg: 2 13 254000 0 0
\r
1064 vtx: 3 -311912 18092166 0 0 0 0 0
\r
1065 seg: 3 13 254000 0 0
\r
1066 vtx: 4 -1778000 19558000 11 0 0 0 0
\r
1067 connect: 4 6 4 3 0
\r
1068 vtx: 1 -1778000 -2286000 11 0 0 0 0
\r
1069 seg: 1 12 254000 0 0
\r
1070 vtx: 2 -2984500 -3492500 0 0 0 0 0
\r
1071 seg: 2 12 254000 0 0
\r
1072 vtx: 3 -2984500 -22161500 0 0 0 0 0
\r
1073 seg: 3 12 254000 0 0
\r
1074 vtx: 4 -1524000 -23622000 11 0 0 0 0
\r
1075 connect: 5 26 4 2 0
\r
1076 vtx: 1 3556000 -32004000 11 0 0 0 0
\r
1077 seg: 1 13 254000 0 0
\r
1078 vtx: 2 3556000 -28702000 0 0 0 0 0
\r
1079 seg: 2 13 254000 0 0
\r
1080 vtx: 3 -1524000 -23622000 11 0 0 0 0
\r
1081 connect: 6 6 5 3 0
\r
1082 vtx: 1 -1778000 -2286000 11 0 0 0 0
\r
1083 seg: 1 13 254000 0 0
\r
1084 vtx: 2 -3246374 -817626 0 0 0 0 0
\r
1085 seg: 2 13 254000 0 0
\r
1086 vtx: 3 -3246374 3865626 0 0 0 0 0
\r
1087 seg: 3 13 254000 0 0
\r
1088 vtx: 4 -1778000 5334000 11 0 0 0 0
\r
1089 connect: 7 11 7 4 0
\r
1090 vtx: 1 8128000 -54864000 11 0 0 0 0
\r
1091 seg: 1 12 254000 0 0
\r
1092 vtx: 2 5305552 -54864000 0 0 0 0 0
\r
1093 seg: 2 12 254000 0 0
\r
1094 vtx: 3 2956052 -52514500 0 0 0 0 0
\r
1095 seg: 3 12 254000 0 0
\r
1096 vtx: 4 -7302500 -52514500 0 0 0 0 0
\r
1097 seg: 4 12 254000 0 0
\r
1098 vtx: 5 -9652000 -54864000 11 0 0 0 0
\r
1099 connect: 8 8 7 3 0
\r
1100 vtx: 1 -17272000 -54864000 11 0 0 0 0
\r
1101 seg: 1 12 254000 0 0
\r
1102 vtx: 2 -15811500 -53403500 0 0 0 0 0
\r
1103 seg: 2 12 254000 0 0
\r
1104 vtx: 3 -11112500 -53403500 0 0 0 0 0
\r
1105 seg: 3 12 254000 0 0
\r
1106 vtx: 4 -9652000 -54864000 11 0 0 0 0
\r
1107 connect: 9 12 8 3 0
\r
1108 vtx: 1 -35052000 -54864000 11 0 0 0 0
\r
1109 seg: 1 12 254000 0 0
\r
1110 vtx: 2 -33591500 -53403500 0 0 0 0 0
\r
1111 seg: 2 12 254000 0 0
\r
1112 vtx: 3 -18732500 -53403500 0 0 0 0 0
\r
1113 seg: 3 12 254000 0 0
\r
1114 vtx: 4 -17272000 -54864000 11 0 0 0 0
\r
1115 connect: 10 14 9 3 0
\r
1116 vtx: 1 45212000 -43688000 11 0 0 0 0
\r
1117 seg: 1 13 254000 0 0
\r
1118 vtx: 2 41919144 -46980856 0 0 0 0 0
\r
1119 seg: 2 13 254000 0 0
\r
1120 vtx: 3 41411144 -46980856 0 0 0 0 0
\r
1121 seg: 3 13 254000 0 0
\r
1122 vtx: 4 33528000 -54864000 11 0 0 0 0
\r
1123 connect: 11 10 9 3 0
\r
1124 vtx: 1 15748000 -54864000 11 0 0 0 0
\r
1125 seg: 1 13 254000 0 0
\r
1126 vtx: 2 17215104 -53396896 0 0 0 0 0
\r
1127 seg: 2 13 254000 0 0
\r
1128 vtx: 3 32060896 -53396896 0 0 0 0 0
\r
1129 seg: 3 13 254000 0 0
\r
1130 vtx: 4 33528000 -54864000 11 0 0 0 0
\r
1131 connect: 12 11 10 4 0
\r
1132 vtx: 1 8128000 -54864000 11 0 0 0 0
\r
1133 seg: 1 13 254000 0 0
\r
1134 vtx: 2 9588500 -53403500 0 0 0 0 0
\r
1135 seg: 2 13 254000 0 0
\r
1136 vtx: 3 9843262 -53403500 0 0 0 0 12146
\r
1137 seg: 3 13 254000 0 0
\r
1138 vtx: 4 14287500 -53403500 0 0 0 0 0
\r
1139 seg: 4 13 254000 0 0
\r
1140 vtx: 5 15748000 -54864000 11 0 0 0 0
\r
1141 connect: 13 21 12 5 0
\r
1142 vtx: 1 -45466000 -39954200 11 0 0 0 0
\r
1143 seg: 1 13 254000 0 0
\r
1144 vtx: 2 -42672000 -42748200 0 0 0 0 0
\r
1145 seg: 2 13 254000 0 0
\r
1146 vtx: 3 -42672000 -51931062 0 0 0 0 0
\r
1147 seg: 3 13 254000 0 0
\r
1148 vtx: 4 -41205658 -53397658 0 0 0 0 1845
\r
1149 seg: 4 13 254000 0 0
\r
1150 vtx: 5 -36518342 -53397658 0 0 0 0 0
\r
1151 seg: 5 13 254000 0 0
\r
1152 vtx: 6 -35052000 -54864000 11 0 0 0 0
\r
1153 connect: 14 15 14 3 0
\r
1154 vtx: 1 74676000 -38608000 11 0 0 0 0
\r
1155 seg: 1 12 254000 0 0
\r
1156 vtx: 2 67881500 -45402500 0 0 0 0 0
\r
1157 seg: 2 12 254000 0 0
\r
1158 vtx: 3 46926500 -45402500 0 0 0 0 0
\r
1159 seg: 3 12 254000 0 0
\r
1160 vtx: 4 45212000 -43688000 11 0 0 0 0
\r
1161 connect: 15 25 15 4 0
\r
1162 vtx: 1 74676000 -10160000 11 0 0 0 0
\r
1163 seg: 1 12 254000 0 0
\r
1164 vtx: 2 67878960 -16957040 0 0 0 0 9096
\r
1165 seg: 2 12 254000 0 0
\r
1166 vtx: 3 76150216 -25228296 0 0 0 0 0
\r
1167 seg: 3 12 254000 0 0
\r
1168 vtx: 4 76150216 -37133784 0 0 0 0 0
\r
1169 seg: 4 12 254000 0 0
\r
1170 vtx: 5 74676000 -38608000 11 0 0 0 0
\r
1171 connect: 16 17 16 3 0
\r
1172 vtx: 1 -45466000 685800 11 0 0 0 0
\r
1173 seg: 1 13 254000 0 0
\r
1174 vtx: 2 -44001690 2150110 0 0 0 0 0
\r
1175 seg: 2 13 254000 0 0
\r
1176 vtx: 3 -44001690 6841744 0 0 0 0 0
\r
1177 seg: 3 13 254000 0 0
\r
1178 vtx: 4 -45466000 8305800 11 0 0 0 0
\r
1179 connect: 17 18 17 3 0
\r
1180 vtx: 1 -45593000 -12522200 11 0 0 0 0
\r
1181 seg: 1 13 254000 0 0
\r
1182 vtx: 2 -44129452 -11058652 0 0 0 0 0
\r
1183 seg: 2 13 254000 0 0
\r
1184 vtx: 3 -44129452 -650748 0 0 0 0 0
\r
1185 seg: 3 13 254000 0 0
\r
1186 vtx: 4 -45466000 685800 11 0 0 0 0
\r
1187 connect: 18 19 18 3 0
\r
1188 vtx: 1 -45593000 -20142200 11 0 0 0 0
\r
1189 seg: 1 13 254000 0 0
\r
1190 vtx: 2 -44127674 -18676874 0 0 0 0 0
\r
1191 seg: 2 13 254000 0 0
\r
1192 vtx: 3 -44127674 -13987526 0 0 0 0 0
\r
1193 seg: 3 13 254000 0 0
\r
1194 vtx: 4 -45593000 -12522200 11 0 0 0 0
\r
1195 connect: 19 20 19 3 0
\r
1196 vtx: 1 -45466000 -32334200 11 0 0 0 0
\r
1197 seg: 1 13 254000 0 0
\r
1198 vtx: 2 -44005500 -30873700 0 0 0 0 0
\r
1199 seg: 2 13 254000 0 0
\r
1200 vtx: 3 -44005500 -21729700 0 0 0 0 0
\r
1201 seg: 3 13 254000 0 0
\r
1202 vtx: 4 -45593000 -20142200 11 0 0 0 0
\r
1203 connect: 20 21 20 3 0
\r
1204 vtx: 1 -45466000 -39954200 11 0 0 0 0
\r
1205 seg: 1 13 254000 0 0
\r
1206 vtx: 2 -44002452 -38490652 0 0 0 0 0
\r
1207 seg: 2 13 254000 0 0
\r
1208 vtx: 3 -44002452 -33797748 0 0 0 0 0
\r
1209 seg: 3 13 254000 0 0
\r
1210 vtx: 4 -45466000 -32334200 11 0 0 0 0
\r
1211 connect: 21 24 22 3 0
\r
1212 vtx: 1 45212000 -15240000 11 0 0 0 0
\r
1213 seg: 1 13 254000 0 0
\r
1214 vtx: 2 46931072 -13520928 0 0 0 0 0
\r
1215 seg: 2 13 254000 0 0
\r
1216 vtx: 3 46931072 13521182 0 0 0 0 28045
\r
1217 seg: 3 13 254000 0 0
\r
1218 vtx: 4 45212000 15240000 11 0 0 0 0
\r
1219 connect: 22 23 -1 2 0
\r
1220 vtx: 1 74676000 20320000 11 0 0 0 0
\r
1221 seg: 1 13 254000 0 0
\r
1222 vtx: 2 67877182 13521182 0 0 0 0 0
\r
1223 seg: 2 13 254000 0 0
\r
1224 vtx: 3 46931072 13521182 0 0 0 0 28045
\r
1225 connect: 23 24 -1 2 0
\r
1226 vtx: 1 45212000 -15240000 11 0 0 0 0
\r
1227 seg: 1 12 254000 0 0
\r
1228 vtx: 2 46929040 -16957040 0 0 0 0 0
\r
1229 seg: 2 12 254000 0 0
\r
1230 vtx: 3 67878960 -16957040 0 0 0 0 9096
\r
1231 connect: 24 26 -1 2 0
\r
1232 vtx: 1 3556000 -32004000 11 0 0 0 0
\r
1233 seg: 1 13 254000 0 0
\r
1234 vtx: 2 9843262 -38291262 0 0 0 0 0
\r
1235 seg: 2 13 254000 0 0
\r
1236 vtx: 3 9843262 -53403500 0 0 0 0 12146
\r
1237 connect: 25 1 -1 1 0
\r
1238 vtx: 1 -45466000 21005800 11 0 0 0 0
\r
1239 seg: 1 13 254000 0 0
\r
1240 vtx: 2 -44226226 22245574 0 0 0 0 11798
\r
1241 connect: 26 13 -1 1 0
\r
1242 vtx: 1 -42672000 -54864000 11 0 0 0 0
\r
1243 seg: 1 13 254000 0 0
\r
1244 vtx: 2 -41205658 -53397658 0 0 0 0 1845
\r
1246 net: "Vdd" 27 26 0 0 0 0 1
\r
1247 pin: 1 IC_CD4007_10.2
\r
1248 pin: 2 IC_CD4007_10.14
\r
1249 pin: 3 IC_CD4007_22.2
\r
1250 pin: 4 IC_CD4007_22.14
\r
1251 pin: 5 IC_CD4007_23.14
\r
1252 pin: 6 IC_CD4007_24.14
\r
1253 pin: 7 IC_CD4007_18.2
\r
1254 pin: 8 IC_CD4007_18.14
\r
1255 pin: 9 IC_CD4007_19.14
\r
1256 pin: 10 IC_CD4007_20.14
\r
1257 pin: 11 IC_CD4007_21.14
\r
1258 pin: 12 IC_CD4007_25.14
\r
1259 pin: 13 IC_CD4007_26.2
\r
1260 pin: 14 IC_CD4007_26.14
\r
1261 pin: 15 IC_CD4007_11.14
\r
1262 pin: 16 IC_CD4007_11.2
\r
1263 pin: 17 IC_CD4007_12.14
\r
1264 pin: 18 IC_CD4007_12.2
\r
1265 pin: 19 IC_CD4007_16.14
\r
1266 pin: 20 IC_CD4007_16.2
\r
1267 pin: 21 IC_CD4007_27.14
\r
1268 pin: 22 IC_CD4007_28.14
\r
1269 pin: 23 IC_CD4007_28.2
\r
1270 pin: 24 IC_CD4007_29.14
\r
1271 pin: 25 IC_CD4007_30.14
\r
1272 pin: 26 IC_CD4007_30.2
\r
1274 connect: 1 14 0 3 0
\r
1275 vtx: 1 -37846000 15925800 11 0 0 0 0
\r
1276 seg: 1 13 254000 0 0
\r
1277 vtx: 2 -39319454 15925800 0 0 0 0 16592
\r
1278 seg: 2 13 254000 0 0
\r
1279 vtx: 3 -39319454 27559254 0 0 0 0 0
\r
1280 seg: 3 13 254000 0 0
\r
1281 vtx: 4 -45466000 33705800 11 0 0 0 0
\r
1282 connect: 2 1 0 2 0
\r
1283 vtx: 1 -37846000 36245800 11 0 0 0 0
\r
1284 seg: 1 12 254000 0 0
\r
1285 vtx: 2 -40386000 33705800 0 0 0 0 0
\r
1286 seg: 2 12 254000 0 0
\r
1287 vtx: 3 -45466000 33705800 11 0 0 0 0
\r
1288 connect: 3 2 1 2 0
\r
1289 vtx: 1 -1778000 32258000 11 0 0 0 0
\r
1290 seg: 1 12 254000 0 0
\r
1291 vtx: 2 -5765800 36245800 0 0 0 0 0
\r
1292 seg: 2 12 254000 0 0
\r
1293 vtx: 3 -37846000 36245800 11 0 0 0 0
\r
1294 connect: 4 20 2 8 0
\r
1295 vtx: 1 29972000 22860000 11 0 0 0 0
\r
1296 seg: 1 12 254000 0 0
\r
1297 vtx: 2 18654522 22860000 0 0 0 0 0
\r
1298 seg: 2 12 254000 0 0
\r
1299 vtx: 3 17866106 23648416 0 0 0 0 0
\r
1300 seg: 3 12 254000 0 0
\r
1301 vtx: 4 16536416 23648416 0 0 0 0 23122
\r
1302 seg: 4 12 254000 0 0
\r
1303 vtx: 5 5884926 34299906 0 0 0 0 0
\r
1304 seg: 5 12 254000 0 0
\r
1305 vtx: 6 5842000 34299906 0 0 0 0 14075
\r
1306 seg: 6 12 254000 0 0
\r
1307 vtx: 7 5343906 34299906 0 0 0 0 0
\r
1308 seg: 7 12 254000 0 0
\r
1309 vtx: 8 3302000 32258000 0 0 0 0 0
\r
1310 seg: 8 12 254000 0 0
\r
1311 vtx: 9 -1778000 32258000 11 0 0 0 0
\r
1312 connect: 5 11 4 5 0
\r
1313 vtx: 1 29972000 -36068000 11 0 0 0 0
\r
1314 seg: 1 12 254000 0 0
\r
1315 vtx: 2 21427440 -27523440 0 0 0 0 0
\r
1316 seg: 2 12 254000 0 0
\r
1317 vtx: 3 11376914 -27523440 0 0 0 0 24876
\r
1318 seg: 3 12 254000 0 0
\r
1319 vtx: 4 11376914 -10204958 0 0 0 0 0
\r
1320 seg: 4 12 254000 0 0
\r
1321 vtx: 5 9553956 -8382000 0 0 0 0 0
\r
1322 seg: 5 12 254000 0 0
\r
1323 vtx: 6 6096000 -8382000 11 0 0 0 0
\r
1324 connect: 6 5 4 3 0
\r
1325 vtx: 1 5842000 12954000 11 0 0 0 0
\r
1326 seg: 1 13 254000 0 0
\r
1327 vtx: 2 4371086 11483086 0 0 0 0 0
\r
1328 seg: 2 13 254000 0 0
\r
1329 vtx: 3 4371086 -6657086 0 0 0 0 0
\r
1330 seg: 3 13 254000 0 0
\r
1331 vtx: 4 6096000 -8382000 11 0 0 0 0
\r
1332 connect: 7 7 6 5 0
\r
1333 vtx: 1 -2032000 -62484000 11 0 0 0 0
\r
1334 seg: 1 12 254000 0 0
\r
1335 vtx: 2 -571500 -61023500 0 0 0 0 14985
\r
1336 seg: 2 12 254000 0 0
\r
1337 vtx: 3 -571500 -53834538 0 0 0 0 0
\r
1338 seg: 3 12 254000 0 0
\r
1339 vtx: 4 -1002538 -53403500 0 0 0 0 0
\r
1340 seg: 4 12 254000 0 0
\r
1341 vtx: 5 -3111500 -53403500 0 0 0 0 0
\r
1342 seg: 5 12 254000 0 0
\r
1343 vtx: 6 -4572000 -54864000 11 0 0 0 0
\r
1344 connect: 8 26 6 3 0
\r
1345 vtx: 1 1016000 -32004000 11 0 0 0 0
\r
1346 seg: 1 13 254000 0 0
\r
1347 vtx: 2 921258 -32004000 0 0 0 0 0
\r
1348 seg: 2 13 254000 0 0
\r
1349 vtx: 3 -4572000 -37497258 0 0 0 0 0
\r
1350 seg: 3 13 254000 0 0
\r
1351 vtx: 4 -4572000 -54864000 11 0 0 0 0
\r
1352 connect: 9 10 7 3 0
\r
1353 vtx: 1 -27432000 -62484000 11 0 0 0 0
\r
1354 seg: 1 12 254000 0 0
\r
1355 vtx: 2 -25082246 -60134246 0 0 0 0 0
\r
1356 seg: 2 12 254000 0 0
\r
1357 vtx: 3 -4381500 -60134246 0 0 0 0 0
\r
1358 seg: 3 12 254000 0 0
\r
1359 vtx: 4 -2032000 -62484000 11 0 0 0 0
\r
1360 connect: 10 12 8 2 0
\r
1361 vtx: 1 61976000 -38608000 11 0 0 0 0
\r
1362 seg: 1 13 254000 0 0
\r
1363 vtx: 2 61976000 -49276000 0 0 0 0 0
\r
1364 seg: 2 13 254000 0 0
\r
1365 vtx: 3 48768000 -62484000 11 0 0 0 0
\r
1366 connect: 11 25 12 6 0
\r
1367 vtx: 1 61976000 -10160000 11 0 0 0 0
\r
1368 seg: 1 13 254000 0 0
\r
1369 vtx: 2 61976000 -28448000 0 0 0 0 0
\r
1370 seg: 2 13 254000 0 0
\r
1371 vtx: 3 60198000 -30226000 0 0 0 0 0
\r
1372 seg: 3 13 254000 0 0
\r
1373 vtx: 4 60198000 -30988000 0 0 0 0 22843
\r
1374 seg: 4 13 254000 0 0
\r
1375 vtx: 5 60483496 -31273496 0 0 0 0 0
\r
1376 seg: 5 13 254000 0 0
\r
1377 vtx: 6 60483496 -37115496 0 0 0 0 0
\r
1378 seg: 6 13 254000 0 0
\r
1379 vtx: 7 61976000 -38608000 11 0 0 0 0
\r
1380 connect: 12 15 14 2 0
\r
1381 vtx: 1 -45466000 13385800 11 0 0 0 0
\r
1382 seg: 1 12 254000 0 0
\r
1383 vtx: 2 -40386000 13385800 0 0 0 0 0
\r
1384 seg: 2 12 254000 0 0
\r
1385 vtx: 3 -37846000 15925800 11 0 0 0 0
\r
1386 connect: 13 17 16 2 0
\r
1387 vtx: 1 -45593000 -7442200 11 0 0 0 0
\r
1388 seg: 1 12 254000 0 0
\r
1389 vtx: 2 -40513000 -7442200 0 0 0 0 0
\r
1390 seg: 2 12 254000 0 0
\r
1391 vtx: 3 -37973000 -4902200 11 0 0 0 0
\r
1392 connect: 14 18 16 3 0
\r
1393 vtx: 1 -37846000 -24714200 11 0 0 0 0
\r
1394 seg: 1 13 254000 0 0
\r
1395 vtx: 2 -39440358 -23119842 0 0 0 0 0
\r
1396 seg: 2 13 254000 0 0
\r
1397 vtx: 3 -39440358 -6369558 0 0 0 0 0
\r
1398 seg: 3 13 254000 0 0
\r
1399 vtx: 4 -37973000 -4902200 11 0 0 0 0
\r
1400 connect: 15 19 18 2 0
\r
1401 vtx: 1 -45466000 -27254200 11 0 0 0 0
\r
1402 seg: 1 12 254000 0 0
\r
1403 vtx: 2 -40386000 -27254200 0 0 0 0 0
\r
1404 seg: 2 12 254000 0 0
\r
1405 vtx: 3 -37846000 -24714200 11 0 0 0 0
\r
1406 connect: 16 22 20 4 0
\r
1407 vtx: 1 61976000 20320000 11 0 0 0 0
\r
1408 seg: 1 12 254000 0 0
\r
1409 vtx: 2 59347862 22948138 0 0 0 0 23268
\r
1410 seg: 2 12 254000 0 0
\r
1411 vtx: 3 57794144 21394166 0 0 0 0 0
\r
1412 seg: 3 12 254000 0 0
\r
1413 vtx: 4 31437834 21394166 0 0 0 0 0
\r
1414 seg: 4 12 254000 0 0
\r
1415 vtx: 5 29972000 22860000 11 0 0 0 0
\r
1416 connect: 17 23 20 3 0
\r
1417 vtx: 1 29972000 -7620000 11 0 0 0 0
\r
1418 seg: 1 13 254000 0 0
\r
1419 vtx: 2 28511500 -6159500 0 0 0 0 0
\r
1420 seg: 2 13 254000 0 0
\r
1421 vtx: 3 28511500 21399500 0 0 0 0 0
\r
1422 seg: 3 13 254000 0 0
\r
1423 vtx: 4 29972000 22860000 11 0 0 0 0
\r
1424 connect: 18 25 23 5 0
\r
1425 vtx: 1 61976000 -10160000 11 0 0 0 0
\r
1426 seg: 1 12 254000 0 0
\r
1427 vtx: 2 60515500 -8699500 0 0 0 0 0
\r
1428 seg: 2 12 254000 0 0
\r
1429 vtx: 3 53530500 -8699500 0 0 0 0 0
\r
1430 seg: 3 12 254000 0 0
\r
1431 vtx: 4 53128672 -9101328 0 0 0 0 0
\r
1432 seg: 4 12 254000 0 0
\r
1433 vtx: 5 31453328 -9101328 0 0 0 0 0
\r
1434 seg: 5 12 254000 0 0
\r
1435 vtx: 6 29972000 -7620000 11 0 0 0 0
\r
1436 connect: 19 25 24 2 0
\r
1437 vtx: 1 61976000 -10160000 11 0 0 0 0
\r
1438 seg: 1 13 254000 0 0
\r
1439 vtx: 2 61976000 -5080000 0 0 0 0 0
\r
1440 seg: 2 13 254000 0 0
\r
1441 vtx: 3 59436000 -2540000 11 0 0 0 0
\r
1442 connect: 20 9 -1 2 0
\r
1443 vtx: 1 23368000 -62484000 11 0 0 0 0
\r
1444 seg: 1 12 254000 0 0
\r
1445 vtx: 2 21907500 -61023500 0 0 0 0 0
\r
1446 seg: 2 12 254000 0 0
\r
1447 vtx: 3 -571500 -61023500 0 0 0 0 14985
\r
1448 connect: 21 16 -1 2 0
\r
1449 vtx: 1 -37973000 -4902200 11 0 0 0 0
\r
1450 seg: 1 13 254000 0 0
\r
1451 vtx: 2 -39319454 -3555746 0 0 0 0 0
\r
1452 seg: 2 13 254000 0 0
\r
1453 vtx: 3 -39319454 15925800 0 0 0 0 16592
\r
1454 connect: 22 5 -1 1 0
\r
1455 vtx: 1 5842000 12954000 11 0 0 0 0
\r
1456 seg: 1 12 254000 0 0
\r
1457 vtx: 2 16536416 23648416 0 0 0 0 23122
\r
1458 connect: 23 3 -1 1 0
\r
1459 vtx: 1 5842000 34798000 11 0 0 0 0
\r
1460 seg: 1 12 254000 0 0
\r
1461 vtx: 2 5842000 34299906 0 0 0 0 14075
\r
1462 connect: 24 21 -1 2 0
\r
1463 vtx: 1 59436000 27940000 11 0 0 0 0
\r
1464 seg: 1 12 254000 0 0
\r
1465 vtx: 2 59347862 27851862 0 0 0 0 0
\r
1466 seg: 2 12 254000 0 0
\r
1467 vtx: 3 59347862 22948138 0 0 0 0 23268
\r
1468 connect: 25 26 -1 2 0
\r
1469 vtx: 1 1016000 -32004000 11 0 0 0 0
\r
1470 seg: 1 12 254000 0 0
\r
1471 vtx: 2 5496560 -27523440 0 0 0 0 0
\r
1472 seg: 2 12 254000 0 0
\r
1473 vtx: 3 11376914 -27523440 0 0 0 0 24876
\r
1474 connect: 26 13 -1 1 0
\r
1475 vtx: 1 59436000 -30988000 11 0 0 0 0
\r
1476 seg: 1 13 254000 0 0
\r
1477 vtx: 2 60198000 -30988000 0 0 0 0 22843
\r
1479 net: "PTI1_$G4" 3 2 0 0 0 0 1
\r
1480 pin: 1 IC_CD4007_12.13
\r
1483 connect: 1 1 0 2 0
\r
1484 vtx: 1 -35001200 -7366000 11 0 0 0 0
\r
1485 seg: 1 12 254000 0 0
\r
1486 vtx: 2 -37896800 -7366000 0 0 0 0 0
\r
1487 seg: 2 12 254000 0 0
\r
1488 vtx: 3 -37973000 -7442200 11 0 0 0 0
\r
1489 connect: 2 2 1 2 0
\r
1490 vtx: 1 -28956000 -12700000 11 0 0 0 0
\r
1491 seg: 1 13 254000 0 0
\r
1492 vtx: 2 -34290000 -7366000 0 0 0 0 0
\r
1493 seg: 2 13 254000 0 0
\r
1494 vtx: 3 -35001200 -7366000 11 0 0 0 0
\r
1496 net: "XX1$XXtnor0$NP" 2 1 0 0 0 0 1
\r
1497 pin: 1 IC_CD4007_21.1
\r
1499 connect: 1 1 0 1 0
\r
1500 vtx: 1 -27432000 -49784000 11 0 0 0 0
\r
1501 seg: 1 13 254000 0 0
\r
1502 vtx: 2 -27432000 -54864000 11 0 0 0 0
\r
1504 net: "XX1$_IN" 4 3 0 0 0 0 1
\r
1505 pin: 1 IC_CD4007_18.3
\r
1506 pin: 2 IC_CD4007_18.6
\r
1509 connect: 1 1 0 3 0
\r
1510 vtx: 1 -14732000 -54864000 11 0 0 0 0
\r
1511 seg: 1 13 254000 0 0
\r
1512 vtx: 2 -14732000 -53387498 0 0 0 0 31177
\r
1513 seg: 2 13 254000 0 0
\r
1514 vtx: 3 -8588248 -53387498 0 0 0 0 0
\r
1515 seg: 3 13 254000 0 0
\r
1516 vtx: 4 -7112000 -54864000 11 0 0 0 0
\r
1517 connect: 2 3 1 3 0
\r
1518 vtx: 1 -14732000 -67564000 11 0 0 0 0
\r
1519 seg: 1 13 254000 0 0
\r
1520 vtx: 2 -18740374 -63555626 0 0 0 0 0
\r
1521 seg: 2 13 254000 0 0
\r
1522 vtx: 3 -18740374 -58872374 0 0 0 0 0
\r
1523 seg: 3 13 254000 0 0
\r
1524 vtx: 4 -14732000 -54864000 11 0 0 0 0
\r
1525 connect: 3 2 -1 1 0
\r
1526 vtx: 1 -14732000 -49784000 11 0 0 0 0
\r
1527 seg: 1 13 254000 0 0
\r
1528 vtx: 2 -14732000 -53387498 0 0 0 0 31177
\r
1530 net: "CU_OUT" 3 2 0 0 0 0 1
\r
1534 connect: 1 1 0 1 0
\r
1535 vtx: 1 23368000 -67564000 11 0 0 0 0
\r
1536 seg: 1 13 254000 0 0
\r
1537 vtx: 2 36068000 -67564000 11 0 0 0 0
\r
1538 connect: 2 2 0 3 0
\r
1539 vtx: 1 56896000 -60960000 11 0 0 0 0
\r
1540 seg: 1 12 254000 0 0
\r
1541 vtx: 2 53011578 -64844422 0 0 0 0 0
\r
1542 seg: 2 12 254000 0 0
\r
1543 vtx: 3 38787578 -64844422 0 0 0 0 0
\r
1544 seg: 3 12 254000 0 0
\r
1545 vtx: 4 36068000 -67564000 11 0 0 0 0
\r
1547 net: "TAND_1Y_$G11" 3 2 0 0 0 0 1
\r
1551 connect: 1 1 0 1 0
\r
1552 vtx: 1 45212000 7620000 11 0 0 0 0
\r
1553 seg: 1 12 254000 0 0
\r
1554 vtx: 2 32512000 7620000 11 0 0 0 0
\r
1555 connect: 2 2 0 2 0
\r
1556 vtx: 1 18288000 10160000 11 0 0 0 0
\r
1557 seg: 1 12 254000 0 0
\r
1558 vtx: 2 20828000 7620000 0 0 0 0 0
\r
1559 seg: 2 12 254000 0 0
\r
1560 vtx: 3 32512000 7620000 11 0 0 0 0
\r
1562 net: "STI1_$G4" 3 2 0 0 0 0 1
\r
1566 connect: 1 2 0 3 0
\r
1567 vtx: 1 -28956000 -15240000 11 0 0 0 0
\r
1568 seg: 1 13 254000 0 0
\r
1569 vtx: 2 -27209750 -16986250 0 0 0 0 0
\r
1570 seg: 2 13 254000 0 0
\r
1571 vtx: 3 -22301200 -16986250 0 0 0 0 2083
\r
1572 seg: 3 13 254000 0 0
\r
1573 vtx: 4 -22301200 -7366000 11 0 0 0 0
\r
1574 connect: 2 1 -1 1 0
\r
1575 vtx: 1 -22301200 -20066000 11 0 0 0 0
\r
1576 seg: 1 13 254000 0 0
\r
1577 vtx: 2 -22301200 -16986250 0 0 0 0 2083
\r
1579 net: "PTI2_$G4" 3 2 0 0 0 0 1
\r
1580 pin: 1 IC_CD4007_12.1
\r
1583 connect: 1 1 0 3 0
\r
1584 vtx: 1 -48260000 -4953000 11 0 0 0 0
\r
1585 seg: 1 12 254000 0 0
\r
1586 vtx: 2 -47104300 -4953000 0 0 0 0 0
\r
1587 seg: 2 12 254000 0 0
\r
1588 vtx: 3 -47053500 -4902200 0 0 0 0 0
\r
1589 seg: 3 12 254000 0 0
\r
1590 vtx: 4 -45593000 -4902200 11 0 0 0 0
\r
1591 connect: 2 2 1 2 0
\r
1592 vtx: 1 -53340000 -18796000 11 0 0 0 0
\r
1593 seg: 1 13 254000 0 0
\r
1594 vtx: 2 -53340000 -10033000 0 0 0 0 0
\r
1595 seg: 2 13 254000 0 0
\r
1596 vtx: 3 -48260000 -4953000 11 0 0 0 0
\r
1598 net: "XX1$XXnti$PTI_Out" 2 1 0 0 0 0 1
\r
1599 pin: 1 IC_CD4007_18.13
\r
1601 connect: 1 1 0 5 0
\r
1602 vtx: 1 -47752000 -67564000 11 0 0 0 0
\r
1603 seg: 1 12 254000 0 0
\r
1604 vtx: 2 -45563028 -65375028 0 0 0 0 0
\r
1605 seg: 2 12 254000 0 0
\r
1606 vtx: 3 -24834342 -65375028 0 0 0 0 0
\r
1607 seg: 3 12 254000 0 0
\r
1608 vtx: 4 -20482814 -61023500 0 0 0 0 0
\r
1609 seg: 4 12 254000 0 0
\r
1610 vtx: 5 -6032500 -61023500 0 0 0 0 0
\r
1611 seg: 5 12 254000 0 0
\r
1612 vtx: 6 -4572000 -62484000 11 0 0 0 0
\r
1614 net: "XX1$XX1pti$NTI_Out" 2 1 0 0 0 0 1
\r
1615 pin: 1 IC_CD4007_22.8
\r
1617 connect: 1 1 0 3 0
\r
1618 vtx: 1 -5080000 19812000 11 0 0 0 0
\r
1619 seg: 1 12 254000 0 0
\r
1620 vtx: 2 -3347212 18079212 0 0 0 0 0
\r
1621 seg: 2 12 254000 0 0
\r
1622 vtx: 3 4363212 18079212 0 0 0 0 0
\r
1623 seg: 3 12 254000 0 0
\r
1624 vtx: 4 5842000 19558000 11 0 0 0 0
\r
1626 net: "XX1$XX0nor$NP" 2 1 0 0 0 0 1
\r
1627 pin: 1 IC_CD4007_24.1
\r
1629 connect: 1 1 0 1 0
\r
1630 vtx: 1 -5080000 12954000 11 0 0 0 0
\r
1631 seg: 1 12 254000 0 0
\r
1632 vtx: 2 -1778000 12954000 11 0 0 0 0
\r
1634 net: "XX1$XXsti_tand$NTI_Out" 2 1 0 0 0 0 1
\r
1635 pin: 1 IC_CD4007_25.8
\r
1637 connect: 1 1 0 1 0
\r
1638 vtx: 1 45212000 -33528000 11 0 0 0 0
\r
1639 seg: 1 13 254000 0 0
\r
1640 vtx: 2 45212000 -36068000 11 0 0 0 0
\r
1642 net: "STI2_$G4" 3 2 0 0 0 0 1
\r
1646 connect: 1 1 0 1 0
\r
1647 vtx: 1 -60960000 -15113000 11 0 0 0 0
\r
1648 seg: 1 13 254000 0 0
\r
1649 vtx: 2 -60960000 -4953000 11 0 0 0 0
\r
1650 connect: 2 2 1 5 0
\r
1651 vtx: 1 -53340000 -21336000 11 0 0 0 0
\r
1652 seg: 1 12 254000 0 0
\r
1653 vtx: 2 -53340000 -21439124 0 0 0 0 0
\r
1654 seg: 2 12 254000 0 0
\r
1655 vtx: 3 -54901592 -23000970 0 0 0 0 0
\r
1656 seg: 3 12 254000 0 0
\r
1657 vtx: 4 -56864504 -23000970 0 0 0 0 0
\r
1658 seg: 4 12 254000 0 0
\r
1659 vtx: 5 -60960000 -18905474 0 0 0 0 0
\r
1660 seg: 5 12 254000 0 0
\r
1661 vtx: 6 -60960000 -15113000 11 0 0 0 0
\r
1663 net: "XX1$INI" 3 2 0 0 0 0 1
\r
1664 pin: 1 IC_CD4007_20.3
\r
1667 connect: 1 1 0 5 0
\r
1668 vtx: 1 -40132000 -49784000 11 0 0 0 0
\r
1669 seg: 1 12 254000 0 0
\r
1670 vtx: 2 -38290500 -51625500 0 0 0 0 0
\r
1671 seg: 2 12 254000 0 0
\r
1672 vtx: 3 3324352 -51625500 0 0 0 0 0
\r
1673 seg: 3 12 254000 0 0
\r
1674 vtx: 4 4976876 -53277770 0 0 0 0 0
\r
1675 seg: 4 12 254000 0 0
\r
1676 vtx: 5 16701770 -53277770 0 0 0 0 0
\r
1677 seg: 5 12 254000 0 0
\r
1678 vtx: 6 18288000 -54864000 11 0 0 0 0
\r
1679 connect: 2 2 1 1 0
\r
1680 vtx: 1 -45212000 -49784000 11 0 0 0 0
\r
1681 seg: 1 12 254000 0 0
\r
1682 vtx: 2 -40132000 -49784000 11 0 0 0 0
\r
1684 net: "OUT_i" 4 3 0 0 0 0 1
\r
1685 pin: 1 IC_CD4007_23.8
\r
1686 pin: 2 IC_CD4007_24.3
\r
1689 connect: 1 3 0 4 0
\r
1690 vtx: 1 -12192000 -7112000 11 0 0 0 0
\r
1691 seg: 1 12 254000 0 0
\r
1692 vtx: 2 -12192000 -15024100 0 0 0 0 0
\r
1693 seg: 2 12 254000 0 0
\r
1694 vtx: 3 -2119884 -25096216 0 0 0 0 0
\r
1695 seg: 3 12 254000 0 0
\r
1696 vtx: 4 4621784 -25096216 0 0 0 0 0
\r
1697 seg: 4 12 254000 0 0
\r
1698 vtx: 5 6096000 -23622000 11 0 0 0 0
\r
1699 connect: 2 2 0 1 0
\r
1700 vtx: 1 9652000 -23622000 11 0 0 0 0
\r
1701 seg: 1 12 254000 0 0
\r
1702 vtx: 2 6096000 -23622000 11 0 0 0 0
\r
1703 connect: 3 3 1 4 0
\r
1704 vtx: 1 -12192000 -7112000 11 0 0 0 0
\r
1705 seg: 1 12 254000 0 0
\r
1706 vtx: 2 -13843762 -5460238 0 0 0 0 0
\r
1707 seg: 2 12 254000 0 0
\r
1708 vtx: 3 -13843762 -3543046 0 0 0 0 0
\r
1709 seg: 3 12 254000 0 0
\r
1710 vtx: 4 -2426716 7874000 0 0 0 0 0
\r
1711 seg: 4 12 254000 0 0
\r
1712 vtx: 5 -1778000 7874000 11 0 0 0 0
\r
1714 net: "XX1$XX1sti$NTI_Out" 2 1 0 0 0 0 1
\r
1715 pin: 1 IC_CD4007_22.5
\r
1717 connect: 1 1 0 4 0
\r
1718 vtx: 1 9652000 24638000 11 0 0 0 0
\r
1719 seg: 1 13 254000 0 0
\r
1720 vtx: 2 9652000 21297138 0 0 0 0 0
\r
1721 seg: 2 13 254000 0 0
\r
1722 vtx: 3 6450838 18095976 0 0 0 0 0
\r
1723 seg: 3 13 254000 0 0
\r
1724 vtx: 4 4764024 18095976 0 0 0 0 0
\r
1725 seg: 4 13 254000 0 0
\r
1726 vtx: 5 -1778000 24638000 11 0 0 0 0
\r
1728 net: "TAND_1Y" 3 2 0 0 0 0 1
\r
1732 connect: 1 2 0 4 0
\r
1733 vtx: 1 18288000 2540000 11 0 0 0 0
\r
1734 seg: 1 13 254000 0 0
\r
1735 vtx: 2 18386806 2540000 0 0 0 0 0
\r
1736 seg: 2 13 254000 0 0
\r
1737 vtx: 3 26428700 -5501894 0 0 0 0 0
\r
1738 seg: 3 13 254000 0 0
\r
1739 vtx: 4 26428700 -14744700 0 0 0 0 0
\r
1740 seg: 4 13 254000 0 0
\r
1741 vtx: 5 32512000 -20828000 11 0 0 0 0
\r
1742 connect: 2 1 0 1 0
\r
1743 vtx: 1 45212000 -20828000 11 0 0 0 0
\r
1744 seg: 1 12 254000 0 0
\r
1745 vtx: 2 32512000 -20828000 11 0 0 0 0
\r
1747 net: "XX1$XXtnand$NI" 2 1 0 0 0 0 1
\r
1748 pin: 1 IC_CD4007_26.4
\r
1749 pin: 2 IC_CD4007_26.8
\r
1750 connect: 1 1 0 1 0
\r
1751 vtx: 1 74676000 -30988000 11 0 0 0 0
\r
1752 seg: 1 12 254000 0 0
\r
1753 vtx: 2 67056000 -38608000 11 0 0 0 0
\r
1755 net: "XX1$AtnandB" 3 2 0 0 0 0 1
\r
1756 pin: 1 IC_CD4007_25.6
\r
1759 connect: 1 1 0 3 0
\r
1760 vtx: 1 51816000 -43688000 11 0 0 0 0
\r
1761 seg: 1 12 254000 0 0
\r
1762 vtx: 2 50344578 -42216578 0 0 0 0 0
\r
1763 seg: 2 12 254000 0 0
\r
1764 vtx: 3 44143422 -42216578 0 0 0 0 0
\r
1765 seg: 3 12 254000 0 0
\r
1766 vtx: 4 42672000 -43688000 11 0 0 0 0
\r
1767 connect: 2 2 1 1 0
\r
1768 vtx: 1 59436000 -43688000 11 0 0 0 0
\r
1769 seg: 1 12 254000 0 0
\r
1770 vtx: 2 51816000 -43688000 11 0 0 0 0
\r
1772 net: "XX1$XXsti_tand$NTI_Out_$G10" 2 1 0 0 0 0 1
\r
1773 pin: 1 IC_CD4007_27.8
\r
1775 connect: 1 1 0 1 0
\r
1776 vtx: 1 45212000 25400000 11 0 0 0 0
\r
1777 seg: 1 13 254000 0 0
\r
1778 vtx: 2 45212000 22860000 11 0 0 0 0
\r
1780 net: "XX1$XXtnand$NP_$G10" 3 2 0 0 0 0 1
\r
1781 pin: 1 IC_CD4007_28.1
\r
1782 pin: 2 IC_CD4007_28.13
\r
1784 connect: 1 1 0 2 0
\r
1785 vtx: 1 61976000 27940000 11 0 0 0 0
\r
1786 seg: 1 13 254000 0 0
\r
1787 vtx: 2 59436000 25400000 0 0 0 0 32295
\r
1788 seg: 2 13 254000 0 0
\r
1789 vtx: 3 59436000 20320000 11 0 0 0 0
\r
1790 connect: 2 2 -1 2 0
\r
1791 vtx: 1 51816000 27940000 11 0 0 0 0
\r
1792 seg: 1 13 254000 0 0
\r
1793 vtx: 2 54356000 25400000 0 0 0 0 0
\r
1794 seg: 2 13 254000 0 0
\r
1795 vtx: 3 59436000 25400000 0 0 0 0 32295
\r
1797 net: "NTI1_$G2" 3 2 0 0 0 0 1
\r
1798 pin: 1 IC_CD4007_11.8
\r
1801 connect: 1 1 0 2 0
\r
1802 vtx: 1 -34874200 762000 11 0 0 0 0
\r
1803 seg: 1 12 254000 0 0
\r
1804 vtx: 2 -37769800 762000 0 0 0 0 0
\r
1805 seg: 2 12 254000 0 0
\r
1806 vtx: 3 -37846000 685800 11 0 0 0 0
\r
1807 connect: 2 2 1 2 0
\r
1808 vtx: 1 -31496000 6096000 11 0 0 0 0
\r
1809 seg: 1 13 254000 0 0
\r
1810 vtx: 2 -31496000 4140200 0 0 0 0 0
\r
1811 seg: 2 13 254000 0 0
\r
1812 vtx: 3 -34874200 762000 11 0 0 0 0
\r
1814 net: "INV_IN1_$G2" 2 1 0 0 0 0 1
\r
1815 pin: 1 IC_CD4007_11.6
\r
1817 connect: 1 1 0 6 0
\r
1818 vtx: 1 -31496000 8636000 11 0 0 0 0
\r
1819 seg: 1 12 254000 0 0
\r
1820 vtx: 2 -31590996 8636000 0 0 0 0 0
\r
1821 seg: 2 12 254000 0 0
\r
1822 vtx: 3 -33159700 7067296 0 0 0 0 0
\r
1823 seg: 3 12 254000 0 0
\r
1824 vtx: 4 -33159700 35560 0 0 0 0 0
\r
1825 seg: 4 12 254000 0 0
\r
1826 vtx: 5 -34150808 -955548 0 0 0 0 0
\r
1827 seg: 5 12 254000 0 0
\r
1828 vtx: 6 -41284652 -955548 0 0 0 0 0
\r
1829 seg: 6 12 254000 0 0
\r
1830 vtx: 7 -45466000 3225800 11 0 0 0 0
\r
1832 net: "XX1$XXnti$STI_Out" 2 1 0 0 0 0 1
\r
1835 connect: 1 1 0 1 0
\r
1836 vtx: 1 -29972000 -67564000 11 0 0 0 0
\r
1837 seg: 1 12 254000 0 0
\r
1838 vtx: 2 -35052000 -67564000 11 0 0 0 0
\r
1840 net: "XX1$XX1sti$PTI_Out" 2 1 0 0 0 0 1
\r
1841 pin: 1 IC_CD4007_22.1
\r
1843 connect: 1 1 0 4 0
\r
1844 vtx: 1 9652000 34798000 11 0 0 0 0
\r
1845 seg: 1 12 254000 0 0
\r
1846 vtx: 2 8191500 36258500 0 0 0 0 0
\r
1847 seg: 2 12 254000 0 0
\r
1848 vtx: 3 1143000 36258500 0 0 0 0 0
\r
1849 seg: 3 12 254000 0 0
\r
1850 vtx: 4 -317500 34798000 0 0 0 0 0
\r
1851 seg: 4 12 254000 0 0
\r
1852 vtx: 5 -1778000 34798000 11 0 0 0 0
\r
1854 net: "XX1$XXsti_tand$PTI_Out" 2 1 0 0 0 0 1
\r
1855 pin: 1 IC_CD4007_25.13
\r
1857 connect: 1 1 0 1 0
\r
1858 vtx: 1 32512000 -33528000 11 0 0 0 0
\r
1859 seg: 1 13 254000 0 0
\r
1860 vtx: 2 32512000 -36068000 11 0 0 0 0
\r
1862 net: "XX1$XXsti_tand$NTI_Out_$G11" 2 1 0 0 0 0 1
\r
1863 pin: 1 IC_CD4007_29.8
\r
1865 connect: 1 1 0 1 0
\r
1866 vtx: 1 45212000 -5080000 11 0 0 0 0
\r
1867 seg: 1 13 254000 0 0
\r
1868 vtx: 2 45212000 -7620000 11 0 0 0 0
\r
1870 net: "XX1$XXtnand$NP_$G11" 3 2 0 0 0 0 1
\r
1871 pin: 1 IC_CD4007_30.1
\r
1872 pin: 2 IC_CD4007_30.13
\r
1874 connect: 1 2 0 4 0
\r
1875 vtx: 1 51816000 -2540000 11 0 0 0 0
\r
1876 seg: 1 13 254000 0 0
\r
1877 vtx: 2 54582060 -5306060 0 0 0 0 6307
\r
1878 seg: 2 13 254000 0 0
\r
1879 vtx: 3 57975500 -8699500 0 0 0 0 0
\r
1880 seg: 3 13 254000 0 0
\r
1881 vtx: 4 57975500 -10160000 0 0 0 0 0
\r
1882 seg: 4 13 254000 0 0
\r
1883 vtx: 5 59436000 -10160000 11 0 0 0 0
\r
1884 connect: 2 1 -1 3 0
\r
1885 vtx: 1 61976000 -2540000 11 0 0 0 0
\r
1886 seg: 1 13 254000 0 0
\r
1887 vtx: 2 60512706 -1076452 0 0 0 0 0
\r
1888 seg: 2 13 254000 0 0
\r
1889 vtx: 3 58811414 -1076452 0 0 0 0 0
\r
1890 seg: 3 13 254000 0 0
\r
1891 vtx: 4 54582060 -5306060 0 0 0 0 6307
\r
1893 net: "INV_IN2_$G2" 2 1 0 0 0 0 1
\r
1894 pin: 1 IC_CD4007_11.3
\r
1896 connect: 1 1 0 2 0
\r
1897 vtx: 1 -55880000 1524000 11 0 0 0 0
\r
1898 seg: 1 12 254000 0 0
\r
1899 vtx: 2 -46558200 10845800 0 0 0 0 0
\r
1900 seg: 2 12 254000 0 0
\r
1901 vtx: 3 -45466000 10845800 11 0 0 0 0
\r
1903 net: "NTI2_$G2" 3 2 0 0 0 0 1
\r
1904 pin: 1 IC_CD4007_11.5
\r
1907 connect: 1 1 0 2 0
\r
1908 vtx: 1 -48133000 5715000 11 0 0 0 0
\r
1909 seg: 1 12 254000 0 0
\r
1910 vtx: 2 -45516800 5715000 0 0 0 0 0
\r
1911 seg: 2 12 254000 0 0
\r
1912 vtx: 3 -45466000 5765800 11 0 0 0 0
\r
1913 connect: 2 2 1 4 0
\r
1914 vtx: 1 -55880000 -1016000 11 0 0 0 0
\r
1915 seg: 1 13 254000 0 0
\r
1916 vtx: 2 -54225952 -2670048 0 0 0 0 0
\r
1917 seg: 2 13 254000 0 0
\r
1918 vtx: 3 -52653946 -2670048 0 0 0 0 0
\r
1919 seg: 3 13 254000 0 0
\r
1920 vtx: 4 -48133000 1850644 0 0 0 0 0
\r
1921 seg: 4 13 254000 0 0
\r
1922 vtx: 5 -48133000 5715000 11 0 0 0 0
\r
1924 net: "PTI1_$G8" 3 2 0 0 0 0 1
\r
1925 pin: 1 IC_CD4007_16.13
\r
1928 connect: 1 1 0 2 0
\r
1929 vtx: 1 -34874200 -27178000 11 0 0 0 0
\r
1930 seg: 1 12 254000 0 0
\r
1931 vtx: 2 -37769800 -27178000 0 0 0 0 0
\r
1932 seg: 2 12 254000 0 0
\r
1933 vtx: 3 -37846000 -27254200 11 0 0 0 0
\r
1934 connect: 2 2 1 2 0
\r
1935 vtx: 1 -28956000 -32004000 11 0 0 0 0
\r
1936 seg: 1 13 254000 0 0
\r
1937 vtx: 2 -33782000 -27178000 0 0 0 0 0
\r
1938 seg: 2 13 254000 0 0
\r
1939 vtx: 3 -34874200 -27178000 11 0 0 0 0
\r
1941 net: "XX1$XXtnand$NN_$G10" 2 1 0 0 0 0 1
\r
1942 pin: 1 IC_CD4007_28.9
\r
1944 connect: 1 1 0 3 0
\r
1945 vtx: 1 72136000 15240000 11 0 0 0 0
\r
1946 seg: 1 13 254000 0 0
\r
1947 vtx: 2 76146914 19250914 0 0 0 0 0
\r
1948 seg: 2 13 254000 0 0
\r
1949 vtx: 3 76146914 23929340 0 0 0 0 0
\r
1950 seg: 3 13 254000 0 0
\r
1951 vtx: 4 72136000 27940000 11 0 0 0 0
\r
1953 net: "INV_IN1_$G4" 2 1 0 0 0 0 1
\r
1954 pin: 1 IC_CD4007_12.6
\r
1956 connect: 1 1 0 6 0
\r
1957 vtx: 1 -31496000 -12700000 11 0 0 0 0
\r
1958 seg: 1 12 254000 0 0
\r
1959 vtx: 2 -31600902 -12700000 0 0 0 0 0
\r
1960 seg: 2 12 254000 0 0
\r
1961 vtx: 3 -33160716 -14259814 0 0 0 0 0
\r
1962 seg: 3 12 254000 0 0
\r
1963 vtx: 4 -33160716 -20651978 0 0 0 0 0
\r
1964 seg: 4 12 254000 0 0
\r
1965 vtx: 5 -34289746 -21781262 0 0 0 0 0
\r
1966 seg: 5 12 254000 0 0
\r
1967 vtx: 6 -41413938 -21781262 0 0 0 0 0
\r
1968 seg: 6 12 254000 0 0
\r
1969 vtx: 7 -45593000 -17602200 11 0 0 0 0
\r
1971 net: "NTI1_$G4" 3 2 0 0 0 0 1
\r
1972 pin: 1 IC_CD4007_12.8
\r
1975 connect: 1 1 0 2 0
\r
1976 vtx: 1 -35001200 -20066000 11 0 0 0 0
\r
1977 seg: 1 12 254000 0 0
\r
1978 vtx: 2 -37896800 -20066000 0 0 0 0 0
\r
1979 seg: 2 12 254000 0 0
\r
1980 vtx: 3 -37973000 -20142200 11 0 0 0 0
\r
1981 connect: 2 2 1 2 0
\r
1982 vtx: 1 -31496000 -15240000 11 0 0 0 0
\r
1983 seg: 1 13 254000 0 0
\r
1984 vtx: 2 -31496000 -16560800 0 0 0 0 0
\r
1985 seg: 2 13 254000 0 0
\r
1986 vtx: 3 -35001200 -20066000 11 0 0 0 0
\r
1988 net: "STI1_$G8" 3 2 0 0 0 0 1
\r
1992 connect: 1 2 0 3 0
\r
1993 vtx: 1 -28956000 -34544000 11 0 0 0 0
\r
1994 seg: 1 13 254000 0 0
\r
1995 vtx: 2 -26955750 -36544250 0 0 0 0 0
\r
1996 seg: 2 13 254000 0 0
\r
1997 vtx: 3 -22174200 -36544250 0 0 0 0 24262
\r
1998 seg: 3 13 254000 0 0
\r
1999 vtx: 4 -22174200 -27178000 11 0 0 0 0
\r
2000 connect: 2 1 -1 1 0
\r
2001 vtx: 1 -22174200 -39878000 11 0 0 0 0
\r
2002 seg: 1 13 254000 0 0
\r
2003 vtx: 2 -22174200 -36544250 0 0 0 0 24262
\r
2005 net: "PTI2_$G8" 3 2 0 0 0 0 1
\r
2006 pin: 1 IC_CD4007_16.1
\r
2009 connect: 1 1 0 3 0
\r
2010 vtx: 1 -48133000 -24765000 11 0 0 0 0
\r
2011 seg: 1 12 254000 0 0
\r
2012 vtx: 2 -46977300 -24765000 0 0 0 0 0
\r
2013 seg: 2 12 254000 0 0
\r
2014 vtx: 3 -46926500 -24714200 0 0 0 0 0
\r
2015 seg: 3 12 254000 0 0
\r
2016 vtx: 4 -45466000 -24714200 11 0 0 0 0
\r
2017 connect: 2 2 1 2 0
\r
2018 vtx: 1 -53340000 -40132000 11 0 0 0 0
\r
2019 seg: 1 12 254000 0 0
\r
2020 vtx: 2 -53340000 -29972000 0 0 0 0 0
\r
2021 seg: 2 12 254000 0 0
\r
2022 vtx: 3 -48133000 -24765000 11 0 0 0 0
\r
2024 net: "XX1$XX1pti$STI_Out" 2 1 0 0 0 0 1
\r
2027 connect: 1 1 0 1 0
\r
2028 vtx: 1 -17780000 19812000 11 0 0 0 0
\r
2029 seg: 1 13 254000 0 0
\r
2030 vtx: 2 -17780000 29718000 11 0 0 0 0
\r
2032 net: "TAND_1B_$G10" 2 1 0 0 0 0 1
\r
2033 pin: 1 IC_CD4007_28.6
\r
2035 connect: 1 1 0 2 0
\r
2036 vtx: 1 18288000 5080000 11 0 0 0 0
\r
2037 seg: 1 12 254000 0 0
\r
2038 vtx: 2 56896000 5080000 0 0 0 0 0
\r
2039 seg: 2 12 254000 0 0
\r
2040 vtx: 3 72136000 20320000 11 0 0 0 0
\r
2042 net: "XX1$XXtnand$NN_$G11" 2 1 0 0 0 0 1
\r
2043 pin: 1 IC_CD4007_30.9
\r
2045 connect: 1 1 0 3 0
\r
2046 vtx: 1 72136000 -15240000 11 0 0 0 0
\r
2047 seg: 1 13 254000 0 0
\r
2048 vtx: 2 76136500 -11239500 0 0 0 0 0
\r
2049 seg: 2 13 254000 0 0
\r
2050 vtx: 3 76136500 -6540500 0 0 0 0 0
\r
2051 seg: 3 13 254000 0 0
\r
2052 vtx: 4 72136000 -2540000 11 0 0 0 0
\r
2054 net: "NTI2_$G4" 3 2 0 0 0 0 1
\r
2055 pin: 1 IC_CD4007_12.5
\r
2058 connect: 1 1 0 2 0
\r
2059 vtx: 1 -48260000 -15113000 11 0 0 0 0
\r
2060 seg: 1 12 254000 0 0
\r
2061 vtx: 2 -45643800 -15113000 0 0 0 0 0
\r
2062 seg: 2 12 254000 0 0
\r
2063 vtx: 3 -45593000 -15062200 11 0 0 0 0
\r
2064 connect: 2 2 1 4 0
\r
2065 vtx: 1 -55880000 -21336000 11 0 0 0 0
\r
2066 seg: 1 13 254000 0 0
\r
2067 vtx: 2 -54226206 -22989794 0 0 0 0 0
\r
2068 seg: 2 13 254000 0 0
\r
2069 vtx: 3 -52658010 -22989794 0 0 0 0 0
\r
2070 seg: 3 13 254000 0 0
\r
2071 vtx: 4 -48260000 -18591530 0 0 0 0 0
\r
2072 seg: 4 13 254000 0 0
\r
2073 vtx: 5 -48260000 -15113000 11 0 0 0 0
\r
2075 net: "INV_IN2_$G4" 2 1 0 0 0 0 1
\r
2076 pin: 1 IC_CD4007_12.3
\r
2078 connect: 1 1 0 2 0
\r
2079 vtx: 1 -55880000 -18796000 11 0 0 0 0
\r
2080 seg: 1 12 254000 0 0
\r
2081 vtx: 2 -47066200 -9982200 0 0 0 0 0
\r
2082 seg: 2 12 254000 0 0
\r
2083 vtx: 3 -45593000 -9982200 11 0 0 0 0
\r
2085 net: "STI2_$G8" 3 2 0 0 0 0 1
\r
2089 connect: 1 1 0 1 0
\r
2090 vtx: 1 -60833000 -34925000 11 0 0 0 0
\r
2091 seg: 1 13 254000 0 0
\r
2092 vtx: 2 -60833000 -24765000 11 0 0 0 0
\r
2093 connect: 2 2 1 5 0
\r
2094 vtx: 1 -53340000 -42672000 11 0 0 0 0
\r
2095 seg: 1 13 254000 0 0
\r
2096 vtx: 2 -53340000 -42766742 0 0 0 0 0
\r
2097 seg: 2 13 254000 0 0
\r
2098 vtx: 3 -54896258 -44323000 0 0 0 0 0
\r
2099 seg: 3 13 254000 0 0
\r
2100 vtx: 4 -56866536 -44323000 0 0 0 0 0
\r
2101 seg: 4 13 254000 0 0
\r
2102 vtx: 5 -60833000 -40356536 0 0 0 0 0
\r
2103 seg: 5 13 254000 0 0
\r
2104 vtx: 6 -60833000 -34925000 11 0 0 0 0
\r
2106 net: "XX1$XXsti$NTI_Out" 2 1 0 0 0 0 1
\r
2107 pin: 1 IC_CD4007_19.8
\r
2109 connect: 1 1 0 3 0
\r
2110 vtx: 1 -2032000 -67564000 11 0 0 0 0
\r
2111 seg: 1 12 254000 0 0
\r
2112 vtx: 2 1582166 -63949834 0 0 0 0 0
\r
2113 seg: 2 12 254000 0 0
\r
2114 vtx: 3 32062166 -63949834 0 0 0 0 0
\r
2115 seg: 3 12 254000 0 0
\r
2116 vtx: 4 33528000 -62484000 11 0 0 0 0
\r
2118 net: "XX1$XXpti$NTI_Out" 2 1 0 0 0 0 1
\r
2119 pin: 1 IC_CD4007_18.5
\r
2121 connect: 1 1 0 3 0
\r
2122 vtx: 1 8128000 -49784000 11 0 0 0 0
\r
2123 seg: 1 13 254000 0 0
\r
2124 vtx: 2 1577086 -56334914 0 0 0 0 0
\r
2125 seg: 2 13 254000 0 0
\r
2126 vtx: 3 -10721086 -56334914 0 0 0 0 0
\r
2127 seg: 3 13 254000 0 0
\r
2128 vtx: 4 -12192000 -54864000 11 0 0 0 0
\r
2130 net: "XX1$AtnandB_$G10" 3 2 0 0 0 0 1
\r
2131 pin: 1 IC_CD4007_27.6
\r
2134 connect: 1 1 0 4 0
\r
2135 vtx: 1 51816000 15240000 11 0 0 0 0
\r
2136 seg: 1 12 254000 0 0
\r
2137 vtx: 2 47277528 15240000 0 0 0 0 0
\r
2138 seg: 2 12 254000 0 0
\r
2139 vtx: 3 45817028 16700500 0 0 0 0 0
\r
2140 seg: 3 12 254000 0 0
\r
2141 vtx: 4 44132500 16700500 0 0 0 0 0
\r
2142 seg: 4 12 254000 0 0
\r
2143 vtx: 5 42672000 15240000 11 0 0 0 0
\r
2144 connect: 2 2 1 1 0
\r
2145 vtx: 1 59436000 15240000 11 0 0 0 0
\r
2146 seg: 1 12 254000 0 0
\r
2147 vtx: 2 51816000 15240000 11 0 0 0 0
\r
2149 net: "TAND_1A_$G10" 2 1 0 0 0 0 1
\r
2150 pin: 1 IC_CD4007_28.3
\r
2152 connect: 1 1 0 5 0
\r
2153 vtx: 1 15748000 2540000 11 0 0 0 0
\r
2154 seg: 1 12 254000 0 0
\r
2155 vtx: 2 14093952 4194048 0 0 0 0 0
\r
2156 seg: 2 12 254000 0 0
\r
2157 vtx: 3 14093952 10840974 0 0 0 0 0
\r
2158 seg: 3 12 254000 0 0
\r
2159 vtx: 4 21761450 18508472 0 0 0 0 0
\r
2160 seg: 4 12 254000 0 0
\r
2161 vtx: 5 62704472 18508472 0 0 0 0 0
\r
2162 seg: 5 12 254000 0 0
\r
2163 vtx: 6 64516000 20320000 11 0 0 0 0
\r
2165 net: "TAND_1B_$G11" 2 1 0 0 0 0 1
\r
2166 pin: 1 IC_CD4007_30.6
\r
2168 connect: 1 1 0 10 0
\r
2169 vtx: 1 15748000 7620000 11 0 0 0 0
\r
2170 seg: 1 13 254000 0 0
\r
2171 vtx: 2 14084554 9283446 0 0 0 0 0
\r
2172 seg: 2 13 254000 0 0
\r
2173 vtx: 3 14084554 10843514 0 0 0 0 0
\r
2174 seg: 3 13 254000 0 0
\r
2175 vtx: 4 15062454 11821414 0 0 0 0 0
\r
2176 seg: 4 13 254000 0 0
\r
2177 vtx: 5 18969736 11821414 0 0 0 0 0
\r
2178 seg: 5 13 254000 0 0
\r
2179 vtx: 6 27546300 3244596 0 0 0 0 0
\r
2180 seg: 6 13 254000 0 0
\r
2181 vtx: 7 27546300 -6837172 0 0 711200 355600 0
\r
2182 seg: 7 12 254000 0 0
\r
2183 vtx: 8 27546300 -7280910 0 0 0 0 0
\r
2184 seg: 8 12 254000 0 0
\r
2185 vtx: 9 31898082 -11632692 0 0 0 0 0
\r
2186 seg: 9 12 254000 0 0
\r
2187 vtx: 10 70663308 -11632692 0 0 0 0 0
\r
2188 seg: 10 12 254000 0 0
\r
2189 vtx: 11 72136000 -10160000 11 0 0 0 0
\r
2191 net: "INV_IN1" 2 1 0 0 0 0 1
\r
2192 pin: 1 IC_CD4007_10.6
\r
2194 connect: 1 1 0 6 0
\r
2195 vtx: 1 -30480000 28956000 11 0 0 0 0
\r
2196 seg: 1 12 254000 0 0
\r
2197 vtx: 2 -30574996 28956000 0 0 0 0 0
\r
2198 seg: 2 12 254000 0 0
\r
2199 vtx: 3 -32147764 27383232 0 0 0 0 0
\r
2200 seg: 3 12 254000 0 0
\r
2201 vtx: 4 -32147764 21378926 0 0 0 0 0
\r
2202 seg: 4 12 254000 0 0
\r
2203 vtx: 5 -34160460 19366230 0 0 0 0 0
\r
2204 seg: 5 12 254000 0 0
\r
2205 vtx: 6 -41286430 19366230 0 0 0 0 0
\r
2206 seg: 6 12 254000 0 0
\r
2207 vtx: 7 -45466000 23545800 11 0 0 0 0
\r
2209 net: "XX1$XXtnand$NN" 2 1 0 0 0 0 1
\r
2210 pin: 1 IC_CD4007_26.9
\r
2212 connect: 1 1 0 3 0
\r
2213 vtx: 1 72136000 -43688000 11 0 0 0 0
\r
2214 seg: 1 13 254000 0 0
\r
2215 vtx: 2 76146914 -39677086 0 0 0 0 0
\r
2216 seg: 2 13 254000 0 0
\r
2217 vtx: 3 76146914 -34998660 0 0 0 0 0
\r
2218 seg: 3 13 254000 0 0
\r
2219 vtx: 4 72136000 -30988000 11 0 0 0 0
\r
2221 net: "XX1$AtnandB_$G11" 3 2 0 0 0 0 1
\r
2222 pin: 1 IC_CD4007_29.6
\r
2225 connect: 1 1 0 3 0
\r
2226 vtx: 1 51816000 -15240000 11 0 0 0 0
\r
2227 seg: 1 12 254000 0 0
\r
2228 vtx: 2 50344578 -13768578 0 0 0 0 0
\r
2229 seg: 2 12 254000 0 0
\r
2230 vtx: 3 44143422 -13768578 0 0 0 0 0
\r
2231 seg: 3 12 254000 0 0
\r
2232 vtx: 4 42672000 -15240000 11 0 0 0 0
\r
2233 connect: 2 2 1 1 0
\r
2234 vtx: 1 59436000 -15240000 11 0 0 0 0
\r
2235 seg: 1 12 254000 0 0
\r
2236 vtx: 2 51816000 -15240000 11 0 0 0 0
\r
2238 net: "TAND_1A_$G11" 2 1 0 0 0 0 1
\r
2239 pin: 1 IC_CD4007_30.3
\r
2241 connect: 1 1 0 4 0
\r
2242 vtx: 1 18288000 7620000 11 0 0 0 0
\r
2243 seg: 1 13 254000 0 0
\r
2244 vtx: 2 20618704 7620000 0 0 0 0 0
\r
2245 seg: 2 13 254000 0 0
\r
2246 vtx: 3 24508460 3730244 0 0 711200 355600 0
\r
2247 seg: 3 12 254000 0 0
\r
2248 vtx: 4 50626010 3730244 0 0 0 0 0
\r
2249 seg: 4 12 254000 0 0
\r
2250 vtx: 5 64516000 -10160000 11 0 0 0 0
\r
2252 net: "INV_IN2" 2 1 0 0 0 0 1
\r
2253 pin: 1 IC_CD4007_10.3
\r
2255 connect: 1 1 0 2 0
\r
2256 vtx: 1 -55880000 21844000 11 0 0 0 0
\r
2257 seg: 1 12 254000 0 0
\r
2258 vtx: 2 -46558200 31165800 0 0 0 0 0
\r
2259 seg: 2 12 254000 0 0
\r
2260 vtx: 3 -45466000 31165800 11 0 0 0 0
\r
2262 net: "XX1$XXsti$PTI_Out" 2 1 0 0 0 0 1
\r
2263 pin: 1 IC_CD4007_19.13
\r
2265 connect: 1 1 0 6 0
\r
2266 vtx: 1 -2032000 -49784000 11 0 0 0 0
\r
2267 seg: 1 12 254000 0 0
\r
2268 vtx: 2 2740152 -49784000 0 0 0 0 0
\r
2269 seg: 2 12 254000 0 0
\r
2270 vtx: 3 5344922 -52388770 0 0 0 0 0
\r
2271 seg: 3 12 254000 0 0
\r
2272 vtx: 4 24971756 -52388770 0 0 0 0 0
\r
2273 seg: 4 12 254000 0 0
\r
2274 vtx: 5 33514284 -60931298 0 0 0 0 0
\r
2275 seg: 5 12 254000 0 0
\r
2276 vtx: 6 44675298 -60931298 0 0 0 0 0
\r
2277 seg: 6 12 254000 0 0
\r
2278 vtx: 7 46228000 -62484000 11 0 0 0 0
\r
2280 net: "XX1$IN_pti" 3 2 0 0 0 0 1
\r
2281 pin: 1 IC_CD4007_22.3
\r
2282 pin: 2 IC_CD4007_22.13
\r
2284 connect: 1 1 0 2 0
\r
2285 vtx: 1 5842000 32258000 11 0 0 0 0
\r
2286 seg: 1 12 254000 0 0
\r
2287 vtx: 2 3302000 29718000 0 0 0 0 0
\r
2288 seg: 2 12 254000 0 0
\r
2289 vtx: 3 -1778000 29718000 11 0 0 0 0
\r
2290 connect: 2 2 0 1 0
\r
2291 vtx: 1 -5080000 29718000 11 0 0 0 0
\r
2292 seg: 1 12 254000 0 0
\r
2293 vtx: 2 -1778000 29718000 11 0 0 0 0
\r
2295 net: "GND" 2 1 0 0 0 0 1
\r
2298 connect: 1 1 0 1 0
\r
2299 vtx: 1 3556000 -34544000 11 0 0 0 0
\r
2300 seg: 1 12 254000 0 0
\r
2301 vtx: 2 1016000 -34544000 11 0 0 0 0
\r
2303 net: "INV_IN1_$G8" 2 1 0 0 0 0 1
\r
2304 pin: 1 IC_CD4007_16.6
\r
2306 connect: 1 1 0 6 0
\r
2307 vtx: 1 -31496000 -32004000 11 0 0 0 0
\r
2308 seg: 1 12 254000 0 0
\r
2309 vtx: 2 -31591250 -32004000 0 0 0 0 0
\r
2310 seg: 2 12 254000 0 0
\r
2311 vtx: 3 -33147000 -33559750 0 0 0 0 0
\r
2312 seg: 3 12 254000 0 0
\r
2313 vtx: 4 -33147000 -40582596 0 0 0 0 0
\r
2314 seg: 4 12 254000 0 0
\r
2315 vtx: 5 -34158428 -41594024 0 0 0 0 0
\r
2316 seg: 5 12 254000 0 0
\r
2317 vtx: 6 -41286176 -41594024 0 0 0 0 0
\r
2318 seg: 6 12 254000 0 0
\r
2319 vtx: 7 -45466000 -37414200 11 0 0 0 0
\r
2321 net: "NTI1_$G8" 3 2 0 0 0 0 1
\r
2322 pin: 1 IC_CD4007_16.8
\r
2325 connect: 1 1 0 2 0
\r
2326 vtx: 1 -34874200 -39878000 11 0 0 0 0
\r
2327 seg: 1 12 254000 0 0
\r
2328 vtx: 2 -37769800 -39878000 0 0 0 0 0
\r
2329 seg: 2 12 254000 0 0
\r
2330 vtx: 3 -37846000 -39954200 11 0 0 0 0
\r
2331 connect: 2 2 1 2 0
\r
2332 vtx: 1 -31496000 -34544000 11 0 0 0 0
\r
2333 seg: 1 13 254000 0 0
\r
2334 vtx: 2 -31496000 -36499800 0 0 0 0 0
\r
2335 seg: 2 13 254000 0 0
\r
2336 vtx: 3 -34874200 -39878000 11 0 0 0 0
\r
2338 net: "XX1$XXtnor1$NI" 2 1 0 0 0 0 1
\r
2339 pin: 1 IC_CD4007_20.2
\r
2340 pin: 2 IC_CD4007_20.13
\r
2341 connect: 1 1 0 1 0
\r
2342 vtx: 1 20828000 -62484000 11 0 0 0 0
\r
2343 seg: 1 13 254000 0 0
\r
2344 vtx: 2 20828000 -54864000 11 0 0 0 0
\r
2346 net: "XX1$XXpti$STI_Out" 2 1 0 0 0 0 1
\r
2349 connect: 1 1 0 1 0
\r
2350 vtx: 1 20828000 -49784000 11 0 0 0 0
\r
2351 seg: 1 12 254000 0 0
\r
2352 vtx: 2 28448000 -49784000 11 0 0 0 0
\r
2354 net: "XX1$XXtnand$NP" 3 2 0 0 0 0 1
\r
2355 pin: 1 IC_CD4007_26.1
\r
2356 pin: 2 IC_CD4007_26.13
\r
2358 connect: 1 1 0 5 0
\r
2359 vtx: 1 61976000 -30988000 11 0 0 0 0
\r
2360 seg: 1 12 254000 0 0
\r
2361 vtx: 2 60155836 -32808164 0 0 0 0 0
\r
2362 seg: 2 12 254000 0 0
\r
2363 vtx: 3 59365896 -32808164 0 0 711200 355600 0
\r
2364 seg: 3 13 254000 0 0
\r
2365 vtx: 4 58705750 -33468310 0 0 0 0 27150
\r
2366 seg: 4 13 254000 0 0
\r
2367 vtx: 5 58705750 -38608000 0 0 0 0 0
\r
2368 seg: 5 13 254000 0 0
\r
2369 vtx: 6 59436000 -38608000 11 0 0 0 0
\r
2370 connect: 2 2 -1 2 0
\r
2371 vtx: 1 51816000 -30988000 11 0 0 0 0
\r
2372 seg: 1 13 254000 0 0
\r
2373 vtx: 2 54296310 -33468310 0 0 0 0 0
\r
2374 seg: 2 13 254000 0 0
\r
2375 vtx: 3 58705750 -33468310 0 0 0 0 27150
\r
2377 net: "XX1$XXtnand$NI_$G10" 2 1 0 0 0 0 1
\r
2378 pin: 1 IC_CD4007_28.4
\r
2379 pin: 2 IC_CD4007_28.8
\r
2380 connect: 1 1 0 1 0
\r
2381 vtx: 1 74676000 27940000 11 0 0 0 0
\r
2382 seg: 1 12 254000 0 0
\r
2383 vtx: 2 67056000 20320000 11 0 0 0 0
\r
2385 net: "STI1" 3 2 0 0 0 0 1
\r
2389 connect: 1 2 0 3 0
\r
2390 vtx: 1 -27940000 26416000 11 0 0 0 0
\r
2391 seg: 1 13 254000 0 0
\r
2392 vtx: 2 -25939750 24415750 0 0 0 0 0
\r
2393 seg: 2 13 254000 0 0
\r
2394 vtx: 3 -22174200 24415750 0 0 0 0 17829
\r
2395 seg: 3 13 254000 0 0
\r
2396 vtx: 4 -22174200 33782000 11 0 0 0 0
\r
2397 connect: 2 1 -1 1 0
\r
2398 vtx: 1 -22174200 21082000 11 0 0 0 0
\r
2399 seg: 1 13 254000 0 0
\r
2400 vtx: 2 -22174200 24415750 0 0 0 0 17829
\r
2402 net: "NTI2_$G8" 3 2 0 0 0 0 1
\r
2403 pin: 1 IC_CD4007_16.5
\r
2406 connect: 1 2 0 6 0
\r
2407 vtx: 1 -55880000 -42672000 11 0 0 0 0
\r
2408 seg: 1 12 254000 0 0
\r
2409 vtx: 2 -54223412 -44328588 0 0 0 0 0
\r
2410 seg: 2 12 254000 0 0
\r
2411 vtx: 3 -52649882 -44328588 0 0 0 0 0
\r
2412 seg: 3 12 254000 0 0
\r
2413 vtx: 4 -47307500 -38986206 0 0 0 0 0
\r
2414 seg: 4 12 254000 0 0
\r
2415 vtx: 5 -47307500 -34925000 0 0 0 0 5073
\r
2416 seg: 5 12 254000 0 0
\r
2417 vtx: 6 -45516800 -34925000 0 0 0 0 0
\r
2418 seg: 6 12 254000 0 0
\r
2419 vtx: 7 -45466000 -34874200 11 0 0 0 0
\r
2420 connect: 2 1 -1 1 0
\r
2421 vtx: 1 -48133000 -34925000 11 0 0 0 0
\r
2422 seg: 1 12 254000 0 0
\r
2423 vtx: 2 -47307500 -34925000 0 0 0 0 5073
\r
2425 net: "INV_IN2_$G8" 2 1 0 0 0 0 1
\r
2426 pin: 1 IC_CD4007_16.3
\r
2428 connect: 1 1 0 2 0
\r
2429 vtx: 1 -55880000 -40132000 11 0 0 0 0
\r
2430 seg: 1 13 254000 0 0
\r
2431 vtx: 2 -45542200 -29794200 0 0 0 0 0
\r
2432 seg: 2 13 254000 0 0
\r
2433 vtx: 3 -45466000 -29794200 11 0 0 0 0
\r
2435 net: "XX1$XXtnor0$NI" 2 1 0 0 0 0 1
\r
2436 pin: 1 IC_CD4007_21.2
\r
2437 pin: 2 IC_CD4007_21.13
\r
2438 connect: 1 1 0 1 0
\r
2439 vtx: 1 -29972000 -62484000 11 0 0 0 0
\r
2440 seg: 1 13 254000 0 0
\r
2441 vtx: 2 -29972000 -54864000 11 0 0 0 0
\r
2443 net: "XX1$_IN_NTI" 3 2 0 0 0 0 1
\r
2444 pin: 1 IC_CD4007_18.8
\r
2445 pin: 2 IC_CD4007_20.6
\r
2447 connect: 1 1 0 3 0
\r
2448 vtx: 1 10668000 -54864000 11 0 0 0 0
\r
2449 seg: 1 13 254000 0 0
\r
2450 vtx: 2 5030724 -60501276 0 0 0 0 0
\r
2451 seg: 2 13 254000 0 0
\r
2452 vtx: 3 -15289276 -60501276 0 0 0 0 0
\r
2453 seg: 3 13 254000 0 0
\r
2454 vtx: 4 -17272000 -62484000 11 0 0 0 0
\r
2455 connect: 2 2 0 1 0
\r
2456 vtx: 1 -17272000 -67564000 11 0 0 0 0
\r
2457 seg: 1 12 254000 0 0
\r
2458 vtx: 2 -17272000 -62484000 11 0 0 0 0
\r
2460 net: "XX1$XXtnand$NI_$G11" 2 1 0 0 0 0 1
\r
2461 pin: 1 IC_CD4007_30.4
\r
2462 pin: 2 IC_CD4007_30.8
\r
2463 connect: 1 1 0 1 0
\r
2464 vtx: 1 74676000 -2540000 11 0 0 0 0
\r
2465 seg: 1 12 254000 0 0
\r
2466 vtx: 2 67056000 -10160000 11 0 0 0 0
\r
2468 net: "STI2" 3 2 0 0 0 0 1
\r
2472 connect: 1 1 0 1 0
\r
2473 vtx: 1 -60833000 26035000 11 0 0 0 0
\r
2474 seg: 1 13 254000 0 0
\r
2475 vtx: 2 -60833000 36195000 11 0 0 0 0
\r
2476 connect: 2 2 1 5 0
\r
2477 vtx: 1 -53340000 19304000 11 0 0 0 0
\r
2478 seg: 1 12 254000 0 0
\r
2479 vtx: 2 -53340000 19181318 0 0 0 0 0
\r
2480 seg: 2 12 254000 0 0
\r
2481 vtx: 3 -54882542 17638776 0 0 0 0 0
\r
2482 seg: 3 12 254000 0 0
\r
2483 vtx: 4 -56862218 17638776 0 0 0 0 0
\r
2484 seg: 4 12 254000 0 0
\r
2485 vtx: 5 -60833000 21609304 0 0 0 0 0
\r
2486 seg: 5 12 254000 0 0
\r
2487 vtx: 6 -60833000 26035000 11 0 0 0 0
\r
2489 net: "XX1$XXinti$PTI_Out" 2 1 0 0 0 0 1
\r
2490 pin: 1 IC_CD4007_23.13
\r
2492 connect: 1 1 0 1 0
\r
2493 vtx: 1 9652000 -10922000 11 0 0 0 0
\r
2494 seg: 1 12 254000 0 0
\r
2495 vtx: 2 6096000 -10922000 11 0 0 0 0
\r
2497 net: "XX1$XX0nor$NI" 2 1 0 0 0 0 1
\r
2498 pin: 1 IC_CD4007_24.2
\r
2499 pin: 2 IC_CD4007_24.13
\r
2500 connect: 1 1 0 1 0
\r
2501 vtx: 1 5842000 10414000 11 0 0 0 0
\r
2502 seg: 1 12 254000 0 0
\r
2503 vtx: 2 -1778000 10414000 11 0 0 0 0
\r
2505 net: "XX1$XXsti_tand$PTI_Out_$G10" 2 1 0 0 0 0 1
\r
2506 pin: 1 IC_CD4007_27.13
\r
2508 connect: 1 1 0 1 0
\r
2509 vtx: 1 32512000 25400000 11 0 0 0 0
\r
2510 seg: 1 13 254000 0 0
\r
2511 vtx: 2 32512000 22860000 11 0 0 0 0
\r
2513 net: "XX1$_IN_PTI" 3 2 0 0 0 0 1
\r
2514 pin: 1 IC_CD4007_18.1
\r
2515 pin: 2 IC_CD4007_21.6
\r
2517 connect: 1 2 0 5 0
\r
2518 vtx: 1 41148000 -49784000 11 0 0 0 0
\r
2519 seg: 1 12 254000 0 0
\r
2520 vtx: 2 39432230 -51499770 0 0 0 0 0
\r
2521 seg: 2 12 254000 0 0
\r
2522 vtx: 3 6036564 -51499770 0 0 0 0 0
\r
2523 seg: 3 12 254000 0 0
\r
2524 vtx: 4 5380990 -50844450 0 0 711200 355600 0
\r
2525 seg: 4 13 254000 0 0
\r
2526 vtx: 5 1361440 -54864000 0 0 0 0 0
\r
2527 seg: 5 13 254000 0 0
\r
2528 vtx: 6 -2032000 -54864000 11 0 0 0 0
\r
2529 connect: 2 1 0 3 0
\r
2530 vtx: 1 -40132000 -54864000 11 0 0 0 0
\r
2531 seg: 1 12 254000 0 0
\r
2532 vtx: 2 -38665912 -56330088 0 0 0 0 0
\r
2533 seg: 2 12 254000 0 0
\r
2534 vtx: 3 -3498088 -56330088 0 0 0 0 0
\r
2535 seg: 3 12 254000 0 0
\r
2536 vtx: 4 -2032000 -54864000 11 0 0 0 0
\r
2538 net: "TAND_1A" 2 1 0 0 0 0 1
\r
2539 pin: 1 IC_CD4007_26.3
\r
2541 connect: 1 1 0 7 0
\r
2542 vtx: 1 18288000 0 11 0 0 0 0
\r
2543 seg: 1 12 254000 0 0
\r
2544 vtx: 2 27495500 -9207500 0 0 0 0 0
\r
2545 seg: 2 12 254000 0 0
\r
2546 vtx: 3 27495500 -18250916 0 0 0 0 0
\r
2547 seg: 3 12 254000 0 0
\r
2548 vtx: 4 33271714 -24027130 0 0 0 0 0
\r
2549 seg: 4 12 254000 0 0
\r
2550 vtx: 5 49004220 -24027130 0 0 0 0 0
\r
2551 seg: 5 12 254000 0 0
\r
2552 vtx: 6 58902854 -33925764 0 0 0 0 0
\r
2553 seg: 6 12 254000 0 0
\r
2554 vtx: 7 59833764 -33925764 0 0 0 0 0
\r
2555 seg: 7 12 254000 0 0
\r
2556 vtx: 8 64516000 -38608000 11 0 0 0 0
\r
2558 net: "XX1$XXsti_tand$PTI_Out_$G11" 2 1 0 0 0 0 1
\r
2559 pin: 1 IC_CD4007_29.13
\r
2561 connect: 1 1 0 1 0
\r
2562 vtx: 1 32512000 -5080000 11 0 0 0 0
\r
2563 seg: 1 13 254000 0 0
\r
2564 vtx: 2 32512000 -7620000 11 0 0 0 0
\r
2566 net: "PTI1" 3 2 0 0 0 0 1
\r
2567 pin: 1 IC_CD4007_10.13
\r
2570 connect: 1 1 0 2 0
\r
2571 vtx: 1 -34874200 33782000 11 0 0 0 0
\r
2572 seg: 1 12 254000 0 0
\r
2573 vtx: 2 -37769800 33782000 0 0 0 0 0
\r
2574 seg: 2 12 254000 0 0
\r
2575 vtx: 3 -37846000 33705800 11 0 0 0 0
\r
2576 connect: 2 2 1 2 0
\r
2577 vtx: 1 -27940000 28956000 11 0 0 0 0
\r
2578 seg: 1 12 254000 0 0
\r
2579 vtx: 2 -32766000 33782000 0 0 0 0 0
\r
2580 seg: 2 12 254000 0 0
\r
2581 vtx: 3 -34874200 33782000 11 0 0 0 0
\r
2583 net: "0" 1 0 0 0 0 0 1
\r
2584 pin: 1 IC_CD4007_21.3
\r
2586 net: "CU_IN" 2 1 0 0 0 0 1
\r
2587 pin: 1 IC_CD4007_19.6
\r
2589 connect: 1 1 0 2 0
\r
2590 vtx: 1 56896000 -58420000 11 0 0 0 0
\r
2591 seg: 1 12 254000 0 0
\r
2592 vtx: 2 39624000 -58420000 0 0 0 0 0
\r
2593 seg: 2 12 254000 0 0
\r
2594 vtx: 3 36068000 -54864000 11 0 0 0 0
\r
2596 net: "XX1$XXinti$STI_Out" 2 1 0 0 0 0 1
\r
2599 connect: 1 1 0 1 0
\r
2600 vtx: 1 22352000 -23622000 11 0 0 0 0
\r
2601 seg: 1 13 254000 0 0
\r
2602 vtx: 2 22352000 -10922000 11 0 0 0 0
\r
2604 net: "OUT_0" 3 2 0 0 0 0 1
\r
2608 connect: 1 1 0 1 0
\r
2609 vtx: 1 -17780000 2794000 11 0 0 0 0
\r
2610 seg: 1 13 254000 0 0
\r
2611 vtx: 2 -17780000 12954000 11 0 0 0 0
\r
2612 connect: 2 2 1 5 0
\r
2613 vtx: 1 -9652000 -7112000 11 0 0 0 0
\r
2614 seg: 1 13 254000 0 0
\r
2615 vtx: 2 -9652000 -7212584 0 0 0 0 0
\r
2616 seg: 2 13 254000 0 0
\r
2617 vtx: 3 -11215624 -8775954 0 0 0 0 0
\r
2618 seg: 3 13 254000 0 0
\r
2619 vtx: 4 -13162788 -8775954 0 0 0 0 0
\r
2620 seg: 4 13 254000 0 0
\r
2621 vtx: 5 -17780000 -4158742 0 0 0 0 0
\r
2622 seg: 5 13 254000 0 0
\r
2623 vtx: 6 -17780000 2794000 11 0 0 0 0
\r
2625 net: "TAND_1B" 2 1 0 0 0 0 1
\r
2626 pin: 1 IC_CD4007_26.6
\r
2628 connect: 1 1 0 6 0
\r
2629 vtx: 1 15748000 0 11 0 0 0 0
\r
2630 seg: 1 12 254000 0 0
\r
2631 vtx: 2 15748000 -7762748 0 0 0 0 0
\r
2632 seg: 2 12 254000 0 0
\r
2633 vtx: 3 33176210 -25190958 0 0 0 0 0
\r
2634 seg: 3 12 254000 0 0
\r
2635 vtx: 4 41943528 -25190958 0 0 0 0 0
\r
2636 seg: 4 12 254000 0 0
\r
2637 vtx: 5 56820816 -40068500 0 0 0 0 0
\r
2638 seg: 5 12 254000 0 0
\r
2639 vtx: 6 70675500 -40068500 0 0 0 0 0
\r
2640 seg: 6 12 254000 0 0
\r
2641 vtx: 7 72136000 -38608000 11 0 0 0 0
\r
2643 net: "PTI2" 3 2 0 0 0 0 1
\r
2644 pin: 1 IC_CD4007_10.1
\r
2647 connect: 1 1 0 3 0
\r
2648 vtx: 1 -48133000 36195000 11 0 0 0 0
\r
2649 seg: 1 12 254000 0 0
\r
2650 vtx: 2 -46977300 36195000 0 0 0 0 0
\r
2651 seg: 2 12 254000 0 0
\r
2652 vtx: 3 -46926500 36245800 0 0 0 0 0
\r
2653 seg: 3 12 254000 0 0
\r
2654 vtx: 4 -45466000 36245800 11 0 0 0 0
\r
2655 connect: 2 2 1 2 0
\r
2656 vtx: 1 -53340000 21844000 11 0 0 0 0
\r
2657 seg: 1 13 254000 0 0
\r
2658 vtx: 2 -53340000 30988000 0 0 0 0 0
\r
2659 seg: 2 13 254000 0 0
\r
2660 vtx: 3 -48133000 36195000 11 0 0 0 0
\r
2662 net: "XX1$XXtnor1$NN" 3 2 0 0 0 0 1
\r
2663 pin: 1 IC_CD4007_20.5
\r
2664 pin: 2 IC_CD4007_20.8
\r
2666 connect: 1 1 0 2 0
\r
2667 vtx: 1 8128000 -62484000 11 0 0 0 0
\r
2668 seg: 1 13 254000 0 0
\r
2669 vtx: 2 13208000 -57404000 0 0 0 0 0
\r
2670 seg: 2 13 254000 0 0
\r
2671 vtx: 3 13208000 -54864000 11 0 0 0 0
\r
2672 connect: 2 2 1 2 0
\r
2673 vtx: 1 10668000 -67564000 11 0 0 0 0
\r
2674 seg: 1 13 254000 0 0
\r
2675 vtx: 2 8128000 -65024000 0 0 0 0 0
\r
2676 seg: 2 13 254000 0 0
\r
2677 vtx: 3 8128000 -62484000 11 0 0 0 0
\r
2679 net: "OUT_1" 4 3 0 0 0 0 1
\r
2680 pin: 1 IC_CD4007_24.6
\r
2684 connect: 1 3 0 2 0
\r
2685 vtx: 1 -9652000 -4572000 11 0 0 0 0
\r
2686 seg: 1 12 254000 0 0
\r
2687 vtx: 2 -4826000 254000 0 0 0 0 0
\r
2688 seg: 2 12 254000 0 0
\r
2689 vtx: 3 -1778000 254000 11 0 0 0 0
\r
2690 connect: 2 2 0 4 0
\r
2691 vtx: 1 22352000 24638000 11 0 0 0 0
\r
2692 seg: 1 13 254000 0 0
\r
2693 vtx: 2 15452598 24638000 0 0 0 0 0
\r
2694 seg: 2 13 254000 0 0
\r
2695 vtx: 3 2032000 11217402 0 0 0 0 0
\r
2696 seg: 3 13 254000 0 0
\r
2697 vtx: 4 2032000 4064000 0 0 0 0 0
\r
2698 seg: 4 13 254000 0 0
\r
2699 vtx: 5 -1778000 254000 11 0 0 0 0
\r
2700 connect: 3 2 1 1 0
\r
2701 vtx: 1 22352000 24638000 11 0 0 0 0
\r
2702 seg: 1 13 254000 0 0
\r
2703 vtx: 2 22352000 34798000 11 0 0 0 0
\r
2705 net: "PTI1_$G2" 3 2 0 0 0 0 1
\r
2706 pin: 1 IC_CD4007_11.13
\r
2709 connect: 1 1 0 2 0
\r
2710 vtx: 1 -34874200 13462000 11 0 0 0 0
\r
2711 seg: 1 12 254000 0 0
\r
2712 vtx: 2 -37769800 13462000 0 0 0 0 0
\r
2713 seg: 2 12 254000 0 0
\r
2714 vtx: 3 -37846000 13385800 11 0 0 0 0
\r
2715 connect: 2 2 1 2 0
\r
2716 vtx: 1 -28956000 8636000 11 0 0 0 0
\r
2717 seg: 1 13 254000 0 0
\r
2718 vtx: 2 -33782000 13462000 0 0 0 0 0
\r
2719 seg: 2 13 254000 0 0
\r
2720 vtx: 3 -34874200 13462000 11 0 0 0 0
\r
2722 net: "NTI1" 3 2 0 0 0 0 1
\r
2723 pin: 1 IC_CD4007_10.8
\r
2726 connect: 1 1 0 2 0
\r
2727 vtx: 1 -34874200 21082000 11 0 0 0 0
\r
2728 seg: 1 12 254000 0 0
\r
2729 vtx: 2 -37769800 21082000 0 0 0 0 0
\r
2730 seg: 2 12 254000 0 0
\r
2731 vtx: 3 -37846000 21005800 11 0 0 0 0
\r
2732 connect: 2 2 1 2 0
\r
2733 vtx: 1 -30480000 26416000 11 0 0 0 0
\r
2734 seg: 1 13 254000 0 0
\r
2735 vtx: 2 -30480000 25476200 0 0 0 0 0
\r
2736 seg: 2 13 254000 0 0
\r
2737 vtx: 3 -34874200 21082000 11 0 0 0 0
\r
2739 net: "XX1$XXtnor0$NN" 3 2 0 0 0 0 1
\r
2740 pin: 1 IC_CD4007_21.5
\r
2741 pin: 2 IC_CD4007_21.8
\r
2743 connect: 1 1 0 2 0
\r
2744 vtx: 1 -42672000 -62484000 11 0 0 0 0
\r
2745 seg: 1 13 254000 0 0
\r
2746 vtx: 2 -37592000 -57404000 0 0 0 0 0
\r
2747 seg: 2 13 254000 0 0
\r
2748 vtx: 3 -37592000 -54864000 11 0 0 0 0
\r
2749 connect: 2 2 1 2 0
\r
2750 vtx: 1 -57912000 -49784000 11 0 0 0 0
\r
2751 seg: 1 12 254000 0 0
\r
2752 vtx: 2 -55372000 -49784000 0 0 0 0 0
\r
2753 seg: 2 12 254000 0 0
\r
2754 vtx: 3 -42672000 -62484000 11 0 0 0 0
\r
2758 text: "CU_IN" 59944000 -58928000 7 0 0 1905000 254000 0
\r
2760 text: "CU_OUT" 59944000 -62992000 7 0 0 1905000 254000 0
\r
2762 text: "Vdd" -6096000 -32512000 7 0 0 1905000 190500 0
\r
2764 text: "Vss" 6096000 -32512000 7 0 0 1905000 190500 0
\r
2766 text: "Trinary Logic Board" -17272000 -39624000 7 0 0 2540000 330200 0
\r
2768 text: "Spring 2008" -6096000 -45720000 7 0 0 1905000 190500 0
\r
2770 text: "C. Patel, J. Connelly, A. Chavez" -15240000 -42672000 7 0 0 1524000 190500 0
\r
2772 text: "IN" -60960000 -68580000 7 0 0 1270000 254000 0
\r
2774 text: "D1" -55880000 -68580000 7 0 0 1270000 254000 0
\r
2776 text: "Di" -60960000 -71120000 7 0 0 1270000 254000 0
\r
2778 text: "D0" -55880000 -71120000 7 0 0 1270000 254000 0
\r
2780 text: "STI" -55880000 -63500000 7 0 0 1270000 254000 0
\r
2782 text: "NTI" -60960000 -63500000 7 0 0 1270000 254000 0
\r
2784 text: "IN" -60960000 -60960000 7 0 0 1270000 254000 0
\r
2786 text: "PTI" -55880000 -60960000 7 0 0 1270000 254000 0
\r
2788 text: "Legend" -60960000 -58420000 7 0 0 1778000 177800 0
\r