release/src-rt-6.x.4708/linux/linux-2.6.36/sound/soc/fsl/mpc5200_psc_ac97.c

   1 /*
   2  * linux/sound/mpc5200-ac97.c -- AC97 support for the Freescale MPC52xx chip.
   3  *
   4  * Copyright (C) 2009 Jon Smirl, Digispeaker
   5  * Author: Jon Smirl <jonsmirl@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/of_device.h>
  14 #include <linux/of_platform.h>
  15 #include <linux/delay.h>
  16
  17 #include <sound/pcm.h>
  18 #include <sound/pcm_params.h>
  19 #include <sound/soc.h>
  20
  21 #include <asm/time.h>
  22 #include <asm/delay.h>
  23 #include <asm/mpc52xx.h>
  24 #include <asm/mpc52xx_psc.h>
  25
  26 #include "mpc5200_dma.h"
  27 #include "mpc5200_psc_ac97.h"
  28
  29 #define DRV_NAME "mpc5200-psc-ac97"
  30
  31 /* ALSA only supports a single AC97 device so static is recommend here */
  32 static struct psc_dma *psc_dma;
  33
  34 static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  35 {
  36         int status;
  37         unsigned int val;
  38
  39         mutex_lock(&psc_dma->mutex);
  40
  41         /* Wait for command send status zero = ready */
  42         status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
  43                                 MPC52xx_PSC_SR_CMDSEND), 100, 0);
  44         if (status == 0) {
  45                 pr_err("timeout on ac97 bus (rdy)\n");
  46                 mutex_unlock(&psc_dma->mutex);
  47                 return -ENODEV;
  48         }
  49
  50         /* Force clear the data valid bit */
  51         in_be32(&psc_dma->psc_regs->ac97_data);
  52
  53         /* Send the read */
  54         out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
  55
  56         /* Wait for the answer */
  57         status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) &
  58                                 MPC52xx_PSC_SR_DATA_VAL), 100, 0);
  59         if (status == 0) {
  60                 pr_err("timeout on ac97 read (val) %x\n",
  61                                 in_be16(&psc_dma->psc_regs->sr_csr.status));
  62                 mutex_unlock(&psc_dma->mutex);
  63                 return -ENODEV;
  64         }
  65         /* Get the data */
  66         val = in_be32(&psc_dma->psc_regs->ac97_data);
  67         if (((val >> 24) & 0x7f) != reg) {
  68                 pr_err("reg echo error on ac97 read\n");
  69                 mutex_unlock(&psc_dma->mutex);
  70                 return -ENODEV;
  71         }
  72         val = (val >> 8) & 0xffff;
  73
  74         mutex_unlock(&psc_dma->mutex);
  75         return (unsigned short) val;
  76 }
  77
  78 static void psc_ac97_write(struct snd_ac97 *ac97,
  79                                 unsigned short reg, unsigned short val)
  80 {
  81         int status;
  82
  83         mutex_lock(&psc_dma->mutex);
  84
  85         /* Wait for command status zero = ready */
  86         status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
  87                                 MPC52xx_PSC_SR_CMDSEND), 100, 0);
  88         if (status == 0) {
  89                 pr_err("timeout on ac97 bus (write)\n");
  90                 goto out;
  91         }
  92         /* Write data */
  93         out_be32(&psc_dma->psc_regs->ac97_cmd,
  94                         ((reg & 0x7f) << 24) | (val << 8));
  95
  96  out:
  97         mutex_unlock(&psc_dma->mutex);
  98 }
  99
 100 static void psc_ac97_warm_reset(struct snd_ac97 *ac97)
 101 {
 102         struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
 103
 104         mutex_lock(&psc_dma->mutex);
 105
 106         out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
 107         udelay(3);
 108         out_be32(&regs->sicr, psc_dma->sicr);
 109
 110         mutex_unlock(&psc_dma->mutex);
 111 }
 112
 113 static void psc_ac97_cold_reset(struct snd_ac97 *ac97)
 114 {
 115         struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
 116
 117         mutex_lock(&psc_dma->mutex);
 118         dev_dbg(psc_dma->dev, "cold reset\n");
 119
 120         mpc5200_psc_ac97_gpio_reset(psc_dma->id);
 121
 122         /* Notify the PSC that a reset has occurred */
 123         out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB);
 124
 125         /* Re-enable RX and TX */
 126         out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
 127
 128         mutex_unlock(&psc_dma->mutex);
 129
 130         msleep(1);
 131         psc_ac97_warm_reset(ac97);
 132 }
 133
 134 struct snd_ac97_bus_ops soc_ac97_ops = {
 135         .read           = psc_ac97_read,
 136         .write          = psc_ac97_write,
 137         .reset          = psc_ac97_cold_reset,
 138         .warm_reset     = psc_ac97_warm_reset,
 139 };
 140 EXPORT_SYMBOL_GPL(soc_ac97_ops);
 141
 142 static int psc_ac97_hw_analog_params(struct snd_pcm_substream *substream,
 143                                  struct snd_pcm_hw_params *params,
 144                                  struct snd_soc_dai *cpu_dai)
 145 {
 146         struct psc_dma *psc_dma = cpu_dai->private_data;
 147         struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
 148
 149         dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i"
 150                 " periods=%i buffer_size=%i  buffer_bytes=%i channels=%i"
 151                 " rate=%i format=%i\n",
 152                 __func__, substream, params_period_size(params),
 153                 params_period_bytes(params), params_periods(params),
 154                 params_buffer_size(params), params_buffer_bytes(params),
 155                 params_channels(params), params_rate(params),
 156                 params_format(params));
 157
 158         /* Determine the set of enable bits to turn on */
 159         s->ac97_slot_bits = (params_channels(params) == 1) ? 0x100 : 0x300;
 160         if (substream->pstr->stream != SNDRV_PCM_STREAM_CAPTURE)
 161                 s->ac97_slot_bits <<= 16;
 162         return 0;
 163 }
 164
 165 static int psc_ac97_hw_digital_params(struct snd_pcm_substream *substream,
 166                                  struct snd_pcm_hw_params *params,
 167                                  struct snd_soc_dai *cpu_dai)
 168 {
 169         struct psc_dma *psc_dma = cpu_dai->private_data;
 170
 171         dev_dbg(psc_dma->dev, "%s(substream=%p)\n", __func__, substream);
 172
 173         if (params_channels(params) == 1)
 174                 out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000);
 175         else
 176                 out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000);
 177
 178         return 0;
 179 }
 180
 181 static int psc_ac97_trigger(struct snd_pcm_substream *substream, int cmd,
 182                                                         struct snd_soc_dai *dai)
 183 {
 184         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 185         struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
 186         struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
 187
 188         switch (cmd) {
 189         case SNDRV_PCM_TRIGGER_START:
 190                 dev_dbg(psc_dma->dev, "AC97 START: stream=%i\n",
 191                         substream->pstr->stream);
 192
 193                 /* Set the slot enable bits */
 194                 psc_dma->slots |= s->ac97_slot_bits;
 195                 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
 196                 break;
 197
 198         case SNDRV_PCM_TRIGGER_STOP:
 199                 dev_dbg(psc_dma->dev, "AC97 STOP: stream=%i\n",
 200                         substream->pstr->stream);
 201
 202                 /* Clear the slot enable bits */
 203                 psc_dma->slots &= ~(s->ac97_slot_bits);
 204                 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
 205                 break;
 206         }
 207         return 0;
 208 }
 209
 210 static int psc_ac97_probe(struct platform_device *pdev,
 211                                         struct snd_soc_dai *cpu_dai)
 212 {
 213         struct psc_dma *psc_dma = cpu_dai->private_data;
 214         struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
 215
 216         /* Go */
 217         out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
 218         return 0;
 219 }
 220
 221 /* ---------------------------------------------------------------------
 222  * ALSA SoC Bindings
 223  *
 224  * - Digital Audio Interface (DAI) template
 225  * - create/destroy dai hooks
 226  */
 227
 228 /**
 229  * psc_ac97_dai_template: template CPU Digital Audio Interface
 230  */
 231 static struct snd_soc_dai_ops psc_ac97_analog_ops = {
 232         .hw_params      = psc_ac97_hw_analog_params,
 233         .trigger        = psc_ac97_trigger,
 234 };
 235
 236 static struct snd_soc_dai_ops psc_ac97_digital_ops = {
 237         .hw_params      = psc_ac97_hw_digital_params,
 238 };
 239
 240 struct snd_soc_dai psc_ac97_dai[] = {
 241 {
 242         .name   = "AC97",
 243         .ac97_control = 1,
 244         .probe  = psc_ac97_probe,
 245         .playback = {
 246                 .channels_min   = 1,
 247                 .channels_max   = 6,
 248                 .rates          = SNDRV_PCM_RATE_8000_48000,
 249                 .formats = SNDRV_PCM_FMTBIT_S32_BE,
 250         },
 251         .capture = {
 252                 .channels_min   = 1,
 253                 .channels_max   = 2,
 254                 .rates          = SNDRV_PCM_RATE_8000_48000,
 255                 .formats = SNDRV_PCM_FMTBIT_S32_BE,
 256         },
 257         .ops = &psc_ac97_analog_ops,
 258 },
 259 {
 260         .name   = "SPDIF",
 261         .ac97_control = 1,
 262         .playback = {
 263                 .channels_min   = 1,
 264                 .channels_max   = 2,
 265                 .rates          = SNDRV_PCM_RATE_32000 | \
 266                         SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
 267                 .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE,
 268         },
 269         .ops = &psc_ac97_digital_ops,
 270 } };
 271 EXPORT_SYMBOL_GPL(psc_ac97_dai);
 272
 273
 274
 275 /* ---------------------------------------------------------------------
 276  * OF platform bus binding code:
 277  * - Probe/remove operations
 278  * - OF device match table
 279  */
 280 static int __devinit psc_ac97_of_probe(struct platform_device *op,
 281                                       const struct of_device_id *match)
 282 {
 283         int rc, i;
 284         struct snd_ac97 ac97;
 285         struct mpc52xx_psc __iomem *regs;
 286
 287         rc = mpc5200_audio_dma_create(op);
 288         if (rc != 0)
 289                 return rc;
 290
 291         for (i = 0; i < ARRAY_SIZE(psc_ac97_dai); i++)
 292                 psc_ac97_dai[i].dev = &op->dev;
 293
 294         rc = snd_soc_register_dais(psc_ac97_dai, ARRAY_SIZE(psc_ac97_dai));
 295         if (rc != 0) {
 296                 dev_err(&op->dev, "Failed to register DAI\n");
 297                 return rc;
 298         }
 299
 300         psc_dma = dev_get_drvdata(&op->dev);
 301         regs = psc_dma->psc_regs;
 302         ac97.private_data = psc_dma;
 303
 304         for (i = 0; i < ARRAY_SIZE(psc_ac97_dai); i++)
 305                 psc_ac97_dai[i].private_data = psc_dma;
 306
 307         psc_dma->imr = 0;
 308         out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
 309
 310         /* Configure the serial interface mode to AC97 */
 311         psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97;
 312         out_be32(&regs->sicr, psc_dma->sicr);
 313
 314         /* No slots active */
 315         out_be32(&regs->ac97_slots, 0x00000000);
 316
 317         return 0;
 318 }
 319
 320 static int __devexit psc_ac97_of_remove(struct platform_device *op)
 321 {
 322         return mpc5200_audio_dma_destroy(op);
 323 }
 324
 325 /* Match table for of_platform binding */
 326 static struct of_device_id psc_ac97_match[] __devinitdata = {
 327         { .compatible = "fsl,mpc5200-psc-ac97", },
 328         { .compatible = "fsl,mpc5200b-psc-ac97", },
 329         {}
 330 };
 331 MODULE_DEVICE_TABLE(of, psc_ac97_match);
 332
 333 static struct of_platform_driver psc_ac97_driver = {
 334         .probe = psc_ac97_of_probe,
 335         .remove = __devexit_p(psc_ac97_of_remove),
 336         .driver = {
 337                 .name = "mpc5200-psc-ac97",
 338                 .owner = THIS_MODULE,
 339                 .of_match_table = psc_ac97_match,
 340         },
 341 };
 342
 343 /* ---------------------------------------------------------------------
 344  * Module setup and teardown; simply register the of_platform driver
 345  * for the PSC in AC97 mode.
 346  */
 347 static int __init psc_ac97_init(void)
 348 {
 349         return of_register_platform_driver(&psc_ac97_driver);
 350 }
 351 module_init(psc_ac97_init);
 352
 353 static void __exit psc_ac97_exit(void)
 354 {
 355         of_unregister_platform_driver(&psc_ac97_driver);
 356 }
 357 module_exit(psc_ac97_exit);
 358
 359 MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
 360 MODULE_DESCRIPTION("mpc5200 AC97 module");
 361 MODULE_LICENSE("GPL");