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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / sound / soc / codecs / twl4030.c
blob7b618bbff8844d65f55092780b199d4b213e433b
1 /*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/pm.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl.h>
30 #include <linux/slab.h>
31 #include <sound/core.h>
32 #include <sound/pcm.h>
33 #include <sound/pcm_params.h>
34 #include <sound/soc.h>
35 #include <sound/soc-dapm.h>
36 #include <sound/initval.h>
37 #include <sound/tlv.h>
38
39 #include "twl4030.h"
40
41 /*
42 * twl4030 register cache & default register settings
43 */
44 static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
45 0x00, /* this register not used */
46 0x00, /* REG_CODEC_MODE (0x1) */
47 0x00, /* REG_OPTION (0x2) */
48 0x00, /* REG_UNKNOWN (0x3) */
49 0x00, /* REG_MICBIAS_CTL (0x4) */
50 0x00, /* REG_ANAMICL (0x5) */
51 0x00, /* REG_ANAMICR (0x6) */
52 0x00, /* REG_AVADC_CTL (0x7) */
53 0x00, /* REG_ADCMICSEL (0x8) */
54 0x00, /* REG_DIGMIXING (0x9) */
55 0x0f, /* REG_ATXL1PGA (0xA) */
56 0x0f, /* REG_ATXR1PGA (0xB) */
57 0x0f, /* REG_AVTXL2PGA (0xC) */
58 0x0f, /* REG_AVTXR2PGA (0xD) */
59 0x00, /* REG_AUDIO_IF (0xE) */
60 0x00, /* REG_VOICE_IF (0xF) */
61 0x3f, /* REG_ARXR1PGA (0x10) */
62 0x3f, /* REG_ARXL1PGA (0x11) */
63 0x3f, /* REG_ARXR2PGA (0x12) */
64 0x3f, /* REG_ARXL2PGA (0x13) */
65 0x25, /* REG_VRXPGA (0x14) */
66 0x00, /* REG_VSTPGA (0x15) */
67 0x00, /* REG_VRX2ARXPGA (0x16) */
68 0x00, /* REG_AVDAC_CTL (0x17) */
69 0x00, /* REG_ARX2VTXPGA (0x18) */
70 0x32, /* REG_ARXL1_APGA_CTL (0x19) */
71 0x32, /* REG_ARXR1_APGA_CTL (0x1A) */
72 0x32, /* REG_ARXL2_APGA_CTL (0x1B) */
73 0x32, /* REG_ARXR2_APGA_CTL (0x1C) */
74 0x00, /* REG_ATX2ARXPGA (0x1D) */
75 0x00, /* REG_BT_IF (0x1E) */
76 0x55, /* REG_BTPGA (0x1F) */
77 0x00, /* REG_BTSTPGA (0x20) */
78 0x00, /* REG_EAR_CTL (0x21) */
79 0x00, /* REG_HS_SEL (0x22) */
80 0x00, /* REG_HS_GAIN_SET (0x23) */
81 0x00, /* REG_HS_POPN_SET (0x24) */
82 0x00, /* REG_PREDL_CTL (0x25) */
83 0x00, /* REG_PREDR_CTL (0x26) */
84 0x00, /* REG_PRECKL_CTL (0x27) */
85 0x00, /* REG_PRECKR_CTL (0x28) */
86 0x00, /* REG_HFL_CTL (0x29) */
87 0x00, /* REG_HFR_CTL (0x2A) */
88 0x05, /* REG_ALC_CTL (0x2B) */
89 0x00, /* REG_ALC_SET1 (0x2C) */
90 0x00, /* REG_ALC_SET2 (0x2D) */
91 0x00, /* REG_BOOST_CTL (0x2E) */
92 0x00, /* REG_SOFTVOL_CTL (0x2F) */
93 0x13, /* REG_DTMF_FREQSEL (0x30) */
94 0x00, /* REG_DTMF_TONEXT1H (0x31) */
95 0x00, /* REG_DTMF_TONEXT1L (0x32) */
96 0x00, /* REG_DTMF_TONEXT2H (0x33) */
97 0x00, /* REG_DTMF_TONEXT2L (0x34) */
98 0x79, /* REG_DTMF_TONOFF (0x35) */
99 0x11, /* REG_DTMF_WANONOFF (0x36) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
102 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
103 0x06, /* REG_APLL_CTL (0x3A) */
104 0x00, /* REG_DTMF_CTL (0x3B) */
105 0x44, /* REG_DTMF_PGA_CTL2 (0x3C) */
106 0x69, /* REG_DTMF_PGA_CTL1 (0x3D) */
107 0x00, /* REG_MISC_SET_1 (0x3E) */
108 0x00, /* REG_PCMBTMUX (0x3F) */
109 0x00, /* not used (0x40) */
110 0x00, /* not used (0x41) */
111 0x00, /* not used (0x42) */
112 0x00, /* REG_RX_PATH_SEL (0x43) */
113 0x32, /* REG_VDL_APGA_CTL (0x44) */
114 0x00, /* REG_VIBRA_CTL (0x45) */
115 0x00, /* REG_VIBRA_SET (0x46) */
116 0x00, /* REG_VIBRA_PWM_SET (0x47) */
117 0x00, /* REG_ANAMIC_GAIN (0x48) */
118 0x00, /* REG_MISC_SET_2 (0x49) */
119 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
120 };
121
122 /* codec private data */
123 struct twl4030_priv {
124 struct snd_soc_codec codec;
125
126 unsigned int codec_powered;
127
128 /* reference counts of AIF/APLL users */
129 unsigned int apll_enabled;
130
131 struct snd_pcm_substream *master_substream;
132 struct snd_pcm_substream *slave_substream;
133
134 unsigned int configured;
135 unsigned int rate;
136 unsigned int sample_bits;
137 unsigned int channels;
138
139 unsigned int sysclk;
140
141 /* Output (with associated amp) states */
142 u8 hsl_enabled, hsr_enabled;
143 u8 earpiece_enabled;
144 u8 predrivel_enabled, predriver_enabled;
145 u8 carkitl_enabled, carkitr_enabled;
146
147 /* Delay needed after enabling the digimic interface */
148 unsigned int digimic_delay;
149 };
150
151 /*
152 * read twl4030 register cache
153 */
154 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
155 unsigned int reg)
156 {
157 u8 *cache = codec->reg_cache;
158
159 if (reg >= TWL4030_CACHEREGNUM)
160 return -EIO;
161
162 return cache[reg];
163 }
164
165 /*
166 * write twl4030 register cache
167 */
168 static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
169 u8 reg, u8 value)
170 {
171 u8 *cache = codec->reg_cache;
172
173 if (reg >= TWL4030_CACHEREGNUM)
174 return;
175 cache[reg] = value;
176 }
177
178 /*
179 * write to the twl4030 register space
180 */
181 static int twl4030_write(struct snd_soc_codec *codec,
182 unsigned int reg, unsigned int value)
183 {
184 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
185 int write_to_reg = 0;
186
187 twl4030_write_reg_cache(codec, reg, value);
188 if (likely(reg < TWL4030_REG_SW_SHADOW)) {
189 /* Decide if the given register can be written */
190 switch (reg) {
191 case TWL4030_REG_EAR_CTL:
192 if (twl4030->earpiece_enabled)
193 write_to_reg = 1;
194 break;
195 case TWL4030_REG_PREDL_CTL:
196 if (twl4030->predrivel_enabled)
197 write_to_reg = 1;
198 break;
199 case TWL4030_REG_PREDR_CTL:
200 if (twl4030->predriver_enabled)
201 write_to_reg = 1;
202 break;
203 case TWL4030_REG_PRECKL_CTL:
204 if (twl4030->carkitl_enabled)
205 write_to_reg = 1;
206 break;
207 case TWL4030_REG_PRECKR_CTL:
208 if (twl4030->carkitr_enabled)
209 write_to_reg = 1;
210 break;
211 case TWL4030_REG_HS_GAIN_SET:
212 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
213 write_to_reg = 1;
214 break;
215 default:
216 /* All other register can be written */
217 write_to_reg = 1;
218 break;
219 }
220 if (write_to_reg)
221 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
222 value, reg);
223 }
224 return 0;
225 }
226
227 static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
228 {
229 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
230 int mode;
231
232 if (enable == twl4030->codec_powered)
233 return;
234
235 if (enable)
236 mode = twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER);
237 else
238 mode = twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER);
239
240 if (mode >= 0) {
241 twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
242 twl4030->codec_powered = enable;
243 }
244
245 /* REVISIT: this delay is present in TI sample drivers */
246 /* but there seems to be no TRM requirement for it */
247 udelay(10);
248 }
249
250 static inline void twl4030_check_defaults(struct snd_soc_codec *codec)
251 {
252 int i, difference = 0;
253 u8 val;
254
255 dev_dbg(codec->dev, "Checking TWL audio default configuration\n");
256 for (i = 1; i <= TWL4030_REG_MISC_SET_2; i++) {
257 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &val, i);
258 if (val != twl4030_reg[i]) {
259 difference++;
260 dev_dbg(codec->dev,
261 "Reg 0x%02x: chip: 0x%02x driver: 0x%02x\n",
262 i, val, twl4030_reg[i]);
263 }
264 }
265 dev_dbg(codec->dev, "Found %d non maching registers. %s\n",
266 difference, difference ? "Not OK" : "OK");
267 }
268
269 static inline void twl4030_reset_registers(struct snd_soc_codec *codec)
270 {
271 int i;
272
273 /* set all audio section registers to reasonable defaults */
274 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
275 if (i != TWL4030_REG_APLL_CTL)
276 twl4030_write(codec, i, twl4030_reg[i]);
277
278 }
279
280 static void twl4030_init_chip(struct platform_device *pdev)
281 {
282 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
283 struct twl4030_setup_data *setup = socdev->codec_data;
284 struct snd_soc_codec *codec = socdev->card->codec;
285 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
286 u8 reg, byte;
287 int i = 0;
288
289 /* Check defaults, if instructed before anything else */
290 if (setup && setup->check_defaults)
291 twl4030_check_defaults(codec);
292
293 /* Reset registers, if no setup data or if instructed to do so */
294 if (!setup || (setup && setup->reset_registers))
295 twl4030_reset_registers(codec);
296
297 /* Refresh APLL_CTL register from HW */
298 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
299 TWL4030_REG_APLL_CTL);
300 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, byte);
301
302 /* anti-pop when changing analog gain */
303 reg = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
304 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
305 reg | TWL4030_SMOOTH_ANAVOL_EN);
306
307 twl4030_write(codec, TWL4030_REG_OPTION,
308 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
309 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
310
311 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
312 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
313
314 /* Machine dependent setup */
315 if (!setup)
316 return;
317
318 twl4030->digimic_delay = setup->digimic_delay;
319
320 /* Configuration for headset ramp delay from setup data */
321 if (setup->sysclk != twl4030->sysclk)
322 dev_warn(codec->dev,
323 "Mismatch in APLL mclk: %u (configured: %u)\n",
324 setup->sysclk, twl4030->sysclk);
325
326 reg = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
327 reg &= ~TWL4030_RAMP_DELAY;
328 reg |= (setup->ramp_delay_value << 2);
329 twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, reg);
330
331 /* initiate offset cancellation */
332 twl4030_codec_enable(codec, 1);
333
334 reg = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
335 reg &= ~TWL4030_OFFSET_CNCL_SEL;
336 reg |= setup->offset_cncl_path;
337 twl4030_write(codec, TWL4030_REG_ANAMICL,
338 reg | TWL4030_CNCL_OFFSET_START);
339
340 /* wait for offset cancellation to complete */
341 do {
342 /* this takes a little while, so don't slam i2c */
343 udelay(2000);
344 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
345 TWL4030_REG_ANAMICL);
346 } while ((i++ < 100) &&
347 ((byte & TWL4030_CNCL_OFFSET_START) ==
348 TWL4030_CNCL_OFFSET_START));
349
350 /* Make sure that the reg_cache has the same value as the HW */
351 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
352
353 twl4030_codec_enable(codec, 0);
354 }
355
356 static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
357 {
358 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
359 int status = -1;
360
361 if (enable) {
362 twl4030->apll_enabled++;
363 if (twl4030->apll_enabled == 1)
364 status = twl4030_codec_enable_resource(
365 TWL4030_CODEC_RES_APLL);
366 } else {
367 twl4030->apll_enabled--;
368 if (!twl4030->apll_enabled)
369 status = twl4030_codec_disable_resource(
370 TWL4030_CODEC_RES_APLL);
371 }
372
373 if (status >= 0)
374 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
375 }
376
377 /* Earpiece */
378 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
379 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
380 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
381 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
382 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
383 };
384
385 /* PreDrive Left */
386 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
387 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
388 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
389 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
390 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
391 };
392
393 /* PreDrive Right */
394 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
395 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
396 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
397 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
398 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
399 };
400
401 /* Headset Left */
402 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
403 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
404 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
405 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
406 };
407
408 /* Headset Right */
409 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
410 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
411 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
412 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
413 };
414
415 /* Carkit Left */
416 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
417 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
418 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
419 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
420 };
421
422 /* Carkit Right */
423 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
424 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
425 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
426 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
427 };
428
429 /* Handsfree Left */
430 static const char *twl4030_handsfreel_texts[] =
431 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
432
433 static const struct soc_enum twl4030_handsfreel_enum =
434 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
435 ARRAY_SIZE(twl4030_handsfreel_texts),
436 twl4030_handsfreel_texts);
437
438 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
439 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
440
441 /* Handsfree Left virtual mute */
442 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
443 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
444
445 /* Handsfree Right */
446 static const char *twl4030_handsfreer_texts[] =
447 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
448
449 static const struct soc_enum twl4030_handsfreer_enum =
450 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
451 ARRAY_SIZE(twl4030_handsfreer_texts),
452 twl4030_handsfreer_texts);
453
454 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
455 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
456
457 /* Handsfree Right virtual mute */
458 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
459 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
460
461 /* Vibra */
462 /* Vibra audio path selection */
463 static const char *twl4030_vibra_texts[] =
464 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
465
466 static const struct soc_enum twl4030_vibra_enum =
467 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
468 ARRAY_SIZE(twl4030_vibra_texts),
469 twl4030_vibra_texts);
470
471 static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
472 SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
473
474 /* Vibra path selection: local vibrator (PWM) or audio driven */
475 static const char *twl4030_vibrapath_texts[] =
476 {"Local vibrator", "Audio"};
477
478 static const struct soc_enum twl4030_vibrapath_enum =
479 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
480 ARRAY_SIZE(twl4030_vibrapath_texts),
481 twl4030_vibrapath_texts);
482
483 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
484 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
485
486 /* Left analog microphone selection */
487 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
488 SOC_DAPM_SINGLE("Main Mic Capture Switch",
489 TWL4030_REG_ANAMICL, 0, 1, 0),
490 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
491 TWL4030_REG_ANAMICL, 1, 1, 0),
492 SOC_DAPM_SINGLE("AUXL Capture Switch",
493 TWL4030_REG_ANAMICL, 2, 1, 0),
494 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
495 TWL4030_REG_ANAMICL, 3, 1, 0),
496 };
497
498 /* Right analog microphone selection */
499 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
500 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
501 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
502 };
503
504 /* TX1 L/R Analog/Digital microphone selection */
505 static const char *twl4030_micpathtx1_texts[] =
506 {"Analog", "Digimic0"};
507
508 static const struct soc_enum twl4030_micpathtx1_enum =
509 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
510 ARRAY_SIZE(twl4030_micpathtx1_texts),
511 twl4030_micpathtx1_texts);
512
513 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
514 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
515
516 /* TX2 L/R Analog/Digital microphone selection */
517 static const char *twl4030_micpathtx2_texts[] =
518 {"Analog", "Digimic1"};
519
520 static const struct soc_enum twl4030_micpathtx2_enum =
521 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
522 ARRAY_SIZE(twl4030_micpathtx2_texts),
523 twl4030_micpathtx2_texts);
524
525 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
526 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
527
528 /* Analog bypass for AudioR1 */
529 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
530 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
531
532 /* Analog bypass for AudioL1 */
533 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
534 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
535
536 /* Analog bypass for AudioR2 */
537 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
538 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
539
540 /* Analog bypass for AudioL2 */
541 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
542 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
543
544 /* Analog bypass for Voice */
545 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
546 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
547
548 /* Digital bypass gain, mute instead of -30dB */
549 static const unsigned int twl4030_dapm_dbypass_tlv[] = {
550 TLV_DB_RANGE_HEAD(3),
551 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
552 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
553 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
554 };
555
556 /* Digital bypass left (TX1L -> RX2L) */
557 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
558 SOC_DAPM_SINGLE_TLV("Volume",
559 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
560 twl4030_dapm_dbypass_tlv);
561
562 /* Digital bypass right (TX1R -> RX2R) */
563 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
564 SOC_DAPM_SINGLE_TLV("Volume",
565 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
566 twl4030_dapm_dbypass_tlv);
567
568 /*
569 * Voice Sidetone GAIN volume control:
570 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
571 */
572 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
573
574 /* Digital bypass voice: sidetone (VUL -> VDL)*/
575 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
576 SOC_DAPM_SINGLE_TLV("Volume",
577 TWL4030_REG_VSTPGA, 0, 0x29, 0,
578 twl4030_dapm_dbypassv_tlv);
579
580 /*
581 * Output PGA builder:
582 * Handle the muting and unmuting of the given output (turning off the
583 * amplifier associated with the output pin)
584 * On mute bypass the reg_cache and write 0 to the register
585 * On unmute: restore the register content from the reg_cache
586 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
587 */
588 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
589 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
590 struct snd_kcontrol *kcontrol, int event) \
591 { \
592 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
593 \
594 switch (event) { \
595 case SND_SOC_DAPM_POST_PMU: \
596 twl4030->pin_name##_enabled = 1; \
597 twl4030_write(w->codec, reg, \
598 twl4030_read_reg_cache(w->codec, reg)); \
599 break; \
600 case SND_SOC_DAPM_POST_PMD: \
601 twl4030->pin_name##_enabled = 0; \
602 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
603 0, reg); \
604 break; \
605 } \
606 return 0; \
607 }
608
609 TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
610 TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
611 TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
612 TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
613 TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
614
615 static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
616 {
617 unsigned char hs_ctl;
618
619 hs_ctl = twl4030_read_reg_cache(codec, reg);
620
621 if (ramp) {
622 /* HF ramp-up */
623 hs_ctl |= TWL4030_HF_CTL_REF_EN;
624 twl4030_write(codec, reg, hs_ctl);
625 udelay(10);
626 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
627 twl4030_write(codec, reg, hs_ctl);
628 udelay(40);
629 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
630 hs_ctl |= TWL4030_HF_CTL_HB_EN;
631 twl4030_write(codec, reg, hs_ctl);
632 } else {
633 /* HF ramp-down */
634 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
635 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
636 twl4030_write(codec, reg, hs_ctl);
637 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
638 twl4030_write(codec, reg, hs_ctl);
639 udelay(40);
640 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
641 twl4030_write(codec, reg, hs_ctl);
642 }
643 }
644
645 static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
646 struct snd_kcontrol *kcontrol, int event)
647 {
648 switch (event) {
649 case SND_SOC_DAPM_POST_PMU:
650 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
651 break;
652 case SND_SOC_DAPM_POST_PMD:
653 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
654 break;
655 }
656 return 0;
657 }
658
659 static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
660 struct snd_kcontrol *kcontrol, int event)
661 {
662 switch (event) {
663 case SND_SOC_DAPM_POST_PMU:
664 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
665 break;
666 case SND_SOC_DAPM_POST_PMD:
667 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
668 break;
669 }
670 return 0;
671 }
672
673 static int vibramux_event(struct snd_soc_dapm_widget *w,
674 struct snd_kcontrol *kcontrol, int event)
675 {
676 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
677 return 0;
678 }
679
680 static int apll_event(struct snd_soc_dapm_widget *w,
681 struct snd_kcontrol *kcontrol, int event)
682 {
683 switch (event) {
684 case SND_SOC_DAPM_PRE_PMU:
685 twl4030_apll_enable(w->codec, 1);
686 break;
687 case SND_SOC_DAPM_POST_PMD:
688 twl4030_apll_enable(w->codec, 0);
689 break;
690 }
691 return 0;
692 }
693
694 static int aif_event(struct snd_soc_dapm_widget *w,
695 struct snd_kcontrol *kcontrol, int event)
696 {
697 u8 audio_if;
698
699 audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF);
700 switch (event) {
701 case SND_SOC_DAPM_PRE_PMU:
702 /* Enable AIF */
703 /* enable the PLL before we use it to clock the DAI */
704 twl4030_apll_enable(w->codec, 1);
705
706 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
707 audio_if | TWL4030_AIF_EN);
708 break;
709 case SND_SOC_DAPM_POST_PMD:
710 /* disable the DAI before we stop it's source PLL */
711 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
712 audio_if & ~TWL4030_AIF_EN);
713 twl4030_apll_enable(w->codec, 0);
714 break;
715 }
716 return 0;
717 }
718
719 static void headset_ramp(struct snd_soc_codec *codec, int ramp)
720 {
721 struct snd_soc_device *socdev = codec->socdev;
722 struct twl4030_setup_data *setup = socdev->codec_data;
723
724 unsigned char hs_gain, hs_pop;
725 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
726 /* Base values for ramp delay calculation: 2^19 - 2^26 */
727 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
728 8388608, 16777216, 33554432, 67108864};
729
730 hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
731 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
732
733 /* Enable external mute control, this dramatically reduces
734 * the pop-noise */
735 if (setup && setup->hs_extmute) {
736 if (setup->set_hs_extmute) {
737 setup->set_hs_extmute(1);
738 } else {
739 hs_pop |= TWL4030_EXTMUTE;
740 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
741 }
742 }
743
744 if (ramp) {
745 /* Headset ramp-up according to the TRM */
746 hs_pop |= TWL4030_VMID_EN;
747 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
748 /* Actually write to the register */
749 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
750 hs_gain,
751 TWL4030_REG_HS_GAIN_SET);
752 hs_pop |= TWL4030_RAMP_EN;
753 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
754 /* Wait ramp delay time + 1, so the VMID can settle */
755 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
756 twl4030->sysclk) + 1);
757 } else {
758 /* Headset ramp-down _not_ according to
759 * the TRM, but in a way that it is working */
760 hs_pop &= ~TWL4030_RAMP_EN;
761 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
762 /* Wait ramp delay time + 1, so the VMID can settle */
763 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
764 twl4030->sysclk) + 1);
765 /* Bypass the reg_cache to mute the headset */
766 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
767 hs_gain & (~0x0f),
768 TWL4030_REG_HS_GAIN_SET);
769
770 hs_pop &= ~TWL4030_VMID_EN;
771 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
772 }
773
774 /* Disable external mute */
775 if (setup && setup->hs_extmute) {
776 if (setup->set_hs_extmute) {
777 setup->set_hs_extmute(0);
778 } else {
779 hs_pop &= ~TWL4030_EXTMUTE;
780 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
781 }
782 }
783 }
784
785 static int headsetlpga_event(struct snd_soc_dapm_widget *w,
786 struct snd_kcontrol *kcontrol, int event)
787 {
788 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
789
790 switch (event) {
791 case SND_SOC_DAPM_POST_PMU:
792 /* Do the ramp-up only once */
793 if (!twl4030->hsr_enabled)
794 headset_ramp(w->codec, 1);
795
796 twl4030->hsl_enabled = 1;
797 break;
798 case SND_SOC_DAPM_POST_PMD:
799 /* Do the ramp-down only if both headsetL/R is disabled */
800 if (!twl4030->hsr_enabled)
801 headset_ramp(w->codec, 0);
802
803 twl4030->hsl_enabled = 0;
804 break;
805 }
806 return 0;
807 }
808
809 static int headsetrpga_event(struct snd_soc_dapm_widget *w,
810 struct snd_kcontrol *kcontrol, int event)
811 {
812 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
813
814 switch (event) {
815 case SND_SOC_DAPM_POST_PMU:
816 /* Do the ramp-up only once */
817 if (!twl4030->hsl_enabled)
818 headset_ramp(w->codec, 1);
819
820 twl4030->hsr_enabled = 1;
821 break;
822 case SND_SOC_DAPM_POST_PMD:
823 /* Do the ramp-down only if both headsetL/R is disabled */
824 if (!twl4030->hsl_enabled)
825 headset_ramp(w->codec, 0);
826
827 twl4030->hsr_enabled = 0;
828 break;
829 }
830 return 0;
831 }
832
833 static int digimic_event(struct snd_soc_dapm_widget *w,
834 struct snd_kcontrol *kcontrol, int event)
835 {
836 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
837
838 if (twl4030->digimic_delay)
839 mdelay(twl4030->digimic_delay);
840 return 0;
841 }
842
843 /*
844 * Some of the gain controls in TWL (mostly those which are associated with
845 * the outputs) are implemented in an interesting way:
846 * 0x0 : Power down (mute)
847 * 0x1 : 6dB
848 * 0x2 : 0 dB
849 * 0x3 : -6 dB
850 * Inverting not going to help with these.
851 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
852 */
853 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
854 xinvert, tlv_array) \
855 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
856 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
857 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
858 .tlv.p = (tlv_array), \
859 .info = snd_soc_info_volsw, \
860 .get = snd_soc_get_volsw_twl4030, \
861 .put = snd_soc_put_volsw_twl4030, \
862 .private_value = (unsigned long)&(struct soc_mixer_control) \
863 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
864 .max = xmax, .invert = xinvert} }
865 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
866 xinvert, tlv_array) \
867 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
868 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
869 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
870 .tlv.p = (tlv_array), \
871 .info = snd_soc_info_volsw_2r, \
872 .get = snd_soc_get_volsw_r2_twl4030,\
873 .put = snd_soc_put_volsw_r2_twl4030, \
874 .private_value = (unsigned long)&(struct soc_mixer_control) \
875 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
876 .rshift = xshift, .max = xmax, .invert = xinvert} }
877 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
878 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
879 xinvert, tlv_array)
880
881 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
882 struct snd_ctl_elem_value *ucontrol)
883 {
884 struct soc_mixer_control *mc =
885 (struct soc_mixer_control *)kcontrol->private_value;
886 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
887 unsigned int reg = mc->reg;
888 unsigned int shift = mc->shift;
889 unsigned int rshift = mc->rshift;
890 int max = mc->max;
891 int mask = (1 << fls(max)) - 1;
892
893 ucontrol->value.integer.value[0] =
894 (snd_soc_read(codec, reg) >> shift) & mask;
895 if (ucontrol->value.integer.value[0])
896 ucontrol->value.integer.value[0] =
897 max + 1 - ucontrol->value.integer.value[0];
898
899 if (shift != rshift) {
900 ucontrol->value.integer.value[1] =
901 (snd_soc_read(codec, reg) >> rshift) & mask;
902 if (ucontrol->value.integer.value[1])
903 ucontrol->value.integer.value[1] =
904 max + 1 - ucontrol->value.integer.value[1];
905 }
906
907 return 0;
908 }
909
910 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
911 struct snd_ctl_elem_value *ucontrol)
912 {
913 struct soc_mixer_control *mc =
914 (struct soc_mixer_control *)kcontrol->private_value;
915 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
916 unsigned int reg = mc->reg;
917 unsigned int shift = mc->shift;
918 unsigned int rshift = mc->rshift;
919 int max = mc->max;
920 int mask = (1 << fls(max)) - 1;
921 unsigned short val, val2, val_mask;
922
923 val = (ucontrol->value.integer.value[0] & mask);
924
925 val_mask = mask << shift;
926 if (val)
927 val = max + 1 - val;
928 val = val << shift;
929 if (shift != rshift) {
930 val2 = (ucontrol->value.integer.value[1] & mask);
931 val_mask |= mask << rshift;
932 if (val2)
933 val2 = max + 1 - val2;
934 val |= val2 << rshift;
935 }
936 return snd_soc_update_bits(codec, reg, val_mask, val);
937 }
938
939 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
940 struct snd_ctl_elem_value *ucontrol)
941 {
942 struct soc_mixer_control *mc =
943 (struct soc_mixer_control *)kcontrol->private_value;
944 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
945 unsigned int reg = mc->reg;
946 unsigned int reg2 = mc->rreg;
947 unsigned int shift = mc->shift;
948 int max = mc->max;
949 int mask = (1<<fls(max))-1;
950
951 ucontrol->value.integer.value[0] =
952 (snd_soc_read(codec, reg) >> shift) & mask;
953 ucontrol->value.integer.value[1] =
954 (snd_soc_read(codec, reg2) >> shift) & mask;
955
956 if (ucontrol->value.integer.value[0])
957 ucontrol->value.integer.value[0] =
958 max + 1 - ucontrol->value.integer.value[0];
959 if (ucontrol->value.integer.value[1])
960 ucontrol->value.integer.value[1] =
961 max + 1 - ucontrol->value.integer.value[1];
962
963 return 0;
964 }
965
966 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
967 struct snd_ctl_elem_value *ucontrol)
968 {
969 struct soc_mixer_control *mc =
970 (struct soc_mixer_control *)kcontrol->private_value;
971 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
972 unsigned int reg = mc->reg;
973 unsigned int reg2 = mc->rreg;
974 unsigned int shift = mc->shift;
975 int max = mc->max;
976 int mask = (1 << fls(max)) - 1;
977 int err;
978 unsigned short val, val2, val_mask;
979
980 val_mask = mask << shift;
981 val = (ucontrol->value.integer.value[0] & mask);
982 val2 = (ucontrol->value.integer.value[1] & mask);
983
984 if (val)
985 val = max + 1 - val;
986 if (val2)
987 val2 = max + 1 - val2;
988
989 val = val << shift;
990 val2 = val2 << shift;
991
992 err = snd_soc_update_bits(codec, reg, val_mask, val);
993 if (err < 0)
994 return err;
995
996 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
997 return err;
998 }
999
1000 /* Codec operation modes */
1001 static const char *twl4030_op_modes_texts[] = {
1002 "Option 2 (voice/audio)", "Option 1 (audio)"
1003 };
1004
1005 static const struct soc_enum twl4030_op_modes_enum =
1006 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
1007 ARRAY_SIZE(twl4030_op_modes_texts),
1008 twl4030_op_modes_texts);
1009
1010 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
1011 struct snd_ctl_elem_value *ucontrol)
1012 {
1013 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1014 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1015 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1016 unsigned short val;
1017 unsigned short mask, bitmask;
1018
1019 if (twl4030->configured) {
1020 printk(KERN_ERR "twl4030 operation mode cannot be "
1021 "changed on-the-fly\n");
1022 return -EBUSY;
1023 }
1024
1025 for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
1026 ;
1027 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1028 return -EINVAL;
1029
1030 val = ucontrol->value.enumerated.item[0] << e->shift_l;
1031 mask = (bitmask - 1) << e->shift_l;
1032 if (e->shift_l != e->shift_r) {
1033 if (ucontrol->value.enumerated.item[1] > e->max - 1)
1034 return -EINVAL;
1035 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
1036 mask |= (bitmask - 1) << e->shift_r;
1037 }
1038
1039 return snd_soc_update_bits(codec, e->reg, mask, val);
1040 }
1041
1042 /*
1043 * FGAIN volume control:
1044 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
1045 */
1046 static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
1047
1048 /*
1049 * CGAIN volume control:
1050 * 0 dB to 12 dB in 6 dB steps
1051 * value 2 and 3 means 12 dB
1052 */
1053 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
1054
1055 /*
1056 * Voice Downlink GAIN volume control:
1057 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1058 */
1059 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1060
1061 /*
1062 * Analog playback gain
1063 * -24 dB to 12 dB in 2 dB steps
1064 */
1065 static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
1066
1067 /*
1068 * Gain controls tied to outputs
1069 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1070 */
1071 static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1072
1073 /*
1074 * Gain control for earpiece amplifier
1075 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1076 */
1077 static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1078
1079 /*
1080 * Capture gain after the ADCs
1081 * from 0 dB to 31 dB in 1 dB steps
1082 */
1083 static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1084
1085 /*
1086 * Gain control for input amplifiers
1087 * 0 dB to 30 dB in 6 dB steps
1088 */
1089 static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1090
1091 /* AVADC clock priority */
1092 static const char *twl4030_avadc_clk_priority_texts[] = {
1093 "Voice high priority", "HiFi high priority"
1094 };
1095
1096 static const struct soc_enum twl4030_avadc_clk_priority_enum =
1097 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1098 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1099 twl4030_avadc_clk_priority_texts);
1100
1101 static const char *twl4030_rampdelay_texts[] = {
1102 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1103 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1104 "3495/2581/1748 ms"
1105 };
1106
1107 static const struct soc_enum twl4030_rampdelay_enum =
1108 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1109 ARRAY_SIZE(twl4030_rampdelay_texts),
1110 twl4030_rampdelay_texts);
1111
1112 /* Vibra H-bridge direction mode */
1113 static const char *twl4030_vibradirmode_texts[] = {
1114 "Vibra H-bridge direction", "Audio data MSB",
1115 };
1116
1117 static const struct soc_enum twl4030_vibradirmode_enum =
1118 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1119 ARRAY_SIZE(twl4030_vibradirmode_texts),
1120 twl4030_vibradirmode_texts);
1121
1122 /* Vibra H-bridge direction */
1123 static const char *twl4030_vibradir_texts[] = {
1124 "Positive polarity", "Negative polarity",
1125 };
1126
1127 static const struct soc_enum twl4030_vibradir_enum =
1128 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1129 ARRAY_SIZE(twl4030_vibradir_texts),
1130 twl4030_vibradir_texts);
1131
1132 /* Digimic Left and right swapping */
1133 static const char *twl4030_digimicswap_texts[] = {
1134 "Not swapped", "Swapped",
1135 };
1136
1137 static const struct soc_enum twl4030_digimicswap_enum =
1138 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1139 ARRAY_SIZE(twl4030_digimicswap_texts),
1140 twl4030_digimicswap_texts);
1141
1142 static const struct snd_kcontrol_new twl4030_snd_controls[] = {
1143 /* Codec operation mode control */
1144 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1145 snd_soc_get_enum_double,
1146 snd_soc_put_twl4030_opmode_enum_double),
1147
1148 /* Common playback gain controls */
1149 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1150 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1151 0, 0x3f, 0, digital_fine_tlv),
1152 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1153 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1154 0, 0x3f, 0, digital_fine_tlv),
1155
1156 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1157 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1158 6, 0x2, 0, digital_coarse_tlv),
1159 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1160 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1161 6, 0x2, 0, digital_coarse_tlv),
1162
1163 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1164 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1165 3, 0x12, 1, analog_tlv),
1166 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1167 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1168 3, 0x12, 1, analog_tlv),
1169 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1170 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1171 1, 1, 0),
1172 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1173 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1174 1, 1, 0),
1175
1176 /* Common voice downlink gain controls */
1177 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1178 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1179
1180 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1181 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1182
1183 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1184 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1185
1186 /* Separate output gain controls */
1187 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1188 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1189 4, 3, 0, output_tvl),
1190
1191 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1192 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl),
1193
1194 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1195 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1196 4, 3, 0, output_tvl),
1197
1198 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
1199 TWL4030_REG_EAR_CTL, 4, 3, 0, output_ear_tvl),
1200
1201 /* Common capture gain controls */
1202 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1203 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1204 0, 0x1f, 0, digital_capture_tlv),
1205 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1206 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1207 0, 0x1f, 0, digital_capture_tlv),
1208
1209 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
1210 0, 3, 5, 0, input_gain_tlv),
1211
1212 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1213
1214 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
1215
1216 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1217 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
1218
1219 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
1220 };
1221
1222 static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
1223 /* Left channel inputs */
1224 SND_SOC_DAPM_INPUT("MAINMIC"),
1225 SND_SOC_DAPM_INPUT("HSMIC"),
1226 SND_SOC_DAPM_INPUT("AUXL"),
1227 SND_SOC_DAPM_INPUT("CARKITMIC"),
1228 /* Right channel inputs */
1229 SND_SOC_DAPM_INPUT("SUBMIC"),
1230 SND_SOC_DAPM_INPUT("AUXR"),
1231 /* Digital microphones (Stereo) */
1232 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1233 SND_SOC_DAPM_INPUT("DIGIMIC1"),
1234
1235 /* Outputs */
1236 SND_SOC_DAPM_OUTPUT("EARPIECE"),
1237 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1238 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1239 SND_SOC_DAPM_OUTPUT("HSOL"),
1240 SND_SOC_DAPM_OUTPUT("HSOR"),
1241 SND_SOC_DAPM_OUTPUT("CARKITL"),
1242 SND_SOC_DAPM_OUTPUT("CARKITR"),
1243 SND_SOC_DAPM_OUTPUT("HFL"),
1244 SND_SOC_DAPM_OUTPUT("HFR"),
1245 SND_SOC_DAPM_OUTPUT("VIBRA"),
1246
1247 /* AIF and APLL clocks for running DAIs (including loopback) */
1248 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1249 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1250 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1251
1252 /* DACs */
1253 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
1254 SND_SOC_NOPM, 0, 0),
1255 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
1256 SND_SOC_NOPM, 0, 0),
1257 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
1258 SND_SOC_NOPM, 0, 0),
1259 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
1260 SND_SOC_NOPM, 0, 0),
1261 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
1262 SND_SOC_NOPM, 0, 0),
1263
1264 /* Analog bypasses */
1265 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1266 &twl4030_dapm_abypassr1_control),
1267 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1268 &twl4030_dapm_abypassl1_control),
1269 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1270 &twl4030_dapm_abypassr2_control),
1271 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1272 &twl4030_dapm_abypassl2_control),
1273 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1274 &twl4030_dapm_abypassv_control),
1275
1276 /* Master analog loopback switch */
1277 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1278 NULL, 0),
1279
1280 /* Digital bypasses */
1281 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1282 &twl4030_dapm_dbypassl_control),
1283 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1284 &twl4030_dapm_dbypassr_control),
1285 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1286 &twl4030_dapm_dbypassv_control),
1287
1288 /* Digital mixers, power control for the physical DACs */
1289 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1290 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1291 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1292 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1293 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1294 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1295 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1296 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1297 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1298 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1299
1300 /* Analog mixers, power control for the physical PGAs */
1301 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1302 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1303 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1304 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1305 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1306 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1307 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1308 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1309 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1310 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
1311
1312 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1313 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1314
1315 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1316 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1317
1318 /* Output MIXER controls */
1319 /* Earpiece */
1320 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1321 &twl4030_dapm_earpiece_controls[0],
1322 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
1323 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1324 0, 0, NULL, 0, earpiecepga_event,
1325 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1326 /* PreDrivL/R */
1327 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1328 &twl4030_dapm_predrivel_controls[0],
1329 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
1330 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1331 0, 0, NULL, 0, predrivelpga_event,
1332 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1333 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1334 &twl4030_dapm_predriver_controls[0],
1335 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
1336 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1337 0, 0, NULL, 0, predriverpga_event,
1338 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1339 /* HeadsetL/R */
1340 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
1341 &twl4030_dapm_hsol_controls[0],
1342 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1343 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1344 0, 0, NULL, 0, headsetlpga_event,
1345 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1346 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1347 &twl4030_dapm_hsor_controls[0],
1348 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
1349 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1350 0, 0, NULL, 0, headsetrpga_event,
1351 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1352 /* CarkitL/R */
1353 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1354 &twl4030_dapm_carkitl_controls[0],
1355 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
1356 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1357 0, 0, NULL, 0, carkitlpga_event,
1358 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1359 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1360 &twl4030_dapm_carkitr_controls[0],
1361 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
1362 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1363 0, 0, NULL, 0, carkitrpga_event,
1364 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1365
1366 /* Output MUX controls */
1367 /* HandsfreeL/R */
1368 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1369 &twl4030_dapm_handsfreel_control),
1370 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
1371 &twl4030_dapm_handsfreelmute_control),
1372 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1373 0, 0, NULL, 0, handsfreelpga_event,
1374 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1375 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1376 &twl4030_dapm_handsfreer_control),
1377 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
1378 &twl4030_dapm_handsfreermute_control),
1379 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1380 0, 0, NULL, 0, handsfreerpga_event,
1381 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1382 /* Vibra */
1383 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1384 &twl4030_dapm_vibra_control, vibramux_event,
1385 SND_SOC_DAPM_PRE_PMU),
1386 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1387 &twl4030_dapm_vibrapath_control),
1388
1389 /* Introducing four virtual ADC, since TWL4030 have four channel for
1390 capture */
1391 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1392 SND_SOC_NOPM, 0, 0),
1393 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1394 SND_SOC_NOPM, 0, 0),
1395 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1396 SND_SOC_NOPM, 0, 0),
1397 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1398 SND_SOC_NOPM, 0, 0),
1399
1400 /* Analog/Digital mic path selection.
1401 TX1 Left/Right: either analog Left/Right or Digimic0
1402 TX2 Left/Right: either analog Left/Right or Digimic1 */
1403 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1404 &twl4030_dapm_micpathtx1_control),
1405 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1406 &twl4030_dapm_micpathtx2_control),
1407
1408 /* Analog input mixers for the capture amplifiers */
1409 SND_SOC_DAPM_MIXER("Analog Left",
1410 TWL4030_REG_ANAMICL, 4, 0,
1411 &twl4030_dapm_analoglmic_controls[0],
1412 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
1413 SND_SOC_DAPM_MIXER("Analog Right",
1414 TWL4030_REG_ANAMICR, 4, 0,
1415 &twl4030_dapm_analogrmic_controls[0],
1416 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
1417
1418 SND_SOC_DAPM_PGA("ADC Physical Left",
1419 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1420 SND_SOC_DAPM_PGA("ADC Physical Right",
1421 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
1422
1423 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1424 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1425 digimic_event, SND_SOC_DAPM_POST_PMU),
1426 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1427 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1428 digimic_event, SND_SOC_DAPM_POST_PMU),
1429
1430 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1431 NULL, 0),
1432 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1433 NULL, 0),
1434
1435 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1436 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1437 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
1438
1439 };
1440
1441 static const struct snd_soc_dapm_route intercon[] = {
1442 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1443 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1444 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1445 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1446 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
1447
1448 /* Supply for the digital part (APLL) */
1449 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1450
1451 {"DAC Left1", NULL, "AIF Enable"},
1452 {"DAC Right1", NULL, "AIF Enable"},
1453 {"DAC Left2", NULL, "AIF Enable"},
1454 {"DAC Right1", NULL, "AIF Enable"},
1455
1456 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1457 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1458
1459 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1460 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1461 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1462 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1463 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
1464
1465 /* Internal playback routings */
1466 /* Earpiece */
1467 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1468 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1469 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1470 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1471 {"Earpiece PGA", NULL, "Earpiece Mixer"},
1472 /* PreDrivL */
1473 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1474 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1475 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1476 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1477 {"PredriveL PGA", NULL, "PredriveL Mixer"},
1478 /* PreDrivR */
1479 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1480 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1481 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1482 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1483 {"PredriveR PGA", NULL, "PredriveR Mixer"},
1484 /* HeadsetL */
1485 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1486 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1487 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1488 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
1489 /* HeadsetR */
1490 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1491 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1492 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1493 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
1494 /* CarkitL */
1495 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1496 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1497 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1498 {"CarkitL PGA", NULL, "CarkitL Mixer"},
1499 /* CarkitR */
1500 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1501 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1502 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1503 {"CarkitR PGA", NULL, "CarkitR Mixer"},
1504 /* HandsfreeL */
1505 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1506 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1507 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1508 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1509 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1510 {"HandsfreeL PGA", NULL, "HandsfreeL"},
1511 /* HandsfreeR */
1512 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1513 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1514 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1515 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1516 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1517 {"HandsfreeR PGA", NULL, "HandsfreeR"},
1518 /* Vibra */
1519 {"Vibra Mux", "AudioL1", "DAC Left1"},
1520 {"Vibra Mux", "AudioR1", "DAC Right1"},
1521 {"Vibra Mux", "AudioL2", "DAC Left2"},
1522 {"Vibra Mux", "AudioR2", "DAC Right2"},
1523
1524 /* outputs */
1525 /* Must be always connected (for AIF and APLL) */
1526 {"Virtual HiFi OUT", NULL, "DAC Left1"},
1527 {"Virtual HiFi OUT", NULL, "DAC Right1"},
1528 {"Virtual HiFi OUT", NULL, "DAC Left2"},
1529 {"Virtual HiFi OUT", NULL, "DAC Right2"},
1530 /* Must be always connected (for APLL) */
1531 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1532 /* Physical outputs */
1533 {"EARPIECE", NULL, "Earpiece PGA"},
1534 {"PREDRIVEL", NULL, "PredriveL PGA"},
1535 {"PREDRIVER", NULL, "PredriveR PGA"},
1536 {"HSOL", NULL, "HeadsetL PGA"},
1537 {"HSOR", NULL, "HeadsetR PGA"},
1538 {"CARKITL", NULL, "CarkitL PGA"},
1539 {"CARKITR", NULL, "CarkitR PGA"},
1540 {"HFL", NULL, "HandsfreeL PGA"},
1541 {"HFR", NULL, "HandsfreeR PGA"},
1542 {"Vibra Route", "Audio", "Vibra Mux"},
1543 {"VIBRA", NULL, "Vibra Route"},
1544
1545 /* Capture path */
1546 /* Must be always connected (for AIF and APLL) */
1547 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1548 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1549 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1550 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1551 /* Physical inputs */
1552 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1553 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1554 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1555 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1556
1557 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1558 {"Analog Right", "AUXR Capture Switch", "AUXR"},
1559
1560 {"ADC Physical Left", NULL, "Analog Left"},
1561 {"ADC Physical Right", NULL, "Analog Right"},
1562
1563 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1564 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1565
1566 {"DIGIMIC0", NULL, "micbias1 select"},
1567 {"DIGIMIC1", NULL, "micbias2 select"},
1568
1569 /* TX1 Left capture path */
1570 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1571 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1572 /* TX1 Right capture path */
1573 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1574 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1575 /* TX2 Left capture path */
1576 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1577 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1578 /* TX2 Right capture path */
1579 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1580 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1581
1582 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1583 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1584 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1585 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1586
1587 {"ADC Virtual Left1", NULL, "AIF Enable"},
1588 {"ADC Virtual Right1", NULL, "AIF Enable"},
1589 {"ADC Virtual Left2", NULL, "AIF Enable"},
1590 {"ADC Virtual Right2", NULL, "AIF Enable"},
1591
1592 /* Analog bypass routes */
1593 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1594 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1595 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1596 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1597 {"Voice Analog Loopback", "Switch", "Analog Left"},
1598
1599 /* Supply for the Analog loopbacks */
1600 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1601 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1602 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1603 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1604 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1605
1606 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1607 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1608 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1609 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
1610 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
1611
1612 /* Digital bypass routes */
1613 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1614 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1615 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1616
1617 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1618 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1619 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
1620
1621 };
1622
1623 static int twl4030_add_widgets(struct snd_soc_codec *codec)
1624 {
1625 snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
1626 ARRAY_SIZE(twl4030_dapm_widgets));
1627
1628 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
1629
1630 return 0;
1631 }
1632
1633 static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1634 enum snd_soc_bias_level level)
1635 {
1636 switch (level) {
1637 case SND_SOC_BIAS_ON:
1638 break;
1639 case SND_SOC_BIAS_PREPARE:
1640 break;
1641 case SND_SOC_BIAS_STANDBY:
1642 if (codec->bias_level == SND_SOC_BIAS_OFF)
1643 twl4030_codec_enable(codec, 1);
1644 break;
1645 case SND_SOC_BIAS_OFF:
1646 twl4030_codec_enable(codec, 0);
1647 break;
1648 }
1649 codec->bias_level = level;
1650
1651 return 0;
1652 }
1653
1654 static void twl4030_constraints(struct twl4030_priv *twl4030,
1655 struct snd_pcm_substream *mst_substream)
1656 {
1657 struct snd_pcm_substream *slv_substream;
1658
1659 /* Pick the stream, which need to be constrained */
1660 if (mst_substream == twl4030->master_substream)
1661 slv_substream = twl4030->slave_substream;
1662 else if (mst_substream == twl4030->slave_substream)
1663 slv_substream = twl4030->master_substream;
1664 else /* This should not happen.. */
1665 return;
1666
1667 /* Set the constraints according to the already configured stream */
1668 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1669 SNDRV_PCM_HW_PARAM_RATE,
1670 twl4030->rate,
1671 twl4030->rate);
1672
1673 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1674 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1675 twl4030->sample_bits,
1676 twl4030->sample_bits);
1677
1678 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1679 SNDRV_PCM_HW_PARAM_CHANNELS,
1680 twl4030->channels,
1681 twl4030->channels);
1682 }
1683
1684 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1685 * capture has to be enabled/disabled. */
1686 static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1687 int enable)
1688 {
1689 u8 reg, mask;
1690
1691 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1692
1693 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1694 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1695 else
1696 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1697
1698 if (enable)
1699 reg |= mask;
1700 else
1701 reg &= ~mask;
1702
1703 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1704 }
1705
1706 static int twl4030_startup(struct snd_pcm_substream *substream,
1707 struct snd_soc_dai *dai)
1708 {
1709 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1710 struct snd_soc_device *socdev = rtd->socdev;
1711 struct snd_soc_codec *codec = socdev->card->codec;
1712 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1713
1714 if (twl4030->master_substream) {
1715 twl4030->slave_substream = substream;
1716 /* The DAI has one configuration for playback and capture, so
1717 * if the DAI has been already configured then constrain this
1718 * substream to match it. */
1719 if (twl4030->configured)
1720 twl4030_constraints(twl4030, twl4030->master_substream);
1721 } else {
1722 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1723 TWL4030_OPTION_1)) {
1724 /* In option2 4 channel is not supported, set the
1725 * constraint for the first stream for channels, the
1726 * second stream will 'inherit' this cosntraint */
1727 snd_pcm_hw_constraint_minmax(substream->runtime,
1728 SNDRV_PCM_HW_PARAM_CHANNELS,
1729 2, 2);
1730 }
1731 twl4030->master_substream = substream;
1732 }
1733
1734 return 0;
1735 }
1736
1737 static void twl4030_shutdown(struct snd_pcm_substream *substream,
1738 struct snd_soc_dai *dai)
1739 {
1740 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1741 struct snd_soc_device *socdev = rtd->socdev;
1742 struct snd_soc_codec *codec = socdev->card->codec;
1743 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1744
1745 if (twl4030->master_substream == substream)
1746 twl4030->master_substream = twl4030->slave_substream;
1747
1748 twl4030->slave_substream = NULL;
1749
1750 /* If all streams are closed, or the remaining stream has not yet
1751 * been configured than set the DAI as not configured. */
1752 if (!twl4030->master_substream)
1753 twl4030->configured = 0;
1754 else if (!twl4030->master_substream->runtime->channels)
1755 twl4030->configured = 0;
1756
1757 /* If the closing substream had 4 channel, do the necessary cleanup */
1758 if (substream->runtime->channels == 4)
1759 twl4030_tdm_enable(codec, substream->stream, 0);
1760 }
1761
1762 static int twl4030_hw_params(struct snd_pcm_substream *substream,
1763 struct snd_pcm_hw_params *params,
1764 struct snd_soc_dai *dai)
1765 {
1766 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1767 struct snd_soc_device *socdev = rtd->socdev;
1768 struct snd_soc_codec *codec = socdev->card->codec;
1769 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1770 u8 mode, old_mode, format, old_format;
1771
1772 /* If the substream has 4 channel, do the necessary setup */
1773 if (params_channels(params) == 4) {
1774 format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1775 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
1776
1777 /* Safety check: are we in the correct operating mode and
1778 * the interface is in TDM mode? */
1779 if ((mode & TWL4030_OPTION_1) &&
1780 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
1781 twl4030_tdm_enable(codec, substream->stream, 1);
1782 else
1783 return -EINVAL;
1784 }
1785
1786 if (twl4030->configured)
1787 /* Ignoring hw_params for already configured DAI */
1788 return 0;
1789
1790 /* bit rate */
1791 old_mode = twl4030_read_reg_cache(codec,
1792 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1793 mode = old_mode & ~TWL4030_APLL_RATE;
1794
1795 switch (params_rate(params)) {
1796 case 8000:
1797 mode |= TWL4030_APLL_RATE_8000;
1798 break;
1799 case 11025:
1800 mode |= TWL4030_APLL_RATE_11025;
1801 break;
1802 case 12000:
1803 mode |= TWL4030_APLL_RATE_12000;
1804 break;
1805 case 16000:
1806 mode |= TWL4030_APLL_RATE_16000;
1807 break;
1808 case 22050:
1809 mode |= TWL4030_APLL_RATE_22050;
1810 break;
1811 case 24000:
1812 mode |= TWL4030_APLL_RATE_24000;
1813 break;
1814 case 32000:
1815 mode |= TWL4030_APLL_RATE_32000;
1816 break;
1817 case 44100:
1818 mode |= TWL4030_APLL_RATE_44100;
1819 break;
1820 case 48000:
1821 mode |= TWL4030_APLL_RATE_48000;
1822 break;
1823 case 96000:
1824 mode |= TWL4030_APLL_RATE_96000;
1825 break;
1826 default:
1827 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
1828 params_rate(params));
1829 return -EINVAL;
1830 }
1831
1832 /* sample size */
1833 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1834 format = old_format;
1835 format &= ~TWL4030_DATA_WIDTH;
1836 switch (params_format(params)) {
1837 case SNDRV_PCM_FORMAT_S16_LE:
1838 format |= TWL4030_DATA_WIDTH_16S_16W;
1839 break;
1840 case SNDRV_PCM_FORMAT_S24_LE:
1841 format |= TWL4030_DATA_WIDTH_32S_24W;
1842 break;
1843 default:
1844 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
1845 params_format(params));
1846 return -EINVAL;
1847 }
1848
1849 if (format != old_format || mode != old_mode) {
1850 if (twl4030->codec_powered) {
1851 /*
1852 * If the codec is powered, than we need to toggle the
1853 * codec power.
1854 */
1855 twl4030_codec_enable(codec, 0);
1856 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1857 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1858 twl4030_codec_enable(codec, 1);
1859 } else {
1860 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1861 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1862 }
1863 }
1864
1865 /* Store the important parameters for the DAI configuration and set
1866 * the DAI as configured */
1867 twl4030->configured = 1;
1868 twl4030->rate = params_rate(params);
1869 twl4030->sample_bits = hw_param_interval(params,
1870 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1871 twl4030->channels = params_channels(params);
1872
1873 /* If both playback and capture streams are open, and one of them
1874 * is setting the hw parameters right now (since we are here), set
1875 * constraints to the other stream to match the current one. */
1876 if (twl4030->slave_substream)
1877 twl4030_constraints(twl4030, substream);
1878
1879 return 0;
1880 }
1881
1882 static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1883 int clk_id, unsigned int freq, int dir)
1884 {
1885 struct snd_soc_codec *codec = codec_dai->codec;
1886 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1887
1888 switch (freq) {
1889 case 19200000:
1890 case 26000000:
1891 case 38400000:
1892 break;
1893 default:
1894 dev_err(codec->dev, "Unsupported APLL mclk: %u\n", freq);
1895 return -EINVAL;
1896 }
1897
1898 if ((freq / 1000) != twl4030->sysclk) {
1899 dev_err(codec->dev,
1900 "Mismatch in APLL mclk: %u (configured: %u)\n",
1901 freq, twl4030->sysclk * 1000);
1902 return -EINVAL;
1903 }
1904
1905 return 0;
1906 }
1907
1908 static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1909 unsigned int fmt)
1910 {
1911 struct snd_soc_codec *codec = codec_dai->codec;
1912 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1913 u8 old_format, format;
1914
1915 /* get format */
1916 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1917 format = old_format;
1918
1919 /* set master/slave audio interface */
1920 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1921 case SND_SOC_DAIFMT_CBM_CFM:
1922 format &= ~(TWL4030_AIF_SLAVE_EN);
1923 format &= ~(TWL4030_CLK256FS_EN);
1924 break;
1925 case SND_SOC_DAIFMT_CBS_CFS:
1926 format |= TWL4030_AIF_SLAVE_EN;
1927 format |= TWL4030_CLK256FS_EN;
1928 break;
1929 default:
1930 return -EINVAL;
1931 }
1932
1933 /* interface format */
1934 format &= ~TWL4030_AIF_FORMAT;
1935 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1936 case SND_SOC_DAIFMT_I2S:
1937 format |= TWL4030_AIF_FORMAT_CODEC;
1938 break;
1939 case SND_SOC_DAIFMT_DSP_A:
1940 format |= TWL4030_AIF_FORMAT_TDM;
1941 break;
1942 default:
1943 return -EINVAL;
1944 }
1945
1946 if (format != old_format) {
1947 if (twl4030->codec_powered) {
1948 /*
1949 * If the codec is powered, than we need to toggle the
1950 * codec power.
1951 */
1952 twl4030_codec_enable(codec, 0);
1953 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1954 twl4030_codec_enable(codec, 1);
1955 } else {
1956 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1957 }
1958 }
1959
1960 return 0;
1961 }
1962
1963 static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1964 {
1965 struct snd_soc_codec *codec = dai->codec;
1966 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1967
1968 if (tristate)
1969 reg |= TWL4030_AIF_TRI_EN;
1970 else
1971 reg &= ~TWL4030_AIF_TRI_EN;
1972
1973 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1974 }
1975
1976 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1977 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1978 static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1979 int enable)
1980 {
1981 u8 reg, mask;
1982
1983 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1984
1985 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1986 mask = TWL4030_ARXL1_VRX_EN;
1987 else
1988 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1989
1990 if (enable)
1991 reg |= mask;
1992 else
1993 reg &= ~mask;
1994
1995 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1996 }
1997
1998 static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1999 struct snd_soc_dai *dai)
2000 {
2001 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2002 struct snd_soc_device *socdev = rtd->socdev;
2003 struct snd_soc_codec *codec = socdev->card->codec;
2004 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2005 u8 mode;
2006
2007 /* If the system master clock is not 26MHz, the voice PCM interface is
2008 * not avilable.
2009 */
2010 if (twl4030->sysclk != 26000) {
2011 dev_err(codec->dev, "The board is configured for %u Hz, while"
2012 "the Voice interface needs 26MHz APLL mclk\n",
2013 twl4030->sysclk * 1000);
2014 return -EINVAL;
2015 }
2016
2017 /* If the codec mode is not option2, the voice PCM interface is not
2018 * avilable.
2019 */
2020 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2021 & TWL4030_OPT_MODE;
2022
2023 if (mode != TWL4030_OPTION_2) {
2024 printk(KERN_ERR "TWL4030 voice startup: "
2025 "the codec mode is not option2\n");
2026 return -EINVAL;
2027 }
2028
2029 return 0;
2030 }
2031
2032 static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
2033 struct snd_soc_dai *dai)
2034 {
2035 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2036 struct snd_soc_device *socdev = rtd->socdev;
2037 struct snd_soc_codec *codec = socdev->card->codec;
2038
2039 /* Enable voice digital filters */
2040 twl4030_voice_enable(codec, substream->stream, 0);
2041 }
2042
2043 static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
2044 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2045 {
2046 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2047 struct snd_soc_device *socdev = rtd->socdev;
2048 struct snd_soc_codec *codec = socdev->card->codec;
2049 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2050 u8 old_mode, mode;
2051
2052 /* Enable voice digital filters */
2053 twl4030_voice_enable(codec, substream->stream, 1);
2054
2055 /* bit rate */
2056 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2057 & ~(TWL4030_CODECPDZ);
2058 mode = old_mode;
2059
2060 switch (params_rate(params)) {
2061 case 8000:
2062 mode &= ~(TWL4030_SEL_16K);
2063 break;
2064 case 16000:
2065 mode |= TWL4030_SEL_16K;
2066 break;
2067 default:
2068 printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
2069 params_rate(params));
2070 return -EINVAL;
2071 }
2072
2073 if (mode != old_mode) {
2074 if (twl4030->codec_powered) {
2075 /*
2076 * If the codec is powered, than we need to toggle the
2077 * codec power.
2078 */
2079 twl4030_codec_enable(codec, 0);
2080 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2081 twl4030_codec_enable(codec, 1);
2082 } else {
2083 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2084 }
2085 }
2086
2087 return 0;
2088 }
2089
2090 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2091 int clk_id, unsigned int freq, int dir)
2092 {
2093 struct snd_soc_codec *codec = codec_dai->codec;
2094 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2095
2096 if (freq != 26000000) {
2097 dev_err(codec->dev, "Unsupported APLL mclk: %u, the Voice"
2098 "interface needs 26MHz APLL mclk\n", freq);
2099 return -EINVAL;
2100 }
2101 if ((freq / 1000) != twl4030->sysclk) {
2102 dev_err(codec->dev,
2103 "Mismatch in APLL mclk: %u (configured: %u)\n",
2104 freq, twl4030->sysclk * 1000);
2105 return -EINVAL;
2106 }
2107 return 0;
2108 }
2109
2110 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2111 unsigned int fmt)
2112 {
2113 struct snd_soc_codec *codec = codec_dai->codec;
2114 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2115 u8 old_format, format;
2116
2117 /* get format */
2118 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2119 format = old_format;
2120
2121 /* set master/slave audio interface */
2122 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2123 case SND_SOC_DAIFMT_CBM_CFM:
2124 format &= ~(TWL4030_VIF_SLAVE_EN);
2125 break;
2126 case SND_SOC_DAIFMT_CBS_CFS:
2127 format |= TWL4030_VIF_SLAVE_EN;
2128 break;
2129 default:
2130 return -EINVAL;
2131 }
2132
2133 /* clock inversion */
2134 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2135 case SND_SOC_DAIFMT_IB_NF:
2136 format &= ~(TWL4030_VIF_FORMAT);
2137 break;
2138 case SND_SOC_DAIFMT_NB_IF:
2139 format |= TWL4030_VIF_FORMAT;
2140 break;
2141 default:
2142 return -EINVAL;
2143 }
2144
2145 if (format != old_format) {
2146 if (twl4030->codec_powered) {
2147 /*
2148 * If the codec is powered, than we need to toggle the
2149 * codec power.
2150 */
2151 twl4030_codec_enable(codec, 0);
2152 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2153 twl4030_codec_enable(codec, 1);
2154 } else {
2155 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2156 }
2157 }
2158
2159 return 0;
2160 }
2161
2162 static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2163 {
2164 struct snd_soc_codec *codec = dai->codec;
2165 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2166
2167 if (tristate)
2168 reg |= TWL4030_VIF_TRI_EN;
2169 else
2170 reg &= ~TWL4030_VIF_TRI_EN;
2171
2172 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2173 }
2174
2175 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
2176 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
2177
2178 static struct snd_soc_dai_ops twl4030_dai_ops = {
2179 .startup = twl4030_startup,
2180 .shutdown = twl4030_shutdown,
2181 .hw_params = twl4030_hw_params,
2182 .set_sysclk = twl4030_set_dai_sysclk,
2183 .set_fmt = twl4030_set_dai_fmt,
2184 .set_tristate = twl4030_set_tristate,
2185 };
2186
2187 static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2188 .startup = twl4030_voice_startup,
2189 .shutdown = twl4030_voice_shutdown,
2190 .hw_params = twl4030_voice_hw_params,
2191 .set_sysclk = twl4030_voice_set_dai_sysclk,
2192 .set_fmt = twl4030_voice_set_dai_fmt,
2193 .set_tristate = twl4030_voice_set_tristate,
2194 };
2195
2196 struct snd_soc_dai twl4030_dai[] = {
2197 {
2198 .name = "twl4030",
2199 .playback = {
2200 .stream_name = "HiFi Playback",
2201 .channels_min = 2,
2202 .channels_max = 4,
2203 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
2204 .formats = TWL4030_FORMATS,},
2205 .capture = {
2206 .stream_name = "Capture",
2207 .channels_min = 2,
2208 .channels_max = 4,
2209 .rates = TWL4030_RATES,
2210 .formats = TWL4030_FORMATS,},
2211 .ops = &twl4030_dai_ops,
2212 },
2213 {
2214 .name = "twl4030 Voice",
2215 .playback = {
2216 .stream_name = "Voice Playback",
2217 .channels_min = 1,
2218 .channels_max = 1,
2219 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2220 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2221 .capture = {
2222 .stream_name = "Capture",
2223 .channels_min = 1,
2224 .channels_max = 2,
2225 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2226 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2227 .ops = &twl4030_dai_voice_ops,
2228 },
2229 };
2230 EXPORT_SYMBOL_GPL(twl4030_dai);
2231
2232 static int twl4030_soc_suspend(struct platform_device *pdev, pm_message_t state)
2233 {
2234 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
2235 struct snd_soc_codec *codec = socdev->card->codec;
2236
2237 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2238
2239 return 0;
2240 }
2241
2242 static int twl4030_soc_resume(struct platform_device *pdev)
2243 {
2244 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
2245 struct snd_soc_codec *codec = socdev->card->codec;
2246
2247 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2248 return 0;
2249 }
2250
2251 static struct snd_soc_codec *twl4030_codec;
2252
2253 static int twl4030_soc_probe(struct platform_device *pdev)
2254 {
2255 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
2256 struct snd_soc_codec *codec;
2257 int ret;
2258
2259 BUG_ON(!twl4030_codec);
2260
2261 codec = twl4030_codec;
2262 socdev->card->codec = codec;
2263
2264 twl4030_init_chip(pdev);
2265
2266 /* register pcms */
2267 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
2268 if (ret < 0) {
2269 dev_err(&pdev->dev, "failed to create pcms\n");
2270 return ret;
2271 }
2272
2273 snd_soc_add_controls(codec, twl4030_snd_controls,
2274 ARRAY_SIZE(twl4030_snd_controls));
2275 twl4030_add_widgets(codec);
2276
2277 return 0;
2278 }
2279
2280 static int twl4030_soc_remove(struct platform_device *pdev)
2281 {
2282 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
2283 struct snd_soc_codec *codec = socdev->card->codec;
2284
2285 /* Reset registers to their chip default before leaving */
2286 twl4030_reset_registers(codec);
2287 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2288 snd_soc_free_pcms(socdev);
2289 snd_soc_dapm_free(socdev);
2290
2291 return 0;
2292 }
2293
2294 static int __devinit twl4030_codec_probe(struct platform_device *pdev)
2295 {
2296 struct twl4030_codec_audio_data *pdata = pdev->dev.platform_data;
2297 struct snd_soc_codec *codec;
2298 struct twl4030_priv *twl4030;
2299 int ret;
2300
2301 if (!pdata) {
2302 dev_err(&pdev->dev, "platform_data is missing\n");
2303 return -EINVAL;
2304 }
2305
2306 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
2307 if (twl4030 == NULL) {
2308 dev_err(&pdev->dev, "Can not allocate memroy\n");
2309 return -ENOMEM;
2310 }
2311
2312 codec = &twl4030->codec;
2313 snd_soc_codec_set_drvdata(codec, twl4030);
2314 codec->dev = &pdev->dev;
2315 twl4030_dai[0].dev = &pdev->dev;
2316 twl4030_dai[1].dev = &pdev->dev;
2317
2318 mutex_init(&codec->mutex);
2319 INIT_LIST_HEAD(&codec->dapm_widgets);
2320 INIT_LIST_HEAD(&codec->dapm_paths);
2321
2322 codec->name = "twl4030";
2323 codec->owner = THIS_MODULE;
2324 codec->read = twl4030_read_reg_cache;
2325 codec->write = twl4030_write;
2326 codec->set_bias_level = twl4030_set_bias_level;
2327 codec->idle_bias_off = 1;
2328 codec->dai = twl4030_dai;
2329 codec->num_dai = ARRAY_SIZE(twl4030_dai);
2330 codec->reg_cache_size = sizeof(twl4030_reg);
2331 codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
2332 GFP_KERNEL);
2333 if (codec->reg_cache == NULL) {
2334 ret = -ENOMEM;
2335 goto error_cache;
2336 }
2337
2338 platform_set_drvdata(pdev, twl4030);
2339 twl4030_codec = codec;
2340
2341 /* Set the defaults, and power up the codec */
2342 twl4030->sysclk = twl4030_codec_get_mclk() / 1000;
2343 codec->bias_level = SND_SOC_BIAS_OFF;
2344
2345 ret = snd_soc_register_codec(codec);
2346 if (ret != 0) {
2347 dev_err(codec->dev, "Failed to register codec: %d\n", ret);
2348 goto error_codec;
2349 }
2350
2351 ret = snd_soc_register_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2352 if (ret != 0) {
2353 dev_err(codec->dev, "Failed to register DAIs: %d\n", ret);
2354 snd_soc_unregister_codec(codec);
2355 goto error_codec;
2356 }
2357
2358 return 0;
2359
2360 error_codec:
2361 twl4030_codec_enable(codec, 0);
2362 kfree(codec->reg_cache);
2363 error_cache:
2364 kfree(twl4030);
2365 return ret;
2366 }
2367
2368 static int __devexit twl4030_codec_remove(struct platform_device *pdev)
2369 {
2370 struct twl4030_priv *twl4030 = platform_get_drvdata(pdev);
2371
2372 snd_soc_unregister_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2373 snd_soc_unregister_codec(&twl4030->codec);
2374 kfree(twl4030->codec.reg_cache);
2375 kfree(twl4030);
2376
2377 twl4030_codec = NULL;
2378 return 0;
2379 }
2380
2381 MODULE_ALIAS("platform:twl4030_codec_audio");
2382
2383 static struct platform_driver twl4030_codec_driver = {
2384 .probe = twl4030_codec_probe,
2385 .remove = __devexit_p(twl4030_codec_remove),
2386 .driver = {
2387 .name = "twl4030_codec_audio",
2388 .owner = THIS_MODULE,
2389 },
2390 };
2391
2392 static int __init twl4030_modinit(void)
2393 {
2394 return platform_driver_register(&twl4030_codec_driver);
2395 }
2396 module_init(twl4030_modinit);
2397
2398 static void __exit twl4030_exit(void)
2399 {
2400 platform_driver_unregister(&twl4030_codec_driver);
2401 }
2402 module_exit(twl4030_exit);
2403
2404 struct snd_soc_codec_device soc_codec_dev_twl4030 = {
2405 .probe = twl4030_soc_probe,
2406 .remove = twl4030_soc_remove,
2407 .suspend = twl4030_soc_suspend,
2408 .resume = twl4030_soc_resume,
2409 };
2410 EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
2411
2412 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2413 MODULE_AUTHOR("Steve Sakoman");
2414 MODULE_LICENSE("GPL");
Tomato firmware and modifications.