release/src-rt-6.x.4708/linux/linux-2.6.36/sound/pci/rme9652/hdsp.c

   1 /*
   2  *   ALSA driver for RME Hammerfall DSP audio interface(s)
   3  *
   4  *      Copyright (c) 2002  Paul Davis
   5  *                          Marcus Andersson
   6  *                          Thomas Charbonnel
   7  *
   8  *   This program is free software; you can redistribute it and/or modify
   9  *   it under the terms of the GNU General Public License as published by
  10  *   the Free Software Foundation; either version 2 of the License, or
  11  *   (at your option) any later version.
  12  *
  13  *   This program is distributed in the hope that it will be useful,
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *   GNU General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21  *
  22  */
  23
  24 #include <linux/init.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <linux/firmware.h>
  29 #include <linux/moduleparam.h>
  30 #include <linux/math64.h>
  31
  32 #include <sound/core.h>
  33 #include <sound/control.h>
  34 #include <sound/pcm.h>
  35 #include <sound/info.h>
  36 #include <sound/asoundef.h>
  37 #include <sound/rawmidi.h>
  38 #include <sound/hwdep.h>
  39 #include <sound/initval.h>
  40 #include <sound/hdsp.h>
  41
  42 #include <asm/byteorder.h>
  43 #include <asm/current.h>
  44 #include <asm/io.h>
  45
  46 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  47 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  48 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  49
  50 module_param_array(index, int, NULL, 0444);
  51 MODULE_PARM_DESC(index, "Index value for RME Hammerfall DSP interface.");
  52 module_param_array(id, charp, NULL, 0444);
  53 MODULE_PARM_DESC(id, "ID string for RME Hammerfall DSP interface.");
  54 module_param_array(enable, bool, NULL, 0444);
  55 MODULE_PARM_DESC(enable, "Enable/disable specific Hammerfall DSP soundcards.");
  56 MODULE_AUTHOR("Paul Davis <paul@linuxaudiosystems.com>, Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
  57 MODULE_DESCRIPTION("RME Hammerfall DSP");
  58 MODULE_LICENSE("GPL");
  59 MODULE_SUPPORTED_DEVICE("{{RME Hammerfall-DSP},"
  60                 "{RME HDSP-9652},"
  61                 "{RME HDSP-9632}}");
  62 #ifdef HDSP_FW_LOADER
  63 MODULE_FIRMWARE("multiface_firmware.bin");
  64 MODULE_FIRMWARE("multiface_firmware_rev11.bin");
  65 MODULE_FIRMWARE("digiface_firmware.bin");
  66 MODULE_FIRMWARE("digiface_firmware_rev11.bin");
  67 #endif
  68
  69 #define HDSP_MAX_CHANNELS        26
  70 #define HDSP_MAX_DS_CHANNELS     14
  71 #define HDSP_MAX_QS_CHANNELS     8
  72 #define DIGIFACE_SS_CHANNELS     26
  73 #define DIGIFACE_DS_CHANNELS     14
  74 #define MULTIFACE_SS_CHANNELS    18
  75 #define MULTIFACE_DS_CHANNELS    14
  76 #define H9652_SS_CHANNELS        26
  77 #define H9652_DS_CHANNELS        14
  78 /* This does not include possible Analog Extension Boards
  79    AEBs are detected at card initialization
  80 */
  81 #define H9632_SS_CHANNELS        12
  82 #define H9632_DS_CHANNELS        8
  83 #define H9632_QS_CHANNELS        4
  84
  85 /* Write registers. These are defined as byte-offsets from the iobase value.
  86  */
  87 #define HDSP_resetPointer               0
  88 #define HDSP_freqReg                    0
  89 #define HDSP_outputBufferAddress        32
  90 #define HDSP_inputBufferAddress         36
  91 #define HDSP_controlRegister            64
  92 #define HDSP_interruptConfirmation      96
  93 #define HDSP_outputEnable               128
  94 #define HDSP_control2Reg                256
  95 #define HDSP_midiDataOut0               352
  96 #define HDSP_midiDataOut1               356
  97 #define HDSP_fifoData                   368
  98 #define HDSP_inputEnable                384
  99
 100 /* Read registers. These are defined as byte-offsets from the iobase value
 101  */
 102
 103 #define HDSP_statusRegister    0
 104 #define HDSP_timecode        128
 105 #define HDSP_status2Register 192
 106 #define HDSP_midiDataIn0     360
 107 #define HDSP_midiDataIn1     364
 108 #define HDSP_midiStatusOut0  384
 109 #define HDSP_midiStatusOut1  388
 110 #define HDSP_midiStatusIn0   392
 111 #define HDSP_midiStatusIn1   396
 112 #define HDSP_fifoStatus      400
 113
 114 /* the meters are regular i/o-mapped registers, but offset
 115    considerably from the rest. the peak registers are reset
 116    when read; the least-significant 4 bits are full-scale counters;
 117    the actual peak value is in the most-significant 24 bits.
 118 */
 119
 120 #define HDSP_playbackPeakLevel  4096  /* 26 * 32 bit values */
 121 #define HDSP_inputPeakLevel     4224  /* 26 * 32 bit values */
 122 #define HDSP_outputPeakLevel    4352  /* (26+2) * 32 bit values */
 123 #define HDSP_playbackRmsLevel   4612  /* 26 * 64 bit values */
 124 #define HDSP_inputRmsLevel      4868  /* 26 * 64 bit values */
 125
 126
 127 /* This is for H9652 cards
 128    Peak values are read downward from the base
 129    Rms values are read upward
 130    There are rms values for the outputs too
 131    26*3 values are read in ss mode
 132    14*3 in ds mode, with no gap between values
 133 */
 134 #define HDSP_9652_peakBase      7164
 135 #define HDSP_9652_rmsBase       4096
 136
 137 /* c.f. the hdsp_9632_meters_t struct */
 138 #define HDSP_9632_metersBase    4096
 139
 140 #define HDSP_IO_EXTENT     7168
 141
 142 /* control2 register bits */
 143
 144 #define HDSP_TMS                0x01
 145 #define HDSP_TCK                0x02
 146 #define HDSP_TDI                0x04
 147 #define HDSP_JTAG               0x08
 148 #define HDSP_PWDN               0x10
 149 #define HDSP_PROGRAM            0x020
 150 #define HDSP_CONFIG_MODE_0      0x040
 151 #define HDSP_CONFIG_MODE_1      0x080
 152 #define HDSP_VERSION_BIT        0x100
 153 #define HDSP_BIGENDIAN_MODE     0x200
 154 #define HDSP_RD_MULTIPLE        0x400
 155 #define HDSP_9652_ENABLE_MIXER  0x800
 156 #define HDSP_TDO                0x10000000
 157
 158 #define HDSP_S_PROGRAM          (HDSP_PROGRAM|HDSP_CONFIG_MODE_0)
 159 #define HDSP_S_LOAD             (HDSP_PROGRAM|HDSP_CONFIG_MODE_1)
 160
 161 /* Control Register bits */
 162
 163 #define HDSP_Start                (1<<0)  /* start engine */
 164 #define HDSP_Latency0             (1<<1)  /* buffer size = 2^n where n is defined by Latency{2,1,0} */
 165 #define HDSP_Latency1             (1<<2)  /* [ see above ] */
 166 #define HDSP_Latency2             (1<<3)  /* [ see above ] */
 167 #define HDSP_ClockModeMaster      (1<<4)  /* 1=Master, 0=Slave/Autosync */
 168 #define HDSP_AudioInterruptEnable (1<<5)  /* what do you think ? */
 169 #define HDSP_Frequency0           (1<<6)  /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
 170 #define HDSP_Frequency1           (1<<7)  /* 0=32kHz/64kHz/128kHz */
 171 #define HDSP_DoubleSpeed          (1<<8)  /* 0=normal speed, 1=double speed */
 172 #define HDSP_SPDIFProfessional    (1<<9)  /* 0=consumer, 1=professional */
 173 #define HDSP_SPDIFEmphasis        (1<<10) /* 0=none, 1=on */
 174 #define HDSP_SPDIFNonAudio        (1<<11) /* 0=off, 1=on */
 175 #define HDSP_SPDIFOpticalOut      (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
 176 #define HDSP_SyncRef2             (1<<13)
 177 #define HDSP_SPDIFInputSelect0    (1<<14)
 178 #define HDSP_SPDIFInputSelect1    (1<<15)
 179 #define HDSP_SyncRef0             (1<<16)
 180 #define HDSP_SyncRef1             (1<<17)
 181 #define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
 182 #define HDSP_XLRBreakoutCable     (1<<20) /* For H9632 cards */
 183 #define HDSP_Midi0InterruptEnable (1<<22)
 184 #define HDSP_Midi1InterruptEnable (1<<23)
 185 #define HDSP_LineOut              (1<<24)
 186 #define HDSP_ADGain0              (1<<25) /* From here : H9632 specific */
 187 #define HDSP_ADGain1              (1<<26)
 188 #define HDSP_DAGain0              (1<<27)
 189 #define HDSP_DAGain1              (1<<28)
 190 #define HDSP_PhoneGain0           (1<<29)
 191 #define HDSP_PhoneGain1           (1<<30)
 192 #define HDSP_QuadSpeed            (1<<31)
 193
 194 #define HDSP_ADGainMask       (HDSP_ADGain0|HDSP_ADGain1)
 195 #define HDSP_ADGainMinus10dBV  HDSP_ADGainMask
 196 #define HDSP_ADGainPlus4dBu   (HDSP_ADGain0)
 197 #define HDSP_ADGainLowGain     0
 198
 199 #define HDSP_DAGainMask         (HDSP_DAGain0|HDSP_DAGain1)
 200 #define HDSP_DAGainHighGain      HDSP_DAGainMask
 201 #define HDSP_DAGainPlus4dBu     (HDSP_DAGain0)
 202 #define HDSP_DAGainMinus10dBV    0
 203
 204 #define HDSP_PhoneGainMask      (HDSP_PhoneGain0|HDSP_PhoneGain1)
 205 #define HDSP_PhoneGain0dB        HDSP_PhoneGainMask
 206 #define HDSP_PhoneGainMinus6dB  (HDSP_PhoneGain0)
 207 #define HDSP_PhoneGainMinus12dB  0
 208
 209 #define HDSP_LatencyMask    (HDSP_Latency0|HDSP_Latency1|HDSP_Latency2)
 210 #define HDSP_FrequencyMask  (HDSP_Frequency0|HDSP_Frequency1|HDSP_DoubleSpeed|HDSP_QuadSpeed)
 211
 212 #define HDSP_SPDIFInputMask    (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 213 #define HDSP_SPDIFInputADAT1    0
 214 #define HDSP_SPDIFInputCoaxial (HDSP_SPDIFInputSelect0)
 215 #define HDSP_SPDIFInputCdrom   (HDSP_SPDIFInputSelect1)
 216 #define HDSP_SPDIFInputAES     (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 217
 218 #define HDSP_SyncRefMask        (HDSP_SyncRef0|HDSP_SyncRef1|HDSP_SyncRef2)
 219 #define HDSP_SyncRef_ADAT1       0
 220 #define HDSP_SyncRef_ADAT2      (HDSP_SyncRef0)
 221 #define HDSP_SyncRef_ADAT3      (HDSP_SyncRef1)
 222 #define HDSP_SyncRef_SPDIF      (HDSP_SyncRef0|HDSP_SyncRef1)
 223 #define HDSP_SyncRef_WORD       (HDSP_SyncRef2)
 224 #define HDSP_SyncRef_ADAT_SYNC  (HDSP_SyncRef0|HDSP_SyncRef2)
 225
 226 /* Sample Clock Sources */
 227
 228 #define HDSP_CLOCK_SOURCE_AUTOSYNC           0
 229 #define HDSP_CLOCK_SOURCE_INTERNAL_32KHZ     1
 230 #define HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ   2
 231 #define HDSP_CLOCK_SOURCE_INTERNAL_48KHZ     3
 232 #define HDSP_CLOCK_SOURCE_INTERNAL_64KHZ     4
 233 #define HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ   5
 234 #define HDSP_CLOCK_SOURCE_INTERNAL_96KHZ     6
 235 #define HDSP_CLOCK_SOURCE_INTERNAL_128KHZ    7
 236 #define HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ  8
 237 #define HDSP_CLOCK_SOURCE_INTERNAL_192KHZ    9
 238
 239 /* Preferred sync reference choices - used by "pref_sync_ref" control switch */
 240
 241 #define HDSP_SYNC_FROM_WORD      0
 242 #define HDSP_SYNC_FROM_SPDIF     1
 243 #define HDSP_SYNC_FROM_ADAT1     2
 244 #define HDSP_SYNC_FROM_ADAT_SYNC 3
 245 #define HDSP_SYNC_FROM_ADAT2     4
 246 #define HDSP_SYNC_FROM_ADAT3     5
 247
 248 /* SyncCheck status */
 249
 250 #define HDSP_SYNC_CHECK_NO_LOCK 0
 251 #define HDSP_SYNC_CHECK_LOCK    1
 252 #define HDSP_SYNC_CHECK_SYNC    2
 253
 254 /* AutoSync references - used by "autosync_ref" control switch */
 255
 256 #define HDSP_AUTOSYNC_FROM_WORD      0
 257 #define HDSP_AUTOSYNC_FROM_ADAT_SYNC 1
 258 #define HDSP_AUTOSYNC_FROM_SPDIF     2
 259 #define HDSP_AUTOSYNC_FROM_NONE      3
 260 #define HDSP_AUTOSYNC_FROM_ADAT1     4
 261 #define HDSP_AUTOSYNC_FROM_ADAT2     5
 262 #define HDSP_AUTOSYNC_FROM_ADAT3     6
 263
 264 /* Possible sources of S/PDIF input */
 265
 266 #define HDSP_SPDIFIN_OPTICAL  0 /* optical  (ADAT1) */
 267 #define HDSP_SPDIFIN_COAXIAL  1 /* coaxial (RCA) */
 268 #define HDSP_SPDIFIN_INTERNAL 2 /* internal (CDROM) */
 269 #define HDSP_SPDIFIN_AES      3 /* xlr for H9632 (AES)*/
 270
 271 #define HDSP_Frequency32KHz    HDSP_Frequency0
 272 #define HDSP_Frequency44_1KHz  HDSP_Frequency1
 273 #define HDSP_Frequency48KHz    (HDSP_Frequency1|HDSP_Frequency0)
 274 #define HDSP_Frequency64KHz    (HDSP_DoubleSpeed|HDSP_Frequency0)
 275 #define HDSP_Frequency88_2KHz  (HDSP_DoubleSpeed|HDSP_Frequency1)
 276 #define HDSP_Frequency96KHz    (HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 277 /* For H9632 cards */
 278 #define HDSP_Frequency128KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency0)
 279 #define HDSP_Frequency176_4KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1)
 280 #define HDSP_Frequency192KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 281 /* RME says n = 104857600000000, but in the windows MADI driver, I see:
 282         return 104857600000000 / rate; // 100 MHz
 283         return 110100480000000 / rate; // 105 MHz
 284 */
 285 #define DDS_NUMERATOR 104857600000000ULL;  /*  =  2^20 * 10^8 */
 286
 287 #define hdsp_encode_latency(x)       (((x)<<1) & HDSP_LatencyMask)
 288 #define hdsp_decode_latency(x)       (((x) & HDSP_LatencyMask)>>1)
 289
 290 #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14)
 291 #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3)
 292
 293 /* Status Register bits */
 294
 295 #define HDSP_audioIRQPending    (1<<0)
 296 #define HDSP_Lock2              (1<<1)     /* this is for Digiface and H9652 */
 297 #define HDSP_spdifFrequency3    HDSP_Lock2 /* this is for H9632 only */
 298 #define HDSP_Lock1              (1<<2)
 299 #define HDSP_Lock0              (1<<3)
 300 #define HDSP_SPDIFSync          (1<<4)
 301 #define HDSP_TimecodeLock       (1<<5)
 302 #define HDSP_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
 303 #define HDSP_Sync2              (1<<16)
 304 #define HDSP_Sync1              (1<<17)
 305 #define HDSP_Sync0              (1<<18)
 306 #define HDSP_DoubleSpeedStatus  (1<<19)
 307 #define HDSP_ConfigError        (1<<20)
 308 #define HDSP_DllError           (1<<21)
 309 #define HDSP_spdifFrequency0    (1<<22)
 310 #define HDSP_spdifFrequency1    (1<<23)
 311 #define HDSP_spdifFrequency2    (1<<24)
 312 #define HDSP_SPDIFErrorFlag     (1<<25)
 313 #define HDSP_BufferID           (1<<26)
 314 #define HDSP_TimecodeSync       (1<<27)
 315 #define HDSP_AEBO               (1<<28) /* H9632 specific Analog Extension Boards */
 316 #define HDSP_AEBI               (1<<29) /* 0 = present, 1 = absent */
 317 #define HDSP_midi0IRQPending    (1<<30)
 318 #define HDSP_midi1IRQPending    (1<<31)
 319
 320 #define HDSP_spdifFrequencyMask    (HDSP_spdifFrequency0|HDSP_spdifFrequency1|HDSP_spdifFrequency2)
 321 #define HDSP_spdifFrequencyMask_9632 (HDSP_spdifFrequency0|\
 322                                       HDSP_spdifFrequency1|\
 323                                       HDSP_spdifFrequency2|\
 324                                       HDSP_spdifFrequency3)
 325
 326 #define HDSP_spdifFrequency32KHz   (HDSP_spdifFrequency0)
 327 #define HDSP_spdifFrequency44_1KHz (HDSP_spdifFrequency1)
 328 #define HDSP_spdifFrequency48KHz   (HDSP_spdifFrequency0|HDSP_spdifFrequency1)
 329
 330 #define HDSP_spdifFrequency64KHz   (HDSP_spdifFrequency2)
 331 #define HDSP_spdifFrequency88_2KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency2)
 332 #define HDSP_spdifFrequency96KHz   (HDSP_spdifFrequency2|HDSP_spdifFrequency1)
 333
 334 /* This is for H9632 cards */
 335 #define HDSP_spdifFrequency128KHz   (HDSP_spdifFrequency0|\
 336                                      HDSP_spdifFrequency1|\
 337                                      HDSP_spdifFrequency2)
 338 #define HDSP_spdifFrequency176_4KHz HDSP_spdifFrequency3
 339 #define HDSP_spdifFrequency192KHz   (HDSP_spdifFrequency3|HDSP_spdifFrequency0)
 340
 341 /* Status2 Register bits */
 342
 343 #define HDSP_version0     (1<<0)
 344 #define HDSP_version1     (1<<1)
 345 #define HDSP_version2     (1<<2)
 346 #define HDSP_wc_lock      (1<<3)
 347 #define HDSP_wc_sync      (1<<4)
 348 #define HDSP_inp_freq0    (1<<5)
 349 #define HDSP_inp_freq1    (1<<6)
 350 #define HDSP_inp_freq2    (1<<7)
 351 #define HDSP_SelSyncRef0  (1<<8)
 352 #define HDSP_SelSyncRef1  (1<<9)
 353 #define HDSP_SelSyncRef2  (1<<10)
 354
 355 #define HDSP_wc_valid (HDSP_wc_lock|HDSP_wc_sync)
 356
 357 #define HDSP_systemFrequencyMask (HDSP_inp_freq0|HDSP_inp_freq1|HDSP_inp_freq2)
 358 #define HDSP_systemFrequency32   (HDSP_inp_freq0)
 359 #define HDSP_systemFrequency44_1 (HDSP_inp_freq1)
 360 #define HDSP_systemFrequency48   (HDSP_inp_freq0|HDSP_inp_freq1)
 361 #define HDSP_systemFrequency64   (HDSP_inp_freq2)
 362 #define HDSP_systemFrequency88_2 (HDSP_inp_freq0|HDSP_inp_freq2)
 363 #define HDSP_systemFrequency96   (HDSP_inp_freq1|HDSP_inp_freq2)
 364
 365 #define HDSP_SelSyncRefMask        (HDSP_SelSyncRef0|HDSP_SelSyncRef1|HDSP_SelSyncRef2)
 366 #define HDSP_SelSyncRef_ADAT1      0
 367 #define HDSP_SelSyncRef_ADAT2      (HDSP_SelSyncRef0)
 368 #define HDSP_SelSyncRef_ADAT3      (HDSP_SelSyncRef1)
 369 #define HDSP_SelSyncRef_SPDIF      (HDSP_SelSyncRef0|HDSP_SelSyncRef1)
 370 #define HDSP_SelSyncRef_WORD       (HDSP_SelSyncRef2)
 371 #define HDSP_SelSyncRef_ADAT_SYNC  (HDSP_SelSyncRef0|HDSP_SelSyncRef2)
 372
 373 /* Card state flags */
 374
 375 #define HDSP_InitializationComplete  (1<<0)
 376 #define HDSP_FirmwareLoaded          (1<<1)
 377 #define HDSP_FirmwareCached          (1<<2)
 378
 379 /* FIFO wait times, defined in terms of 1/10ths of msecs */
 380
 381 #define HDSP_LONG_WAIT   5000
 382 #define HDSP_SHORT_WAIT  30
 383
 384 #define UNITY_GAIN                       32768
 385 #define MINUS_INFINITY_GAIN              0
 386
 387 /* the size of a substream (1 mono data stream) */
 388
 389 #define HDSP_CHANNEL_BUFFER_SAMPLES  (16*1024)
 390 #define HDSP_CHANNEL_BUFFER_BYTES    (4*HDSP_CHANNEL_BUFFER_SAMPLES)
 391
 392 /* the size of the area we need to allocate for DMA transfers. the
 393    size is the same regardless of the number of channels - the
 394    Multiface still uses the same memory area.
 395
 396    Note that we allocate 1 more channel than is apparently needed
 397    because the h/w seems to write 1 byte beyond the end of the last
 398    page. Sigh.
 399 */
 400
 401 #define HDSP_DMA_AREA_BYTES ((HDSP_MAX_CHANNELS+1) * HDSP_CHANNEL_BUFFER_BYTES)
 402 #define HDSP_DMA_AREA_KILOBYTES (HDSP_DMA_AREA_BYTES/1024)
 403
 404 /* use hotplug firmware loader? */
 405 #if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
 406 #if !defined(HDSP_USE_HWDEP_LOADER)
 407 #define HDSP_FW_LOADER
 408 #endif
 409 #endif
 410
 411 struct hdsp_9632_meters {
 412     u32 input_peak[16];
 413     u32 playback_peak[16];
 414     u32 output_peak[16];
 415     u32 xxx_peak[16];
 416     u32 padding[64];
 417     u32 input_rms_low[16];
 418     u32 playback_rms_low[16];
 419     u32 output_rms_low[16];
 420     u32 xxx_rms_low[16];
 421     u32 input_rms_high[16];
 422     u32 playback_rms_high[16];
 423     u32 output_rms_high[16];
 424     u32 xxx_rms_high[16];
 425 };
 426
 427 struct hdsp_midi {
 428     struct hdsp             *hdsp;
 429     int                      id;
 430     struct snd_rawmidi           *rmidi;
 431     struct snd_rawmidi_substream *input;
 432     struct snd_rawmidi_substream *output;
 433     char                     istimer; /* timer in use */
 434     struct timer_list        timer;
 435     spinlock_t               lock;
 436     int                      pending;
 437 };
 438
 439 struct hdsp {
 440         spinlock_t            lock;
 441         struct snd_pcm_substream *capture_substream;
 442         struct snd_pcm_substream *playback_substream;
 443         struct hdsp_midi      midi[2];
 444         struct tasklet_struct midi_tasklet;
 445         int                   use_midi_tasklet;
 446         int                   precise_ptr;
 447         u32                   control_register;      /* cached value */
 448         u32                   control2_register;     /* cached value */
 449         u32                   creg_spdif;
 450         u32                   creg_spdif_stream;
 451         int                   clock_source_locked;
 452         char                 *card_name;             /* digiface/multiface */
 453         enum HDSP_IO_Type     io_type;               /* ditto, but for code use */
 454         unsigned short        firmware_rev;
 455         unsigned short        state;                 /* stores state bits */
 456         u32                   firmware_cache[24413]; /* this helps recover from accidental iobox power failure */
 457         size_t                period_bytes;          /* guess what this is */
 458         unsigned char         max_channels;
 459         unsigned char         qs_in_channels;        /* quad speed mode for H9632 */
 460         unsigned char         ds_in_channels;
 461         unsigned char         ss_in_channels;       /* different for multiface/digiface */
 462         unsigned char         qs_out_channels;
 463         unsigned char         ds_out_channels;
 464         unsigned char         ss_out_channels;
 465
 466         struct snd_dma_buffer capture_dma_buf;
 467         struct snd_dma_buffer playback_dma_buf;
 468         unsigned char        *capture_buffer;       /* suitably aligned address */
 469         unsigned char        *playback_buffer;      /* suitably aligned address */
 470
 471         pid_t                 capture_pid;
 472         pid_t                 playback_pid;
 473         int                   running;
 474         int                   system_sample_rate;
 475         char                 *channel_map;
 476         int                   dev;
 477         int                   irq;
 478         unsigned long         port;
 479         void __iomem         *iobase;
 480         struct snd_card *card;
 481         struct snd_pcm *pcm;
 482         struct snd_hwdep          *hwdep;
 483         struct pci_dev       *pci;
 484         struct snd_kcontrol *spdif_ctl;
 485         unsigned short        mixer_matrix[HDSP_MATRIX_MIXER_SIZE];
 486         unsigned int          dds_value; /* last value written to freq register */
 487 };
 488
 489 /* These tables map the ALSA channels 1..N to the channels that we
 490    need to use in order to find the relevant channel buffer. RME
 491    refer to this kind of mapping as between "the ADAT channel and
 492    the DMA channel." We index it using the logical audio channel,
 493    and the value is the DMA channel (i.e. channel buffer number)
 494    where the data for that channel can be read/written from/to.
 495 */
 496
 497 static char channel_map_df_ss[HDSP_MAX_CHANNELS] = {
 498         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 499         18, 19, 20, 21, 22, 23, 24, 25
 500 };
 501
 502 static char channel_map_mf_ss[HDSP_MAX_CHANNELS] = { /* Multiface */
 503         /* Analog */
 504         0, 1, 2, 3, 4, 5, 6, 7,
 505         /* ADAT 2 */
 506         16, 17, 18, 19, 20, 21, 22, 23,
 507         /* SPDIF */
 508         24, 25,
 509         -1, -1, -1, -1, -1, -1, -1, -1
 510 };
 511
 512 static char channel_map_ds[HDSP_MAX_CHANNELS] = {
 513         /* ADAT channels are remapped */
 514         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 515         /* channels 12 and 13 are S/PDIF */
 516         24, 25,
 517         /* others don't exist */
 518         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 519 };
 520
 521 static char channel_map_H9632_ss[HDSP_MAX_CHANNELS] = {
 522         /* ADAT channels */
 523         0, 1, 2, 3, 4, 5, 6, 7,
 524         /* SPDIF */
 525         8, 9,
 526         /* Analog */
 527         10, 11,
 528         /* AO4S-192 and AI4S-192 extension boards */
 529         12, 13, 14, 15,
 530         /* others don't exist */
 531         -1, -1, -1, -1, -1, -1, -1, -1,
 532         -1, -1
 533 };
 534
 535 static char channel_map_H9632_ds[HDSP_MAX_CHANNELS] = {
 536         /* ADAT */
 537         1, 3, 5, 7,
 538         /* SPDIF */
 539         8, 9,
 540         /* Analog */
 541         10, 11,
 542         /* AO4S-192 and AI4S-192 extension boards */
 543         12, 13, 14, 15,
 544         /* others don't exist */
 545         -1, -1, -1, -1, -1, -1, -1, -1,
 546         -1, -1, -1, -1, -1, -1
 547 };
 548
 549 static char channel_map_H9632_qs[HDSP_MAX_CHANNELS] = {
 550         /* ADAT is disabled in this mode */
 551         /* SPDIF */
 552         8, 9,
 553         /* Analog */
 554         10, 11,
 555         /* AO4S-192 and AI4S-192 extension boards */
 556         12, 13, 14, 15,
 557         /* others don't exist */
 558         -1, -1, -1, -1, -1, -1, -1, -1,
 559         -1, -1, -1, -1, -1, -1, -1, -1,
 560         -1, -1
 561 };
 562
 563 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
 564 {
 565         dmab->dev.type = SNDRV_DMA_TYPE_DEV;
 566         dmab->dev.dev = snd_dma_pci_data(pci);
 567         if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
 568                 if (dmab->bytes >= size)
 569                         return 0;
 570         }
 571         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
 572                                 size, dmab) < 0)
 573                 return -ENOMEM;
 574         return 0;
 575 }
 576
 577 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
 578 {
 579         if (dmab->area) {
 580                 dmab->dev.dev = NULL; /* make it anonymous */
 581                 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
 582         }
 583 }
 584
 585
 586 static DEFINE_PCI_DEVICE_TABLE(snd_hdsp_ids) = {
 587         {
 588                 .vendor = PCI_VENDOR_ID_XILINX,
 589                 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP,
 590                 .subvendor = PCI_ANY_ID,
 591                 .subdevice = PCI_ANY_ID,
 592         }, /* RME Hammerfall-DSP */
 593         { 0, },
 594 };
 595
 596 MODULE_DEVICE_TABLE(pci, snd_hdsp_ids);
 597
 598 /* prototypes */
 599 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp);
 600 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp);
 601 static int snd_hdsp_enable_io (struct hdsp *hdsp);
 602 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp);
 603 static void snd_hdsp_initialize_channels (struct hdsp *hdsp);
 604 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout);
 605 static int hdsp_autosync_ref(struct hdsp *hdsp);
 606 static int snd_hdsp_set_defaults(struct hdsp *hdsp);
 607 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp);
 608
 609 static int hdsp_playback_to_output_key (struct hdsp *hdsp, int in, int out)
 610 {
 611         switch (hdsp->io_type) {
 612         case Multiface:
 613         case Digiface:
 614         default:
 615                 if (hdsp->firmware_rev == 0xa)
 616                         return (64 * out) + (32 + (in));
 617                 else
 618                         return (52 * out) + (26 + (in));
 619         case H9632:
 620                 return (32 * out) + (16 + (in));
 621         case H9652:
 622                 return (52 * out) + (26 + (in));
 623         }
 624 }
 625
 626 static int hdsp_input_to_output_key (struct hdsp *hdsp, int in, int out)
 627 {
 628         switch (hdsp->io_type) {
 629         case Multiface:
 630         case Digiface:
 631         default:
 632                 if (hdsp->firmware_rev == 0xa)
 633                         return (64 * out) + in;
 634                 else
 635                         return (52 * out) + in;
 636         case H9632:
 637                 return (32 * out) + in;
 638         case H9652:
 639                 return (52 * out) + in;
 640         }
 641 }
 642
 643 static void hdsp_write(struct hdsp *hdsp, int reg, int val)
 644 {
 645         writel(val, hdsp->iobase + reg);
 646 }
 647
 648 static unsigned int hdsp_read(struct hdsp *hdsp, int reg)
 649 {
 650         return readl (hdsp->iobase + reg);
 651 }
 652
 653 static int hdsp_check_for_iobox (struct hdsp *hdsp)
 654 {
 655         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0;
 656         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_ConfigError) {
 657                 snd_printk ("Hammerfall-DSP: no Digiface or Multiface connected!\n");
 658                 hdsp->state &= ~HDSP_FirmwareLoaded;
 659                 return -EIO;
 660         }
 661         return 0;
 662 }
 663
 664 static int hdsp_wait_for_iobox(struct hdsp *hdsp, unsigned int loops,
 665                                unsigned int delay)
 666 {
 667         unsigned int i;
 668
 669         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
 670                 return 0;
 671
 672         for (i = 0; i != loops; ++i) {
 673                 if (hdsp_read(hdsp, HDSP_statusRegister) & HDSP_ConfigError)
 674                         msleep(delay);
 675                 else {
 676                         snd_printd("Hammerfall-DSP: iobox found after %ums!\n",
 677                                    i * delay);
 678                         return 0;
 679                 }
 680         }
 681
 682         snd_printk("Hammerfall-DSP: no Digiface or Multiface connected!\n");
 683         hdsp->state &= ~HDSP_FirmwareLoaded;
 684         return -EIO;
 685 }
 686
 687 static int snd_hdsp_load_firmware_from_cache(struct hdsp *hdsp) {
 688
 689         int i;
 690         unsigned long flags;
 691
 692         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 693
 694                 snd_printk ("Hammerfall-DSP: loading firmware\n");
 695
 696                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM);
 697                 hdsp_write (hdsp, HDSP_fifoData, 0);
 698
 699                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
 700                         snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n");
 701                         return -EIO;
 702                 }
 703
 704                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 705
 706                 for (i = 0; i < 24413; ++i) {
 707                         hdsp_write(hdsp, HDSP_fifoData, hdsp->firmware_cache[i]);
 708                         if (hdsp_fifo_wait (hdsp, 127, HDSP_LONG_WAIT)) {
 709                                 snd_printk ("Hammerfall-DSP: timeout during firmware loading\n");
 710                                 return -EIO;
 711                         }
 712                 }
 713
 714                 ssleep(3);
 715
 716                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
 717                         snd_printk ("Hammerfall-DSP: timeout at end of firmware loading\n");
 718                         return -EIO;
 719                 }
 720
 721 #ifdef SNDRV_BIG_ENDIAN
 722                 hdsp->control2_register = HDSP_BIGENDIAN_MODE;
 723 #else
 724                 hdsp->control2_register = 0;
 725 #endif
 726                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
 727                 snd_printk ("Hammerfall-DSP: finished firmware loading\n");
 728
 729         }
 730         if (hdsp->state & HDSP_InitializationComplete) {
 731                 snd_printk(KERN_INFO "Hammerfall-DSP: firmware loaded from cache, restoring defaults\n");
 732                 spin_lock_irqsave(&hdsp->lock, flags);
 733                 snd_hdsp_set_defaults(hdsp);
 734                 spin_unlock_irqrestore(&hdsp->lock, flags);
 735         }
 736
 737         hdsp->state |= HDSP_FirmwareLoaded;
 738
 739         return 0;
 740 }
 741
 742 static int hdsp_get_iobox_version (struct hdsp *hdsp)
 743 {
 744         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 745
 746                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_PROGRAM);
 747                 hdsp_write (hdsp, HDSP_fifoData, 0);
 748                 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT) < 0)
 749                         return -EIO;
 750
 751                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 752                 hdsp_write (hdsp, HDSP_fifoData, 0);
 753
 754                 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT)) {
 755                         hdsp->io_type = Multiface;
 756                         hdsp_write (hdsp, HDSP_control2Reg, HDSP_VERSION_BIT);
 757                         hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 758                         hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT);
 759                 } else {
 760                         hdsp->io_type = Digiface;
 761                 }
 762         } else {
 763                 /* firmware was already loaded, get iobox type */
 764                 if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
 765                         hdsp->io_type = Multiface;
 766                 else
 767                         hdsp->io_type = Digiface;
 768         }
 769         return 0;
 770 }
 771
 772
 773 #ifdef HDSP_FW_LOADER
 774 static int hdsp_request_fw_loader(struct hdsp *hdsp);
 775 #endif
 776
 777 static int hdsp_check_for_firmware (struct hdsp *hdsp, int load_on_demand)
 778 {
 779         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
 780                 return 0;
 781         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 782                 hdsp->state &= ~HDSP_FirmwareLoaded;
 783                 if (! load_on_demand)
 784                         return -EIO;
 785                 snd_printk(KERN_ERR "Hammerfall-DSP: firmware not present.\n");
 786                 /* try to load firmware */
 787                 if (! (hdsp->state & HDSP_FirmwareCached)) {
 788 #ifdef HDSP_FW_LOADER
 789                         if (! hdsp_request_fw_loader(hdsp))
 790                                 return 0;
 791 #endif
 792                         snd_printk(KERN_ERR
 793                                    "Hammerfall-DSP: No firmware loaded nor "
 794                                    "cached, please upload firmware.\n");
 795                         return -EIO;
 796                 }
 797                 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
 798                         snd_printk(KERN_ERR
 799                                    "Hammerfall-DSP: Firmware loading from "
 800                                    "cache failed, please upload manually.\n");
 801                         return -EIO;
 802                 }
 803         }
 804         return 0;
 805 }
 806
 807
 808 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout)
 809 {
 810         int i;
 811
 812         /* the fifoStatus registers reports on how many words
 813            are available in the command FIFO.
 814         */
 815
 816         for (i = 0; i < timeout; i++) {
 817
 818                 if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count)
 819                         return 0;
 820
 821                 /* not very friendly, but we only do this during a firmware
 822                    load and changing the mixer, so we just put up with it.
 823                 */
 824
 825                 udelay (100);
 826         }
 827
 828         snd_printk ("Hammerfall-DSP: wait for FIFO status <= %d failed after %d iterations\n",
 829                     count, timeout);
 830         return -1;
 831 }
 832
 833 static int hdsp_read_gain (struct hdsp *hdsp, unsigned int addr)
 834 {
 835         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 836                 return 0;
 837
 838         return hdsp->mixer_matrix[addr];
 839 }
 840
 841 static int hdsp_write_gain(struct hdsp *hdsp, unsigned int addr, unsigned short data)
 842 {
 843         unsigned int ad;
 844
 845         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 846                 return -1;
 847
 848         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) {
 849
 850                 /* from martin bjornsen:
 851
 852                    "You can only write dwords to the
 853                    mixer memory which contain two
 854                    mixer values in the low and high
 855                    word. So if you want to change
 856                    value 0 you have to read value 1
 857                    from the cache and write both to
 858                    the first dword in the mixer
 859                    memory."
 860                 */
 861
 862                 if (hdsp->io_type == H9632 && addr >= 512)
 863                         return 0;
 864
 865                 if (hdsp->io_type == H9652 && addr >= 1352)
 866                         return 0;
 867
 868                 hdsp->mixer_matrix[addr] = data;
 869
 870
 871                 /* `addr' addresses a 16-bit wide address, but
 872                    the address space accessed via hdsp_write
 873                    uses byte offsets. put another way, addr
 874                    varies from 0 to 1351, but to access the
 875                    corresponding memory location, we need
 876                    to access 0 to 2703 ...
 877                 */
 878                 ad = addr/2;
 879
 880                 hdsp_write (hdsp, 4096 + (ad*4),
 881                             (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
 882                             hdsp->mixer_matrix[addr&0x7fe]);
 883
 884                 return 0;
 885
 886         } else {
 887
 888                 ad = (addr << 16) + data;
 889
 890                 if (hdsp_fifo_wait(hdsp, 127, HDSP_LONG_WAIT))
 891                         return -1;
 892
 893                 hdsp_write (hdsp, HDSP_fifoData, ad);
 894                 hdsp->mixer_matrix[addr] = data;
 895
 896         }
 897
 898         return 0;
 899 }
 900
 901 static int snd_hdsp_use_is_exclusive(struct hdsp *hdsp)
 902 {
 903         unsigned long flags;
 904         int ret = 1;
 905
 906         spin_lock_irqsave(&hdsp->lock, flags);
 907         if ((hdsp->playback_pid != hdsp->capture_pid) &&
 908             (hdsp->playback_pid >= 0) && (hdsp->capture_pid >= 0))
 909                 ret = 0;
 910         spin_unlock_irqrestore(&hdsp->lock, flags);
 911         return ret;
 912 }
 913
 914 static int hdsp_spdif_sample_rate(struct hdsp *hdsp)
 915 {
 916         unsigned int status = hdsp_read(hdsp, HDSP_statusRegister);
 917         unsigned int rate_bits = (status & HDSP_spdifFrequencyMask);
 918
 919         /* For the 9632, the mask is different */
 920         if (hdsp->io_type == H9632)
 921                  rate_bits = (status & HDSP_spdifFrequencyMask_9632);
 922
 923         if (status & HDSP_SPDIFErrorFlag)
 924                 return 0;
 925
 926         switch (rate_bits) {
 927         case HDSP_spdifFrequency32KHz: return 32000;
 928         case HDSP_spdifFrequency44_1KHz: return 44100;
 929         case HDSP_spdifFrequency48KHz: return 48000;
 930         case HDSP_spdifFrequency64KHz: return 64000;
 931         case HDSP_spdifFrequency88_2KHz: return 88200;
 932         case HDSP_spdifFrequency96KHz: return 96000;
 933         case HDSP_spdifFrequency128KHz:
 934                 if (hdsp->io_type == H9632) return 128000;
 935                 break;
 936         case HDSP_spdifFrequency176_4KHz:
 937                 if (hdsp->io_type == H9632) return 176400;
 938                 break;
 939         case HDSP_spdifFrequency192KHz:
 940                 if (hdsp->io_type == H9632) return 192000;
 941                 break;
 942         default:
 943                 break;
 944         }
 945         snd_printk ("Hammerfall-DSP: unknown spdif frequency status; bits = 0x%x, status = 0x%x\n", rate_bits, status);
 946         return 0;
 947 }
 948
 949 static int hdsp_external_sample_rate(struct hdsp *hdsp)
 950 {
 951         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
 952         unsigned int rate_bits = status2 & HDSP_systemFrequencyMask;
 953
 954         /* For the 9632 card, there seems to be no bit for indicating external
 955          * sample rate greater than 96kHz. The card reports the corresponding
 956          * single speed. So the best means seems to get spdif rate when
 957          * autosync reference is spdif */
 958         if (hdsp->io_type == H9632 &&
 959             hdsp_autosync_ref(hdsp) == HDSP_AUTOSYNC_FROM_SPDIF)
 960                  return hdsp_spdif_sample_rate(hdsp);
 961
 962         switch (rate_bits) {
 963         case HDSP_systemFrequency32:   return 32000;
 964         case HDSP_systemFrequency44_1: return 44100;
 965         case HDSP_systemFrequency48:   return 48000;
 966         case HDSP_systemFrequency64:   return 64000;
 967         case HDSP_systemFrequency88_2: return 88200;
 968         case HDSP_systemFrequency96:   return 96000;
 969         default:
 970                 return 0;
 971         }
 972 }
 973
 974 static void hdsp_compute_period_size(struct hdsp *hdsp)
 975 {
 976         hdsp->period_bytes = 1 << ((hdsp_decode_latency(hdsp->control_register) + 8));
 977 }
 978
 979 static snd_pcm_uframes_t hdsp_hw_pointer(struct hdsp *hdsp)
 980 {
 981         int position;
 982
 983         position = hdsp_read(hdsp, HDSP_statusRegister);
 984
 985         if (!hdsp->precise_ptr)
 986                 return (position & HDSP_BufferID) ? (hdsp->period_bytes / 4) : 0;
 987
 988         position &= HDSP_BufferPositionMask;
 989         position /= 4;
 990         position &= (hdsp->period_bytes/2) - 1;
 991         return position;
 992 }
 993
 994 static void hdsp_reset_hw_pointer(struct hdsp *hdsp)
 995 {
 996         hdsp_write (hdsp, HDSP_resetPointer, 0);
 997         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
 998                 /* HDSP_resetPointer = HDSP_freqReg, which is strange and
 999                  * requires (?) to write again DDS value after a reset pointer
1000                  * (at least, it works like this) */
1001                 hdsp_write (hdsp, HDSP_freqReg, hdsp->dds_value);
1002 }
1003
1004 static void hdsp_start_audio(struct hdsp *s)
1005 {
1006         s->control_register |= (HDSP_AudioInterruptEnable | HDSP_Start);
1007         hdsp_write(s, HDSP_controlRegister, s->control_register);
1008 }
1009
1010 static void hdsp_stop_audio(struct hdsp *s)
1011 {
1012         s->control_register &= ~(HDSP_Start | HDSP_AudioInterruptEnable);
1013         hdsp_write(s, HDSP_controlRegister, s->control_register);
1014 }
1015
1016 static void hdsp_silence_playback(struct hdsp *hdsp)
1017 {
1018         memset(hdsp->playback_buffer, 0, HDSP_DMA_AREA_BYTES);
1019 }
1020
1021 static int hdsp_set_interrupt_interval(struct hdsp *s, unsigned int frames)
1022 {
1023         int n;
1024
1025         spin_lock_irq(&s->lock);
1026
1027         frames >>= 7;
1028         n = 0;
1029         while (frames) {
1030                 n++;
1031                 frames >>= 1;
1032         }
1033
1034         s->control_register &= ~HDSP_LatencyMask;
1035         s->control_register |= hdsp_encode_latency(n);
1036
1037         hdsp_write(s, HDSP_controlRegister, s->control_register);
1038
1039         hdsp_compute_period_size(s);
1040
1041         spin_unlock_irq(&s->lock);
1042
1043         return 0;
1044 }
1045
1046 static void hdsp_set_dds_value(struct hdsp *hdsp, int rate)
1047 {
1048         u64 n;
1049
1050         if (rate >= 112000)
1051                 rate /= 4;
1052         else if (rate >= 56000)
1053                 rate /= 2;
1054
1055         n = DDS_NUMERATOR;
1056         n = div_u64(n, rate);
1057         /* n should be less than 2^32 for being written to FREQ register */
1058         snd_BUG_ON(n >> 32);
1059         /* HDSP_freqReg and HDSP_resetPointer are the same, so keep the DDS
1060            value to write it after a reset */
1061         hdsp->dds_value = n;
1062         hdsp_write(hdsp, HDSP_freqReg, hdsp->dds_value);
1063 }
1064
1065 static int hdsp_set_rate(struct hdsp *hdsp, int rate, int called_internally)
1066 {
1067         int reject_if_open = 0;
1068         int current_rate;
1069         int rate_bits;
1070
1071         /* ASSUMPTION: hdsp->lock is either held, or
1072            there is no need for it (e.g. during module
1073            initialization).
1074         */
1075
1076         if (!(hdsp->control_register & HDSP_ClockModeMaster)) {
1077                 if (called_internally) {
1078                         /* request from ctl or card initialization */
1079                         snd_printk(KERN_ERR "Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n");
1080                         return -1;
1081                 } else {
1082                         /* hw_param request while in AutoSync mode */
1083                         int external_freq = hdsp_external_sample_rate(hdsp);
1084                         int spdif_freq = hdsp_spdif_sample_rate(hdsp);
1085
1086                         if ((spdif_freq == external_freq*2) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1087                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in double speed mode\n");
1088                         else if (hdsp->io_type == H9632 && (spdif_freq == external_freq*4) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1089                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in quad speed mode\n");
1090                         else if (rate != external_freq) {
1091                                 snd_printk(KERN_INFO "Hammerfall-DSP: No AutoSync source for requested rate\n");
1092                                 return -1;
1093                         }
1094                 }
1095         }
1096
1097         current_rate = hdsp->system_sample_rate;
1098
1099         /* Changing from a "single speed" to a "double speed" rate is
1100            not allowed if any substreams are open. This is because
1101            such a change causes a shift in the location of
1102            the DMA buffers and a reduction in the number of available
1103            buffers.
1104
1105            Note that a similar but essentially insoluble problem
1106            exists for externally-driven rate changes. All we can do
1107            is to flag rate changes in the read/write routines.  */
1108
1109         if (rate > 96000 && hdsp->io_type != H9632)
1110                 return -EINVAL;
1111
1112         switch (rate) {
1113         case 32000:
1114                 if (current_rate > 48000)
1115                         reject_if_open = 1;
1116                 rate_bits = HDSP_Frequency32KHz;
1117                 break;
1118         case 44100:
1119                 if (current_rate > 48000)
1120                         reject_if_open = 1;
1121                 rate_bits = HDSP_Frequency44_1KHz;
1122                 break;
1123         case 48000:
1124                 if (current_rate > 48000)
1125                         reject_if_open = 1;
1126                 rate_bits = HDSP_Frequency48KHz;
1127                 break;
1128         case 64000:
1129                 if (current_rate <= 48000 || current_rate > 96000)
1130                         reject_if_open = 1;
1131                 rate_bits = HDSP_Frequency64KHz;
1132                 break;
1133         case 88200:
1134                 if (current_rate <= 48000 || current_rate > 96000)
1135                         reject_if_open = 1;
1136                 rate_bits = HDSP_Frequency88_2KHz;
1137                 break;
1138         case 96000:
1139                 if (current_rate <= 48000 || current_rate > 96000)
1140                         reject_if_open = 1;
1141                 rate_bits = HDSP_Frequency96KHz;
1142                 break;
1143         case 128000:
1144                 if (current_rate < 128000)
1145                         reject_if_open = 1;
1146                 rate_bits = HDSP_Frequency128KHz;
1147                 break;
1148         case 176400:
1149                 if (current_rate < 128000)
1150                         reject_if_open = 1;
1151                 rate_bits = HDSP_Frequency176_4KHz;
1152                 break;
1153         case 192000:
1154                 if (current_rate < 128000)
1155                         reject_if_open = 1;
1156                 rate_bits = HDSP_Frequency192KHz;
1157                 break;
1158         default:
1159                 return -EINVAL;
1160         }
1161
1162         if (reject_if_open && (hdsp->capture_pid >= 0 || hdsp->playback_pid >= 0)) {
1163                 snd_printk ("Hammerfall-DSP: cannot change speed mode (capture PID = %d, playback PID = %d)\n",
1164                             hdsp->capture_pid,
1165                             hdsp->playback_pid);
1166                 return -EBUSY;
1167         }
1168
1169         hdsp->control_register &= ~HDSP_FrequencyMask;
1170         hdsp->control_register |= rate_bits;
1171         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1172
1173         /* For HDSP9632 rev 152, need to set DDS value in FREQ register */
1174         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1175                 hdsp_set_dds_value(hdsp, rate);
1176
1177         if (rate >= 128000) {
1178                 hdsp->channel_map = channel_map_H9632_qs;
1179         } else if (rate > 48000) {
1180                 if (hdsp->io_type == H9632)
1181                         hdsp->channel_map = channel_map_H9632_ds;
1182                 else
1183                         hdsp->channel_map = channel_map_ds;
1184         } else {
1185                 switch (hdsp->io_type) {
1186                 case Multiface:
1187                         hdsp->channel_map = channel_map_mf_ss;
1188                         break;
1189                 case Digiface:
1190                 case H9652:
1191                         hdsp->channel_map = channel_map_df_ss;
1192                         break;
1193                 case H9632:
1194                         hdsp->channel_map = channel_map_H9632_ss;
1195                         break;
1196                 default:
1197                         /* should never happen */
1198                         break;
1199                 }
1200         }
1201
1202         hdsp->system_sample_rate = rate;
1203
1204         return 0;
1205 }
1206
1207 /*----------------------------------------------------------------------------
1208    MIDI
1209   ----------------------------------------------------------------------------*/
1210
1211 static unsigned char snd_hdsp_midi_read_byte (struct hdsp *hdsp, int id)
1212 {
1213         /* the hardware already does the relevant bit-mask with 0xff */
1214         if (id)
1215                 return hdsp_read(hdsp, HDSP_midiDataIn1);
1216         else
1217                 return hdsp_read(hdsp, HDSP_midiDataIn0);
1218 }
1219
1220 static void snd_hdsp_midi_write_byte (struct hdsp *hdsp, int id, int val)
1221 {
1222         /* the hardware already does the relevant bit-mask with 0xff */
1223         if (id)
1224                 hdsp_write(hdsp, HDSP_midiDataOut1, val);
1225         else
1226                 hdsp_write(hdsp, HDSP_midiDataOut0, val);
1227 }
1228
1229 static int snd_hdsp_midi_input_available (struct hdsp *hdsp, int id)
1230 {
1231         if (id)
1232                 return (hdsp_read(hdsp, HDSP_midiStatusIn1) & 0xff);
1233         else
1234                 return (hdsp_read(hdsp, HDSP_midiStatusIn0) & 0xff);
1235 }
1236
1237 static int snd_hdsp_midi_output_possible (struct hdsp *hdsp, int id)
1238 {
1239         int fifo_bytes_used;
1240
1241         if (id)
1242                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut1) & 0xff;
1243         else
1244                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut0) & 0xff;
1245
1246         if (fifo_bytes_used < 128)
1247                 return  128 - fifo_bytes_used;
1248         else
1249                 return 0;
1250 }
1251
1252 static void snd_hdsp_flush_midi_input (struct hdsp *hdsp, int id)
1253 {
1254         while (snd_hdsp_midi_input_available (hdsp, id))
1255                 snd_hdsp_midi_read_byte (hdsp, id);
1256 }
1257
1258 static int snd_hdsp_midi_output_write (struct hdsp_midi *hmidi)
1259 {
1260         unsigned long flags;
1261         int n_pending;
1262         int to_write;
1263         int i;
1264         unsigned char buf[128];
1265
1266         /* Output is not interrupt driven */
1267
1268         spin_lock_irqsave (&hmidi->lock, flags);
1269         if (hmidi->output) {
1270                 if (!snd_rawmidi_transmit_empty (hmidi->output)) {
1271                         if ((n_pending = snd_hdsp_midi_output_possible (hmidi->hdsp, hmidi->id)) > 0) {
1272                                 if (n_pending > (int)sizeof (buf))
1273                                         n_pending = sizeof (buf);
1274
1275                                 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) {
1276                                         for (i = 0; i < to_write; ++i)
1277                                                 snd_hdsp_midi_write_byte (hmidi->hdsp, hmidi->id, buf[i]);
1278                                 }
1279                         }
1280                 }
1281         }
1282         spin_unlock_irqrestore (&hmidi->lock, flags);
1283         return 0;
1284 }
1285
1286 static int snd_hdsp_midi_input_read (struct hdsp_midi *hmidi)
1287 {
1288         unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */
1289         unsigned long flags;
1290         int n_pending;
1291         int i;
1292
1293         spin_lock_irqsave (&hmidi->lock, flags);
1294         if ((n_pending = snd_hdsp_midi_input_available (hmidi->hdsp, hmidi->id)) > 0) {
1295                 if (hmidi->input) {
1296                         if (n_pending > (int)sizeof (buf))
1297                                 n_pending = sizeof (buf);
1298                         for (i = 0; i < n_pending; ++i)
1299                                 buf[i] = snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1300                         if (n_pending)
1301                                 snd_rawmidi_receive (hmidi->input, buf, n_pending);
1302                 } else {
1303                         /* flush the MIDI input FIFO */
1304                         while (--n_pending)
1305                                 snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1306                 }
1307         }
1308         hmidi->pending = 0;
1309         if (hmidi->id)
1310                 hmidi->hdsp->control_register |= HDSP_Midi1InterruptEnable;
1311         else
1312                 hmidi->hdsp->control_register |= HDSP_Midi0InterruptEnable;
1313         hdsp_write(hmidi->hdsp, HDSP_controlRegister, hmidi->hdsp->control_register);
1314         spin_unlock_irqrestore (&hmidi->lock, flags);
1315         return snd_hdsp_midi_output_write (hmidi);
1316 }
1317
1318 static void snd_hdsp_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1319 {
1320         struct hdsp *hdsp;
1321         struct hdsp_midi *hmidi;
1322         unsigned long flags;
1323         u32 ie;
1324
1325         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1326         hdsp = hmidi->hdsp;
1327         ie = hmidi->id ? HDSP_Midi1InterruptEnable : HDSP_Midi0InterruptEnable;
1328         spin_lock_irqsave (&hdsp->lock, flags);
1329         if (up) {
1330                 if (!(hdsp->control_register & ie)) {
1331                         snd_hdsp_flush_midi_input (hdsp, hmidi->id);
1332                         hdsp->control_register |= ie;
1333                 }
1334         } else {
1335                 hdsp->control_register &= ~ie;
1336                 tasklet_kill(&hdsp->midi_tasklet);
1337         }
1338
1339         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1340         spin_unlock_irqrestore (&hdsp->lock, flags);
1341 }
1342
1343 static void snd_hdsp_midi_output_timer(unsigned long data)
1344 {
1345         struct hdsp_midi *hmidi = (struct hdsp_midi *) data;
1346         unsigned long flags;
1347
1348         snd_hdsp_midi_output_write(hmidi);
1349         spin_lock_irqsave (&hmidi->lock, flags);
1350
1351         /* this does not bump hmidi->istimer, because the
1352            kernel automatically removed the timer when it
1353            expired, and we are now adding it back, thus
1354            leaving istimer wherever it was set before.
1355         */
1356
1357         if (hmidi->istimer) {
1358                 hmidi->timer.expires = 1 + jiffies;
1359                 add_timer(&hmidi->timer);
1360         }
1361
1362         spin_unlock_irqrestore (&hmidi->lock, flags);
1363 }
1364
1365 static void snd_hdsp_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1366 {
1367         struct hdsp_midi *hmidi;
1368         unsigned long flags;
1369
1370         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1371         spin_lock_irqsave (&hmidi->lock, flags);
1372         if (up) {
1373                 if (!hmidi->istimer) {
1374                         init_timer(&hmidi->timer);
1375                         hmidi->timer.function = snd_hdsp_midi_output_timer;
1376                         hmidi->timer.data = (unsigned long) hmidi;
1377                         hmidi->timer.expires = 1 + jiffies;
1378                         add_timer(&hmidi->timer);
1379                         hmidi->istimer++;
1380                 }
1381         } else {
1382                 if (hmidi->istimer && --hmidi->istimer <= 0)
1383                         del_timer (&hmidi->timer);
1384         }
1385         spin_unlock_irqrestore (&hmidi->lock, flags);
1386         if (up)
1387                 snd_hdsp_midi_output_write(hmidi);
1388 }
1389
1390 static int snd_hdsp_midi_input_open(struct snd_rawmidi_substream *substream)
1391 {
1392         struct hdsp_midi *hmidi;
1393
1394         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1395         spin_lock_irq (&hmidi->lock);
1396         snd_hdsp_flush_midi_input (hmidi->hdsp, hmidi->id);
1397         hmidi->input = substream;
1398         spin_unlock_irq (&hmidi->lock);
1399
1400         return 0;
1401 }
1402
1403 static int snd_hdsp_midi_output_open(struct snd_rawmidi_substream *substream)
1404 {
1405         struct hdsp_midi *hmidi;
1406
1407         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1408         spin_lock_irq (&hmidi->lock);
1409         hmidi->output = substream;
1410         spin_unlock_irq (&hmidi->lock);
1411
1412         return 0;
1413 }
1414
1415 static int snd_hdsp_midi_input_close(struct snd_rawmidi_substream *substream)
1416 {
1417         struct hdsp_midi *hmidi;
1418
1419         snd_hdsp_midi_input_trigger (substream, 0);
1420
1421         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1422         spin_lock_irq (&hmidi->lock);
1423         hmidi->input = NULL;
1424         spin_unlock_irq (&hmidi->lock);
1425
1426         return 0;
1427 }
1428
1429 static int snd_hdsp_midi_output_close(struct snd_rawmidi_substream *substream)
1430 {
1431         struct hdsp_midi *hmidi;
1432
1433         snd_hdsp_midi_output_trigger (substream, 0);
1434
1435         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1436         spin_lock_irq (&hmidi->lock);
1437         hmidi->output = NULL;
1438         spin_unlock_irq (&hmidi->lock);
1439
1440         return 0;
1441 }
1442
1443 static struct snd_rawmidi_ops snd_hdsp_midi_output =
1444 {
1445         .open =         snd_hdsp_midi_output_open,
1446         .close =        snd_hdsp_midi_output_close,
1447         .trigger =      snd_hdsp_midi_output_trigger,
1448 };
1449
1450 static struct snd_rawmidi_ops snd_hdsp_midi_input =
1451 {
1452         .open =         snd_hdsp_midi_input_open,
1453         .close =        snd_hdsp_midi_input_close,
1454         .trigger =      snd_hdsp_midi_input_trigger,
1455 };
1456
1457 static int snd_hdsp_create_midi (struct snd_card *card, struct hdsp *hdsp, int id)
1458 {
1459         char buf[32];
1460
1461         hdsp->midi[id].id = id;
1462         hdsp->midi[id].rmidi = NULL;
1463         hdsp->midi[id].input = NULL;
1464         hdsp->midi[id].output = NULL;
1465         hdsp->midi[id].hdsp = hdsp;
1466         hdsp->midi[id].istimer = 0;
1467         hdsp->midi[id].pending = 0;
1468         spin_lock_init (&hdsp->midi[id].lock);
1469
1470         sprintf (buf, "%s MIDI %d", card->shortname, id+1);
1471         if (snd_rawmidi_new (card, buf, id, 1, 1, &hdsp->midi[id].rmidi) < 0)
1472                 return -1;
1473
1474         sprintf(hdsp->midi[id].rmidi->name, "HDSP MIDI %d", id+1);
1475         hdsp->midi[id].rmidi->private_data = &hdsp->midi[id];
1476
1477         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdsp_midi_output);
1478         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdsp_midi_input);
1479
1480         hdsp->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1481                 SNDRV_RAWMIDI_INFO_INPUT |
1482                 SNDRV_RAWMIDI_INFO_DUPLEX;
1483
1484         return 0;
1485 }
1486
1487 /*-----------------------------------------------------------------------------
1488   Control Interface
1489   ----------------------------------------------------------------------------*/
1490
1491 static u32 snd_hdsp_convert_from_aes(struct snd_aes_iec958 *aes)
1492 {
1493         u32 val = 0;
1494         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? HDSP_SPDIFProfessional : 0;
1495         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? HDSP_SPDIFNonAudio : 0;
1496         if (val & HDSP_SPDIFProfessional)
1497                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1498         else
1499                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1500         return val;
1501 }
1502
1503 static void snd_hdsp_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
1504 {
1505         aes->status[0] = ((val & HDSP_SPDIFProfessional) ? IEC958_AES0_PROFESSIONAL : 0) |
1506                          ((val & HDSP_SPDIFNonAudio) ? IEC958_AES0_NONAUDIO : 0);
1507         if (val & HDSP_SPDIFProfessional)
1508                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1509         else
1510                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1511 }
1512
1513 static int snd_hdsp_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1514 {
1515         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1516         uinfo->count = 1;
1517         return 0;
1518 }
1519
1520 static int snd_hdsp_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1521 {
1522         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1523
1524         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif);
1525         return 0;
1526 }
1527
1528 static int snd_hdsp_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1529 {
1530         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1531         int change;
1532         u32 val;
1533
1534         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1535         spin_lock_irq(&hdsp->lock);
1536         change = val != hdsp->creg_spdif;
1537         hdsp->creg_spdif = val;
1538         spin_unlock_irq(&hdsp->lock);
1539         return change;
1540 }
1541
1542 static int snd_hdsp_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1543 {
1544         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1545         uinfo->count = 1;
1546         return 0;
1547 }
1548
1549 static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1550 {
1551         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1552
1553         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif_stream);
1554         return 0;
1555 }
1556
1557 static int snd_hdsp_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1558 {
1559         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1560         int change;
1561         u32 val;
1562
1563         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1564         spin_lock_irq(&hdsp->lock);
1565         change = val != hdsp->creg_spdif_stream;
1566         hdsp->creg_spdif_stream = val;
1567         hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
1568         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= val);
1569         spin_unlock_irq(&hdsp->lock);
1570         return change;
1571 }
1572
1573 static int snd_hdsp_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1574 {
1575         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1576         uinfo->count = 1;
1577         return 0;
1578 }
1579
1580 static int snd_hdsp_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1581 {
1582         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1583         return 0;
1584 }
1585
1586 #define HDSP_SPDIF_IN(xname, xindex) \
1587 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1588   .name = xname, \
1589   .index = xindex, \
1590   .info = snd_hdsp_info_spdif_in, \
1591   .get = snd_hdsp_get_spdif_in, \
1592   .put = snd_hdsp_put_spdif_in }
1593
1594 static unsigned int hdsp_spdif_in(struct hdsp *hdsp)
1595 {
1596         return hdsp_decode_spdif_in(hdsp->control_register & HDSP_SPDIFInputMask);
1597 }
1598
1599 static int hdsp_set_spdif_input(struct hdsp *hdsp, int in)
1600 {
1601         hdsp->control_register &= ~HDSP_SPDIFInputMask;
1602         hdsp->control_register |= hdsp_encode_spdif_in(in);
1603         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1604         return 0;
1605 }
1606
1607 static int snd_hdsp_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1608 {
1609         static char *texts[4] = {"Optical", "Coaxial", "Internal", "AES"};
1610         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1611
1612         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1613         uinfo->count = 1;
1614         uinfo->value.enumerated.items = ((hdsp->io_type == H9632) ? 4 : 3);
1615         if (uinfo->value.enumerated.item > ((hdsp->io_type == H9632) ? 3 : 2))
1616                 uinfo->value.enumerated.item = ((hdsp->io_type == H9632) ? 3 : 2);
1617         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1618         return 0;
1619 }
1620
1621 static int snd_hdsp_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1622 {
1623         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1624
1625         ucontrol->value.enumerated.item[0] = hdsp_spdif_in(hdsp);
1626         return 0;
1627 }
1628
1629 static int snd_hdsp_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1630 {
1631         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1632         int change;
1633         unsigned int val;
1634
1635         if (!snd_hdsp_use_is_exclusive(hdsp))
1636                 return -EBUSY;
1637         val = ucontrol->value.enumerated.item[0] % ((hdsp->io_type == H9632) ? 4 : 3);
1638         spin_lock_irq(&hdsp->lock);
1639         change = val != hdsp_spdif_in(hdsp);
1640         if (change)
1641                 hdsp_set_spdif_input(hdsp, val);
1642         spin_unlock_irq(&hdsp->lock);
1643         return change;
1644 }
1645
1646 #define HDSP_SPDIF_OUT(xname, xindex) \
1647 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1648   .info = snd_hdsp_info_spdif_bits, \
1649   .get = snd_hdsp_get_spdif_out, .put = snd_hdsp_put_spdif_out }
1650
1651 static int hdsp_spdif_out(struct hdsp *hdsp)
1652 {
1653         return (hdsp->control_register & HDSP_SPDIFOpticalOut) ? 1 : 0;
1654 }
1655
1656 static int hdsp_set_spdif_output(struct hdsp *hdsp, int out)
1657 {
1658         if (out)
1659                 hdsp->control_register |= HDSP_SPDIFOpticalOut;
1660         else
1661                 hdsp->control_register &= ~HDSP_SPDIFOpticalOut;
1662         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1663         return 0;
1664 }
1665
1666 #define snd_hdsp_info_spdif_bits        snd_ctl_boolean_mono_info
1667
1668 static int snd_hdsp_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1669 {
1670         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1671
1672         ucontrol->value.integer.value[0] = hdsp_spdif_out(hdsp);
1673         return 0;
1674 }
1675
1676 static int snd_hdsp_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1677 {
1678         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1679         int change;
1680         unsigned int val;
1681
1682         if (!snd_hdsp_use_is_exclusive(hdsp))
1683                 return -EBUSY;
1684         val = ucontrol->value.integer.value[0] & 1;
1685         spin_lock_irq(&hdsp->lock);
1686         change = (int)val != hdsp_spdif_out(hdsp);
1687         hdsp_set_spdif_output(hdsp, val);
1688         spin_unlock_irq(&hdsp->lock);
1689         return change;
1690 }
1691
1692 #define HDSP_SPDIF_PROFESSIONAL(xname, xindex) \
1693 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1694   .info = snd_hdsp_info_spdif_bits, \
1695   .get = snd_hdsp_get_spdif_professional, .put = snd_hdsp_put_spdif_professional }
1696
1697 static int hdsp_spdif_professional(struct hdsp *hdsp)
1698 {
1699         return (hdsp->control_register & HDSP_SPDIFProfessional) ? 1 : 0;
1700 }
1701
1702 static int hdsp_set_spdif_professional(struct hdsp *hdsp, int val)
1703 {
1704         if (val)
1705                 hdsp->control_register |= HDSP_SPDIFProfessional;
1706         else
1707                 hdsp->control_register &= ~HDSP_SPDIFProfessional;
1708         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1709         return 0;
1710 }
1711
1712 static int snd_hdsp_get_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1713 {
1714         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1715
1716         ucontrol->value.integer.value[0] = hdsp_spdif_professional(hdsp);
1717         return 0;
1718 }
1719
1720 static int snd_hdsp_put_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1721 {
1722         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1723         int change;
1724         unsigned int val;
1725
1726         if (!snd_hdsp_use_is_exclusive(hdsp))
1727                 return -EBUSY;
1728         val = ucontrol->value.integer.value[0] & 1;
1729         spin_lock_irq(&hdsp->lock);
1730         change = (int)val != hdsp_spdif_professional(hdsp);
1731         hdsp_set_spdif_professional(hdsp, val);
1732         spin_unlock_irq(&hdsp->lock);
1733         return change;
1734 }
1735
1736 #define HDSP_SPDIF_EMPHASIS(xname, xindex) \
1737 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1738   .info = snd_hdsp_info_spdif_bits, \
1739   .get = snd_hdsp_get_spdif_emphasis, .put = snd_hdsp_put_spdif_emphasis }
1740
1741 static int hdsp_spdif_emphasis(struct hdsp *hdsp)
1742 {
1743         return (hdsp->control_register & HDSP_SPDIFEmphasis) ? 1 : 0;
1744 }
1745
1746 static int hdsp_set_spdif_emphasis(struct hdsp *hdsp, int val)
1747 {
1748         if (val)
1749                 hdsp->control_register |= HDSP_SPDIFEmphasis;
1750         else
1751                 hdsp->control_register &= ~HDSP_SPDIFEmphasis;
1752         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1753         return 0;
1754 }
1755
1756 static int snd_hdsp_get_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1757 {
1758         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1759
1760         ucontrol->value.integer.value[0] = hdsp_spdif_emphasis(hdsp);
1761         return 0;
1762 }
1763
1764 static int snd_hdsp_put_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1765 {
1766         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1767         int change;
1768         unsigned int val;
1769
1770         if (!snd_hdsp_use_is_exclusive(hdsp))
1771                 return -EBUSY;
1772         val = ucontrol->value.integer.value[0] & 1;
1773         spin_lock_irq(&hdsp->lock);
1774         change = (int)val != hdsp_spdif_emphasis(hdsp);
1775         hdsp_set_spdif_emphasis(hdsp, val);
1776         spin_unlock_irq(&hdsp->lock);
1777         return change;
1778 }
1779
1780 #define HDSP_SPDIF_NON_AUDIO(xname, xindex) \
1781 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1782   .info = snd_hdsp_info_spdif_bits, \
1783   .get = snd_hdsp_get_spdif_nonaudio, .put = snd_hdsp_put_spdif_nonaudio }
1784
1785 static int hdsp_spdif_nonaudio(struct hdsp *hdsp)
1786 {
1787         return (hdsp->control_register & HDSP_SPDIFNonAudio) ? 1 : 0;
1788 }
1789
1790 static int hdsp_set_spdif_nonaudio(struct hdsp *hdsp, int val)
1791 {
1792         if (val)
1793                 hdsp->control_register |= HDSP_SPDIFNonAudio;
1794         else
1795                 hdsp->control_register &= ~HDSP_SPDIFNonAudio;
1796         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1797         return 0;
1798 }
1799
1800 static int snd_hdsp_get_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1801 {
1802         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1803
1804         ucontrol->value.integer.value[0] = hdsp_spdif_nonaudio(hdsp);
1805         return 0;
1806 }
1807
1808 static int snd_hdsp_put_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1809 {
1810         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1811         int change;
1812         unsigned int val;
1813
1814         if (!snd_hdsp_use_is_exclusive(hdsp))
1815                 return -EBUSY;
1816         val = ucontrol->value.integer.value[0] & 1;
1817         spin_lock_irq(&hdsp->lock);
1818         change = (int)val != hdsp_spdif_nonaudio(hdsp);
1819         hdsp_set_spdif_nonaudio(hdsp, val);
1820         spin_unlock_irq(&hdsp->lock);
1821         return change;
1822 }
1823
1824 #define HDSP_SPDIF_SAMPLE_RATE(xname, xindex) \
1825 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1826   .name = xname, \
1827   .index = xindex, \
1828   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1829   .info = snd_hdsp_info_spdif_sample_rate, \
1830   .get = snd_hdsp_get_spdif_sample_rate \
1831 }
1832
1833 static int snd_hdsp_info_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1834 {
1835         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1836         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1837
1838         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1839         uinfo->count = 1;
1840         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7;
1841         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1842                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1843         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1844         return 0;
1845 }
1846
1847 static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1848 {
1849         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1850
1851         switch (hdsp_spdif_sample_rate(hdsp)) {
1852         case 32000:
1853                 ucontrol->value.enumerated.item[0] = 0;
1854                 break;
1855         case 44100:
1856                 ucontrol->value.enumerated.item[0] = 1;
1857                 break;
1858         case 48000:
1859                 ucontrol->value.enumerated.item[0] = 2;
1860                 break;
1861         case 64000:
1862                 ucontrol->value.enumerated.item[0] = 3;
1863                 break;
1864         case 88200:
1865                 ucontrol->value.enumerated.item[0] = 4;
1866                 break;
1867         case 96000:
1868                 ucontrol->value.enumerated.item[0] = 5;
1869                 break;
1870         case 128000:
1871                 ucontrol->value.enumerated.item[0] = 7;
1872                 break;
1873         case 176400:
1874                 ucontrol->value.enumerated.item[0] = 8;
1875                 break;
1876         case 192000:
1877                 ucontrol->value.enumerated.item[0] = 9;
1878                 break;
1879         default:
1880                 ucontrol->value.enumerated.item[0] = 6;
1881         }
1882         return 0;
1883 }
1884
1885 #define HDSP_SYSTEM_SAMPLE_RATE(xname, xindex) \
1886 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1887   .name = xname, \
1888   .index = xindex, \
1889   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1890   .info = snd_hdsp_info_system_sample_rate, \
1891   .get = snd_hdsp_get_system_sample_rate \
1892 }
1893
1894 static int snd_hdsp_info_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1895 {
1896         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1897         uinfo->count = 1;
1898         return 0;
1899 }
1900
1901 static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1902 {
1903         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1904
1905         ucontrol->value.enumerated.item[0] = hdsp->system_sample_rate;
1906         return 0;
1907 }
1908
1909 #define HDSP_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1910 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1911   .name = xname, \
1912   .index = xindex, \
1913   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1914   .info = snd_hdsp_info_autosync_sample_rate, \
1915   .get = snd_hdsp_get_autosync_sample_rate \
1916 }
1917
1918 static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1919 {
1920         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1921         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1922         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1923         uinfo->count = 1;
1924         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7 ;
1925         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1926                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1927         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1928         return 0;
1929 }
1930
1931 static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1932 {
1933         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1934
1935         switch (hdsp_external_sample_rate(hdsp)) {
1936         case 32000:
1937                 ucontrol->value.enumerated.item[0] = 0;
1938                 break;
1939         case 44100:
1940                 ucontrol->value.enumerated.item[0] = 1;
1941                 break;
1942         case 48000:
1943                 ucontrol->value.enumerated.item[0] = 2;
1944                 break;
1945         case 64000:
1946                 ucontrol->value.enumerated.item[0] = 3;
1947                 break;
1948         case 88200:
1949                 ucontrol->value.enumerated.item[0] = 4;
1950                 break;
1951         case 96000:
1952                 ucontrol->value.enumerated.item[0] = 5;
1953                 break;
1954         case 128000:
1955                 ucontrol->value.enumerated.item[0] = 7;
1956                 break;
1957         case 176400:
1958                 ucontrol->value.enumerated.item[0] = 8;
1959                 break;
1960         case 192000:
1961                 ucontrol->value.enumerated.item[0] = 9;
1962                 break;
1963         default:
1964                 ucontrol->value.enumerated.item[0] = 6;
1965         }
1966         return 0;
1967 }
1968
1969 #define HDSP_SYSTEM_CLOCK_MODE(xname, xindex) \
1970 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1971   .name = xname, \
1972   .index = xindex, \
1973   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1974   .info = snd_hdsp_info_system_clock_mode, \
1975   .get = snd_hdsp_get_system_clock_mode \
1976 }
1977
1978 static int hdsp_system_clock_mode(struct hdsp *hdsp)
1979 {
1980         if (hdsp->control_register & HDSP_ClockModeMaster)
1981                 return 0;
1982         else if (hdsp_external_sample_rate(hdsp) != hdsp->system_sample_rate)
1983                         return 0;
1984         return 1;
1985 }
1986
1987 static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1988 {
1989         static char *texts[] = {"Master", "Slave" };
1990
1991         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1992         uinfo->count = 1;
1993         uinfo->value.enumerated.items = 2;
1994         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1995                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1996         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1997         return 0;
1998 }
1999
2000 static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2001 {
2002         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2003
2004         ucontrol->value.enumerated.item[0] = hdsp_system_clock_mode(hdsp);
2005         return 0;
2006 }
2007
2008 #define HDSP_CLOCK_SOURCE(xname, xindex) \
2009 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2010   .name = xname, \
2011   .index = xindex, \
2012   .info = snd_hdsp_info_clock_source, \
2013   .get = snd_hdsp_get_clock_source, \
2014   .put = snd_hdsp_put_clock_source \
2015 }
2016
2017 static int hdsp_clock_source(struct hdsp *hdsp)
2018 {
2019         if (hdsp->control_register & HDSP_ClockModeMaster) {
2020                 switch (hdsp->system_sample_rate) {
2021                 case 32000:
2022                         return 1;
2023                 case 44100:
2024                         return 2;
2025                 case 48000:
2026                         return 3;
2027                 case 64000:
2028                         return 4;
2029                 case 88200:
2030                         return 5;
2031                 case 96000:
2032                         return 6;
2033                 case 128000:
2034                         return 7;
2035                 case 176400:
2036                         return 8;
2037                 case 192000:
2038                         return 9;
2039                 default:
2040                         return 3;
2041                 }
2042         } else {
2043                 return 0;
2044         }
2045 }
2046
2047 static int hdsp_set_clock_source(struct hdsp *hdsp, int mode)
2048 {
2049         int rate;
2050         switch (mode) {
2051         case HDSP_CLOCK_SOURCE_AUTOSYNC:
2052                 if (hdsp_external_sample_rate(hdsp) != 0) {
2053                     if (!hdsp_set_rate(hdsp, hdsp_external_sample_rate(hdsp), 1)) {
2054                         hdsp->control_register &= ~HDSP_ClockModeMaster;
2055                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2056                         return 0;
2057                     }
2058                 }
2059                 return -1;
2060         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
2061                 rate = 32000;
2062                 break;
2063         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
2064                 rate = 44100;
2065                 break;
2066         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
2067                 rate = 48000;
2068                 break;
2069         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
2070                 rate = 64000;
2071                 break;
2072         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
2073                 rate = 88200;
2074                 break;
2075         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
2076                 rate = 96000;
2077                 break;
2078         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
2079                 rate = 128000;
2080                 break;
2081         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
2082                 rate = 176400;
2083                 break;
2084         case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
2085                 rate = 192000;
2086                 break;
2087         default:
2088                 rate = 48000;
2089         }
2090         hdsp->control_register |= HDSP_ClockModeMaster;
2091         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2092         hdsp_set_rate(hdsp, rate, 1);
2093         return 0;
2094 }
2095
2096 static int snd_hdsp_info_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2097 {
2098         static char *texts[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" };
2099         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2100
2101         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2102         uinfo->count = 1;
2103         if (hdsp->io_type == H9632)
2104             uinfo->value.enumerated.items = 10;
2105         else
2106             uinfo->value.enumerated.items = 7;
2107         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2108                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2109         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2110         return 0;
2111 }
2112
2113 static int snd_hdsp_get_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2114 {
2115         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2116
2117         ucontrol->value.enumerated.item[0] = hdsp_clock_source(hdsp);
2118         return 0;
2119 }
2120
2121 static int snd_hdsp_put_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2122 {
2123         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2124         int change;
2125         int val;
2126
2127         if (!snd_hdsp_use_is_exclusive(hdsp))
2128                 return -EBUSY;
2129         val = ucontrol->value.enumerated.item[0];
2130         if (val < 0) val = 0;
2131         if (hdsp->io_type == H9632) {
2132                 if (val > 9)
2133                         val = 9;
2134         } else {
2135                 if (val > 6)
2136                         val = 6;
2137         }
2138         spin_lock_irq(&hdsp->lock);
2139         if (val != hdsp_clock_source(hdsp))
2140                 change = (hdsp_set_clock_source(hdsp, val) == 0) ? 1 : 0;
2141         else
2142                 change = 0;
2143         spin_unlock_irq(&hdsp->lock);
2144         return change;
2145 }
2146
2147 #define snd_hdsp_info_clock_source_lock         snd_ctl_boolean_mono_info
2148
2149 static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2150 {
2151         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2152
2153         ucontrol->value.integer.value[0] = hdsp->clock_source_locked;
2154         return 0;
2155 }
2156
2157 static int snd_hdsp_put_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2158 {
2159         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2160         int change;
2161
2162         change = (int)ucontrol->value.integer.value[0] != hdsp->clock_source_locked;
2163         if (change)
2164                 hdsp->clock_source_locked = !!ucontrol->value.integer.value[0];
2165         return change;
2166 }
2167
2168 #define HDSP_DA_GAIN(xname, xindex) \
2169 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2170   .name = xname, \
2171   .index = xindex, \
2172   .info = snd_hdsp_info_da_gain, \
2173   .get = snd_hdsp_get_da_gain, \
2174   .put = snd_hdsp_put_da_gain \
2175 }
2176
2177 static int hdsp_da_gain(struct hdsp *hdsp)
2178 {
2179         switch (hdsp->control_register & HDSP_DAGainMask) {
2180         case HDSP_DAGainHighGain:
2181                 return 0;
2182         case HDSP_DAGainPlus4dBu:
2183                 return 1;
2184         case HDSP_DAGainMinus10dBV:
2185                 return 2;
2186         default:
2187                 return 1;
2188         }
2189 }
2190
2191 static int hdsp_set_da_gain(struct hdsp *hdsp, int mode)
2192 {
2193         hdsp->control_register &= ~HDSP_DAGainMask;
2194         switch (mode) {
2195         case 0:
2196                 hdsp->control_register |= HDSP_DAGainHighGain;
2197                 break;
2198         case 1:
2199                 hdsp->control_register |= HDSP_DAGainPlus4dBu;
2200                 break;
2201         case 2:
2202                 hdsp->control_register |= HDSP_DAGainMinus10dBV;
2203                 break;
2204         default:
2205                 return -1;
2206
2207         }
2208         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2209         return 0;
2210 }
2211
2212 static int snd_hdsp_info_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2213 {
2214         static char *texts[] = {"Hi Gain", "+4 dBu", "-10 dbV"};
2215
2216         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2217         uinfo->count = 1;
2218         uinfo->value.enumerated.items = 3;
2219         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2220                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2221         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2222         return 0;
2223 }
2224
2225 static int snd_hdsp_get_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2226 {
2227         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2228
2229         ucontrol->value.enumerated.item[0] = hdsp_da_gain(hdsp);
2230         return 0;
2231 }
2232
2233 static int snd_hdsp_put_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2234 {
2235         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2236         int change;
2237         int val;
2238
2239         if (!snd_hdsp_use_is_exclusive(hdsp))
2240                 return -EBUSY;
2241         val = ucontrol->value.enumerated.item[0];
2242         if (val < 0) val = 0;
2243         if (val > 2) val = 2;
2244         spin_lock_irq(&hdsp->lock);
2245         if (val != hdsp_da_gain(hdsp))
2246                 change = (hdsp_set_da_gain(hdsp, val) == 0) ? 1 : 0;
2247         else
2248                 change = 0;
2249         spin_unlock_irq(&hdsp->lock);
2250         return change;
2251 }
2252
2253 #define HDSP_AD_GAIN(xname, xindex) \
2254 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2255   .name = xname, \
2256   .index = xindex, \
2257   .info = snd_hdsp_info_ad_gain, \
2258   .get = snd_hdsp_get_ad_gain, \
2259   .put = snd_hdsp_put_ad_gain \
2260 }
2261
2262 static int hdsp_ad_gain(struct hdsp *hdsp)
2263 {
2264         switch (hdsp->control_register & HDSP_ADGainMask) {
2265         case HDSP_ADGainMinus10dBV:
2266                 return 0;
2267         case HDSP_ADGainPlus4dBu:
2268                 return 1;
2269         case HDSP_ADGainLowGain:
2270                 return 2;
2271         default:
2272                 return 1;
2273         }
2274 }
2275
2276 static int hdsp_set_ad_gain(struct hdsp *hdsp, int mode)
2277 {
2278         hdsp->control_register &= ~HDSP_ADGainMask;
2279         switch (mode) {
2280         case 0:
2281                 hdsp->control_register |= HDSP_ADGainMinus10dBV;
2282                 break;
2283         case 1:
2284                 hdsp->control_register |= HDSP_ADGainPlus4dBu;
2285                 break;
2286         case 2:
2287                 hdsp->control_register |= HDSP_ADGainLowGain;
2288                 break;
2289         default:
2290                 return -1;
2291
2292         }
2293         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2294         return 0;
2295 }
2296
2297 static int snd_hdsp_info_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2298 {
2299         static char *texts[] = {"-10 dBV", "+4 dBu", "Lo Gain"};
2300
2301         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2302         uinfo->count = 1;
2303         uinfo->value.enumerated.items = 3;
2304         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2305                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2306         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2307         return 0;
2308 }
2309
2310 static int snd_hdsp_get_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2311 {
2312         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2313
2314         ucontrol->value.enumerated.item[0] = hdsp_ad_gain(hdsp);
2315         return 0;
2316 }
2317
2318 static int snd_hdsp_put_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2319 {
2320         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2321         int change;
2322         int val;
2323
2324         if (!snd_hdsp_use_is_exclusive(hdsp))
2325                 return -EBUSY;
2326         val = ucontrol->value.enumerated.item[0];
2327         if (val < 0) val = 0;
2328         if (val > 2) val = 2;
2329         spin_lock_irq(&hdsp->lock);
2330         if (val != hdsp_ad_gain(hdsp))
2331                 change = (hdsp_set_ad_gain(hdsp, val) == 0) ? 1 : 0;
2332         else
2333                 change = 0;
2334         spin_unlock_irq(&hdsp->lock);
2335         return change;
2336 }
2337
2338 #define HDSP_PHONE_GAIN(xname, xindex) \
2339 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2340   .name = xname, \
2341   .index = xindex, \
2342   .info = snd_hdsp_info_phone_gain, \
2343   .get = snd_hdsp_get_phone_gain, \
2344   .put = snd_hdsp_put_phone_gain \
2345 }
2346
2347 static int hdsp_phone_gain(struct hdsp *hdsp)
2348 {
2349         switch (hdsp->control_register & HDSP_PhoneGainMask) {
2350         case HDSP_PhoneGain0dB:
2351                 return 0;
2352         case HDSP_PhoneGainMinus6dB:
2353                 return 1;
2354         case HDSP_PhoneGainMinus12dB:
2355                 return 2;
2356         default:
2357                 return 0;
2358         }
2359 }
2360
2361 static int hdsp_set_phone_gain(struct hdsp *hdsp, int mode)
2362 {
2363         hdsp->control_register &= ~HDSP_PhoneGainMask;
2364         switch (mode) {
2365         case 0:
2366                 hdsp->control_register |= HDSP_PhoneGain0dB;
2367                 break;
2368         case 1:
2369                 hdsp->control_register |= HDSP_PhoneGainMinus6dB;
2370                 break;
2371         case 2:
2372                 hdsp->control_register |= HDSP_PhoneGainMinus12dB;
2373                 break;
2374         default:
2375                 return -1;
2376
2377         }
2378         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2379         return 0;
2380 }
2381
2382 static int snd_hdsp_info_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2383 {
2384         static char *texts[] = {"0 dB", "-6 dB", "-12 dB"};
2385
2386         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2387         uinfo->count = 1;
2388         uinfo->value.enumerated.items = 3;
2389         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2390                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2391         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2392         return 0;
2393 }
2394
2395 static int snd_hdsp_get_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2396 {
2397         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2398
2399         ucontrol->value.enumerated.item[0] = hdsp_phone_gain(hdsp);
2400         return 0;
2401 }
2402
2403 static int snd_hdsp_put_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2404 {
2405         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2406         int change;
2407         int val;
2408
2409         if (!snd_hdsp_use_is_exclusive(hdsp))
2410                 return -EBUSY;
2411         val = ucontrol->value.enumerated.item[0];
2412         if (val < 0) val = 0;
2413         if (val > 2) val = 2;
2414         spin_lock_irq(&hdsp->lock);
2415         if (val != hdsp_phone_gain(hdsp))
2416                 change = (hdsp_set_phone_gain(hdsp, val) == 0) ? 1 : 0;
2417         else
2418                 change = 0;
2419         spin_unlock_irq(&hdsp->lock);
2420         return change;
2421 }
2422
2423 #define HDSP_XLR_BREAKOUT_CABLE(xname, xindex) \
2424 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2425   .name = xname, \
2426   .index = xindex, \
2427   .info = snd_hdsp_info_xlr_breakout_cable, \
2428   .get = snd_hdsp_get_xlr_breakout_cable, \
2429   .put = snd_hdsp_put_xlr_breakout_cable \
2430 }
2431
2432 static int hdsp_xlr_breakout_cable(struct hdsp *hdsp)
2433 {
2434         if (hdsp->control_register & HDSP_XLRBreakoutCable)
2435                 return 1;
2436         return 0;
2437 }
2438
2439 static int hdsp_set_xlr_breakout_cable(struct hdsp *hdsp, int mode)
2440 {
2441         if (mode)
2442                 hdsp->control_register |= HDSP_XLRBreakoutCable;
2443         else
2444                 hdsp->control_register &= ~HDSP_XLRBreakoutCable;
2445         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2446         return 0;
2447 }
2448
2449 #define snd_hdsp_info_xlr_breakout_cable        snd_ctl_boolean_mono_info
2450
2451 static int snd_hdsp_get_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2452 {
2453         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2454
2455         ucontrol->value.enumerated.item[0] = hdsp_xlr_breakout_cable(hdsp);
2456         return 0;
2457 }
2458
2459 static int snd_hdsp_put_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2460 {
2461         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2462         int change;
2463         int val;
2464
2465         if (!snd_hdsp_use_is_exclusive(hdsp))
2466                 return -EBUSY;
2467         val = ucontrol->value.integer.value[0] & 1;
2468         spin_lock_irq(&hdsp->lock);
2469         change = (int)val != hdsp_xlr_breakout_cable(hdsp);
2470         hdsp_set_xlr_breakout_cable(hdsp, val);
2471         spin_unlock_irq(&hdsp->lock);
2472         return change;
2473 }
2474
2475 /* (De)activates old RME Analog Extension Board
2476    These are connected to the internal ADAT connector
2477    Switching this on desactivates external ADAT
2478 */
2479 #define HDSP_AEB(xname, xindex) \
2480 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2481   .name = xname, \
2482   .index = xindex, \
2483   .info = snd_hdsp_info_aeb, \
2484   .get = snd_hdsp_get_aeb, \
2485   .put = snd_hdsp_put_aeb \
2486 }
2487
2488 static int hdsp_aeb(struct hdsp *hdsp)
2489 {
2490         if (hdsp->control_register & HDSP_AnalogExtensionBoard)
2491                 return 1;
2492         return 0;
2493 }
2494
2495 static int hdsp_set_aeb(struct hdsp *hdsp, int mode)
2496 {
2497         if (mode)
2498                 hdsp->control_register |= HDSP_AnalogExtensionBoard;
2499         else
2500                 hdsp->control_register &= ~HDSP_AnalogExtensionBoard;
2501         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2502         return 0;
2503 }
2504
2505 #define snd_hdsp_info_aeb               snd_ctl_boolean_mono_info
2506
2507 static int snd_hdsp_get_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2508 {
2509         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2510
2511         ucontrol->value.enumerated.item[0] = hdsp_aeb(hdsp);
2512         return 0;
2513 }
2514
2515 static int snd_hdsp_put_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2516 {
2517         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2518         int change;
2519         int val;
2520
2521         if (!snd_hdsp_use_is_exclusive(hdsp))
2522                 return -EBUSY;
2523         val = ucontrol->value.integer.value[0] & 1;
2524         spin_lock_irq(&hdsp->lock);
2525         change = (int)val != hdsp_aeb(hdsp);
2526         hdsp_set_aeb(hdsp, val);
2527         spin_unlock_irq(&hdsp->lock);
2528         return change;
2529 }
2530
2531 #define HDSP_PREF_SYNC_REF(xname, xindex) \
2532 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2533   .name = xname, \
2534   .index = xindex, \
2535   .info = snd_hdsp_info_pref_sync_ref, \
2536   .get = snd_hdsp_get_pref_sync_ref, \
2537   .put = snd_hdsp_put_pref_sync_ref \
2538 }
2539
2540 static int hdsp_pref_sync_ref(struct hdsp *hdsp)
2541 {
2542         /* Notice that this looks at the requested sync source,
2543            not the one actually in use.
2544         */
2545
2546         switch (hdsp->control_register & HDSP_SyncRefMask) {
2547         case HDSP_SyncRef_ADAT1:
2548                 return HDSP_SYNC_FROM_ADAT1;
2549         case HDSP_SyncRef_ADAT2:
2550                 return HDSP_SYNC_FROM_ADAT2;
2551         case HDSP_SyncRef_ADAT3:
2552                 return HDSP_SYNC_FROM_ADAT3;
2553         case HDSP_SyncRef_SPDIF:
2554                 return HDSP_SYNC_FROM_SPDIF;
2555         case HDSP_SyncRef_WORD:
2556                 return HDSP_SYNC_FROM_WORD;
2557         case HDSP_SyncRef_ADAT_SYNC:
2558                 return HDSP_SYNC_FROM_ADAT_SYNC;
2559         default:
2560                 return HDSP_SYNC_FROM_WORD;
2561         }
2562         return 0;
2563 }
2564
2565 static int hdsp_set_pref_sync_ref(struct hdsp *hdsp, int pref)
2566 {
2567         hdsp->control_register &= ~HDSP_SyncRefMask;
2568         switch (pref) {
2569         case HDSP_SYNC_FROM_ADAT1:
2570                 hdsp->control_register &= ~HDSP_SyncRefMask; /* clear SyncRef bits */
2571                 break;
2572         case HDSP_SYNC_FROM_ADAT2:
2573                 hdsp->control_register |= HDSP_SyncRef_ADAT2;
2574                 break;
2575         case HDSP_SYNC_FROM_ADAT3:
2576                 hdsp->control_register |= HDSP_SyncRef_ADAT3;
2577                 break;
2578         case HDSP_SYNC_FROM_SPDIF:
2579                 hdsp->control_register |= HDSP_SyncRef_SPDIF;
2580                 break;
2581         case HDSP_SYNC_FROM_WORD:
2582                 hdsp->control_register |= HDSP_SyncRef_WORD;
2583                 break;
2584         case HDSP_SYNC_FROM_ADAT_SYNC:
2585                 hdsp->control_register |= HDSP_SyncRef_ADAT_SYNC;
2586                 break;
2587         default:
2588                 return -1;
2589         }
2590         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2591         return 0;
2592 }
2593
2594 static int snd_hdsp_info_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2595 {
2596         static char *texts[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" };
2597         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2598
2599         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2600         uinfo->count = 1;
2601
2602         switch (hdsp->io_type) {
2603         case Digiface:
2604         case H9652:
2605                 uinfo->value.enumerated.items = 6;
2606                 break;
2607         case Multiface:
2608                 uinfo->value.enumerated.items = 4;
2609                 break;
2610         case H9632:
2611                 uinfo->value.enumerated.items = 3;
2612                 break;
2613         default:
2614                 uinfo->value.enumerated.items = 0;
2615                 break;
2616         }
2617
2618         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2619                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2620         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2621         return 0;
2622 }
2623
2624 static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2625 {
2626         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2627
2628         ucontrol->value.enumerated.item[0] = hdsp_pref_sync_ref(hdsp);
2629         return 0;
2630 }
2631
2632 static int snd_hdsp_put_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2633 {
2634         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2635         int change, max;
2636         unsigned int val;
2637
2638         if (!snd_hdsp_use_is_exclusive(hdsp))
2639                 return -EBUSY;
2640
2641         switch (hdsp->io_type) {
2642         case Digiface:
2643         case H9652:
2644                 max = 6;
2645                 break;
2646         case Multiface:
2647                 max = 4;
2648                 break;
2649         case H9632:
2650                 max = 3;
2651                 break;
2652         default:
2653                 return -EIO;
2654         }
2655
2656         val = ucontrol->value.enumerated.item[0] % max;
2657         spin_lock_irq(&hdsp->lock);
2658         change = (int)val != hdsp_pref_sync_ref(hdsp);
2659         hdsp_set_pref_sync_ref(hdsp, val);
2660         spin_unlock_irq(&hdsp->lock);
2661         return change;
2662 }
2663
2664 #define HDSP_AUTOSYNC_REF(xname, xindex) \
2665 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2666   .name = xname, \
2667   .index = xindex, \
2668   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2669   .info = snd_hdsp_info_autosync_ref, \
2670   .get = snd_hdsp_get_autosync_ref, \
2671 }
2672
2673 static int hdsp_autosync_ref(struct hdsp *hdsp)
2674 {
2675         /* This looks at the autosync selected sync reference */
2676         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
2677
2678         switch (status2 & HDSP_SelSyncRefMask) {
2679         case HDSP_SelSyncRef_WORD:
2680                 return HDSP_AUTOSYNC_FROM_WORD;
2681         case HDSP_SelSyncRef_ADAT_SYNC:
2682                 return HDSP_AUTOSYNC_FROM_ADAT_SYNC;
2683         case HDSP_SelSyncRef_SPDIF:
2684                 return HDSP_AUTOSYNC_FROM_SPDIF;
2685         case HDSP_SelSyncRefMask:
2686                 return HDSP_AUTOSYNC_FROM_NONE;
2687         case HDSP_SelSyncRef_ADAT1:
2688                 return HDSP_AUTOSYNC_FROM_ADAT1;
2689         case HDSP_SelSyncRef_ADAT2:
2690                 return HDSP_AUTOSYNC_FROM_ADAT2;
2691         case HDSP_SelSyncRef_ADAT3:
2692                 return HDSP_AUTOSYNC_FROM_ADAT3;
2693         default:
2694                 return HDSP_AUTOSYNC_FROM_WORD;
2695         }
2696         return 0;
2697 }
2698
2699 static int snd_hdsp_info_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2700 {
2701         static char *texts[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" };
2702
2703         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2704         uinfo->count = 1;
2705         uinfo->value.enumerated.items = 7;
2706         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2707                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2708         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2709         return 0;
2710 }
2711
2712 static int snd_hdsp_get_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2713 {
2714         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2715
2716         ucontrol->value.enumerated.item[0] = hdsp_autosync_ref(hdsp);
2717         return 0;
2718 }
2719
2720 #define HDSP_LINE_OUT(xname, xindex) \
2721 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2722   .name = xname, \
2723   .index = xindex, \
2724   .info = snd_hdsp_info_line_out, \
2725   .get = snd_hdsp_get_line_out, \
2726   .put = snd_hdsp_put_line_out \
2727 }
2728
2729 static int hdsp_line_out(struct hdsp *hdsp)
2730 {
2731         return (hdsp->control_register & HDSP_LineOut) ? 1 : 0;
2732 }
2733
2734 static int hdsp_set_line_output(struct hdsp *hdsp, int out)
2735 {
2736         if (out)
2737                 hdsp->control_register |= HDSP_LineOut;
2738         else
2739                 hdsp->control_register &= ~HDSP_LineOut;
2740         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2741         return 0;
2742 }
2743
2744 #define snd_hdsp_info_line_out          snd_ctl_boolean_mono_info
2745
2746 static int snd_hdsp_get_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2747 {
2748         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2749
2750         spin_lock_irq(&hdsp->lock);
2751         ucontrol->value.integer.value[0] = hdsp_line_out(hdsp);
2752         spin_unlock_irq(&hdsp->lock);
2753         return 0;
2754 }
2755
2756 static int snd_hdsp_put_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2757 {
2758         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2759         int change;
2760         unsigned int val;
2761
2762         if (!snd_hdsp_use_is_exclusive(hdsp))
2763                 return -EBUSY;
2764         val = ucontrol->value.integer.value[0] & 1;
2765         spin_lock_irq(&hdsp->lock);
2766         change = (int)val != hdsp_line_out(hdsp);
2767         hdsp_set_line_output(hdsp, val);
2768         spin_unlock_irq(&hdsp->lock);
2769         return change;
2770 }
2771
2772 #define HDSP_PRECISE_POINTER(xname, xindex) \
2773 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2774   .name = xname, \
2775   .index = xindex, \
2776   .info = snd_hdsp_info_precise_pointer, \
2777   .get = snd_hdsp_get_precise_pointer, \
2778   .put = snd_hdsp_put_precise_pointer \
2779 }
2780
2781 static int hdsp_set_precise_pointer(struct hdsp *hdsp, int precise)
2782 {
2783         if (precise)
2784                 hdsp->precise_ptr = 1;
2785         else
2786                 hdsp->precise_ptr = 0;
2787         return 0;
2788 }
2789
2790 #define snd_hdsp_info_precise_pointer           snd_ctl_boolean_mono_info
2791
2792 static int snd_hdsp_get_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2793 {
2794         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2795
2796         spin_lock_irq(&hdsp->lock);
2797         ucontrol->value.integer.value[0] = hdsp->precise_ptr;
2798         spin_unlock_irq(&hdsp->lock);
2799         return 0;
2800 }
2801
2802 static int snd_hdsp_put_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2803 {
2804         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2805         int change;
2806         unsigned int val;
2807
2808         if (!snd_hdsp_use_is_exclusive(hdsp))
2809                 return -EBUSY;
2810         val = ucontrol->value.integer.value[0] & 1;
2811         spin_lock_irq(&hdsp->lock);
2812         change = (int)val != hdsp->precise_ptr;
2813         hdsp_set_precise_pointer(hdsp, val);
2814         spin_unlock_irq(&hdsp->lock);
2815         return change;
2816 }
2817
2818 #define HDSP_USE_MIDI_TASKLET(xname, xindex) \
2819 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2820   .name = xname, \
2821   .index = xindex, \
2822   .info = snd_hdsp_info_use_midi_tasklet, \
2823   .get = snd_hdsp_get_use_midi_tasklet, \
2824   .put = snd_hdsp_put_use_midi_tasklet \
2825 }
2826
2827 static int hdsp_set_use_midi_tasklet(struct hdsp *hdsp, int use_tasklet)
2828 {
2829         if (use_tasklet)
2830                 hdsp->use_midi_tasklet = 1;
2831         else
2832                 hdsp->use_midi_tasklet = 0;
2833         return 0;
2834 }
2835
2836 #define snd_hdsp_info_use_midi_tasklet          snd_ctl_boolean_mono_info
2837
2838 static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2839 {
2840         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2841
2842         spin_lock_irq(&hdsp->lock);
2843         ucontrol->value.integer.value[0] = hdsp->use_midi_tasklet;
2844         spin_unlock_irq(&hdsp->lock);
2845         return 0;
2846 }
2847
2848 static int snd_hdsp_put_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2849 {
2850         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2851         int change;
2852         unsigned int val;
2853
2854         if (!snd_hdsp_use_is_exclusive(hdsp))
2855                 return -EBUSY;
2856         val = ucontrol->value.integer.value[0] & 1;
2857         spin_lock_irq(&hdsp->lock);
2858         change = (int)val != hdsp->use_midi_tasklet;
2859         hdsp_set_use_midi_tasklet(hdsp, val);
2860         spin_unlock_irq(&hdsp->lock);
2861         return change;
2862 }
2863
2864 #define HDSP_MIXER(xname, xindex) \
2865 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2866   .name = xname, \
2867   .index = xindex, \
2868   .device = 0, \
2869   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
2870                  SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2871   .info = snd_hdsp_info_mixer, \
2872   .get = snd_hdsp_get_mixer, \
2873   .put = snd_hdsp_put_mixer \
2874 }
2875
2876 static int snd_hdsp_info_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2877 {
2878         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2879         uinfo->count = 3;
2880         uinfo->value.integer.min = 0;
2881         uinfo->value.integer.max = 65536;
2882         uinfo->value.integer.step = 1;
2883         return 0;
2884 }
2885
2886 static int snd_hdsp_get_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2887 {
2888         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2889         int source;
2890         int destination;
2891         int addr;
2892
2893         source = ucontrol->value.integer.value[0];
2894         destination = ucontrol->value.integer.value[1];
2895
2896         if (source >= hdsp->max_channels)
2897                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels,destination);
2898         else
2899                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2900
2901         spin_lock_irq(&hdsp->lock);
2902         ucontrol->value.integer.value[2] = hdsp_read_gain (hdsp, addr);
2903         spin_unlock_irq(&hdsp->lock);
2904         return 0;
2905 }
2906
2907 static int snd_hdsp_put_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2908 {
2909         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2910         int change;
2911         int source;
2912         int destination;
2913         int gain;
2914         int addr;
2915
2916         if (!snd_hdsp_use_is_exclusive(hdsp))
2917                 return -EBUSY;
2918
2919         source = ucontrol->value.integer.value[0];
2920         destination = ucontrol->value.integer.value[1];
2921
2922         if (source >= hdsp->max_channels)
2923                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels, destination);
2924         else
2925                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2926
2927         gain = ucontrol->value.integer.value[2];
2928
2929         spin_lock_irq(&hdsp->lock);
2930         change = gain != hdsp_read_gain(hdsp, addr);
2931         if (change)
2932                 hdsp_write_gain(hdsp, addr, gain);
2933         spin_unlock_irq(&hdsp->lock);
2934         return change;
2935 }
2936
2937 #define HDSP_WC_SYNC_CHECK(xname, xindex) \
2938 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2939   .name = xname, \
2940   .index = xindex, \
2941   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2942   .info = snd_hdsp_info_sync_check, \
2943   .get = snd_hdsp_get_wc_sync_check \
2944 }
2945
2946 static int snd_hdsp_info_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2947 {
2948         static char *texts[] = {"No Lock", "Lock", "Sync" };
2949         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2950         uinfo->count = 1;
2951         uinfo->value.enumerated.items = 3;
2952         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2953                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2954         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2955         return 0;
2956 }
2957
2958 static int hdsp_wc_sync_check(struct hdsp *hdsp)
2959 {
2960         int status2 = hdsp_read(hdsp, HDSP_status2Register);
2961         if (status2 & HDSP_wc_lock) {
2962                 if (status2 & HDSP_wc_sync)
2963                         return 2;
2964                 else
2965                          return 1;
2966         } else
2967                 return 0;
2968         return 0;
2969 }
2970
2971 static int snd_hdsp_get_wc_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2972 {
2973         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2974
2975         ucontrol->value.enumerated.item[0] = hdsp_wc_sync_check(hdsp);
2976         return 0;
2977 }
2978
2979 #define HDSP_SPDIF_SYNC_CHECK(xname, xindex) \
2980 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2981   .name = xname, \
2982   .index = xindex, \
2983   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2984   .info = snd_hdsp_info_sync_check, \
2985   .get = snd_hdsp_get_spdif_sync_check \
2986 }
2987
2988 static int hdsp_spdif_sync_check(struct hdsp *hdsp)
2989 {
2990         int status = hdsp_read(hdsp, HDSP_statusRegister);
2991         if (status & HDSP_SPDIFErrorFlag)
2992                 return 0;
2993         else {
2994                 if (status & HDSP_SPDIFSync)
2995                         return 2;
2996                 else
2997                         return 1;
2998         }
2999         return 0;
3000 }
3001
3002 static int snd_hdsp_get_spdif_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3003 {
3004         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3005
3006         ucontrol->value.enumerated.item[0] = hdsp_spdif_sync_check(hdsp);
3007         return 0;
3008 }
3009
3010 #define HDSP_ADATSYNC_SYNC_CHECK(xname, xindex) \
3011 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3012   .name = xname, \
3013   .index = xindex, \
3014   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3015   .info = snd_hdsp_info_sync_check, \
3016   .get = snd_hdsp_get_adatsync_sync_check \
3017 }
3018
3019 static int hdsp_adatsync_sync_check(struct hdsp *hdsp)
3020 {
3021         int status = hdsp_read(hdsp, HDSP_statusRegister);
3022         if (status & HDSP_TimecodeLock) {
3023                 if (status & HDSP_TimecodeSync)
3024                         return 2;
3025                 else
3026                         return 1;
3027         } else
3028                 return 0;
3029 }
3030
3031 static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3032 {
3033         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3034
3035         ucontrol->value.enumerated.item[0] = hdsp_adatsync_sync_check(hdsp);
3036         return 0;
3037 }
3038
3039 #define HDSP_ADAT_SYNC_CHECK \
3040 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3041   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3042   .info = snd_hdsp_info_sync_check, \
3043   .get = snd_hdsp_get_adat_sync_check \
3044 }
3045
3046 static int hdsp_adat_sync_check(struct hdsp *hdsp, int idx)
3047 {
3048         int status = hdsp_read(hdsp, HDSP_statusRegister);
3049
3050         if (status & (HDSP_Lock0>>idx)) {
3051                 if (status & (HDSP_Sync0>>idx))
3052                         return 2;
3053                 else
3054                         return 1;
3055         } else
3056                 return 0;
3057 }
3058
3059 static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3060 {
3061         int offset;
3062         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3063
3064         offset = ucontrol->id.index - 1;
3065         snd_BUG_ON(offset < 0);
3066
3067         switch (hdsp->io_type) {
3068         case Digiface:
3069         case H9652:
3070                 if (offset >= 3)
3071                         return -EINVAL;
3072                 break;
3073         case Multiface:
3074         case H9632:
3075                 if (offset >= 1)
3076                         return -EINVAL;
3077                 break;
3078         default:
3079                 return -EIO;
3080         }
3081
3082         ucontrol->value.enumerated.item[0] = hdsp_adat_sync_check(hdsp, offset);
3083         return 0;
3084 }
3085
3086 #define HDSP_DDS_OFFSET(xname, xindex) \
3087 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3088   .name = xname, \
3089   .index = xindex, \
3090   .info = snd_hdsp_info_dds_offset, \
3091   .get = snd_hdsp_get_dds_offset, \
3092   .put = snd_hdsp_put_dds_offset \
3093 }
3094
3095 static int hdsp_dds_offset(struct hdsp *hdsp)
3096 {
3097         u64 n;
3098         unsigned int dds_value = hdsp->dds_value;
3099         int system_sample_rate = hdsp->system_sample_rate;
3100
3101         if (!dds_value)
3102                 return 0;
3103
3104         n = DDS_NUMERATOR;
3105         /*
3106          * dds_value = n / rate
3107          * rate = n / dds_value
3108          */
3109         n = div_u64(n, dds_value);
3110         if (system_sample_rate >= 112000)
3111                 n *= 4;
3112         else if (system_sample_rate >= 56000)
3113                 n *= 2;
3114         return ((int)n) - system_sample_rate;
3115 }
3116
3117 static int hdsp_set_dds_offset(struct hdsp *hdsp, int offset_hz)
3118 {
3119         int rate = hdsp->system_sample_rate + offset_hz;
3120         hdsp_set_dds_value(hdsp, rate);
3121         return 0;
3122 }
3123
3124 static int snd_hdsp_info_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3125 {
3126         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
3127         uinfo->count = 1;
3128         uinfo->value.integer.min = -5000;
3129         uinfo->value.integer.max = 5000;
3130         return 0;
3131 }
3132
3133 static int snd_hdsp_get_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3134 {
3135         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3136
3137         ucontrol->value.enumerated.item[0] = hdsp_dds_offset(hdsp);
3138         return 0;
3139 }
3140
3141 static int snd_hdsp_put_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3142 {
3143         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3144         int change;
3145         int val;
3146
3147         if (!snd_hdsp_use_is_exclusive(hdsp))
3148                 return -EBUSY;
3149         val = ucontrol->value.enumerated.item[0];
3150         spin_lock_irq(&hdsp->lock);
3151         if (val != hdsp_dds_offset(hdsp))
3152                 change = (hdsp_set_dds_offset(hdsp, val) == 0) ? 1 : 0;
3153         else
3154                 change = 0;
3155         spin_unlock_irq(&hdsp->lock);
3156         return change;
3157 }
3158
3159 static struct snd_kcontrol_new snd_hdsp_9632_controls[] = {
3160 HDSP_DA_GAIN("DA Gain", 0),
3161 HDSP_AD_GAIN("AD Gain", 0),
3162 HDSP_PHONE_GAIN("Phones Gain", 0),
3163 HDSP_XLR_BREAKOUT_CABLE("XLR Breakout Cable", 0),
3164 HDSP_DDS_OFFSET("DDS Sample Rate Offset", 0)
3165 };
3166
3167 static struct snd_kcontrol_new snd_hdsp_controls[] = {
3168 {
3169         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3170         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
3171         .info =         snd_hdsp_control_spdif_info,
3172         .get =          snd_hdsp_control_spdif_get,
3173         .put =          snd_hdsp_control_spdif_put,
3174 },
3175 {
3176         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
3177         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3178         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
3179         .info =         snd_hdsp_control_spdif_stream_info,
3180         .get =          snd_hdsp_control_spdif_stream_get,
3181         .put =          snd_hdsp_control_spdif_stream_put,
3182 },
3183 {
3184         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3185         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3186         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
3187         .info =         snd_hdsp_control_spdif_mask_info,
3188         .get =          snd_hdsp_control_spdif_mask_get,
3189         .private_value = IEC958_AES0_NONAUDIO |
3190                          IEC958_AES0_PROFESSIONAL |
3191                          IEC958_AES0_CON_EMPHASIS,
3192 },
3193 {
3194         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3195         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3196         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
3197         .info =         snd_hdsp_control_spdif_mask_info,
3198         .get =          snd_hdsp_control_spdif_mask_get,
3199         .private_value = IEC958_AES0_NONAUDIO |
3200                          IEC958_AES0_PROFESSIONAL |
3201                          IEC958_AES0_PRO_EMPHASIS,
3202 },
3203 HDSP_MIXER("Mixer", 0),
3204 HDSP_SPDIF_IN("IEC958 Input Connector", 0),
3205 HDSP_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
3206 HDSP_SPDIF_PROFESSIONAL("IEC958 Professional Bit", 0),
3207 HDSP_SPDIF_EMPHASIS("IEC958 Emphasis Bit", 0),
3208 HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0),
3209 /* 'Sample Clock Source' complies with the alsa control naming scheme */
3210 HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
3211 {
3212         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3213         .name = "Sample Clock Source Locking",
3214         .info = snd_hdsp_info_clock_source_lock,
3215         .get = snd_hdsp_get_clock_source_lock,
3216         .put = snd_hdsp_put_clock_source_lock,
3217 },
3218 HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
3219 HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0),
3220 HDSP_AUTOSYNC_REF("AutoSync Reference", 0),
3221 HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0),
3222 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3223 /* 'External Rate' complies with the alsa control naming scheme */
3224 HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
3225 HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0),
3226 HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0),
3227 HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0),
3228 HDSP_LINE_OUT("Line Out", 0),
3229 HDSP_PRECISE_POINTER("Precise Pointer", 0),
3230 HDSP_USE_MIDI_TASKLET("Use Midi Tasklet", 0),
3231 };
3232
3233 static struct snd_kcontrol_new snd_hdsp_96xx_aeb = HDSP_AEB("Analog Extension Board", 0);
3234 static struct snd_kcontrol_new snd_hdsp_adat_sync_check = HDSP_ADAT_SYNC_CHECK;
3235
3236 static int snd_hdsp_create_controls(struct snd_card *card, struct hdsp *hdsp)
3237 {
3238         unsigned int idx;
3239         int err;
3240         struct snd_kcontrol *kctl;
3241
3242         for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_controls); idx++) {
3243                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_controls[idx], hdsp))) < 0)
3244                         return err;
3245                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
3246                         hdsp->spdif_ctl = kctl;
3247         }
3248
3249         /* ADAT SyncCheck status */
3250         snd_hdsp_adat_sync_check.name = "ADAT Lock Status";
3251         snd_hdsp_adat_sync_check.index = 1;
3252         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3253                 return err;
3254         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
3255                 for (idx = 1; idx < 3; ++idx) {
3256                         snd_hdsp_adat_sync_check.index = idx+1;
3257                         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3258                                 return err;
3259                 }
3260         }
3261
3262         /* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */
3263         if (hdsp->io_type == H9632) {
3264                 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_9632_controls); idx++) {
3265                         if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_9632_controls[idx], hdsp))) < 0)
3266                                 return err;
3267                 }
3268         }
3269
3270         /* AEB control for H96xx card */
3271         if (hdsp->io_type == H9632 || hdsp->io_type == H9652) {
3272                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_96xx_aeb, hdsp))) < 0)
3273                                 return err;
3274         }
3275
3276         return 0;
3277 }
3278
3279 /*------------------------------------------------------------
3280    /proc interface
3281  ------------------------------------------------------------*/
3282
3283 static void
3284 snd_hdsp_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
3285 {
3286         struct hdsp *hdsp = (struct hdsp *) entry->private_data;
3287         unsigned int status;
3288         unsigned int status2;
3289         char *pref_sync_ref;
3290         char *autosync_ref;
3291         char *system_clock_mode;
3292         char *clock_source;
3293         int x;
3294
3295         status = hdsp_read(hdsp, HDSP_statusRegister);
3296         status2 = hdsp_read(hdsp, HDSP_status2Register);
3297
3298         snd_iprintf(buffer, "%s (Card #%d)\n", hdsp->card_name,
3299                     hdsp->card->number + 1);
3300         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
3301                     hdsp->capture_buffer, hdsp->playback_buffer);
3302         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
3303                     hdsp->irq, hdsp->port, (unsigned long)hdsp->iobase);
3304         snd_iprintf(buffer, "Control register: 0x%x\n", hdsp->control_register);
3305         snd_iprintf(buffer, "Control2 register: 0x%x\n",
3306                     hdsp->control2_register);
3307         snd_iprintf(buffer, "Status register: 0x%x\n", status);
3308         snd_iprintf(buffer, "Status2 register: 0x%x\n", status2);
3309
3310         if (hdsp_check_for_iobox(hdsp)) {
3311                 snd_iprintf(buffer, "No I/O box connected.\n"
3312                             "Please connect one and upload firmware.\n");
3313                 return;
3314         }
3315
3316         if (hdsp_check_for_firmware(hdsp, 0)) {
3317                 if (hdsp->state & HDSP_FirmwareCached) {
3318                         if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
3319                                 snd_iprintf(buffer, "Firmware loading from "
3320                                             "cache failed, "
3321                                             "please upload manually.\n");
3322                                 return;
3323                         }
3324                 } else {
3325                         int err = -EINVAL;
3326 #ifdef HDSP_FW_LOADER
3327                         err = hdsp_request_fw_loader(hdsp);
3328 #endif
3329                         if (err < 0) {
3330                                 snd_iprintf(buffer,
3331                                             "No firmware loaded nor cached, "
3332                                             "please upload firmware.\n");
3333                                 return;
3334                         }
3335                 }
3336         }
3337
3338         snd_iprintf(buffer, "FIFO status: %d\n", hdsp_read(hdsp, HDSP_fifoStatus) & 0xff);
3339         snd_iprintf(buffer, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut0));
3340         snd_iprintf(buffer, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn0));
3341         snd_iprintf(buffer, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut1));
3342         snd_iprintf(buffer, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn1));
3343         snd_iprintf(buffer, "Use Midi Tasklet: %s\n", hdsp->use_midi_tasklet ? "on" : "off");
3344
3345         snd_iprintf(buffer, "\n");
3346
3347         x = 1 << (6 + hdsp_decode_latency(hdsp->control_register & HDSP_LatencyMask));
3348
3349         snd_iprintf(buffer, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x, (unsigned long) hdsp->period_bytes);
3350         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", hdsp_hw_pointer(hdsp));
3351         snd_iprintf(buffer, "Precise pointer: %s\n", hdsp->precise_ptr ? "on" : "off");
3352         snd_iprintf(buffer, "Line out: %s\n", (hdsp->control_register & HDSP_LineOut) ? "on" : "off");
3353
3354         snd_iprintf(buffer, "Firmware version: %d\n", (status2&HDSP_version0)|(status2&HDSP_version1)<<1|(status2&HDSP_version2)<<2);
3355
3356         snd_iprintf(buffer, "\n");
3357
3358         switch (hdsp_clock_source(hdsp)) {
3359         case HDSP_CLOCK_SOURCE_AUTOSYNC:
3360                 clock_source = "AutoSync";
3361                 break;
3362         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
3363                 clock_source = "Internal 32 kHz";
3364                 break;
3365         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
3366                 clock_source = "Internal 44.1 kHz";
3367                 break;
3368         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
3369                 clock_source = "Internal 48 kHz";
3370                 break;
3371         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
3372                 clock_source = "Internal 64 kHz";
3373                 break;
3374         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
3375                 clock_source = "Internal 88.2 kHz";
3376                 break;
3377         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
3378                 clock_source = "Internal 96 kHz";
3379                 break;
3380         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
3381                 clock_source = "Internal 128 kHz";
3382                 break;
3383         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
3384                 clock_source = "Internal 176.4 kHz";
3385                 break;
3386                 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
3387                 clock_source = "Internal 192 kHz";
3388                 break;
3389         default:
3390                 clock_source = "Error";
3391         }
3392         snd_iprintf (buffer, "Sample Clock Source: %s\n", clock_source);
3393
3394         if (hdsp_system_clock_mode(hdsp))
3395                 system_clock_mode = "Slave";
3396         else
3397                 system_clock_mode = "Master";
3398
3399         switch (hdsp_pref_sync_ref (hdsp)) {
3400         case HDSP_SYNC_FROM_WORD:
3401                 pref_sync_ref = "Word Clock";
3402                 break;
3403         case HDSP_SYNC_FROM_ADAT_SYNC:
3404                 pref_sync_ref = "ADAT Sync";
3405                 break;
3406         case HDSP_SYNC_FROM_SPDIF:
3407                 pref_sync_ref = "SPDIF";
3408                 break;
3409         case HDSP_SYNC_FROM_ADAT1:
3410                 pref_sync_ref = "ADAT1";
3411                 break;
3412         case HDSP_SYNC_FROM_ADAT2:
3413                 pref_sync_ref = "ADAT2";
3414                 break;
3415         case HDSP_SYNC_FROM_ADAT3:
3416                 pref_sync_ref = "ADAT3";
3417                 break;
3418         default:
3419                 pref_sync_ref = "Word Clock";
3420                 break;
3421         }
3422         snd_iprintf (buffer, "Preferred Sync Reference: %s\n", pref_sync_ref);
3423
3424         switch (hdsp_autosync_ref (hdsp)) {
3425         case HDSP_AUTOSYNC_FROM_WORD:
3426                 autosync_ref = "Word Clock";
3427                 break;
3428         case HDSP_AUTOSYNC_FROM_ADAT_SYNC:
3429                 autosync_ref = "ADAT Sync";
3430                 break;
3431         case HDSP_AUTOSYNC_FROM_SPDIF:
3432                 autosync_ref = "SPDIF";
3433                 break;
3434         case HDSP_AUTOSYNC_FROM_NONE:
3435                 autosync_ref = "None";
3436                 break;
3437         case HDSP_AUTOSYNC_FROM_ADAT1:
3438                 autosync_ref = "ADAT1";
3439                 break;
3440         case HDSP_AUTOSYNC_FROM_ADAT2:
3441                 autosync_ref = "ADAT2";
3442                 break;
3443         case HDSP_AUTOSYNC_FROM_ADAT3:
3444                 autosync_ref = "ADAT3";
3445                 break;
3446         default:
3447                 autosync_ref = "---";
3448                 break;
3449         }
3450         snd_iprintf (buffer, "AutoSync Reference: %s\n", autosync_ref);
3451
3452         snd_iprintf (buffer, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp));
3453
3454         snd_iprintf (buffer, "System Clock Mode: %s\n", system_clock_mode);
3455
3456         snd_iprintf (buffer, "System Clock Frequency: %d\n", hdsp->system_sample_rate);
3457         snd_iprintf (buffer, "System Clock Locked: %s\n", hdsp->clock_source_locked ? "Yes" : "No");
3458
3459         snd_iprintf(buffer, "\n");
3460
3461         switch (hdsp_spdif_in(hdsp)) {
3462         case HDSP_SPDIFIN_OPTICAL:
3463                 snd_iprintf(buffer, "IEC958 input: Optical\n");
3464                 break;
3465         case HDSP_SPDIFIN_COAXIAL:
3466                 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
3467                 break;
3468         case HDSP_SPDIFIN_INTERNAL:
3469                 snd_iprintf(buffer, "IEC958 input: Internal\n");
3470                 break;
3471         case HDSP_SPDIFIN_AES:
3472                 snd_iprintf(buffer, "IEC958 input: AES\n");
3473                 break;
3474         default:
3475                 snd_iprintf(buffer, "IEC958 input: ???\n");
3476                 break;
3477         }
3478
3479         if (hdsp->control_register & HDSP_SPDIFOpticalOut)
3480                 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
3481         else
3482                 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
3483
3484         if (hdsp->control_register & HDSP_SPDIFProfessional)
3485                 snd_iprintf(buffer, "IEC958 quality: Professional\n");
3486         else
3487                 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
3488
3489         if (hdsp->control_register & HDSP_SPDIFEmphasis)
3490                 snd_iprintf(buffer, "IEC958 emphasis: on\n");
3491         else
3492                 snd_iprintf(buffer, "IEC958 emphasis: off\n");
3493
3494         if (hdsp->control_register & HDSP_SPDIFNonAudio)
3495                 snd_iprintf(buffer, "IEC958 NonAudio: on\n");
3496         else
3497                 snd_iprintf(buffer, "IEC958 NonAudio: off\n");
3498         if ((x = hdsp_spdif_sample_rate (hdsp)) != 0)
3499                 snd_iprintf (buffer, "IEC958 sample rate: %d\n", x);
3500         else
3501                 snd_iprintf (buffer, "IEC958 sample rate: Error flag set\n");
3502
3503         snd_iprintf(buffer, "\n");
3504
3505         /* Sync Check */
3506         x = status & HDSP_Sync0;
3507         if (status & HDSP_Lock0)
3508                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
3509         else
3510                 snd_iprintf(buffer, "ADAT1: No Lock\n");
3511
3512         switch (hdsp->io_type) {
3513         case Digiface:
3514         case H9652:
3515                 x = status & HDSP_Sync1;
3516                 if (status & HDSP_Lock1)
3517                         snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
3518                 else
3519                         snd_iprintf(buffer, "ADAT2: No Lock\n");
3520                 x = status & HDSP_Sync2;
3521                 if (status & HDSP_Lock2)
3522                         snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
3523                 else
3524                         snd_iprintf(buffer, "ADAT3: No Lock\n");
3525                 break;
3526         default:
3527                 /* relax */
3528                 break;
3529         }
3530
3531         x = status & HDSP_SPDIFSync;
3532         if (status & HDSP_SPDIFErrorFlag)
3533                 snd_iprintf (buffer, "SPDIF: No Lock\n");
3534         else
3535                 snd_iprintf (buffer, "SPDIF: %s\n", x ? "Sync" : "Lock");
3536
3537         x = status2 & HDSP_wc_sync;
3538         if (status2 & HDSP_wc_lock)
3539                 snd_iprintf (buffer, "Word Clock: %s\n", x ? "Sync" : "Lock");
3540         else
3541                 snd_iprintf (buffer, "Word Clock: No Lock\n");
3542
3543         x = status & HDSP_TimecodeSync;
3544         if (status & HDSP_TimecodeLock)
3545                 snd_iprintf(buffer, "ADAT Sync: %s\n", x ? "Sync" : "Lock");
3546         else
3547                 snd_iprintf(buffer, "ADAT Sync: No Lock\n");
3548
3549         snd_iprintf(buffer, "\n");
3550
3551         /* Informations about H9632 specific controls */
3552         if (hdsp->io_type == H9632) {
3553                 char *tmp;
3554
3555                 switch (hdsp_ad_gain(hdsp)) {
3556                 case 0:
3557                         tmp = "-10 dBV";
3558                         break;
3559                 case 1:
3560                         tmp = "+4 dBu";
3561                         break;
3562                 default:
3563                         tmp = "Lo Gain";
3564                         break;
3565                 }
3566                 snd_iprintf(buffer, "AD Gain : %s\n", tmp);
3567
3568                 switch (hdsp_da_gain(hdsp)) {
3569                 case 0:
3570                         tmp = "Hi Gain";
3571                         break;
3572                 case 1:
3573                         tmp = "+4 dBu";
3574                         break;
3575                 default:
3576                         tmp = "-10 dBV";
3577                         break;
3578                 }
3579                 snd_iprintf(buffer, "DA Gain : %s\n", tmp);
3580
3581                 switch (hdsp_phone_gain(hdsp)) {
3582                 case 0:
3583                         tmp = "0 dB";
3584                         break;
3585                 case 1:
3586                         tmp = "-6 dB";
3587                         break;
3588                 default:
3589                         tmp = "-12 dB";
3590                         break;
3591                 }
3592                 snd_iprintf(buffer, "Phones Gain : %s\n", tmp);
3593
3594                 snd_iprintf(buffer, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp) ? "yes" : "no");
3595
3596                 if (hdsp->control_register & HDSP_AnalogExtensionBoard)
3597                         snd_iprintf(buffer, "AEB : on (ADAT1 internal)\n");
3598                 else
3599                         snd_iprintf(buffer, "AEB : off (ADAT1 external)\n");
3600                 snd_iprintf(buffer, "\n");
3601         }
3602
3603 }
3604
3605 static void snd_hdsp_proc_init(struct hdsp *hdsp)
3606 {
3607         struct snd_info_entry *entry;
3608
3609         if (! snd_card_proc_new(hdsp->card, "hdsp", &entry))
3610                 snd_info_set_text_ops(entry, hdsp, snd_hdsp_proc_read);
3611 }
3612
3613 static void snd_hdsp_free_buffers(struct hdsp *hdsp)
3614 {
3615         snd_hammerfall_free_buffer(&hdsp->capture_dma_buf, hdsp->pci);
3616         snd_hammerfall_free_buffer(&hdsp->playback_dma_buf, hdsp->pci);
3617 }
3618
3619 static int __devinit snd_hdsp_initialize_memory(struct hdsp *hdsp)
3620 {
3621         unsigned long pb_bus, cb_bus;
3622
3623         if (snd_hammerfall_get_buffer(hdsp->pci, &hdsp->capture_dma_buf, HDSP_DMA_AREA_BYTES) < 0 ||
3624             snd_hammerfall_get_buffer(hdsp->pci, &hdsp->playback_dma_buf, HDSP_DMA_AREA_BYTES) < 0) {
3625                 if (hdsp->capture_dma_buf.area)
3626                         snd_dma_free_pages(&hdsp->capture_dma_buf);
3627                 printk(KERN_ERR "%s: no buffers available\n", hdsp->card_name);
3628                 return -ENOMEM;
3629         }
3630
3631         /* Align to bus-space 64K boundary */
3632
3633         cb_bus = ALIGN(hdsp->capture_dma_buf.addr, 0x10000ul);
3634         pb_bus = ALIGN(hdsp->playback_dma_buf.addr, 0x10000ul);
3635
3636         /* Tell the card where it is */
3637
3638         hdsp_write(hdsp, HDSP_inputBufferAddress, cb_bus);
3639         hdsp_write(hdsp, HDSP_outputBufferAddress, pb_bus);
3640
3641         hdsp->capture_buffer = hdsp->capture_dma_buf.area + (cb_bus - hdsp->capture_dma_buf.addr);
3642         hdsp->playback_buffer = hdsp->playback_dma_buf.area + (pb_bus - hdsp->playback_dma_buf.addr);
3643
3644         return 0;
3645 }
3646
3647 static int snd_hdsp_set_defaults(struct hdsp *hdsp)
3648 {
3649         unsigned int i;
3650
3651         /* ASSUMPTION: hdsp->lock is either held, or
3652            there is no need to hold it (e.g. during module
3653            initialization).
3654          */
3655
3656         /* set defaults:
3657
3658            SPDIF Input via Coax
3659            Master clock mode
3660            maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer,
3661                             which implies 2 4096 sample, 32Kbyte periods).
3662            Enable line out.
3663          */
3664
3665         hdsp->control_register = HDSP_ClockModeMaster |
3666                                  HDSP_SPDIFInputCoaxial |
3667                                  hdsp_encode_latency(7) |
3668                                  HDSP_LineOut;
3669
3670
3671         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3672
3673 #ifdef SNDRV_BIG_ENDIAN
3674         hdsp->control2_register = HDSP_BIGENDIAN_MODE;
3675 #else
3676         hdsp->control2_register = 0;
3677 #endif
3678         if (hdsp->io_type == H9652)
3679                 snd_hdsp_9652_enable_mixer (hdsp);
3680         else
3681                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
3682
3683         hdsp_reset_hw_pointer(hdsp);
3684         hdsp_compute_period_size(hdsp);
3685
3686         /* silence everything */
3687
3688         for (i = 0; i < HDSP_MATRIX_MIXER_SIZE; ++i)
3689                 hdsp->mixer_matrix[i] = MINUS_INFINITY_GAIN;
3690
3691         for (i = 0; i < ((hdsp->io_type == H9652 || hdsp->io_type == H9632) ? 1352 : HDSP_MATRIX_MIXER_SIZE); ++i) {
3692                 if (hdsp_write_gain (hdsp, i, MINUS_INFINITY_GAIN))
3693                         return -EIO;
3694         }
3695
3696         /* H9632 specific defaults */
3697         if (hdsp->io_type == H9632) {
3698                 hdsp->control_register |= (HDSP_DAGainPlus4dBu | HDSP_ADGainPlus4dBu | HDSP_PhoneGain0dB);
3699                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3700         }
3701
3702         /* set a default rate so that the channel map is set up.
3703          */
3704
3705         hdsp_set_rate(hdsp, 48000, 1);
3706
3707         return 0;
3708 }
3709
3710 static void hdsp_midi_tasklet(unsigned long arg)
3711 {
3712         struct hdsp *hdsp = (struct hdsp *)arg;
3713
3714         if (hdsp->midi[0].pending)
3715                 snd_hdsp_midi_input_read (&hdsp->midi[0]);
3716         if (hdsp->midi[1].pending)
3717                 snd_hdsp_midi_input_read (&hdsp->midi[1]);
3718 }
3719
3720 static irqreturn_t snd_hdsp_interrupt(int irq, void *dev_id)
3721 {
3722         struct hdsp *hdsp = (struct hdsp *) dev_id;
3723         unsigned int status;
3724         int audio;
3725         int midi0;
3726         int midi1;
3727         unsigned int midi0status;
3728         unsigned int midi1status;
3729         int schedule = 0;
3730
3731         status = hdsp_read(hdsp, HDSP_statusRegister);
3732
3733         audio = status & HDSP_audioIRQPending;
3734         midi0 = status & HDSP_midi0IRQPending;
3735         midi1 = status & HDSP_midi1IRQPending;
3736
3737         if (!audio && !midi0 && !midi1)
3738                 return IRQ_NONE;
3739
3740         hdsp_write(hdsp, HDSP_interruptConfirmation, 0);
3741
3742         midi0status = hdsp_read (hdsp, HDSP_midiStatusIn0) & 0xff;
3743         midi1status = hdsp_read (hdsp, HDSP_midiStatusIn1) & 0xff;
3744
3745         if (!(hdsp->state & HDSP_InitializationComplete))
3746                 return IRQ_HANDLED;
3747
3748         if (audio) {
3749                 if (hdsp->capture_substream)
3750                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
3751
3752                 if (hdsp->playback_substream)
3753                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
3754         }
3755
3756         if (midi0 && midi0status) {
3757                 if (hdsp->use_midi_tasklet) {
3758                         /* we disable interrupts for this input until processing is done */
3759                         hdsp->control_register &= ~HDSP_Midi0InterruptEnable;
3760                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3761                         hdsp->midi[0].pending = 1;
3762                         schedule = 1;
3763                 } else {
3764                         snd_hdsp_midi_input_read (&hdsp->midi[0]);
3765                 }
3766         }
3767         if (hdsp->io_type != Multiface && hdsp->io_type != H9632 && midi1 && midi1status) {
3768                 if (hdsp->use_midi_tasklet) {
3769                         /* we disable interrupts for this input until processing is done */
3770                         hdsp->control_register &= ~HDSP_Midi1InterruptEnable;
3771                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3772                         hdsp->midi[1].pending = 1;
3773                         schedule = 1;
3774                 } else {
3775                         snd_hdsp_midi_input_read (&hdsp->midi[1]);
3776                 }
3777         }
3778         if (hdsp->use_midi_tasklet && schedule)
3779                 tasklet_schedule(&hdsp->midi_tasklet);
3780         return IRQ_HANDLED;
3781 }
3782
3783 static snd_pcm_uframes_t snd_hdsp_hw_pointer(struct snd_pcm_substream *substream)
3784 {
3785         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3786         return hdsp_hw_pointer(hdsp);
3787 }
3788
3789 static char *hdsp_channel_buffer_location(struct hdsp *hdsp,
3790                                              int stream,
3791                                              int channel)
3792
3793 {
3794         int mapped_channel;
3795
3796         if (snd_BUG_ON(channel < 0 || channel >= hdsp->max_channels))
3797                 return NULL;
3798
3799         if ((mapped_channel = hdsp->channel_map[channel]) < 0)
3800                 return NULL;
3801
3802         if (stream == SNDRV_PCM_STREAM_CAPTURE)
3803                 return hdsp->capture_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3804         else
3805                 return hdsp->playback_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3806 }
3807
3808 static int snd_hdsp_playback_copy(struct snd_pcm_substream *substream, int channel,
3809                                   snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
3810 {
3811         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3812         char *channel_buf;
3813
3814         if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
3815                 return -EINVAL;
3816
3817         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3818         if (snd_BUG_ON(!channel_buf))
3819                 return -EIO;
3820         if (copy_from_user(channel_buf + pos * 4, src, count * 4))
3821                 return -EFAULT;
3822         return count;
3823 }
3824
3825 static int snd_hdsp_capture_copy(struct snd_pcm_substream *substream, int channel,
3826                                  snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
3827 {
3828         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3829         char *channel_buf;
3830
3831         if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
3832                 return -EINVAL;
3833
3834         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3835         if (snd_BUG_ON(!channel_buf))
3836                 return -EIO;
3837         if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
3838                 return -EFAULT;
3839         return count;
3840 }
3841
3842 static int snd_hdsp_hw_silence(struct snd_pcm_substream *substream, int channel,
3843                                   snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
3844 {
3845         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3846         char *channel_buf;
3847
3848         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3849         if (snd_BUG_ON(!channel_buf))
3850                 return -EIO;
3851         memset(channel_buf + pos * 4, 0, count * 4);
3852         return count;
3853 }
3854
3855 static int snd_hdsp_reset(struct snd_pcm_substream *substream)
3856 {
3857         struct snd_pcm_runtime *runtime = substream->runtime;
3858         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3859         struct snd_pcm_substream *other;
3860         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
3861                 other = hdsp->capture_substream;
3862         else
3863                 other = hdsp->playback_substream;
3864         if (hdsp->running)
3865                 runtime->status->hw_ptr = hdsp_hw_pointer(hdsp);
3866         else
3867                 runtime->status->hw_ptr = 0;
3868         if (other) {
3869                 struct snd_pcm_substream *s;
3870                 struct snd_pcm_runtime *oruntime = other->runtime;
3871                 snd_pcm_group_for_each_entry(s, substream) {
3872                         if (s == other) {
3873                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
3874                                 break;
3875                         }
3876                 }
3877         }
3878         return 0;
3879 }
3880
3881 static int snd_hdsp_hw_params(struct snd_pcm_substream *substream,
3882                                  struct snd_pcm_hw_params *params)
3883 {
3884         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3885         int err;
3886         pid_t this_pid;
3887         pid_t other_pid;
3888
3889         if (hdsp_check_for_iobox (hdsp))
3890                 return -EIO;
3891
3892         if (hdsp_check_for_firmware(hdsp, 1))
3893                 return -EIO;
3894
3895         spin_lock_irq(&hdsp->lock);
3896
3897         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3898                 hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
3899                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= hdsp->creg_spdif_stream);
3900                 this_pid = hdsp->playback_pid;
3901                 other_pid = hdsp->capture_pid;
3902         } else {
3903                 this_pid = hdsp->capture_pid;
3904                 other_pid = hdsp->playback_pid;
3905         }
3906
3907         if ((other_pid > 0) && (this_pid != other_pid)) {
3908
3909                 /* The other stream is open, and not by the same
3910                    task as this one. Make sure that the parameters
3911                    that matter are the same.
3912                  */
3913
3914                 if (params_rate(params) != hdsp->system_sample_rate) {
3915                         spin_unlock_irq(&hdsp->lock);
3916                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
3917                         return -EBUSY;
3918                 }
3919
3920                 if (params_period_size(params) != hdsp->period_bytes / 4) {
3921                         spin_unlock_irq(&hdsp->lock);
3922                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3923                         return -EBUSY;
3924                 }
3925
3926                 /* We're fine. */
3927
3928                 spin_unlock_irq(&hdsp->lock);
3929                 return 0;
3930
3931         } else {
3932                 spin_unlock_irq(&hdsp->lock);
3933         }
3934
3935         /* how to make sure that the rate matches an externally-set one ?
3936          */
3937
3938         spin_lock_irq(&hdsp->lock);
3939         if (! hdsp->clock_source_locked) {
3940                 if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) {
3941                         spin_unlock_irq(&hdsp->lock);
3942                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
3943                         return err;
3944                 }
3945         }
3946         spin_unlock_irq(&hdsp->lock);
3947
3948         if ((err = hdsp_set_interrupt_interval(hdsp, params_period_size(params))) < 0) {
3949                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3950                 return err;
3951         }
3952
3953         return 0;
3954 }
3955
3956 static int snd_hdsp_channel_info(struct snd_pcm_substream *substream,
3957                                     struct snd_pcm_channel_info *info)
3958 {
3959         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3960         int mapped_channel;
3961
3962         if (snd_BUG_ON(info->channel >= hdsp->max_channels))
3963                 return -EINVAL;
3964
3965         if ((mapped_channel = hdsp->channel_map[info->channel]) < 0)
3966                 return -EINVAL;
3967
3968         info->offset = mapped_channel * HDSP_CHANNEL_BUFFER_BYTES;
3969         info->first = 0;
3970         info->step = 32;
3971         return 0;
3972 }
3973
3974 static int snd_hdsp_ioctl(struct snd_pcm_substream *substream,
3975                              unsigned int cmd, void *arg)
3976 {
3977         switch (cmd) {
3978         case SNDRV_PCM_IOCTL1_RESET:
3979                 return snd_hdsp_reset(substream);
3980         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
3981                 return snd_hdsp_channel_info(substream, arg);
3982         default:
3983                 break;
3984         }
3985
3986         return snd_pcm_lib_ioctl(substream, cmd, arg);
3987 }
3988
3989 static int snd_hdsp_trigger(struct snd_pcm_substream *substream, int cmd)
3990 {
3991         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3992         struct snd_pcm_substream *other;
3993         int running;
3994
3995         if (hdsp_check_for_iobox (hdsp))
3996                 return -EIO;
3997
3998         if (hdsp_check_for_firmware(hdsp, 0)) /* no auto-loading in trigger */
3999                 return -EIO;
4000
4001         spin_lock(&hdsp->lock);
4002         running = hdsp->running;
4003         switch (cmd) {
4004         case SNDRV_PCM_TRIGGER_START:
4005                 running |= 1 << substream->stream;
4006                 break;
4007         case SNDRV_PCM_TRIGGER_STOP:
4008                 running &= ~(1 << substream->stream);
4009                 break;
4010         default:
4011                 snd_BUG();
4012                 spin_unlock(&hdsp->lock);
4013                 return -EINVAL;
4014         }
4015         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4016                 other = hdsp->capture_substream;
4017         else
4018                 other = hdsp->playback_substream;
4019
4020         if (other) {
4021                 struct snd_pcm_substream *s;
4022                 snd_pcm_group_for_each_entry(s, substream) {
4023                         if (s == other) {
4024                                 snd_pcm_trigger_done(s, substream);
4025                                 if (cmd == SNDRV_PCM_TRIGGER_START)
4026                                         running |= 1 << s->stream;
4027                                 else
4028                                         running &= ~(1 << s->stream);
4029                                 goto _ok;
4030                         }
4031                 }
4032                 if (cmd == SNDRV_PCM_TRIGGER_START) {
4033                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
4034                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4035                                 hdsp_silence_playback(hdsp);
4036                 } else {
4037                         if (running &&
4038                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4039                                 hdsp_silence_playback(hdsp);
4040                 }
4041         } else {
4042                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4043                                 hdsp_silence_playback(hdsp);
4044         }
4045  _ok:
4046         snd_pcm_trigger_done(substream, substream);
4047         if (!hdsp->running && running)
4048                 hdsp_start_audio(hdsp);
4049         else if (hdsp->running && !running)
4050                 hdsp_stop_audio(hdsp);
4051         hdsp->running = running;
4052         spin_unlock(&hdsp->lock);
4053
4054         return 0;
4055 }
4056
4057 static int snd_hdsp_prepare(struct snd_pcm_substream *substream)
4058 {
4059         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4060         int result = 0;
4061
4062         if (hdsp_check_for_iobox (hdsp))
4063                 return -EIO;
4064
4065         if (hdsp_check_for_firmware(hdsp, 1))
4066                 return -EIO;
4067
4068         spin_lock_irq(&hdsp->lock);
4069         if (!hdsp->running)
4070                 hdsp_reset_hw_pointer(hdsp);
4071         spin_unlock_irq(&hdsp->lock);
4072         return result;
4073 }
4074
4075 static struct snd_pcm_hardware snd_hdsp_playback_subinfo =
4076 {
4077         .info =                 (SNDRV_PCM_INFO_MMAP |
4078                                  SNDRV_PCM_INFO_MMAP_VALID |
4079                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4080                                  SNDRV_PCM_INFO_SYNC_START |
4081                                  SNDRV_PCM_INFO_DOUBLE),
4082 #ifdef SNDRV_BIG_ENDIAN
4083         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4084 #else
4085         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4086 #endif
4087         .rates =                (SNDRV_PCM_RATE_32000 |
4088                                  SNDRV_PCM_RATE_44100 |
4089                                  SNDRV_PCM_RATE_48000 |
4090                                  SNDRV_PCM_RATE_64000 |
4091                                  SNDRV_PCM_RATE_88200 |
4092                                  SNDRV_PCM_RATE_96000),
4093         .rate_min =             32000,
4094         .rate_max =             96000,
4095         .channels_min =         14,
4096         .channels_max =         HDSP_MAX_CHANNELS,
4097         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4098         .period_bytes_min =     (64 * 4) * 10,
4099         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4100         .periods_min =          2,
4101         .periods_max =          2,
4102         .fifo_size =            0
4103 };
4104
4105 static struct snd_pcm_hardware snd_hdsp_capture_subinfo =
4106 {
4107         .info =                 (SNDRV_PCM_INFO_MMAP |
4108                                  SNDRV_PCM_INFO_MMAP_VALID |
4109                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4110                                  SNDRV_PCM_INFO_SYNC_START),
4111 #ifdef SNDRV_BIG_ENDIAN
4112         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4113 #else
4114         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4115 #endif
4116         .rates =                (SNDRV_PCM_RATE_32000 |
4117                                  SNDRV_PCM_RATE_44100 |
4118                                  SNDRV_PCM_RATE_48000 |
4119                                  SNDRV_PCM_RATE_64000 |
4120                                  SNDRV_PCM_RATE_88200 |
4121                                  SNDRV_PCM_RATE_96000),
4122         .rate_min =             32000,
4123         .rate_max =             96000,
4124         .channels_min =         14,
4125         .channels_max =         HDSP_MAX_CHANNELS,
4126         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4127         .period_bytes_min =     (64 * 4) * 10,
4128         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4129         .periods_min =          2,
4130         .periods_max =          2,
4131         .fifo_size =            0
4132 };
4133
4134 static unsigned int hdsp_period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
4135
4136 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_period_sizes = {
4137         .count = ARRAY_SIZE(hdsp_period_sizes),
4138         .list = hdsp_period_sizes,
4139         .mask = 0
4140 };
4141
4142 static unsigned int hdsp_9632_sample_rates[] = { 32000, 44100, 48000, 64000, 88200, 96000, 128000, 176400, 192000 };
4143
4144 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_9632_sample_rates = {
4145         .count = ARRAY_SIZE(hdsp_9632_sample_rates),
4146         .list = hdsp_9632_sample_rates,
4147         .mask = 0
4148 };
4149
4150 static int snd_hdsp_hw_rule_in_channels(struct snd_pcm_hw_params *params,
4151                                         struct snd_pcm_hw_rule *rule)
4152 {
4153         struct hdsp *hdsp = rule->private;
4154         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4155         if (hdsp->io_type == H9632) {
4156                 unsigned int list[3];
4157                 list[0] = hdsp->qs_in_channels;
4158                 list[1] = hdsp->ds_in_channels;
4159                 list[2] = hdsp->ss_in_channels;
4160                 return snd_interval_list(c, 3, list, 0);
4161         } else {
4162                 unsigned int list[2];
4163                 list[0] = hdsp->ds_in_channels;
4164                 list[1] = hdsp->ss_in_channels;
4165                 return snd_interval_list(c, 2, list, 0);
4166         }
4167 }
4168
4169 static int snd_hdsp_hw_rule_out_channels(struct snd_pcm_hw_params *params,
4170                                         struct snd_pcm_hw_rule *rule)
4171 {
4172         unsigned int list[3];
4173         struct hdsp *hdsp = rule->private;
4174         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4175         if (hdsp->io_type == H9632) {
4176                 list[0] = hdsp->qs_out_channels;
4177                 list[1] = hdsp->ds_out_channels;
4178                 list[2] = hdsp->ss_out_channels;
4179                 return snd_interval_list(c, 3, list, 0);
4180         } else {
4181                 list[0] = hdsp->ds_out_channels;
4182                 list[1] = hdsp->ss_out_channels;
4183         }
4184         return snd_interval_list(c, 2, list, 0);
4185 }
4186
4187 static int snd_hdsp_hw_rule_in_channels_rate(struct snd_pcm_hw_params *params,
4188                                              struct snd_pcm_hw_rule *rule)
4189 {
4190         struct hdsp *hdsp = rule->private;
4191         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4192         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4193         if (r->min > 96000 && hdsp->io_type == H9632) {
4194                 struct snd_interval t = {
4195                         .min = hdsp->qs_in_channels,
4196                         .max = hdsp->qs_in_channels,
4197                         .integer = 1,
4198                 };
4199                 return snd_interval_refine(c, &t);
4200         } else if (r->min > 48000 && r->max <= 96000) {
4201                 struct snd_interval t = {
4202                         .min = hdsp->ds_in_channels,
4203                         .max = hdsp->ds_in_channels,
4204                         .integer = 1,
4205                 };
4206                 return snd_interval_refine(c, &t);
4207         } else if (r->max < 64000) {
4208                 struct snd_interval t = {
4209                         .min = hdsp->ss_in_channels,
4210                         .max = hdsp->ss_in_channels,
4211                         .integer = 1,
4212                 };
4213                 return snd_interval_refine(c, &t);
4214         }
4215         return 0;
4216 }
4217
4218 static int snd_hdsp_hw_rule_out_channels_rate(struct snd_pcm_hw_params *params,
4219                                              struct snd_pcm_hw_rule *rule)
4220 {
4221         struct hdsp *hdsp = rule->private;
4222         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4223         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4224         if (r->min > 96000 && hdsp->io_type == H9632) {
4225                 struct snd_interval t = {
4226                         .min = hdsp->qs_out_channels,
4227                         .max = hdsp->qs_out_channels,
4228                         .integer = 1,
4229                 };
4230                 return snd_interval_refine(c, &t);
4231         } else if (r->min > 48000 && r->max <= 96000) {
4232                 struct snd_interval t = {
4233                         .min = hdsp->ds_out_channels,
4234                         .max = hdsp->ds_out_channels,
4235                         .integer = 1,
4236                 };
4237                 return snd_interval_refine(c, &t);
4238         } else if (r->max < 64000) {
4239                 struct snd_interval t = {
4240                         .min = hdsp->ss_out_channels,
4241                         .max = hdsp->ss_out_channels,
4242                         .integer = 1,
4243                 };
4244                 return snd_interval_refine(c, &t);
4245         }
4246         return 0;
4247 }
4248
4249 static int snd_hdsp_hw_rule_rate_out_channels(struct snd_pcm_hw_params *params,
4250                                              struct snd_pcm_hw_rule *rule)
4251 {
4252         struct hdsp *hdsp = rule->private;
4253         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4254         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4255         if (c->min >= hdsp->ss_out_channels) {
4256                 struct snd_interval t = {
4257                         .min = 32000,
4258                         .max = 48000,
4259                         .integer = 1,
4260                 };
4261                 return snd_interval_refine(r, &t);
4262         } else if (c->max <= hdsp->qs_out_channels && hdsp->io_type == H9632) {
4263                 struct snd_interval t = {
4264                         .min = 128000,
4265                         .max = 192000,
4266                         .integer = 1,
4267                 };
4268                 return snd_interval_refine(r, &t);
4269         } else if (c->max <= hdsp->ds_out_channels) {
4270                 struct snd_interval t = {
4271                         .min = 64000,
4272                         .max = 96000,
4273                         .integer = 1,
4274                 };
4275                 return snd_interval_refine(r, &t);
4276         }
4277         return 0;
4278 }
4279
4280 static int snd_hdsp_hw_rule_rate_in_channels(struct snd_pcm_hw_params *params,
4281                                              struct snd_pcm_hw_rule *rule)
4282 {
4283         struct hdsp *hdsp = rule->private;
4284         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4285         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4286         if (c->min >= hdsp->ss_in_channels) {
4287                 struct snd_interval t = {
4288                         .min = 32000,
4289                         .max = 48000,
4290                         .integer = 1,
4291                 };
4292                 return snd_interval_refine(r, &t);
4293         } else if (c->max <= hdsp->qs_in_channels && hdsp->io_type == H9632) {
4294                 struct snd_interval t = {
4295                         .min = 128000,
4296                         .max = 192000,
4297                         .integer = 1,
4298                 };
4299                 return snd_interval_refine(r, &t);
4300         } else if (c->max <= hdsp->ds_in_channels) {
4301                 struct snd_interval t = {
4302                         .min = 64000,
4303                         .max = 96000,
4304                         .integer = 1,
4305                 };
4306                 return snd_interval_refine(r, &t);
4307         }
4308         return 0;
4309 }
4310
4311 static int snd_hdsp_playback_open(struct snd_pcm_substream *substream)
4312 {
4313         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4314         struct snd_pcm_runtime *runtime = substream->runtime;
4315
4316         if (hdsp_check_for_iobox (hdsp))
4317                 return -EIO;
4318
4319         if (hdsp_check_for_firmware(hdsp, 1))
4320                 return -EIO;
4321
4322         spin_lock_irq(&hdsp->lock);
4323
4324         snd_pcm_set_sync(substream);
4325
4326         runtime->hw = snd_hdsp_playback_subinfo;
4327         runtime->dma_area = hdsp->playback_buffer;
4328         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4329
4330         hdsp->playback_pid = current->pid;
4331         hdsp->playback_substream = substream;
4332
4333         spin_unlock_irq(&hdsp->lock);
4334
4335         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4336         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4337         if (hdsp->clock_source_locked) {
4338                 runtime->hw.rate_min = runtime->hw.rate_max = hdsp->system_sample_rate;
4339         } else if (hdsp->io_type == H9632) {
4340                 runtime->hw.rate_max = 192000;
4341                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4342                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4343         }
4344         if (hdsp->io_type == H9632) {
4345                 runtime->hw.channels_min = hdsp->qs_out_channels;
4346                 runtime->hw.channels_max = hdsp->ss_out_channels;
4347         }
4348
4349         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4350                              snd_hdsp_hw_rule_out_channels, hdsp,
4351                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4352         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4353                              snd_hdsp_hw_rule_out_channels_rate, hdsp,
4354                              SNDRV_PCM_HW_PARAM_RATE, -1);
4355         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4356                              snd_hdsp_hw_rule_rate_out_channels, hdsp,
4357                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4358
4359         hdsp->creg_spdif_stream = hdsp->creg_spdif;
4360         hdsp->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4361         snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4362                        SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4363         return 0;
4364 }
4365
4366 static int snd_hdsp_playback_release(struct snd_pcm_substream *substream)
4367 {
4368         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4369
4370         spin_lock_irq(&hdsp->lock);
4371
4372         hdsp->playback_pid = -1;
4373         hdsp->playback_substream = NULL;
4374
4375         spin_unlock_irq(&hdsp->lock);
4376
4377         hdsp->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4378         snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4379                        SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4380         return 0;
4381 }
4382
4383
4384 static int snd_hdsp_capture_open(struct snd_pcm_substream *substream)
4385 {
4386         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4387         struct snd_pcm_runtime *runtime = substream->runtime;
4388
4389         if (hdsp_check_for_iobox (hdsp))
4390                 return -EIO;
4391
4392         if (hdsp_check_for_firmware(hdsp, 1))
4393                 return -EIO;
4394
4395         spin_lock_irq(&hdsp->lock);
4396
4397         snd_pcm_set_sync(substream);
4398
4399         runtime->hw = snd_hdsp_capture_subinfo;
4400         runtime->dma_area = hdsp->capture_buffer;
4401         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4402
4403         hdsp->capture_pid = current->pid;
4404         hdsp->capture_substream = substream;
4405
4406         spin_unlock_irq(&hdsp->lock);
4407
4408         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4409         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4410         if (hdsp->io_type == H9632) {
4411                 runtime->hw.channels_min = hdsp->qs_in_channels;
4412                 runtime->hw.channels_max = hdsp->ss_in_channels;
4413                 runtime->hw.rate_max = 192000;
4414                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4415                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4416         }
4417         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4418                              snd_hdsp_hw_rule_in_channels, hdsp,
4419                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4420         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4421                              snd_hdsp_hw_rule_in_channels_rate, hdsp,
4422                              SNDRV_PCM_HW_PARAM_RATE, -1);
4423         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4424                              snd_hdsp_hw_rule_rate_in_channels, hdsp,
4425                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4426         return 0;
4427 }
4428
4429 static int snd_hdsp_capture_release(struct snd_pcm_substream *substream)
4430 {
4431         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4432
4433         spin_lock_irq(&hdsp->lock);
4434
4435         hdsp->capture_pid = -1;
4436         hdsp->capture_substream = NULL;
4437
4438         spin_unlock_irq(&hdsp->lock);
4439         return 0;
4440 }
4441
4442 /* helper functions for copying meter values */
4443 static inline int copy_u32_le(void __user *dest, void __iomem *src)
4444 {
4445         u32 val = readl(src);
4446         return copy_to_user(dest, &val, 4);
4447 }
4448
4449 static inline int copy_u64_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4450 {
4451         u32 rms_low, rms_high;
4452         u64 rms;
4453         rms_low = readl(src_low);
4454         rms_high = readl(src_high);
4455         rms = ((u64)rms_high << 32) | rms_low;
4456         return copy_to_user(dest, &rms, 8);
4457 }
4458
4459 static inline int copy_u48_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4460 {
4461         u32 rms_low, rms_high;
4462         u64 rms;
4463         rms_low = readl(src_low) & 0xffffff00;
4464         rms_high = readl(src_high) & 0xffffff00;
4465         rms = ((u64)rms_high << 32) | rms_low;
4466         return copy_to_user(dest, &rms, 8);
4467 }
4468
4469 static int hdsp_9652_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4470 {
4471         int doublespeed = 0;
4472         int i, j, channels, ofs;
4473
4474         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4475                 doublespeed = 1;
4476         channels = doublespeed ? 14 : 26;
4477         for (i = 0, j = 0; i < 26; ++i) {
4478                 if (doublespeed && (i & 4))
4479                         continue;
4480                 ofs = HDSP_9652_peakBase - j * 4;
4481                 if (copy_u32_le(&peak_rms->input_peaks[i], hdsp->iobase + ofs))
4482                         return -EFAULT;
4483                 ofs -= channels * 4;
4484                 if (copy_u32_le(&peak_rms->playback_peaks[i], hdsp->iobase + ofs))
4485                         return -EFAULT;
4486                 ofs -= channels * 4;
4487                 if (copy_u32_le(&peak_rms->output_peaks[i], hdsp->iobase + ofs))
4488                         return -EFAULT;
4489                 ofs = HDSP_9652_rmsBase + j * 8;
4490                 if (copy_u48_le(&peak_rms->input_rms[i], hdsp->iobase + ofs,
4491                                 hdsp->iobase + ofs + 4))
4492                         return -EFAULT;
4493                 ofs += channels * 8;
4494                 if (copy_u48_le(&peak_rms->playback_rms[i], hdsp->iobase + ofs,
4495                                 hdsp->iobase + ofs + 4))
4496                         return -EFAULT;
4497                 ofs += channels * 8;
4498                 if (copy_u48_le(&peak_rms->output_rms[i], hdsp->iobase + ofs,
4499                                 hdsp->iobase + ofs + 4))
4500                         return -EFAULT;
4501                 j++;
4502         }
4503         return 0;
4504 }
4505
4506 static int hdsp_9632_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4507 {
4508         int i, j;
4509         struct hdsp_9632_meters __iomem *m;
4510         int doublespeed = 0;
4511
4512         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4513                 doublespeed = 1;
4514         m = (struct hdsp_9632_meters __iomem *)(hdsp->iobase+HDSP_9632_metersBase);
4515         for (i = 0, j = 0; i < 16; ++i, ++j) {
4516                 if (copy_u32_le(&peak_rms->input_peaks[i], &m->input_peak[j]))
4517                         return -EFAULT;
4518                 if (copy_u32_le(&peak_rms->playback_peaks[i], &m->playback_peak[j]))
4519                         return -EFAULT;
4520                 if (copy_u32_le(&peak_rms->output_peaks[i], &m->output_peak[j]))
4521                         return -EFAULT;
4522                 if (copy_u64_le(&peak_rms->input_rms[i], &m->input_rms_low[j],
4523                                 &m->input_rms_high[j]))
4524                         return -EFAULT;
4525                 if (copy_u64_le(&peak_rms->playback_rms[i], &m->playback_rms_low[j],
4526                                 &m->playback_rms_high[j]))
4527                         return -EFAULT;
4528                 if (copy_u64_le(&peak_rms->output_rms[i], &m->output_rms_low[j],
4529                                 &m->output_rms_high[j]))
4530                         return -EFAULT;
4531                 if (doublespeed && i == 3) i += 4;
4532         }
4533         return 0;
4534 }
4535
4536 static int hdsp_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4537 {
4538         int i;
4539
4540         for (i = 0; i < 26; i++) {
4541                 if (copy_u32_le(&peak_rms->playback_peaks[i],
4542                                 hdsp->iobase + HDSP_playbackPeakLevel + i * 4))
4543                         return -EFAULT;
4544                 if (copy_u32_le(&peak_rms->input_peaks[i],
4545                                 hdsp->iobase + HDSP_inputPeakLevel + i * 4))
4546                         return -EFAULT;
4547         }
4548         for (i = 0; i < 28; i++) {
4549                 if (copy_u32_le(&peak_rms->output_peaks[i],
4550                                 hdsp->iobase + HDSP_outputPeakLevel + i * 4))
4551                         return -EFAULT;
4552         }
4553         for (i = 0; i < 26; ++i) {
4554                 if (copy_u64_le(&peak_rms->playback_rms[i],
4555                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8 + 4,
4556                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8))
4557                         return -EFAULT;
4558                 if (copy_u64_le(&peak_rms->input_rms[i],
4559                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8 + 4,
4560                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8))
4561                         return -EFAULT;
4562         }
4563         return 0;
4564 }
4565
4566 static int snd_hdsp_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
4567 {
4568         struct hdsp *hdsp = (struct hdsp *)hw->private_data;
4569         void __user *argp = (void __user *)arg;
4570         int err;
4571
4572         switch (cmd) {
4573         case SNDRV_HDSP_IOCTL_GET_PEAK_RMS: {
4574                 struct hdsp_peak_rms __user *peak_rms = (struct hdsp_peak_rms __user *)arg;
4575
4576                 err = hdsp_check_for_iobox(hdsp);
4577                 if (err < 0)
4578                         return err;
4579
4580                 err = hdsp_check_for_firmware(hdsp, 1);
4581                 if (err < 0)
4582                         return err;
4583
4584                 if (!(hdsp->state & HDSP_FirmwareLoaded)) {
4585                         snd_printk(KERN_ERR "Hammerfall-DSP: firmware needs to be uploaded to the card.\n");
4586                         return -EINVAL;
4587                 }
4588
4589                 switch (hdsp->io_type) {
4590                 case H9652:
4591                         return hdsp_9652_get_peak(hdsp, peak_rms);
4592                 case H9632:
4593                         return hdsp_9632_get_peak(hdsp, peak_rms);
4594                 default:
4595                         return hdsp_get_peak(hdsp, peak_rms);
4596                 }
4597         }
4598         case SNDRV_HDSP_IOCTL_GET_CONFIG_INFO: {
4599                 struct hdsp_config_info info;
4600                 unsigned long flags;
4601                 int i;
4602
4603                 err = hdsp_check_for_iobox(hdsp);
4604                 if (err < 0)
4605                         return err;
4606
4607                 err = hdsp_check_for_firmware(hdsp, 1);
4608                 if (err < 0)
4609                         return err;
4610
4611                 memset(&info, 0, sizeof(info));
4612                 spin_lock_irqsave(&hdsp->lock, flags);
4613                 info.pref_sync_ref = (unsigned char)hdsp_pref_sync_ref(hdsp);
4614                 info.wordclock_sync_check = (unsigned char)hdsp_wc_sync_check(hdsp);
4615                 if (hdsp->io_type != H9632)
4616                     info.adatsync_sync_check = (unsigned char)hdsp_adatsync_sync_check(hdsp);
4617                 info.spdif_sync_check = (unsigned char)hdsp_spdif_sync_check(hdsp);
4618                 for (i = 0; i < ((hdsp->io_type != Multiface && hdsp->io_type != H9632) ? 3 : 1); ++i)
4619                         info.adat_sync_check[i] = (unsigned char)hdsp_adat_sync_check(hdsp, i);
4620                 info.spdif_in = (unsigned char)hdsp_spdif_in(hdsp);
4621                 info.spdif_out = (unsigned char)hdsp_spdif_out(hdsp);
4622                 info.spdif_professional = (unsigned char)hdsp_spdif_professional(hdsp);
4623                 info.spdif_emphasis = (unsigned char)hdsp_spdif_emphasis(hdsp);
4624                 info.spdif_nonaudio = (unsigned char)hdsp_spdif_nonaudio(hdsp);
4625                 info.spdif_sample_rate = hdsp_spdif_sample_rate(hdsp);
4626                 info.system_sample_rate = hdsp->system_sample_rate;
4627                 info.autosync_sample_rate = hdsp_external_sample_rate(hdsp);
4628                 info.system_clock_mode = (unsigned char)hdsp_system_clock_mode(hdsp);
4629                 info.clock_source = (unsigned char)hdsp_clock_source(hdsp);
4630                 info.autosync_ref = (unsigned char)hdsp_autosync_ref(hdsp);
4631                 info.line_out = (unsigned char)hdsp_line_out(hdsp);
4632                 if (hdsp->io_type == H9632) {
4633                         info.da_gain = (unsigned char)hdsp_da_gain(hdsp);
4634                         info.ad_gain = (unsigned char)hdsp_ad_gain(hdsp);
4635                         info.phone_gain = (unsigned char)hdsp_phone_gain(hdsp);
4636                         info.xlr_breakout_cable = (unsigned char)hdsp_xlr_breakout_cable(hdsp);
4637
4638                 }
4639                 if (hdsp->io_type == H9632 || hdsp->io_type == H9652)
4640                         info.analog_extension_board = (unsigned char)hdsp_aeb(hdsp);
4641                 spin_unlock_irqrestore(&hdsp->lock, flags);
4642                 if (copy_to_user(argp, &info, sizeof(info)))
4643                         return -EFAULT;
4644                 break;
4645         }
4646         case SNDRV_HDSP_IOCTL_GET_9632_AEB: {
4647                 struct hdsp_9632_aeb h9632_aeb;
4648
4649                 if (hdsp->io_type != H9632) return -EINVAL;
4650                 h9632_aeb.aebi = hdsp->ss_in_channels - H9632_SS_CHANNELS;
4651                 h9632_aeb.aebo = hdsp->ss_out_channels - H9632_SS_CHANNELS;
4652                 if (copy_to_user(argp, &h9632_aeb, sizeof(h9632_aeb)))
4653                         return -EFAULT;
4654                 break;
4655         }
4656         case SNDRV_HDSP_IOCTL_GET_VERSION: {
4657                 struct hdsp_version hdsp_version;
4658                 int err;
4659
4660                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4661                 if (hdsp->io_type == Undefined) {
4662                         if ((err = hdsp_get_iobox_version(hdsp)) < 0)
4663                                 return err;
4664                 }
4665                 hdsp_version.io_type = hdsp->io_type;
4666                 hdsp_version.firmware_rev = hdsp->firmware_rev;
4667                 if ((err = copy_to_user(argp, &hdsp_version, sizeof(hdsp_version))))
4668                         return -EFAULT;
4669                 break;
4670         }
4671         case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE: {
4672                 struct hdsp_firmware __user *firmware;
4673                 u32 __user *firmware_data;
4674                 int err;
4675
4676                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4677                 /* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
4678                 if (hdsp->io_type == Undefined) return -EINVAL;
4679
4680                 if (hdsp->state & (HDSP_FirmwareCached | HDSP_FirmwareLoaded))
4681                         return -EBUSY;
4682
4683                 snd_printk(KERN_INFO "Hammerfall-DSP: initializing firmware upload\n");
4684                 firmware = (struct hdsp_firmware __user *)argp;
4685
4686                 if (get_user(firmware_data, &firmware->firmware_data))
4687                         return -EFAULT;
4688
4689                 if (hdsp_check_for_iobox (hdsp))
4690                         return -EIO;
4691
4692                 if (copy_from_user(hdsp->firmware_cache, firmware_data, sizeof(hdsp->firmware_cache)) != 0)
4693                         return -EFAULT;
4694
4695                 hdsp->state |= HDSP_FirmwareCached;
4696
4697                 if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
4698                         return err;
4699
4700                 if (!(hdsp->state & HDSP_InitializationComplete)) {
4701                         if ((err = snd_hdsp_enable_io(hdsp)) < 0)
4702                                 return err;
4703
4704                         snd_hdsp_initialize_channels(hdsp);
4705                         snd_hdsp_initialize_midi_flush(hdsp);
4706
4707                         if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
4708                                 snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
4709                                 return err;
4710                         }
4711                 }
4712                 break;
4713         }
4714         case SNDRV_HDSP_IOCTL_GET_MIXER: {
4715                 struct hdsp_mixer __user *mixer = (struct hdsp_mixer __user *)argp;
4716                 if (copy_to_user(mixer->matrix, hdsp->mixer_matrix, sizeof(unsigned short)*HDSP_MATRIX_MIXER_SIZE))
4717                         return -EFAULT;
4718                 break;
4719         }
4720         default:
4721                 return -EINVAL;
4722         }
4723         return 0;
4724 }
4725
4726 static struct snd_pcm_ops snd_hdsp_playback_ops = {
4727         .open =         snd_hdsp_playback_open,
4728         .close =        snd_hdsp_playback_release,
4729         .ioctl =        snd_hdsp_ioctl,
4730         .hw_params =    snd_hdsp_hw_params,
4731         .prepare =      snd_hdsp_prepare,
4732         .trigger =      snd_hdsp_trigger,
4733         .pointer =      snd_hdsp_hw_pointer,
4734         .copy =         snd_hdsp_playback_copy,
4735         .silence =      snd_hdsp_hw_silence,
4736 };
4737
4738 static struct snd_pcm_ops snd_hdsp_capture_ops = {
4739         .open =         snd_hdsp_capture_open,
4740         .close =        snd_hdsp_capture_release,
4741         .ioctl =        snd_hdsp_ioctl,
4742         .hw_params =    snd_hdsp_hw_params,
4743         .prepare =      snd_hdsp_prepare,
4744         .trigger =      snd_hdsp_trigger,
4745         .pointer =      snd_hdsp_hw_pointer,
4746         .copy =         snd_hdsp_capture_copy,
4747 };
4748
4749 static int snd_hdsp_create_hwdep(struct snd_card *card, struct hdsp *hdsp)
4750 {
4751         struct snd_hwdep *hw;
4752         int err;
4753
4754         if ((err = snd_hwdep_new(card, "HDSP hwdep", 0, &hw)) < 0)
4755                 return err;
4756
4757         hdsp->hwdep = hw;
4758         hw->private_data = hdsp;
4759         strcpy(hw->name, "HDSP hwdep interface");
4760
4761         hw->ops.ioctl = snd_hdsp_hwdep_ioctl;
4762
4763         return 0;
4764 }
4765
4766 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp)
4767 {
4768         struct snd_pcm *pcm;
4769         int err;
4770
4771         if ((err = snd_pcm_new(card, hdsp->card_name, 0, 1, 1, &pcm)) < 0)
4772                 return err;
4773
4774         hdsp->pcm = pcm;
4775         pcm->private_data = hdsp;
4776         strcpy(pcm->name, hdsp->card_name);
4777
4778         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_hdsp_playback_ops);
4779         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_hdsp_capture_ops);
4780
4781         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
4782
4783         return 0;
4784 }
4785
4786 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp)
4787 {
4788         hdsp->control2_register |= HDSP_9652_ENABLE_MIXER;
4789         hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
4790 }
4791
4792 static int snd_hdsp_enable_io (struct hdsp *hdsp)
4793 {
4794         int i;
4795
4796         if (hdsp_fifo_wait (hdsp, 0, 100)) {
4797                 snd_printk(KERN_ERR "Hammerfall-DSP: enable_io fifo_wait failed\n");
4798                 return -EIO;
4799         }
4800
4801         for (i = 0; i < hdsp->max_channels; ++i) {
4802                 hdsp_write (hdsp, HDSP_inputEnable + (4 * i), 1);
4803                 hdsp_write (hdsp, HDSP_outputEnable + (4 * i), 1);
4804         }
4805
4806         return 0;
4807 }
4808
4809 static void snd_hdsp_initialize_channels(struct hdsp *hdsp)
4810 {
4811         int status, aebi_channels, aebo_channels;
4812
4813         switch (hdsp->io_type) {
4814         case Digiface:
4815                 hdsp->card_name = "RME Hammerfall DSP + Digiface";
4816                 hdsp->ss_in_channels = hdsp->ss_out_channels = DIGIFACE_SS_CHANNELS;
4817                 hdsp->ds_in_channels = hdsp->ds_out_channels = DIGIFACE_DS_CHANNELS;
4818                 break;
4819
4820         case H9652:
4821                 hdsp->card_name = "RME Hammerfall HDSP 9652";
4822                 hdsp->ss_in_channels = hdsp->ss_out_channels = H9652_SS_CHANNELS;
4823                 hdsp->ds_in_channels = hdsp->ds_out_channels = H9652_DS_CHANNELS;
4824                 break;
4825
4826         case H9632:
4827                 status = hdsp_read(hdsp, HDSP_statusRegister);
4828                 /* HDSP_AEBx bits are low when AEB are connected */
4829                 aebi_channels = (status & HDSP_AEBI) ? 0 : 4;
4830                 aebo_channels = (status & HDSP_AEBO) ? 0 : 4;
4831                 hdsp->card_name = "RME Hammerfall HDSP 9632";
4832                 hdsp->ss_in_channels = H9632_SS_CHANNELS+aebi_channels;
4833                 hdsp->ds_in_channels = H9632_DS_CHANNELS+aebi_channels;
4834                 hdsp->qs_in_channels = H9632_QS_CHANNELS+aebi_channels;
4835                 hdsp->ss_out_channels = H9632_SS_CHANNELS+aebo_channels;
4836                 hdsp->ds_out_channels = H9632_DS_CHANNELS+aebo_channels;
4837                 hdsp->qs_out_channels = H9632_QS_CHANNELS+aebo_channels;
4838                 break;
4839
4840         case Multiface:
4841                 hdsp->card_name = "RME Hammerfall DSP + Multiface";
4842                 hdsp->ss_in_channels = hdsp->ss_out_channels = MULTIFACE_SS_CHANNELS;
4843                 hdsp->ds_in_channels = hdsp->ds_out_channels = MULTIFACE_DS_CHANNELS;
4844                 break;
4845
4846         default:
4847                 /* should never get here */
4848                 break;
4849         }
4850 }
4851
4852 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp)
4853 {
4854         snd_hdsp_flush_midi_input (hdsp, 0);
4855         snd_hdsp_flush_midi_input (hdsp, 1);
4856 }
4857
4858 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp)
4859 {
4860         int err;
4861
4862         if ((err = snd_hdsp_create_pcm(card, hdsp)) < 0) {
4863                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating pcm interface\n");
4864                 return err;
4865         }
4866
4867
4868         if ((err = snd_hdsp_create_midi(card, hdsp, 0)) < 0) {
4869                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating first midi interface\n");
4870                 return err;
4871         }
4872
4873         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
4874                 if ((err = snd_hdsp_create_midi(card, hdsp, 1)) < 0) {
4875                         snd_printk(KERN_ERR "Hammerfall-DSP: Error creating second midi interface\n");
4876                         return err;
4877                 }
4878         }
4879
4880         if ((err = snd_hdsp_create_controls(card, hdsp)) < 0) {
4881                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating ctl interface\n");
4882                 return err;
4883         }
4884
4885         snd_hdsp_proc_init(hdsp);
4886
4887         hdsp->system_sample_rate = -1;
4888         hdsp->playback_pid = -1;
4889         hdsp->capture_pid = -1;
4890         hdsp->capture_substream = NULL;
4891         hdsp->playback_substream = NULL;
4892
4893         if ((err = snd_hdsp_set_defaults(hdsp)) < 0) {
4894                 snd_printk(KERN_ERR "Hammerfall-DSP: Error setting default values\n");
4895                 return err;
4896         }
4897
4898         if (!(hdsp->state & HDSP_InitializationComplete)) {
4899                 strcpy(card->shortname, "Hammerfall DSP");
4900                 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
4901                         hdsp->port, hdsp->irq);
4902
4903                 if ((err = snd_card_register(card)) < 0) {
4904                         snd_printk(KERN_ERR "Hammerfall-DSP: error registering card\n");
4905                         return err;
4906                 }
4907                 hdsp->state |= HDSP_InitializationComplete;
4908         }
4909
4910         return 0;
4911 }
4912
4913 #ifdef HDSP_FW_LOADER
4914 /* load firmware via hotplug fw loader */
4915 static int hdsp_request_fw_loader(struct hdsp *hdsp)
4916 {
4917         const char *fwfile;
4918         const struct firmware *fw;
4919         int err;
4920
4921         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
4922                 return 0;
4923         if (hdsp->io_type == Undefined) {
4924                 if ((err = hdsp_get_iobox_version(hdsp)) < 0)
4925                         return err;
4926                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
4927                         return 0;
4928         }
4929
4930         /* caution: max length of firmware filename is 30! */
4931         switch (hdsp->io_type) {
4932         case Multiface:
4933                 if (hdsp->firmware_rev == 0xa)
4934                         fwfile = "multiface_firmware.bin";
4935                 else
4936                         fwfile = "multiface_firmware_rev11.bin";
4937                 break;
4938         case Digiface:
4939                 if (hdsp->firmware_rev == 0xa)
4940                         fwfile = "digiface_firmware.bin";
4941                 else
4942                         fwfile = "digiface_firmware_rev11.bin";
4943                 break;
4944         default:
4945                 snd_printk(KERN_ERR "Hammerfall-DSP: invalid io_type %d\n", hdsp->io_type);
4946                 return -EINVAL;
4947         }
4948
4949         if (request_firmware(&fw, fwfile, &hdsp->pci->dev)) {
4950                 snd_printk(KERN_ERR "Hammerfall-DSP: cannot load firmware %s\n", fwfile);
4951                 return -ENOENT;
4952         }
4953         if (fw->size < sizeof(hdsp->firmware_cache)) {
4954                 snd_printk(KERN_ERR "Hammerfall-DSP: too short firmware size %d (expected %d)\n",
4955                            (int)fw->size, (int)sizeof(hdsp->firmware_cache));
4956                 release_firmware(fw);
4957                 return -EINVAL;
4958         }
4959
4960         memcpy(hdsp->firmware_cache, fw->data, sizeof(hdsp->firmware_cache));
4961
4962         release_firmware(fw);
4963
4964         hdsp->state |= HDSP_FirmwareCached;
4965
4966         if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
4967                 return err;
4968
4969         if (!(hdsp->state & HDSP_InitializationComplete)) {
4970                 if ((err = snd_hdsp_enable_io(hdsp)) < 0)
4971                         return err;
4972
4973                 if ((err = snd_hdsp_create_hwdep(hdsp->card, hdsp)) < 0) {
4974                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating hwdep device\n");
4975                         return err;
4976                 }
4977                 snd_hdsp_initialize_channels(hdsp);
4978                 snd_hdsp_initialize_midi_flush(hdsp);
4979                 if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
4980                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
4981                         return err;
4982                 }
4983         }
4984         return 0;
4985 }
4986 #endif
4987
4988 static int __devinit snd_hdsp_create(struct snd_card *card,
4989                                      struct hdsp *hdsp)
4990 {
4991         struct pci_dev *pci = hdsp->pci;
4992         int err;
4993         int is_9652 = 0;
4994         int is_9632 = 0;
4995
4996         hdsp->irq = -1;
4997         hdsp->state = 0;
4998         hdsp->midi[0].rmidi = NULL;
4999         hdsp->midi[1].rmidi = NULL;
5000         hdsp->midi[0].input = NULL;
5001         hdsp->midi[1].input = NULL;
5002         hdsp->midi[0].output = NULL;
5003         hdsp->midi[1].output = NULL;
5004         hdsp->midi[0].pending = 0;
5005         hdsp->midi[1].pending = 0;
5006         spin_lock_init(&hdsp->midi[0].lock);
5007         spin_lock_init(&hdsp->midi[1].lock);
5008         hdsp->iobase = NULL;
5009         hdsp->control_register = 0;
5010         hdsp->control2_register = 0;
5011         hdsp->io_type = Undefined;
5012         hdsp->max_channels = 26;
5013
5014         hdsp->card = card;
5015
5016         spin_lock_init(&hdsp->lock);
5017
5018         tasklet_init(&hdsp->midi_tasklet, hdsp_midi_tasklet, (unsigned long)hdsp);
5019
5020         pci_read_config_word(hdsp->pci, PCI_CLASS_REVISION, &hdsp->firmware_rev);
5021         hdsp->firmware_rev &= 0xff;
5022
5023         /* From Martin Bjoernsen :
5024             "It is important that the card's latency timer register in
5025             the PCI configuration space is set to a value much larger
5026             than 0 by the computer's BIOS or the driver.
5027             The windows driver always sets this 8 bit register [...]
5028             to its maximum 255 to avoid problems with some computers."
5029         */
5030         pci_write_config_byte(hdsp->pci, PCI_LATENCY_TIMER, 0xFF);
5031
5032         strcpy(card->driver, "H-DSP");
5033         strcpy(card->mixername, "Xilinx FPGA");
5034
5035         if (hdsp->firmware_rev < 0xa)
5036                 return -ENODEV;
5037         else if (hdsp->firmware_rev < 0x64)
5038                 hdsp->card_name = "RME Hammerfall DSP";
5039         else if (hdsp->firmware_rev < 0x96) {
5040                 hdsp->card_name = "RME HDSP 9652";
5041                 is_9652 = 1;
5042         } else {
5043                 hdsp->card_name = "RME HDSP 9632";
5044                 hdsp->max_channels = 16;
5045                 is_9632 = 1;
5046         }
5047
5048         if ((err = pci_enable_device(pci)) < 0)
5049                 return err;
5050
5051         pci_set_master(hdsp->pci);
5052
5053         if ((err = pci_request_regions(pci, "hdsp")) < 0)
5054                 return err;
5055         hdsp->port = pci_resource_start(pci, 0);
5056         if ((hdsp->iobase = ioremap_nocache(hdsp->port, HDSP_IO_EXTENT)) == NULL) {
5057                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to remap region 0x%lx-0x%lx\n", hdsp->port, hdsp->port + HDSP_IO_EXTENT - 1);
5058                 return -EBUSY;
5059         }
5060
5061         if (request_irq(pci->irq, snd_hdsp_interrupt, IRQF_SHARED,
5062                         "hdsp", hdsp)) {
5063                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to use IRQ %d\n", pci->irq);
5064                 return -EBUSY;
5065         }
5066
5067         hdsp->irq = pci->irq;
5068         hdsp->precise_ptr = 0;
5069         hdsp->use_midi_tasklet = 1;
5070         hdsp->dds_value = 0;
5071
5072         if ((err = snd_hdsp_initialize_memory(hdsp)) < 0)
5073                 return err;
5074
5075         if (!is_9652 && !is_9632) {
5076                 /* we wait a maximum of 10 seconds to let freshly
5077                  * inserted cardbus cards do their hardware init */
5078                 err = hdsp_wait_for_iobox(hdsp, 1000, 10);
5079
5080                 if (err < 0)
5081                         return err;
5082
5083                 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
5084 #ifdef HDSP_FW_LOADER
5085                         if ((err = hdsp_request_fw_loader(hdsp)) < 0)
5086                                 /* we don't fail as this can happen
5087                                    if userspace is not ready for
5088                                    firmware upload
5089                                 */
5090                                 snd_printk(KERN_ERR "Hammerfall-DSP: couldn't get firmware from userspace. try using hdsploader\n");
5091                         else
5092                                 /* init is complete, we return */
5093                                 return 0;
5094 #endif
5095                         /* we defer initialization */
5096                         snd_printk(KERN_INFO "Hammerfall-DSP: card initialization pending : waiting for firmware\n");
5097                         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5098                                 return err;
5099                         return 0;
5100                 } else {
5101                         snd_printk(KERN_INFO "Hammerfall-DSP: Firmware already present, initializing card.\n");
5102                         if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
5103                                 hdsp->io_type = Multiface;
5104                         else
5105                                 hdsp->io_type = Digiface;
5106                 }
5107         }
5108
5109         if ((err = snd_hdsp_enable_io(hdsp)) != 0)
5110                 return err;
5111
5112         if (is_9652)
5113                 hdsp->io_type = H9652;
5114
5115         if (is_9632)
5116                 hdsp->io_type = H9632;
5117
5118         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5119                 return err;
5120
5121         snd_hdsp_initialize_channels(hdsp);
5122         snd_hdsp_initialize_midi_flush(hdsp);
5123
5124         hdsp->state |= HDSP_FirmwareLoaded;
5125
5126         if ((err = snd_hdsp_create_alsa_devices(card, hdsp)) < 0)
5127                 return err;
5128
5129         return 0;
5130 }
5131
5132 static int snd_hdsp_free(struct hdsp *hdsp)
5133 {
5134         if (hdsp->port) {
5135                 /* stop the audio, and cancel all interrupts */
5136                 tasklet_kill(&hdsp->midi_tasklet);
5137                 hdsp->control_register &= ~(HDSP_Start|HDSP_AudioInterruptEnable|HDSP_Midi0InterruptEnable|HDSP_Midi1InterruptEnable);
5138                 hdsp_write (hdsp, HDSP_controlRegister, hdsp->control_register);
5139         }
5140
5141         if (hdsp->irq >= 0)
5142                 free_irq(hdsp->irq, (void *)hdsp);
5143
5144         snd_hdsp_free_buffers(hdsp);
5145
5146         if (hdsp->iobase)
5147                 iounmap(hdsp->iobase);
5148
5149         if (hdsp->port)
5150                 pci_release_regions(hdsp->pci);
5151
5152         pci_disable_device(hdsp->pci);
5153         return 0;
5154 }
5155
5156 static void snd_hdsp_card_free(struct snd_card *card)
5157 {
5158         struct hdsp *hdsp = (struct hdsp *) card->private_data;
5159
5160         if (hdsp)
5161                 snd_hdsp_free(hdsp);
5162 }
5163
5164 static int __devinit snd_hdsp_probe(struct pci_dev *pci,
5165                                     const struct pci_device_id *pci_id)
5166 {
5167         static int dev;
5168         struct hdsp *hdsp;
5169         struct snd_card *card;
5170         int err;
5171
5172         if (dev >= SNDRV_CARDS)
5173                 return -ENODEV;
5174         if (!enable[dev]) {
5175                 dev++;
5176                 return -ENOENT;
5177         }
5178
5179         err = snd_card_create(index[dev], id[dev], THIS_MODULE,
5180                               sizeof(struct hdsp), &card);
5181         if (err < 0)
5182                 return err;
5183
5184         hdsp = (struct hdsp *) card->private_data;
5185         card->private_free = snd_hdsp_card_free;
5186         hdsp->dev = dev;
5187         hdsp->pci = pci;
5188         snd_card_set_dev(card, &pci->dev);
5189
5190         if ((err = snd_hdsp_create(card, hdsp)) < 0) {
5191                 snd_card_free(card);
5192                 return err;
5193         }
5194
5195         strcpy(card->shortname, "Hammerfall DSP");
5196         sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5197                 hdsp->port, hdsp->irq);
5198
5199         if ((err = snd_card_register(card)) < 0) {
5200                 snd_card_free(card);
5201                 return err;
5202         }
5203         pci_set_drvdata(pci, card);
5204         dev++;
5205         return 0;
5206 }
5207
5208 static void __devexit snd_hdsp_remove(struct pci_dev *pci)
5209 {
5210         snd_card_free(pci_get_drvdata(pci));
5211         pci_set_drvdata(pci, NULL);
5212 }
5213
5214 static struct pci_driver driver = {
5215         .name =     "RME Hammerfall DSP",
5216         .id_table = snd_hdsp_ids,
5217         .probe =    snd_hdsp_probe,
5218         .remove = __devexit_p(snd_hdsp_remove),
5219 };
5220
5221 static int __init alsa_card_hdsp_init(void)
5222 {
5223         return pci_register_driver(&driver);
5224 }
5225
5226 static void __exit alsa_card_hdsp_exit(void)
5227 {
5228         pci_unregister_driver(&driver);
5229 }
5230
5231 module_init(alsa_card_hdsp_init)
5232 module_exit(alsa_card_hdsp_exit)