release/src-rt-6.x.4708/linux/linux-2.6.36/sound/pci/oxygen/oxygen_pcm.c

   1 /*
   2  * C-Media CMI8788 driver - PCM code
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  *
   6  *
   7  *  This driver is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License, version 2.
   9  *
  10  *  This driver is distributed in the hope that it will be useful,
  11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *  GNU General Public License for more details.
  14  *
  15  *  You should have received a copy of the GNU General Public License
  16  *  along with this driver; if not, write to the Free Software
  17  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18  */
  19
  20 #include <linux/pci.h>
  21 #include <sound/control.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include "oxygen.h"
  26
  27 /* most DMA channels have a 16-bit counter for 32-bit words */
  28 #define BUFFER_BYTES_MAX                ((1 << 16) * 4)
  29 /* the multichannel DMA channel has a 24-bit counter */
  30 #define BUFFER_BYTES_MAX_MULTICH        ((1 << 24) * 4)
  31
  32 #define PERIOD_BYTES_MIN                64
  33
  34 #define DEFAULT_BUFFER_BYTES            (BUFFER_BYTES_MAX / 2)
  35 #define DEFAULT_BUFFER_BYTES_MULTICH    (1024 * 1024)
  36
  37 static const struct snd_pcm_hardware oxygen_stereo_hardware = {
  38         .info = SNDRV_PCM_INFO_MMAP |
  39                 SNDRV_PCM_INFO_MMAP_VALID |
  40                 SNDRV_PCM_INFO_INTERLEAVED |
  41                 SNDRV_PCM_INFO_PAUSE |
  42                 SNDRV_PCM_INFO_SYNC_START,
  43         .formats = SNDRV_PCM_FMTBIT_S16_LE |
  44                    SNDRV_PCM_FMTBIT_S32_LE,
  45         .rates = SNDRV_PCM_RATE_32000 |
  46                  SNDRV_PCM_RATE_44100 |
  47                  SNDRV_PCM_RATE_48000 |
  48                  SNDRV_PCM_RATE_64000 |
  49                  SNDRV_PCM_RATE_88200 |
  50                  SNDRV_PCM_RATE_96000 |
  51                  SNDRV_PCM_RATE_176400 |
  52                  SNDRV_PCM_RATE_192000,
  53         .rate_min = 32000,
  54         .rate_max = 192000,
  55         .channels_min = 2,
  56         .channels_max = 2,
  57         .buffer_bytes_max = BUFFER_BYTES_MAX,
  58         .period_bytes_min = PERIOD_BYTES_MIN,
  59         .period_bytes_max = BUFFER_BYTES_MAX / 2,
  60         .periods_min = 2,
  61         .periods_max = BUFFER_BYTES_MAX / PERIOD_BYTES_MIN,
  62 };
  63 static const struct snd_pcm_hardware oxygen_multichannel_hardware = {
  64         .info = SNDRV_PCM_INFO_MMAP |
  65                 SNDRV_PCM_INFO_MMAP_VALID |
  66                 SNDRV_PCM_INFO_INTERLEAVED |
  67                 SNDRV_PCM_INFO_PAUSE |
  68                 SNDRV_PCM_INFO_SYNC_START,
  69         .formats = SNDRV_PCM_FMTBIT_S16_LE |
  70                    SNDRV_PCM_FMTBIT_S32_LE,
  71         .rates = SNDRV_PCM_RATE_32000 |
  72                  SNDRV_PCM_RATE_44100 |
  73                  SNDRV_PCM_RATE_48000 |
  74                  SNDRV_PCM_RATE_64000 |
  75                  SNDRV_PCM_RATE_88200 |
  76                  SNDRV_PCM_RATE_96000 |
  77                  SNDRV_PCM_RATE_176400 |
  78                  SNDRV_PCM_RATE_192000,
  79         .rate_min = 32000,
  80         .rate_max = 192000,
  81         .channels_min = 2,
  82         .channels_max = 8,
  83         .buffer_bytes_max = BUFFER_BYTES_MAX_MULTICH,
  84         .period_bytes_min = PERIOD_BYTES_MIN,
  85         .period_bytes_max = BUFFER_BYTES_MAX_MULTICH / 2,
  86         .periods_min = 2,
  87         .periods_max = BUFFER_BYTES_MAX_MULTICH / PERIOD_BYTES_MIN,
  88 };
  89 static const struct snd_pcm_hardware oxygen_ac97_hardware = {
  90         .info = SNDRV_PCM_INFO_MMAP |
  91                 SNDRV_PCM_INFO_MMAP_VALID |
  92                 SNDRV_PCM_INFO_INTERLEAVED |
  93                 SNDRV_PCM_INFO_PAUSE |
  94                 SNDRV_PCM_INFO_SYNC_START,
  95         .formats = SNDRV_PCM_FMTBIT_S16_LE,
  96         .rates = SNDRV_PCM_RATE_48000,
  97         .rate_min = 48000,
  98         .rate_max = 48000,
  99         .channels_min = 2,
 100         .channels_max = 2,
 101         .buffer_bytes_max = BUFFER_BYTES_MAX,
 102         .period_bytes_min = PERIOD_BYTES_MIN,
 103         .period_bytes_max = BUFFER_BYTES_MAX / 2,
 104         .periods_min = 2,
 105         .periods_max = BUFFER_BYTES_MAX / PERIOD_BYTES_MIN,
 106 };
 107
 108 static const struct snd_pcm_hardware *const oxygen_hardware[PCM_COUNT] = {
 109         [PCM_A] = &oxygen_stereo_hardware,
 110         [PCM_B] = &oxygen_stereo_hardware,
 111         [PCM_C] = &oxygen_stereo_hardware,
 112         [PCM_SPDIF] = &oxygen_stereo_hardware,
 113         [PCM_MULTICH] = &oxygen_multichannel_hardware,
 114         [PCM_AC97] = &oxygen_ac97_hardware,
 115 };
 116
 117 static inline unsigned int
 118 oxygen_substream_channel(struct snd_pcm_substream *substream)
 119 {
 120         return (unsigned int)(uintptr_t)substream->runtime->private_data;
 121 }
 122
 123 static int oxygen_open(struct snd_pcm_substream *substream,
 124                        unsigned int channel)
 125 {
 126         struct oxygen *chip = snd_pcm_substream_chip(substream);
 127         struct snd_pcm_runtime *runtime = substream->runtime;
 128         int err;
 129
 130         runtime->private_data = (void *)(uintptr_t)channel;
 131         if (channel == PCM_B && chip->has_ac97_1 &&
 132             (chip->model.device_config & CAPTURE_2_FROM_AC97_1))
 133                 runtime->hw = oxygen_ac97_hardware;
 134         else
 135                 runtime->hw = *oxygen_hardware[channel];
 136         switch (channel) {
 137         case PCM_C:
 138                 runtime->hw.rates &= ~(SNDRV_PCM_RATE_32000 |
 139                                        SNDRV_PCM_RATE_64000);
 140                 runtime->hw.rate_min = 44100;
 141                 break;
 142         case PCM_MULTICH:
 143                 runtime->hw.channels_max = chip->model.dac_channels;
 144                 break;
 145         }
 146         if (chip->model.pcm_hardware_filter)
 147                 chip->model.pcm_hardware_filter(channel, &runtime->hw);
 148         err = snd_pcm_hw_constraint_step(runtime, 0,
 149                                          SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
 150         if (err < 0)
 151                 return err;
 152         err = snd_pcm_hw_constraint_step(runtime, 0,
 153                                          SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
 154         if (err < 0)
 155                 return err;
 156         if (runtime->hw.formats & SNDRV_PCM_FMTBIT_S32_LE) {
 157                 err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
 158                 if (err < 0)
 159                         return err;
 160         }
 161         if (runtime->hw.channels_max > 2) {
 162                 err = snd_pcm_hw_constraint_step(runtime, 0,
 163                                                  SNDRV_PCM_HW_PARAM_CHANNELS,
 164                                                  2);
 165                 if (err < 0)
 166                         return err;
 167         }
 168         if (channel == PCM_MULTICH) {
 169                 err = snd_pcm_hw_constraint_minmax
 170                         (runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 0, 8192000);
 171                 if (err < 0)
 172                         return err;
 173         }
 174         snd_pcm_set_sync(substream);
 175         chip->streams[channel] = substream;
 176
 177         mutex_lock(&chip->mutex);
 178         chip->pcm_active |= 1 << channel;
 179         if (channel == PCM_SPDIF) {
 180                 chip->spdif_pcm_bits = chip->spdif_bits;
 181                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access &=
 182                         ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 183                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 184                                SNDRV_CTL_EVENT_MASK_INFO,
 185                                &chip->controls[CONTROL_SPDIF_PCM]->id);
 186         }
 187         mutex_unlock(&chip->mutex);
 188
 189         return 0;
 190 }
 191
 192 static int oxygen_rec_a_open(struct snd_pcm_substream *substream)
 193 {
 194         return oxygen_open(substream, PCM_A);
 195 }
 196
 197 static int oxygen_rec_b_open(struct snd_pcm_substream *substream)
 198 {
 199         return oxygen_open(substream, PCM_B);
 200 }
 201
 202 static int oxygen_rec_c_open(struct snd_pcm_substream *substream)
 203 {
 204         return oxygen_open(substream, PCM_C);
 205 }
 206
 207 static int oxygen_spdif_open(struct snd_pcm_substream *substream)
 208 {
 209         return oxygen_open(substream, PCM_SPDIF);
 210 }
 211
 212 static int oxygen_multich_open(struct snd_pcm_substream *substream)
 213 {
 214         return oxygen_open(substream, PCM_MULTICH);
 215 }
 216
 217 static int oxygen_ac97_open(struct snd_pcm_substream *substream)
 218 {
 219         return oxygen_open(substream, PCM_AC97);
 220 }
 221
 222 static int oxygen_close(struct snd_pcm_substream *substream)
 223 {
 224         struct oxygen *chip = snd_pcm_substream_chip(substream);
 225         unsigned int channel = oxygen_substream_channel(substream);
 226
 227         mutex_lock(&chip->mutex);
 228         chip->pcm_active &= ~(1 << channel);
 229         if (channel == PCM_SPDIF) {
 230                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access |=
 231                         SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 232                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 233                                SNDRV_CTL_EVENT_MASK_INFO,
 234                                &chip->controls[CONTROL_SPDIF_PCM]->id);
 235         }
 236         if (channel == PCM_SPDIF || channel == PCM_MULTICH)
 237                 oxygen_update_spdif_source(chip);
 238         mutex_unlock(&chip->mutex);
 239
 240         chip->streams[channel] = NULL;
 241         return 0;
 242 }
 243
 244 static unsigned int oxygen_format(struct snd_pcm_hw_params *hw_params)
 245 {
 246         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
 247                 return OXYGEN_FORMAT_24;
 248         else
 249                 return OXYGEN_FORMAT_16;
 250 }
 251
 252 static unsigned int oxygen_rate(struct snd_pcm_hw_params *hw_params)
 253 {
 254         switch (params_rate(hw_params)) {
 255         case 32000:
 256                 return OXYGEN_RATE_32000;
 257         case 44100:
 258                 return OXYGEN_RATE_44100;
 259         default: /* 48000 */
 260                 return OXYGEN_RATE_48000;
 261         case 64000:
 262                 return OXYGEN_RATE_64000;
 263         case 88200:
 264                 return OXYGEN_RATE_88200;
 265         case 96000:
 266                 return OXYGEN_RATE_96000;
 267         case 176400:
 268                 return OXYGEN_RATE_176400;
 269         case 192000:
 270                 return OXYGEN_RATE_192000;
 271         }
 272 }
 273
 274 unsigned int oxygen_default_i2s_mclk(struct oxygen *chip,
 275                                      unsigned int channel,
 276                                      struct snd_pcm_hw_params *hw_params)
 277 {
 278         if (params_rate(hw_params) <= 96000)
 279                 return OXYGEN_I2S_MCLK_256;
 280         else
 281                 return OXYGEN_I2S_MCLK_128;
 282 }
 283 EXPORT_SYMBOL(oxygen_default_i2s_mclk);
 284
 285 static unsigned int oxygen_i2s_bits(struct snd_pcm_hw_params *hw_params)
 286 {
 287         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
 288                 return OXYGEN_I2S_BITS_24;
 289         else
 290                 return OXYGEN_I2S_BITS_16;
 291 }
 292
 293 static unsigned int oxygen_play_channels(struct snd_pcm_hw_params *hw_params)
 294 {
 295         switch (params_channels(hw_params)) {
 296         default: /* 2 */
 297                 return OXYGEN_PLAY_CHANNELS_2;
 298         case 4:
 299                 return OXYGEN_PLAY_CHANNELS_4;
 300         case 6:
 301                 return OXYGEN_PLAY_CHANNELS_6;
 302         case 8:
 303                 return OXYGEN_PLAY_CHANNELS_8;
 304         }
 305 }
 306
 307 static const unsigned int channel_base_registers[PCM_COUNT] = {
 308         [PCM_A] = OXYGEN_DMA_A_ADDRESS,
 309         [PCM_B] = OXYGEN_DMA_B_ADDRESS,
 310         [PCM_C] = OXYGEN_DMA_C_ADDRESS,
 311         [PCM_SPDIF] = OXYGEN_DMA_SPDIF_ADDRESS,
 312         [PCM_MULTICH] = OXYGEN_DMA_MULTICH_ADDRESS,
 313         [PCM_AC97] = OXYGEN_DMA_AC97_ADDRESS,
 314 };
 315
 316 static int oxygen_hw_params(struct snd_pcm_substream *substream,
 317                             struct snd_pcm_hw_params *hw_params)
 318 {
 319         struct oxygen *chip = snd_pcm_substream_chip(substream);
 320         unsigned int channel = oxygen_substream_channel(substream);
 321         int err;
 322
 323         err = snd_pcm_lib_malloc_pages(substream,
 324                                        params_buffer_bytes(hw_params));
 325         if (err < 0)
 326                 return err;
 327
 328         oxygen_write32(chip, channel_base_registers[channel],
 329                        (u32)substream->runtime->dma_addr);
 330         if (channel == PCM_MULTICH) {
 331                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_COUNT,
 332                                params_buffer_bytes(hw_params) / 4 - 1);
 333                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_TCOUNT,
 334                                params_period_bytes(hw_params) / 4 - 1);
 335         } else {
 336                 oxygen_write16(chip, channel_base_registers[channel] + 4,
 337                                params_buffer_bytes(hw_params) / 4 - 1);
 338                 oxygen_write16(chip, channel_base_registers[channel] + 6,
 339                                params_period_bytes(hw_params) / 4 - 1);
 340         }
 341         return 0;
 342 }
 343
 344 static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream,
 345                                   struct snd_pcm_hw_params *hw_params)
 346 {
 347         struct oxygen *chip = snd_pcm_substream_chip(substream);
 348         int err;
 349
 350         err = oxygen_hw_params(substream, hw_params);
 351         if (err < 0)
 352                 return err;
 353
 354         spin_lock_irq(&chip->reg_lock);
 355         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 356                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT,
 357                              OXYGEN_REC_FORMAT_A_MASK);
 358         oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT,
 359                               oxygen_rate(hw_params) |
 360                               chip->model.get_i2s_mclk(chip, PCM_A, hw_params) |
 361                               chip->model.adc_i2s_format |
 362                               oxygen_i2s_bits(hw_params),
 363                               OXYGEN_I2S_RATE_MASK |
 364                               OXYGEN_I2S_FORMAT_MASK |
 365                               OXYGEN_I2S_MCLK_MASK |
 366                               OXYGEN_I2S_BITS_MASK);
 367         spin_unlock_irq(&chip->reg_lock);
 368
 369         mutex_lock(&chip->mutex);
 370         chip->model.set_adc_params(chip, hw_params);
 371         mutex_unlock(&chip->mutex);
 372         return 0;
 373 }
 374
 375 static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream,
 376                                   struct snd_pcm_hw_params *hw_params)
 377 {
 378         struct oxygen *chip = snd_pcm_substream_chip(substream);
 379         int is_ac97;
 380         int err;
 381
 382         err = oxygen_hw_params(substream, hw_params);
 383         if (err < 0)
 384                 return err;
 385
 386         is_ac97 = chip->has_ac97_1 &&
 387                 (chip->model.device_config & CAPTURE_2_FROM_AC97_1);
 388
 389         spin_lock_irq(&chip->reg_lock);
 390         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 391                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT,
 392                              OXYGEN_REC_FORMAT_B_MASK);
 393         if (!is_ac97)
 394                 oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT,
 395                                       oxygen_rate(hw_params) |
 396                                       chip->model.get_i2s_mclk(chip, PCM_B,
 397                                                                hw_params) |
 398                                       chip->model.adc_i2s_format |
 399                                       oxygen_i2s_bits(hw_params),
 400                                       OXYGEN_I2S_RATE_MASK |
 401                                       OXYGEN_I2S_FORMAT_MASK |
 402                                       OXYGEN_I2S_MCLK_MASK |
 403                                       OXYGEN_I2S_BITS_MASK);
 404         spin_unlock_irq(&chip->reg_lock);
 405
 406         if (!is_ac97) {
 407                 mutex_lock(&chip->mutex);
 408                 chip->model.set_adc_params(chip, hw_params);
 409                 mutex_unlock(&chip->mutex);
 410         }
 411         return 0;
 412 }
 413
 414 static int oxygen_rec_c_hw_params(struct snd_pcm_substream *substream,
 415                                   struct snd_pcm_hw_params *hw_params)
 416 {
 417         struct oxygen *chip = snd_pcm_substream_chip(substream);
 418         int err;
 419
 420         err = oxygen_hw_params(substream, hw_params);
 421         if (err < 0)
 422                 return err;
 423
 424         spin_lock_irq(&chip->reg_lock);
 425         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 426                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
 427                              OXYGEN_REC_FORMAT_C_MASK);
 428         spin_unlock_irq(&chip->reg_lock);
 429         return 0;
 430 }
 431
 432 static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
 433                                   struct snd_pcm_hw_params *hw_params)
 434 {
 435         struct oxygen *chip = snd_pcm_substream_chip(substream);
 436         int err;
 437
 438         err = oxygen_hw_params(substream, hw_params);
 439         if (err < 0)
 440                 return err;
 441
 442         mutex_lock(&chip->mutex);
 443         spin_lock_irq(&chip->reg_lock);
 444         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 445                             OXYGEN_SPDIF_OUT_ENABLE);
 446         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 447                              oxygen_format(hw_params) << OXYGEN_SPDIF_FORMAT_SHIFT,
 448                              OXYGEN_SPDIF_FORMAT_MASK);
 449         oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
 450                               oxygen_rate(hw_params) << OXYGEN_SPDIF_OUT_RATE_SHIFT,
 451                               OXYGEN_SPDIF_OUT_RATE_MASK);
 452         oxygen_update_spdif_source(chip);
 453         spin_unlock_irq(&chip->reg_lock);
 454         mutex_unlock(&chip->mutex);
 455         return 0;
 456 }
 457
 458 static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
 459                                     struct snd_pcm_hw_params *hw_params)
 460 {
 461         struct oxygen *chip = snd_pcm_substream_chip(substream);
 462         int err;
 463
 464         err = oxygen_hw_params(substream, hw_params);
 465         if (err < 0)
 466                 return err;
 467
 468         mutex_lock(&chip->mutex);
 469         spin_lock_irq(&chip->reg_lock);
 470         oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
 471                              oxygen_play_channels(hw_params),
 472                              OXYGEN_PLAY_CHANNELS_MASK);
 473         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 474                              oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT,
 475                              OXYGEN_MULTICH_FORMAT_MASK);
 476         oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
 477                               oxygen_rate(hw_params) |
 478                               chip->model.dac_i2s_format |
 479                               chip->model.get_i2s_mclk(chip, PCM_MULTICH,
 480                                                        hw_params) |
 481                               oxygen_i2s_bits(hw_params),
 482                               OXYGEN_I2S_RATE_MASK |
 483                               OXYGEN_I2S_FORMAT_MASK |
 484                               OXYGEN_I2S_MCLK_MASK |
 485                               OXYGEN_I2S_BITS_MASK);
 486         oxygen_update_spdif_source(chip);
 487         spin_unlock_irq(&chip->reg_lock);
 488
 489         chip->model.set_dac_params(chip, hw_params);
 490         oxygen_update_dac_routing(chip);
 491         mutex_unlock(&chip->mutex);
 492         return 0;
 493 }
 494
 495 static int oxygen_hw_free(struct snd_pcm_substream *substream)
 496 {
 497         struct oxygen *chip = snd_pcm_substream_chip(substream);
 498         unsigned int channel = oxygen_substream_channel(substream);
 499         unsigned int channel_mask = 1 << channel;
 500
 501         spin_lock_irq(&chip->reg_lock);
 502         chip->interrupt_mask &= ~channel_mask;
 503         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 504
 505         oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 506         oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 507         spin_unlock_irq(&chip->reg_lock);
 508
 509         return snd_pcm_lib_free_pages(substream);
 510 }
 511
 512 static int oxygen_spdif_hw_free(struct snd_pcm_substream *substream)
 513 {
 514         struct oxygen *chip = snd_pcm_substream_chip(substream);
 515
 516         spin_lock_irq(&chip->reg_lock);
 517         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 518                             OXYGEN_SPDIF_OUT_ENABLE);
 519         spin_unlock_irq(&chip->reg_lock);
 520         return oxygen_hw_free(substream);
 521 }
 522
 523 static int oxygen_prepare(struct snd_pcm_substream *substream)
 524 {
 525         struct oxygen *chip = snd_pcm_substream_chip(substream);
 526         unsigned int channel = oxygen_substream_channel(substream);
 527         unsigned int channel_mask = 1 << channel;
 528
 529         spin_lock_irq(&chip->reg_lock);
 530         oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 531         oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 532
 533         chip->interrupt_mask |= channel_mask;
 534         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 535         spin_unlock_irq(&chip->reg_lock);
 536         return 0;
 537 }
 538
 539 static int oxygen_trigger(struct snd_pcm_substream *substream, int cmd)
 540 {
 541         struct oxygen *chip = snd_pcm_substream_chip(substream);
 542         struct snd_pcm_substream *s;
 543         unsigned int mask = 0;
 544         int pausing;
 545
 546         switch (cmd) {
 547         case SNDRV_PCM_TRIGGER_STOP:
 548         case SNDRV_PCM_TRIGGER_START:
 549         case SNDRV_PCM_TRIGGER_SUSPEND:
 550                 pausing = 0;
 551                 break;
 552         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 553         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 554                 pausing = 1;
 555                 break;
 556         default:
 557                 return -EINVAL;
 558         }
 559
 560         snd_pcm_group_for_each_entry(s, substream) {
 561                 if (snd_pcm_substream_chip(s) == chip) {
 562                         mask |= 1 << oxygen_substream_channel(s);
 563                         snd_pcm_trigger_done(s, substream);
 564                 }
 565         }
 566
 567         spin_lock(&chip->reg_lock);
 568         if (!pausing) {
 569                 if (cmd == SNDRV_PCM_TRIGGER_START)
 570                         chip->pcm_running |= mask;
 571                 else
 572                         chip->pcm_running &= ~mask;
 573                 oxygen_write8(chip, OXYGEN_DMA_STATUS, chip->pcm_running);
 574         } else {
 575                 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
 576                         oxygen_set_bits8(chip, OXYGEN_DMA_PAUSE, mask);
 577                 else
 578                         oxygen_clear_bits8(chip, OXYGEN_DMA_PAUSE, mask);
 579         }
 580         spin_unlock(&chip->reg_lock);
 581         return 0;
 582 }
 583
 584 static snd_pcm_uframes_t oxygen_pointer(struct snd_pcm_substream *substream)
 585 {
 586         struct oxygen *chip = snd_pcm_substream_chip(substream);
 587         struct snd_pcm_runtime *runtime = substream->runtime;
 588         unsigned int channel = oxygen_substream_channel(substream);
 589         u32 curr_addr;
 590
 591         /* no spinlock, this read should be atomic */
 592         curr_addr = oxygen_read32(chip, channel_base_registers[channel]);
 593         return bytes_to_frames(runtime, curr_addr - (u32)runtime->dma_addr);
 594 }
 595
 596 static struct snd_pcm_ops oxygen_rec_a_ops = {
 597         .open      = oxygen_rec_a_open,
 598         .close     = oxygen_close,
 599         .ioctl     = snd_pcm_lib_ioctl,
 600         .hw_params = oxygen_rec_a_hw_params,
 601         .hw_free   = oxygen_hw_free,
 602         .prepare   = oxygen_prepare,
 603         .trigger   = oxygen_trigger,
 604         .pointer   = oxygen_pointer,
 605 };
 606
 607 static struct snd_pcm_ops oxygen_rec_b_ops = {
 608         .open      = oxygen_rec_b_open,
 609         .close     = oxygen_close,
 610         .ioctl     = snd_pcm_lib_ioctl,
 611         .hw_params = oxygen_rec_b_hw_params,
 612         .hw_free   = oxygen_hw_free,
 613         .prepare   = oxygen_prepare,
 614         .trigger   = oxygen_trigger,
 615         .pointer   = oxygen_pointer,
 616 };
 617
 618 static struct snd_pcm_ops oxygen_rec_c_ops = {
 619         .open      = oxygen_rec_c_open,
 620         .close     = oxygen_close,
 621         .ioctl     = snd_pcm_lib_ioctl,
 622         .hw_params = oxygen_rec_c_hw_params,
 623         .hw_free   = oxygen_hw_free,
 624         .prepare   = oxygen_prepare,
 625         .trigger   = oxygen_trigger,
 626         .pointer   = oxygen_pointer,
 627 };
 628
 629 static struct snd_pcm_ops oxygen_spdif_ops = {
 630         .open      = oxygen_spdif_open,
 631         .close     = oxygen_close,
 632         .ioctl     = snd_pcm_lib_ioctl,
 633         .hw_params = oxygen_spdif_hw_params,
 634         .hw_free   = oxygen_spdif_hw_free,
 635         .prepare   = oxygen_prepare,
 636         .trigger   = oxygen_trigger,
 637         .pointer   = oxygen_pointer,
 638 };
 639
 640 static struct snd_pcm_ops oxygen_multich_ops = {
 641         .open      = oxygen_multich_open,
 642         .close     = oxygen_close,
 643         .ioctl     = snd_pcm_lib_ioctl,
 644         .hw_params = oxygen_multich_hw_params,
 645         .hw_free   = oxygen_hw_free,
 646         .prepare   = oxygen_prepare,
 647         .trigger   = oxygen_trigger,
 648         .pointer   = oxygen_pointer,
 649 };
 650
 651 static struct snd_pcm_ops oxygen_ac97_ops = {
 652         .open      = oxygen_ac97_open,
 653         .close     = oxygen_close,
 654         .ioctl     = snd_pcm_lib_ioctl,
 655         .hw_params = oxygen_hw_params,
 656         .hw_free   = oxygen_hw_free,
 657         .prepare   = oxygen_prepare,
 658         .trigger   = oxygen_trigger,
 659         .pointer   = oxygen_pointer,
 660 };
 661
 662 static void oxygen_pcm_free(struct snd_pcm *pcm)
 663 {
 664         snd_pcm_lib_preallocate_free_for_all(pcm);
 665 }
 666
 667 int oxygen_pcm_init(struct oxygen *chip)
 668 {
 669         struct snd_pcm *pcm;
 670         int outs, ins;
 671         int err;
 672
 673         outs = !!(chip->model.device_config & PLAYBACK_0_TO_I2S);
 674         ins = !!(chip->model.device_config & (CAPTURE_0_FROM_I2S_1 |
 675                                               CAPTURE_0_FROM_I2S_2));
 676         if (outs | ins) {
 677                 err = snd_pcm_new(chip->card, "Multichannel",
 678                                   0, outs, ins, &pcm);
 679                 if (err < 0)
 680                         return err;
 681                 if (outs)
 682                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 683                                         &oxygen_multich_ops);
 684                 if (chip->model.device_config & CAPTURE_0_FROM_I2S_1)
 685                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 686                                         &oxygen_rec_a_ops);
 687                 else if (chip->model.device_config & CAPTURE_0_FROM_I2S_2)
 688                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 689                                         &oxygen_rec_b_ops);
 690                 pcm->private_data = chip;
 691                 pcm->private_free = oxygen_pcm_free;
 692                 strcpy(pcm->name, "Multichannel");
 693                 if (outs)
 694                         snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream,
 695                                                       SNDRV_DMA_TYPE_DEV,
 696                                                       snd_dma_pci_data(chip->pci),
 697                                                       DEFAULT_BUFFER_BYTES_MULTICH,
 698                                                       BUFFER_BYTES_MAX_MULTICH);
 699                 if (ins)
 700                         snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream,
 701                                                       SNDRV_DMA_TYPE_DEV,
 702                                                       snd_dma_pci_data(chip->pci),
 703                                                       DEFAULT_BUFFER_BYTES,
 704                                                       BUFFER_BYTES_MAX);
 705         }
 706
 707         outs = !!(chip->model.device_config & PLAYBACK_1_TO_SPDIF);
 708         ins = !!(chip->model.device_config & CAPTURE_1_FROM_SPDIF);
 709         if (outs | ins) {
 710                 err = snd_pcm_new(chip->card, "Digital", 1, outs, ins, &pcm);
 711                 if (err < 0)
 712                         return err;
 713                 if (outs)
 714                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 715                                         &oxygen_spdif_ops);
 716                 if (ins)
 717                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 718                                         &oxygen_rec_c_ops);
 719                 pcm->private_data = chip;
 720                 pcm->private_free = oxygen_pcm_free;
 721                 strcpy(pcm->name, "Digital");
 722                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 723                                                       snd_dma_pci_data(chip->pci),
 724                                                       DEFAULT_BUFFER_BYTES,
 725                                                       BUFFER_BYTES_MAX);
 726         }
 727
 728         if (chip->has_ac97_1) {
 729                 outs = !!(chip->model.device_config & PLAYBACK_2_TO_AC97_1);
 730                 ins = !!(chip->model.device_config & CAPTURE_2_FROM_AC97_1);
 731         } else {
 732                 outs = 0;
 733                 ins = !!(chip->model.device_config & CAPTURE_2_FROM_I2S_2);
 734         }
 735         if (outs | ins) {
 736                 err = snd_pcm_new(chip->card, outs ? "AC97" : "Analog2",
 737                                   2, outs, ins, &pcm);
 738                 if (err < 0)
 739                         return err;
 740                 if (outs) {
 741                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 742                                         &oxygen_ac97_ops);
 743                         oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
 744                                              OXYGEN_REC_B_ROUTE_AC97_1,
 745                                              OXYGEN_REC_B_ROUTE_MASK);
 746                 }
 747                 if (ins)
 748                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 749                                         &oxygen_rec_b_ops);
 750                 pcm->private_data = chip;
 751                 pcm->private_free = oxygen_pcm_free;
 752                 strcpy(pcm->name, outs ? "Front Panel" : "Analog 2");
 753                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 754                                                       snd_dma_pci_data(chip->pci),
 755                                                       DEFAULT_BUFFER_BYTES,
 756                                                       BUFFER_BYTES_MAX);
 757         }
 758         return 0;
 759 }