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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / sound / arm / aaci.c
blob63a715a826dcace74032dda348f04eb3f5f38a60
1 /*
2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
3 *
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Documentation: ARM DDI 0173B
11 */
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
21 #include <linux/io.h>
22
23 #include <sound/core.h>
24 #include <sound/initval.h>
25 #include <sound/ac97_codec.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28
29 #include "aaci.h"
30
31 #define DRIVER_NAME "aaci-pl041"
32
33 /*
34 * PM support is not complete. Turn it off.
35 */
36 #undef CONFIG_PM
37
38 static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
39 {
40 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num);
41
42 /*
43 * Ensure that the slot 1/2 RX registers are empty.
44 */
45 v = readl(aaci->base + AACI_SLFR);
46 if (v & SLFR_2RXV)
47 readl(aaci->base + AACI_SL2RX);
48 if (v & SLFR_1RXV)
49 readl(aaci->base + AACI_SL1RX);
50
51 writel(maincr, aaci->base + AACI_MAINCR);
52 }
53
54 /*
55 * P29:
56 * The recommended use of programming the external codec through slot 1
57 * and slot 2 data is to use the channels during setup routines and the
58 * slot register at any other time. The data written into slot 1, slot 2
59 * and slot 12 registers is transmitted only when their corresponding
60 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
61 * register.
62 */
63 static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
64 unsigned short val)
65 {
66 struct aaci *aaci = ac97->private_data;
67 u32 v;
68 int timeout = 5000;
69
70 if (ac97->num >= 4)
71 return;
72
73 mutex_lock(&aaci->ac97_sem);
74
75 aaci_ac97_select_codec(aaci, ac97);
76
77 /*
78 * P54: You must ensure that AACI_SL2TX is always written
79 * to, if required, before data is written to AACI_SL1TX.
80 */
81 writel(val << 4, aaci->base + AACI_SL2TX);
82 writel(reg << 12, aaci->base + AACI_SL1TX);
83
84 /*
85 * Wait for the transmission of both slots to complete.
86 */
87 do {
88 v = readl(aaci->base + AACI_SLFR);
89 } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout);
90
91 if (!timeout)
92 dev_err(&aaci->dev->dev,
93 "timeout waiting for write to complete\n");
94
95 mutex_unlock(&aaci->ac97_sem);
96 }
97
98 /*
99 * Read an AC'97 register.
100 */
101 static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
102 {
103 struct aaci *aaci = ac97->private_data;
104 u32 v;
105 int timeout = 5000;
106 int retries = 10;
107
108 if (ac97->num >= 4)
109 return ~0;
110
111 mutex_lock(&aaci->ac97_sem);
112
113 aaci_ac97_select_codec(aaci, ac97);
114
115 /*
116 * Write the register address to slot 1.
117 */
118 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
119
120 /*
121 * Wait for the transmission to complete.
122 */
123 do {
124 v = readl(aaci->base + AACI_SLFR);
125 } while ((v & SLFR_1TXB) && --timeout);
126
127 if (!timeout) {
128 dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n");
129 v = ~0;
130 goto out;
131 }
132
133 /*
134 * Give the AC'97 codec more than enough time
135 * to respond. (42us = ~2 frames at 48kHz.)
136 */
137 udelay(42);
138
139 /*
140 * Wait for slot 2 to indicate data.
141 */
142 timeout = 5000;
143 do {
144 cond_resched();
145 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
146 } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout);
147
148 if (!timeout) {
149 dev_err(&aaci->dev->dev, "timeout on RX valid\n");
150 v = ~0;
151 goto out;
152 }
153
154 do {
155 v = readl(aaci->base + AACI_SL1RX) >> 12;
156 if (v == reg) {
157 v = readl(aaci->base + AACI_SL2RX) >> 4;
158 break;
159 } else if (--retries) {
160 dev_warn(&aaci->dev->dev,
161 "ac97 read back fail. retry\n");
162 continue;
163 } else {
164 dev_warn(&aaci->dev->dev,
165 "wrong ac97 register read back (%x != %x)\n",
166 v, reg);
167 v = ~0;
168 }
169 } while (retries);
170 out:
171 mutex_unlock(&aaci->ac97_sem);
172 return v;
173 }
174
175 static inline void
176 aaci_chan_wait_ready(struct aaci_runtime *aacirun, unsigned long mask)
177 {
178 u32 val;
179 int timeout = 5000;
180
181 do {
182 val = readl(aacirun->base + AACI_SR);
183 } while (val & mask && timeout--);
184 }
185
186
187
188 /*
189 * Interrupt support.
190 */
191 static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
192 {
193 if (mask & ISR_ORINTR) {
194 dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel);
195 writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
196 }
197
198 if (mask & ISR_RXTOINTR) {
199 dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel);
200 writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
201 }
202
203 if (mask & ISR_RXINTR) {
204 struct aaci_runtime *aacirun = &aaci->capture;
205 void *ptr;
206
207 if (!aacirun->substream || !aacirun->start) {
208 dev_warn(&aaci->dev->dev, "RX interrupt???\n");
209 writel(0, aacirun->base + AACI_IE);
210 return;
211 }
212
213 spin_lock(&aacirun->lock);
214
215 ptr = aacirun->ptr;
216 do {
217 unsigned int len = aacirun->fifosz;
218 u32 val;
219
220 if (aacirun->bytes <= 0) {
221 aacirun->bytes += aacirun->period;
222 aacirun->ptr = ptr;
223 spin_unlock(&aacirun->lock);
224 snd_pcm_period_elapsed(aacirun->substream);
225 spin_lock(&aacirun->lock);
226 }
227 if (!(aacirun->cr & CR_EN))
228 break;
229
230 val = readl(aacirun->base + AACI_SR);
231 if (!(val & SR_RXHF))
232 break;
233 if (!(val & SR_RXFF))
234 len >>= 1;
235
236 aacirun->bytes -= len;
237
238 /* reading 16 bytes at a time */
239 for( ; len > 0; len -= 16) {
240 asm(
241 "ldmia %1, {r0, r1, r2, r3}\n\t"
242 "stmia %0!, {r0, r1, r2, r3}"
243 : "+r" (ptr)
244 : "r" (aacirun->fifo)
245 : "r0", "r1", "r2", "r3", "cc");
246
247 if (ptr >= aacirun->end)
248 ptr = aacirun->start;
249 }
250 } while(1);
251
252 aacirun->ptr = ptr;
253
254 spin_unlock(&aacirun->lock);
255 }
256
257 if (mask & ISR_URINTR) {
258 dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel);
259 writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
260 }
261
262 if (mask & ISR_TXINTR) {
263 struct aaci_runtime *aacirun = &aaci->playback;
264 void *ptr;
265
266 if (!aacirun->substream || !aacirun->start) {
267 dev_warn(&aaci->dev->dev, "TX interrupt???\n");
268 writel(0, aacirun->base + AACI_IE);
269 return;
270 }
271
272 spin_lock(&aacirun->lock);
273
274 ptr = aacirun->ptr;
275 do {
276 unsigned int len = aacirun->fifosz;
277 u32 val;
278
279 if (aacirun->bytes <= 0) {
280 aacirun->bytes += aacirun->period;
281 aacirun->ptr = ptr;
282 spin_unlock(&aacirun->lock);
283 snd_pcm_period_elapsed(aacirun->substream);
284 spin_lock(&aacirun->lock);
285 }
286 if (!(aacirun->cr & CR_EN))
287 break;
288
289 val = readl(aacirun->base + AACI_SR);
290 if (!(val & SR_TXHE))
291 break;
292 if (!(val & SR_TXFE))
293 len >>= 1;
294
295 aacirun->bytes -= len;
296
297 /* writing 16 bytes at a time */
298 for ( ; len > 0; len -= 16) {
299 asm(
300 "ldmia %0!, {r0, r1, r2, r3}\n\t"
301 "stmia %1, {r0, r1, r2, r3}"
302 : "+r" (ptr)
303 : "r" (aacirun->fifo)
304 : "r0", "r1", "r2", "r3", "cc");
305
306 if (ptr >= aacirun->end)
307 ptr = aacirun->start;
308 }
309 } while (1);
310
311 aacirun->ptr = ptr;
312
313 spin_unlock(&aacirun->lock);
314 }
315 }
316
317 static irqreturn_t aaci_irq(int irq, void *devid)
318 {
319 struct aaci *aaci = devid;
320 u32 mask;
321 int i;
322
323 mask = readl(aaci->base + AACI_ALLINTS);
324 if (mask) {
325 u32 m = mask;
326 for (i = 0; i < 4; i++, m >>= 7) {
327 if (m & 0x7f) {
328 aaci_fifo_irq(aaci, i, m);
329 }
330 }
331 }
332
333 return mask ? IRQ_HANDLED : IRQ_NONE;
334 }
335
336
337
338 /*
339 * ALSA support.
340 */
341 static struct snd_pcm_hardware aaci_hw_info = {
342 .info = SNDRV_PCM_INFO_MMAP |
343 SNDRV_PCM_INFO_MMAP_VALID |
344 SNDRV_PCM_INFO_INTERLEAVED |
345 SNDRV_PCM_INFO_BLOCK_TRANSFER |
346 SNDRV_PCM_INFO_RESUME,
347
348 /*
349 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
350 * words. It also doesn't support 12-bit at all.
351 */
352 .formats = SNDRV_PCM_FMTBIT_S16_LE,
353
354 /* rates are setup from the AC'97 codec */
355 .channels_min = 2,
356 .channels_max = 6,
357 .buffer_bytes_max = 64 * 1024,
358 .period_bytes_min = 256,
359 .period_bytes_max = PAGE_SIZE,
360 .periods_min = 4,
361 .periods_max = PAGE_SIZE / 16,
362 };
363
364 static int __aaci_pcm_open(struct aaci *aaci,
365 struct snd_pcm_substream *substream,
366 struct aaci_runtime *aacirun)
367 {
368 struct snd_pcm_runtime *runtime = substream->runtime;
369 int ret;
370
371 aacirun->substream = substream;
372 runtime->private_data = aacirun;
373 runtime->hw = aaci_hw_info;
374 runtime->hw.rates = aacirun->pcm->rates;
375 snd_pcm_limit_hw_rates(runtime);
376
377 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
378 aacirun->pcm->r[1].slots)
379 snd_ac97_pcm_double_rate_rules(runtime);
380
381 runtime->hw.fifo_size = aaci->fifosize * 2;
382
383 ret = request_irq(aaci->dev->irq[0], aaci_irq, IRQF_SHARED|IRQF_DISABLED,
384 DRIVER_NAME, aaci);
385 if (ret)
386 goto out;
387
388 return 0;
389
390 out:
391 return ret;
392 }
393
394
395 /*
396 * Common ALSA stuff
397 */
398 static int aaci_pcm_close(struct snd_pcm_substream *substream)
399 {
400 struct aaci *aaci = substream->private_data;
401 struct aaci_runtime *aacirun = substream->runtime->private_data;
402
403 WARN_ON(aacirun->cr & CR_EN);
404
405 aacirun->substream = NULL;
406 free_irq(aaci->dev->irq[0], aaci);
407
408 return 0;
409 }
410
411 static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
412 {
413 struct aaci_runtime *aacirun = substream->runtime->private_data;
414
415 /*
416 * This must not be called with the device enabled.
417 */
418 WARN_ON(aacirun->cr & CR_EN);
419
420 if (aacirun->pcm_open)
421 snd_ac97_pcm_close(aacirun->pcm);
422 aacirun->pcm_open = 0;
423
424 /*
425 * Clear out the DMA and any allocated buffers.
426 */
427 snd_pcm_lib_free_pages(substream);
428
429 return 0;
430 }
431
432 static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
433 struct aaci_runtime *aacirun,
434 struct snd_pcm_hw_params *params)
435 {
436 int err;
437 struct aaci *aaci = substream->private_data;
438
439 aaci_pcm_hw_free(substream);
440 if (aacirun->pcm_open) {
441 snd_ac97_pcm_close(aacirun->pcm);
442 aacirun->pcm_open = 0;
443 }
444
445 err = snd_pcm_lib_malloc_pages(substream,
446 params_buffer_bytes(params));
447 if (err >= 0) {
448 unsigned int rate = params_rate(params);
449 int dbl = rate > 48000;
450
451 err = snd_ac97_pcm_open(aacirun->pcm, rate,
452 params_channels(params),
453 aacirun->pcm->r[dbl].slots);
454
455 aacirun->pcm_open = err == 0;
456 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
457 aacirun->fifosz = aaci->fifosize * 4;
458
459 if (aacirun->cr & CR_COMPACT)
460 aacirun->fifosz >>= 1;
461 }
462
463 return err;
464 }
465
466 static int aaci_pcm_prepare(struct snd_pcm_substream *substream)
467 {
468 struct snd_pcm_runtime *runtime = substream->runtime;
469 struct aaci_runtime *aacirun = runtime->private_data;
470
471 aacirun->start = runtime->dma_area;
472 aacirun->end = aacirun->start + snd_pcm_lib_buffer_bytes(substream);
473 aacirun->ptr = aacirun->start;
474 aacirun->period =
475 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size);
476
477 return 0;
478 }
479
480 static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream)
481 {
482 struct snd_pcm_runtime *runtime = substream->runtime;
483 struct aaci_runtime *aacirun = runtime->private_data;
484 ssize_t bytes = aacirun->ptr - aacirun->start;
485
486 return bytes_to_frames(runtime, bytes);
487 }
488
489
490 /*
491 * Playback specific ALSA stuff
492 */
493 static const u32 channels_to_txmask[] = {
494 [2] = CR_SL3 | CR_SL4,
495 [4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8,
496 [6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9,
497 };
498
499 /*
500 * We can support two and four channel audio. Unfortunately
501 * six channel audio requires a non-standard channel ordering:
502 * 2 -> FL(3), FR(4)
503 * 4 -> FL(3), FR(4), SL(7), SR(8)
504 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
505 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
506 * This requires an ALSA configuration file to correct.
507 */
508 static unsigned int channel_list[] = { 2, 4, 6 };
509
510 static int
511 aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
512 {
513 struct aaci *aaci = rule->private;
514 unsigned int chan_mask = 1 << 0, slots;
515
516 /*
517 * pcms[0] is the our 5.1 PCM instance.
518 */
519 slots = aaci->ac97_bus->pcms[0].r[0].slots;
520 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) {
521 chan_mask |= 1 << 1;
522 if (slots & (1 << AC97_SLOT_LFE))
523 chan_mask |= 1 << 2;
524 }
525
526 return snd_interval_list(hw_param_interval(p, rule->var),
527 ARRAY_SIZE(channel_list), channel_list,
528 chan_mask);
529 }
530
531 static int aaci_pcm_open(struct snd_pcm_substream *substream)
532 {
533 struct aaci *aaci = substream->private_data;
534 int ret;
535
536 /*
537 * Add rule describing channel dependency.
538 */
539 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
540 SNDRV_PCM_HW_PARAM_CHANNELS,
541 aaci_rule_channels, aaci,
542 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
543 if (ret)
544 return ret;
545
546 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
547 ret = __aaci_pcm_open(aaci, substream, &aaci->playback);
548 } else {
549 ret = __aaci_pcm_open(aaci, substream, &aaci->capture);
550 }
551 return ret;
552 }
553
554 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
555 struct snd_pcm_hw_params *params)
556 {
557 struct aaci_runtime *aacirun = substream->runtime->private_data;
558 unsigned int channels = params_channels(params);
559 int ret;
560
561 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) ||
562 !channels_to_txmask[channels]);
563
564 ret = aaci_pcm_hw_params(substream, aacirun, params);
565
566 if (ret >= 0)
567 aacirun->cr |= channels_to_txmask[channels];
568
569 return ret;
570 }
571
572 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
573 {
574 u32 ie;
575
576 ie = readl(aacirun->base + AACI_IE);
577 ie &= ~(IE_URIE|IE_TXIE);
578 writel(ie, aacirun->base + AACI_IE);
579 aacirun->cr &= ~CR_EN;
580 aaci_chan_wait_ready(aacirun, SR_TXB);
581 writel(aacirun->cr, aacirun->base + AACI_TXCR);
582 }
583
584 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
585 {
586 u32 ie;
587
588 aaci_chan_wait_ready(aacirun, SR_TXB);
589 aacirun->cr |= CR_EN;
590
591 ie = readl(aacirun->base + AACI_IE);
592 ie |= IE_URIE | IE_TXIE;
593 writel(ie, aacirun->base + AACI_IE);
594 writel(aacirun->cr, aacirun->base + AACI_TXCR);
595 }
596
597 static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
598 {
599 struct aaci_runtime *aacirun = substream->runtime->private_data;
600 unsigned long flags;
601 int ret = 0;
602
603 spin_lock_irqsave(&aacirun->lock, flags);
604
605 switch (cmd) {
606 case SNDRV_PCM_TRIGGER_START:
607 aaci_pcm_playback_start(aacirun);
608 break;
609
610 case SNDRV_PCM_TRIGGER_RESUME:
611 aaci_pcm_playback_start(aacirun);
612 break;
613
614 case SNDRV_PCM_TRIGGER_STOP:
615 aaci_pcm_playback_stop(aacirun);
616 break;
617
618 case SNDRV_PCM_TRIGGER_SUSPEND:
619 aaci_pcm_playback_stop(aacirun);
620 break;
621
622 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
623 break;
624
625 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
626 break;
627
628 default:
629 ret = -EINVAL;
630 }
631
632 spin_unlock_irqrestore(&aacirun->lock, flags);
633
634 return ret;
635 }
636
637 static struct snd_pcm_ops aaci_playback_ops = {
638 .open = aaci_pcm_open,
639 .close = aaci_pcm_close,
640 .ioctl = snd_pcm_lib_ioctl,
641 .hw_params = aaci_pcm_playback_hw_params,
642 .hw_free = aaci_pcm_hw_free,
643 .prepare = aaci_pcm_prepare,
644 .trigger = aaci_pcm_playback_trigger,
645 .pointer = aaci_pcm_pointer,
646 };
647
648 static int aaci_pcm_capture_hw_params(struct snd_pcm_substream *substream,
649 struct snd_pcm_hw_params *params)
650 {
651 struct aaci_runtime *aacirun = substream->runtime->private_data;
652 int ret;
653
654 ret = aaci_pcm_hw_params(substream, aacirun, params);
655 if (ret >= 0)
656 /* Line in record: slot 3 and 4 */
657 aacirun->cr |= CR_SL3 | CR_SL4;
658
659 return ret;
660 }
661
662 static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun)
663 {
664 u32 ie;
665
666 aaci_chan_wait_ready(aacirun, SR_RXB);
667
668 ie = readl(aacirun->base + AACI_IE);
669 ie &= ~(IE_ORIE | IE_RXIE);
670 writel(ie, aacirun->base+AACI_IE);
671
672 aacirun->cr &= ~CR_EN;
673
674 writel(aacirun->cr, aacirun->base + AACI_RXCR);
675 }
676
677 static void aaci_pcm_capture_start(struct aaci_runtime *aacirun)
678 {
679 u32 ie;
680
681 aaci_chan_wait_ready(aacirun, SR_RXB);
682
683 #ifdef DEBUG
684 /* RX Timeout value: bits 28:17 in RXCR */
685 aacirun->cr |= 0xf << 17;
686 #endif
687
688 aacirun->cr |= CR_EN;
689 writel(aacirun->cr, aacirun->base + AACI_RXCR);
690
691 ie = readl(aacirun->base + AACI_IE);
692 ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full
693 writel(ie, aacirun->base + AACI_IE);
694 }
695
696 static int aaci_pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd)
697 {
698 struct aaci_runtime *aacirun = substream->runtime->private_data;
699 unsigned long flags;
700 int ret = 0;
701
702 spin_lock_irqsave(&aacirun->lock, flags);
703
704 switch (cmd) {
705 case SNDRV_PCM_TRIGGER_START:
706 aaci_pcm_capture_start(aacirun);
707 break;
708
709 case SNDRV_PCM_TRIGGER_RESUME:
710 aaci_pcm_capture_start(aacirun);
711 break;
712
713 case SNDRV_PCM_TRIGGER_STOP:
714 aaci_pcm_capture_stop(aacirun);
715 break;
716
717 case SNDRV_PCM_TRIGGER_SUSPEND:
718 aaci_pcm_capture_stop(aacirun);
719 break;
720
721 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
722 break;
723
724 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
725 break;
726
727 default:
728 ret = -EINVAL;
729 }
730
731 spin_unlock_irqrestore(&aacirun->lock, flags);
732
733 return ret;
734 }
735
736 static int aaci_pcm_capture_prepare(struct snd_pcm_substream *substream)
737 {
738 struct snd_pcm_runtime *runtime = substream->runtime;
739 struct aaci *aaci = substream->private_data;
740
741 aaci_pcm_prepare(substream);
742
743 /* allow changing of sample rate */
744 aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */
745 aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
746 aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate);
747
748 /* Record select: Mic: 0, Aux: 3, Line: 4 */
749 aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404);
750
751 return 0;
752 }
753
754 static struct snd_pcm_ops aaci_capture_ops = {
755 .open = aaci_pcm_open,
756 .close = aaci_pcm_close,
757 .ioctl = snd_pcm_lib_ioctl,
758 .hw_params = aaci_pcm_capture_hw_params,
759 .hw_free = aaci_pcm_hw_free,
760 .prepare = aaci_pcm_capture_prepare,
761 .trigger = aaci_pcm_capture_trigger,
762 .pointer = aaci_pcm_pointer,
763 };
764
765 /*
766 * Power Management.
767 */
768 #ifdef CONFIG_PM
769 static int aaci_do_suspend(struct snd_card *card, unsigned int state)
770 {
771 struct aaci *aaci = card->private_data;
772 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
773 snd_pcm_suspend_all(aaci->pcm);
774 return 0;
775 }
776
777 static int aaci_do_resume(struct snd_card *card, unsigned int state)
778 {
779 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
780 return 0;
781 }
782
783 static int aaci_suspend(struct amba_device *dev, pm_message_t state)
784 {
785 struct snd_card *card = amba_get_drvdata(dev);
786 return card ? aaci_do_suspend(card) : 0;
787 }
788
789 static int aaci_resume(struct amba_device *dev)
790 {
791 struct snd_card *card = amba_get_drvdata(dev);
792 return card ? aaci_do_resume(card) : 0;
793 }
794 #else
795 #define aaci_do_suspend NULL
796 #define aaci_do_resume NULL
797 #define aaci_suspend NULL
798 #define aaci_resume NULL
799 #endif
800
801
802 static struct ac97_pcm ac97_defs[] __devinitdata = {
803 [0] = { /* Front PCM */
804 .exclusive = 1,
805 .r = {
806 [0] = {
807 .slots = (1 << AC97_SLOT_PCM_LEFT) |
808 (1 << AC97_SLOT_PCM_RIGHT) |
809 (1 << AC97_SLOT_PCM_CENTER) |
810 (1 << AC97_SLOT_PCM_SLEFT) |
811 (1 << AC97_SLOT_PCM_SRIGHT) |
812 (1 << AC97_SLOT_LFE),
813 },
814 [1] = {
815 .slots = (1 << AC97_SLOT_PCM_LEFT) |
816 (1 << AC97_SLOT_PCM_RIGHT) |
817 (1 << AC97_SLOT_PCM_LEFT_0) |
818 (1 << AC97_SLOT_PCM_RIGHT_0),
819 },
820 },
821 },
822 [1] = { /* PCM in */
823 .stream = 1,
824 .exclusive = 1,
825 .r = {
826 [0] = {
827 .slots = (1 << AC97_SLOT_PCM_LEFT) |
828 (1 << AC97_SLOT_PCM_RIGHT),
829 },
830 },
831 },
832 [2] = { /* Mic in */
833 .stream = 1,
834 .exclusive = 1,
835 .r = {
836 [0] = {
837 .slots = (1 << AC97_SLOT_MIC),
838 },
839 },
840 }
841 };
842
843 static struct snd_ac97_bus_ops aaci_bus_ops = {
844 .write = aaci_ac97_write,
845 .read = aaci_ac97_read,
846 };
847
848 static int __devinit aaci_probe_ac97(struct aaci *aaci)
849 {
850 struct snd_ac97_template ac97_template;
851 struct snd_ac97_bus *ac97_bus;
852 struct snd_ac97 *ac97;
853 int ret;
854
855 /*
856 * Assert AACIRESET for 2us
857 */
858 writel(0, aaci->base + AACI_RESET);
859 udelay(2);
860 writel(RESET_NRST, aaci->base + AACI_RESET);
861
862 /*
863 * Give the AC'97 codec more than enough time
864 * to wake up. (42us = ~2 frames at 48kHz.)
865 */
866 udelay(42);
867
868 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus);
869 if (ret)
870 goto out;
871
872 ac97_bus->clock = 48000;
873 aaci->ac97_bus = ac97_bus;
874
875 memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
876 ac97_template.private_data = aaci;
877 ac97_template.num = 0;
878 ac97_template.scaps = AC97_SCAP_SKIP_MODEM;
879
880 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
881 if (ret)
882 goto out;
883 aaci->ac97 = ac97;
884
885 /*
886 * Disable AC97 PC Beep input on audio codecs.
887 */
888 if (ac97_is_audio(ac97))
889 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e);
890
891 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs);
892 if (ret)
893 goto out;
894
895 aaci->playback.pcm = &ac97_bus->pcms[0];
896 aaci->capture.pcm = &ac97_bus->pcms[1];
897
898 out:
899 return ret;
900 }
901
902 static void aaci_free_card(struct snd_card *card)
903 {
904 struct aaci *aaci = card->private_data;
905 if (aaci->base)
906 iounmap(aaci->base);
907 }
908
909 static struct aaci * __devinit aaci_init_card(struct amba_device *dev)
910 {
911 struct aaci *aaci;
912 struct snd_card *card;
913 int err;
914
915 err = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
916 THIS_MODULE, sizeof(struct aaci), &card);
917 if (err < 0)
918 return NULL;
919
920 card->private_free = aaci_free_card;
921
922 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
923 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname));
924 snprintf(card->longname, sizeof(card->longname),
925 "%s at 0x%016llx, irq %d",
926 card->shortname, (unsigned long long)dev->res.start,
927 dev->irq[0]);
928
929 aaci = card->private_data;
930 mutex_init(&aaci->ac97_sem);
931 aaci->card = card;
932 aaci->dev = dev;
933
934 /* Set MAINCR to allow slot 1 and 2 data IO */
935 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN |
936 MAINCR_SL2RXEN | MAINCR_SL2TXEN;
937
938 return aaci;
939 }
940
941 static int __devinit aaci_init_pcm(struct aaci *aaci)
942 {
943 struct snd_pcm *pcm;
944 int ret;
945
946 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm);
947 if (ret == 0) {
948 aaci->pcm = pcm;
949 pcm->private_data = aaci;
950 pcm->info_flags = 0;
951
952 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
953
954 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
955 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops);
956 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
957 NULL, 0, 64 * 1024);
958 }
959
960 return ret;
961 }
962
963 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
964 {
965 struct aaci_runtime *aacirun = &aaci->playback;
966 int i;
967
968 writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
969
970 for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
971 writel(0, aacirun->fifo);
972
973 writel(0, aacirun->base + AACI_TXCR);
974
975 /*
976 * Re-initialise the AACI after the FIFO depth test, to
977 * ensure that the FIFOs are empty. Unfortunately, merely
978 * disabling the channel doesn't clear the FIFO.
979 */
980 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
981 writel(aaci->maincr, aaci->base + AACI_MAINCR);
982
983 /*
984 * If we hit 4096, we failed. Go back to the specified
985 * fifo depth.
986 */
987 if (i == 4096)
988 i = 8;
989
990 return i;
991 }
992
993 static int __devinit aaci_probe(struct amba_device *dev, struct amba_id *id)
994 {
995 struct aaci *aaci;
996 int ret, i;
997
998 ret = amba_request_regions(dev, NULL);
999 if (ret)
1000 return ret;
1001
1002 aaci = aaci_init_card(dev);
1003 if (!aaci) {
1004 ret = -ENOMEM;
1005 goto out;
1006 }
1007
1008 aaci->base = ioremap(dev->res.start, resource_size(&dev->res));
1009 if (!aaci->base) {
1010 ret = -ENOMEM;
1011 goto out;
1012 }
1013
1014 /*
1015 * Playback uses AACI channel 0
1016 */
1017 spin_lock_init(&aaci->playback.lock);
1018 aaci->playback.base = aaci->base + AACI_CSCH1;
1019 aaci->playback.fifo = aaci->base + AACI_DR1;
1020
1021 /*
1022 * Capture uses AACI channel 0
1023 */
1024 spin_lock_init(&aaci->capture.lock);
1025 aaci->capture.base = aaci->base + AACI_CSCH1;
1026 aaci->capture.fifo = aaci->base + AACI_DR1;
1027
1028 for (i = 0; i < 4; i++) {
1029 void __iomem *base = aaci->base + i * 0x14;
1030
1031 writel(0, base + AACI_IE);
1032 writel(0, base + AACI_TXCR);
1033 writel(0, base + AACI_RXCR);
1034 }
1035
1036 writel(0x1fff, aaci->base + AACI_INTCLR);
1037 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1038 /*
1039 * Fix: ac97 read back fail errors by reading
1040 * from any arbitrary aaci register.
1041 */
1042 readl(aaci->base + AACI_CSCH1);
1043 ret = aaci_probe_ac97(aaci);
1044 if (ret)
1045 goto out;
1046
1047 /*
1048 * Size the FIFOs (must be multiple of 16).
1049 */
1050 aaci->fifosize = aaci_size_fifo(aaci);
1051 if (aaci->fifosize & 15) {
1052 printk(KERN_WARNING "AACI: fifosize = %d not supported\n",
1053 aaci->fifosize);
1054 ret = -ENODEV;
1055 goto out;
1056 }
1057
1058 ret = aaci_init_pcm(aaci);
1059 if (ret)
1060 goto out;
1061
1062 snd_card_set_dev(aaci->card, &dev->dev);
1063
1064 ret = snd_card_register(aaci->card);
1065 if (ret == 0) {
1066 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
1067 aaci->fifosize);
1068 amba_set_drvdata(dev, aaci->card);
1069 return ret;
1070 }
1071
1072 out:
1073 if (aaci)
1074 snd_card_free(aaci->card);
1075 amba_release_regions(dev);
1076 return ret;
1077 }
1078
1079 static int __devexit aaci_remove(struct amba_device *dev)
1080 {
1081 struct snd_card *card = amba_get_drvdata(dev);
1082
1083 amba_set_drvdata(dev, NULL);
1084
1085 if (card) {
1086 struct aaci *aaci = card->private_data;
1087 writel(0, aaci->base + AACI_MAINCR);
1088
1089 snd_card_free(card);
1090 amba_release_regions(dev);
1091 }
1092
1093 return 0;
1094 }
1095
1096 static struct amba_id aaci_ids[] = {
1097 {
1098 .id = 0x00041041,
1099 .mask = 0x000fffff,
1100 },
1101 { 0, 0 },
1102 };
1103
1104 static struct amba_driver aaci_driver = {
1105 .drv = {
1106 .name = DRIVER_NAME,
1107 },
1108 .probe = aaci_probe,
1109 .remove = __devexit_p(aaci_remove),
1110 .suspend = aaci_suspend,
1111 .resume = aaci_resume,
1112 .id_table = aaci_ids,
1113 };
1114
1115 static int __init aaci_init(void)
1116 {
1117 return amba_driver_register(&aaci_driver);
1118 }
1119
1120 static void __exit aaci_exit(void)
1121 {
1122 amba_driver_unregister(&aaci_driver);
1123 }
1124
1125 module_init(aaci_init);
1126 module_exit(aaci_exit);
1127
1128 MODULE_LICENSE("GPL");
1129 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");
Tomato firmware and modifications.