release/src-rt-6.x.4708/linux/linux-2.6.36/include/Common/nvm.h

   1 /*
   2 * nvm.h
   3 *
   4 *Copyright (C) 2010 Beceem Communications, Inc.
   5 *
   6 *This program is free software: you can redistribute it and/or modify
   7 *it under the terms of the GNU General Public License version 2 as
   8 *published by the Free Software Foundation.
   9 *
  10 *This program is distributed in the hope that it will be useful,but
  11 *WITHOUT ANY WARRANTY; without even the implied warranty of
  12 *MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13 *See the GNU General Public License for more details.
  14 *
  15 *You should have received a copy of the GNU General Public License
  16 *along with this program. If not, write to the Free Software Foundation, Inc.,
  17 *51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  18 *
  19 */
  20
  21
  22 /**********************************************************************
  23 *       This file has the prototypes,preprocessors and
  24 *     definitions various NVM libraries.
  25 ***********************************************************************/
  26
  27
  28 #ifndef _NVM_H_
  29 #define _NVM_H_
  30
  31 typedef struct _FLASH_SECTOR_INFO
  32 {
  33         UINT uiSectorSig;
  34         UINT uiSectorSize;
  35
  36 }FLASH_SECTOR_INFO,*PFLASH_SECTOR_INFO;
  37
  38 typedef struct _FLASH_CS_INFO
  39 {
  40         B_UINT32 MagicNumber;
  41 // let the magic number be 0xBECE-F1A5 - F1A5 for "flas-h"
  42
  43         B_UINT32 FlashLayoutVersion ;
  44
  45     // ISO Image/Format/BuildTool versioning
  46     B_UINT32 ISOImageVersion;
  47
  48     // SCSI/Flash BootLoader versioning
  49     B_UINT32 SCSIFirmwareVersion;
  50
  51
  52         B_UINT32 OffsetFromZeroForPart1ISOImage;
  53 // typically 0
  54
  55         B_UINT32 OffsetFromZeroForScsiFirmware;
  56 //typically at 12MB
  57
  58         B_UINT32 SizeOfScsiFirmware ;
  59 //size of the firmware - depends on binary size
  60
  61         B_UINT32 OffsetFromZeroForPart2ISOImage;
  62 // typically at first Word Aligned offset 12MB +                 sizeOfScsiFirmware.
  63
  64         B_UINT32 OffsetFromZeroForCalibrationStart;
  65 // typically at 15MB
  66
  67         B_UINT32 OffsetFromZeroForCalibrationEnd;
  68
  69 // VSA0 offsets
  70         B_UINT32 OffsetFromZeroForVSAStart;
  71         B_UINT32 OffsetFromZeroForVSAEnd;
  72
  73 // Control Section offsets
  74         B_UINT32 OffsetFromZeroForControlSectionStart;
  75         B_UINT32 OffsetFromZeroForControlSectionData;
  76
  77 // NO Data Activity timeout to switch from MSC to NW Mode
  78         B_UINT32 CDLessInactivityTimeout;
  79
  80 // New ISO Image Signature
  81         B_UINT32 NewImageSignature;
  82
  83 // Signature to validate the sector size.
  84         B_UINT32 FlashSectorSizeSig;
  85
  86 // Sector Size
  87         B_UINT32 FlashSectorSize;
  88
  89 // Write Size Support
  90         B_UINT32 FlashWriteSupportSize;
  91
  92 // Total Flash Size
  93         B_UINT32 TotalFlashSize;
  94
  95 // Flash Base Address for offset specified
  96         B_UINT32 FlashBaseAddr;
  97
  98 // Flash Part Max Size
  99         B_UINT32 FlashPartMaxSize;
 100
 101 // Is CDLess or Flash Bootloader
 102         B_UINT32 IsCDLessDeviceBootSig;
 103
 104 // MSC Timeout after reset to switch from MSC to NW Mode
 105         B_UINT32 MassStorageTimeout;
 106
 107
 108 }FLASH_CS_INFO,*PFLASH_CS_INFO;
 109
 110 #define FLASH2X_TOTAL_SIZE (64*1024*1024)
 111 #define DEFAULT_SECTOR_SIZE                     (64*1024)
 112
 113 typedef struct _FLASH_2X_CS_INFO
 114 {
 115
 116         // magic number as 0xBECE-F1A5 - F1A5 for "flas-h"
 117         B_UINT32 MagicNumber;
 118
 119         B_UINT32 FlashLayoutVersion ;
 120
 121     // ISO Image/Format/BuildTool versioning
 122     B_UINT32 ISOImageVersion;
 123
 124     // SCSI/Flash BootLoader versioning
 125     B_UINT32 SCSIFirmwareVersion;
 126
 127         // ISO Image1 Part1/SCSI Firmware/Flash Bootloader Start offset, size
 128         B_UINT32 OffsetFromZeroForPart1ISOImage;
 129         B_UINT32 OffsetFromZeroForScsiFirmware;
 130         B_UINT32 SizeOfScsiFirmware ;
 131
 132         // ISO Image1 Part2 start offset
 133         B_UINT32 OffsetFromZeroForPart2ISOImage;
 134
 135
 136         // DSD0 offset
 137         B_UINT32 OffsetFromZeroForDSDStart;
 138         B_UINT32 OffsetFromZeroForDSDEnd;
 139
 140         // VSA0 offset
 141         B_UINT32 OffsetFromZeroForVSAStart;
 142         B_UINT32 OffsetFromZeroForVSAEnd;
 143
 144         // Control Section offset
 145         B_UINT32 OffsetFromZeroForControlSectionStart;
 146         B_UINT32 OffsetFromZeroForControlSectionData;
 147
 148         // NO Data Activity timeout to switch from MSC to NW Mode
 149         B_UINT32 CDLessInactivityTimeout;
 150
 151         // New ISO Image Signature
 152         B_UINT32 NewImageSignature;
 153
 154         B_UINT32 FlashSectorSizeSig;                    // Sector Size Signature
 155         B_UINT32 FlashSectorSize;                       // Sector Size
 156         B_UINT32 FlashWriteSupportSize;         // Write Size Support
 157
 158         B_UINT32 TotalFlashSize;                        // Total Flash Size
 159
 160         // Flash Base Address for offset specified
 161         B_UINT32 FlashBaseAddr;
 162         B_UINT32 FlashPartMaxSize;                      // Flash Part Max Size
 163
 164         // Is CDLess or Flash Bootloader
 165         B_UINT32 IsCDLessDeviceBootSig;
 166
 167         // MSC Timeout after reset to switch from MSC to NW Mode
 168         B_UINT32 MassStorageTimeout;
 169
 170         /* Flash Map 2.0 Field */
 171         B_UINT32 OffsetISOImage1Part1Start;     // ISO Image1 Part1 offset
 172         B_UINT32 OffsetISOImage1Part1End;
 173         B_UINT32 OffsetISOImage1Part2Start;     // ISO Image1 Part2 offset
 174         B_UINT32 OffsetISOImage1Part2End;
 175         B_UINT32 OffsetISOImage1Part3Start;     // ISO Image1 Part3 offset
 176         B_UINT32 OffsetISOImage1Part3End;
 177
 178         B_UINT32 OffsetISOImage2Part1Start;     // ISO Image2 Part1 offset
 179         B_UINT32 OffsetISOImage2Part1End;
 180         B_UINT32 OffsetISOImage2Part2Start;     // ISO Image2 Part2 offset
 181         B_UINT32 OffsetISOImage2Part2End;
 182         B_UINT32 OffsetISOImage2Part3Start;     // ISO Image2 Part3 offset
 183         B_UINT32 OffsetISOImage2Part3End;
 184
 185
 186         // DSD Header offset from start of DSD
 187         B_UINT32 OffsetFromDSDStartForDSDHeader;
 188         B_UINT32 OffsetFromZeroForDSD1Start;    // DSD 1 offset
 189         B_UINT32 OffsetFromZeroForDSD1End;
 190         B_UINT32 OffsetFromZeroForDSD2Start;    // DSD 2 offset
 191         B_UINT32 OffsetFromZeroForDSD2End;
 192
 193         B_UINT32 OffsetFromZeroForVSA1Start;    // VSA 1 offset
 194         B_UINT32 OffsetFromZeroForVSA1End;
 195         B_UINT32 OffsetFromZeroForVSA2Start;    // VSA 2 offset
 196         B_UINT32 OffsetFromZeroForVSA2End;
 197
 198         /*
 199 *        ACCESS_BITS_PER_SECTOR 2
 200 *       ACCESS_RW                       0
 201 *       ACCESS_RO                               1
 202 *       ACCESS_RESVD                    2
 203 *       ACCESS_RESVD                    3
 204 *       */
 205         B_UINT32 SectorAccessBitMap[FLASH2X_TOTAL_SIZE/(DEFAULT_SECTOR_SIZE *16)];
 206
 207 // All expansions to the control data structure should add here
 208
 209 }FLASH2X_CS_INFO,*PFLASH2X_CS_INFO;
 210
 211 typedef struct _VENDOR_SECTION_INFO
 212 {
 213         B_UINT32 OffsetFromZeroForSectionStart;
 214         B_UINT32 OffsetFromZeroForSectionEnd;
 215         B_UINT32 AccessFlags;
 216         B_UINT32 Reserved[16];
 217
 218 } VENDOR_SECTION_INFO, *PVENDOR_SECTION_INFO;
 219
 220 typedef struct _FLASH2X_VENDORSPECIFIC_INFO
 221 {
 222         VENDOR_SECTION_INFO VendorSection[TOTAL_SECTIONS];
 223         B_UINT32 Reserved[16];
 224
 225 } FLASH2X_VENDORSPECIFIC_INFO, *PFLASH2X_VENDORSPECIFIC_INFO;
 226
 227 typedef struct _DSD_HEADER
 228 {
 229         B_UINT32 DSDImageSize;
 230         B_UINT32 DSDImageCRC;
 231         B_UINT32 DSDImagePriority;
 232         //We should not consider right now. Reading reserve is worthless.
 233         B_UINT32 Reserved[252]; // Resvd for DSD Header
 234         B_UINT32 DSDImageMagicNumber;
 235
 236 }DSD_HEADER, *PDSD_HEADER;
 237
 238 typedef struct _ISO_HEADER
 239 {
 240         B_UINT32 ISOImageMagicNumber;
 241         B_UINT32 ISOImageSize;
 242         B_UINT32 ISOImageCRC;
 243         B_UINT32 ISOImagePriority;
 244         //We should not consider right now. Reading reserve is worthless.
 245         B_UINT32 Reserved[60]; //Resvd for ISO Header extension
 246
 247 }ISO_HEADER, *PISO_HEADER;
 248
 249 #define EEPROM_BEGIN_CIS (0)
 250 #define EEPROM_BEGIN_NON_CIS (0x200)
 251 #define EEPROM_END (0x2000)
 252
 253 #define INIT_PARAMS_SIGNATURE (0x95a7a597)
 254
 255 #define MAX_INIT_PARAMS_LENGTH (2048)
 256
 257
 258 #define MAC_ADDRESS_OFFSET 0x200
 259
 260
 261 #define INIT_PARAMS_1_SIGNATURE_ADDRESS  EEPROM_BEGIN_NON_CIS
 262 #define INIT_PARAMS_1_DATA_ADDRESS (INIT_PARAMS_1_SIGNATURE_ADDRESS+16)
 263 #define INIT_PARAMS_1_MACADDRESS_ADDRESS (MAC_ADDRESS_OFFSET)
 264 #define INIT_PARAMS_1_LENGTH_ADDRESS   (INIT_PARAMS_1_SIGNATURE_ADDRESS+4)
 265
 266 #define INIT_PARAMS_2_SIGNATURE_ADDRESS  (EEPROM_BEGIN_NON_CIS+2048+16)
 267 #define INIT_PARAMS_2_DATA_ADDRESS (INIT_PARAMS_2_SIGNATURE_ADDRESS+16)
 268 #define INIT_PARAMS_2_MACADDRESS_ADDRESS (INIT_PARAMS_2_SIGNATURE_ADDRESS+8)
 269 #define INIT_PARAMS_2_LENGTH_ADDRESS   (INIT_PARAMS_2_SIGNATURE_ADDRESS+4)
 270
 271 #define EEPROM_SPI_DEV_CONFIG_REG                                0x0F003000
 272 #define EEPROM_SPI_Q_STATUS1_REG                 0x0F003004
 273 #define EEPROM_SPI_Q_STATUS1_MASK_REG            0x0F00300C
 274
 275 #define EEPROM_SPI_Q_STATUS_REG                  0x0F003008
 276 #define EEPROM_CMDQ_SPI_REG                      0x0F003018
 277 #define EEPROM_WRITE_DATAQ_REG                                   0x0F00301C
 278 #define EEPROM_READ_DATAQ_REG                                    0x0F003020
 279 #define SPI_FLUSH_REG                                                    0x0F00304C
 280
 281 #define EEPROM_WRITE_ENABLE                                              0x06000000
 282 #define EEPROM_READ_STATUS_REGISTER                              0x05000000
 283 #define EEPROM_16_BYTE_PAGE_WRITE                                0xFA000000
 284 #define EEPROM_WRITE_QUEUE_EMPTY                                 0x00001000
 285 #define EEPROM_WRITE_QUEUE_AVAIL                                 0x00002000
 286 #define EEPROM_WRITE_QUEUE_FULL                                  0x00004000
 287 #define EEPROM_16_BYTE_PAGE_READ                                 0xFB000000
 288 #define EEPROM_4_BYTE_PAGE_READ                                  0x3B000000
 289
 290 #define EEPROM_CMD_QUEUE_FLUSH                                   0x00000001
 291 #define EEPROM_WRITE_QUEUE_FLUSH                                 0x00000002
 292 #define EEPROM_READ_QUEUE_FLUSH                                  0x00000004
 293 #define EEPROM_ETH_QUEUE_FLUSH                                   0x00000008
 294 #define EEPROM_ALL_QUEUE_FLUSH                                   0x0000000f
 295 #define EEPROM_READ_ENABLE                                               0x06000000
 296 #define EEPROM_16_BYTE_PAGE_WRITE                                0xFA000000
 297 #define EEPROM_READ_DATA_FULL                                    0x00000010
 298 #define EEPROM_READ_DATA_AVAIL                                   0x00000020
 299 #define EEPROM_READ_QUEUE_EMPTY                                  0x00000002
 300 #define EEPROM_CMD_QUEUE_EMPTY                                   0x00000100
 301 #define EEPROM_CMD_QUEUE_AVAIL                                   0x00000200
 302 #define EEPROM_CMD_QUEUE_FULL                                    0x00000400
 303
 304 /* Most EEPROM status register bit 0 indicates if the EEPROM is busy
 305  * with a write if set 1. See the details of the EEPROM Status Register
 306  * in the EEPROM data sheet. */
 307 #define EEPROM_STATUS_REG_WRITE_BUSY                     0x00000001
 308
 309 // We will have 1 mSec for every RETRIES_PER_DELAY count and have a max attempts of MAX_EEPROM_RETRIES
 310 // This will give us 80 mSec minimum of delay = 80mSecs
 311 #define MAX_EEPROM_RETRIES                                               80
 312 #define RETRIES_PER_DELAY                        64
 313
 314
 315 #define MAX_RW_SIZE                              0x10
 316 #define MAX_READ_SIZE                                                    0x10
 317 #define MAX_SECTOR_SIZE                         (512*1024)
 318 #define MIN_SECTOR_SIZE                         (1024)
 319 #define FLASH_SECTOR_SIZE_OFFSET                 0xEFFFC
 320 #define FLASH_SECTOR_SIZE_SIG_OFFSET             0xEFFF8
 321 #define FLASH_SECTOR_SIZE_SIG                    0xCAFEBABE
 322 #define FLASH_CS_INFO_START_ADDR                 0xFF0000
 323 #define FLASH_CONTROL_STRUCT_SIGNATURE           0xBECEF1A5
 324 #define SCSI_FIRMWARE_MAJOR_VERSION                              0x1
 325 #define SCSI_FIRMWARE_MINOR_VERSION              0x5
 326 #define BYTE_WRITE_SUPPORT                       0x1
 327
 328 #define FLASH_AUTO_INIT_BASE_ADDR                0xF00000
 329
 330
 331
 332 #ifdef BCM_SHM_INTERFACE
 333
 334 #define FLASH_ADDR_MASK                          0x1F000000
 335 extern int bcmflash_raw_read(unsigned int flash_id, unsigned int offset, unsigned char *inbuf, unsigned int len);
 336 extern int bcmflash_raw_write(unsigned int flash_id, unsigned int offset, unsigned char *outbuf, unsigned int len);
 337 extern int bcmflash_raw_writenoerase(unsigned int flash_id, unsigned int offset, unsigned char *outbuf, unsigned int len);
 338
 339
 340 #endif
 341
 342 #define FLASH_CONTIGIOUS_START_ADDR_AFTER_INIT   0x1C000000
 343 #define FLASH_CONTIGIOUS_START_ADDR_BEFORE_INIT  0x1F000000
 344
 345 #define FLASH_CONTIGIOUS_START_ADDR_BCS350       0x08000000
 346 #define FLASH_CONTIGIOUS_END_ADDR_BCS350         0x08FFFFFF
 347
 348
 349
 350 #define FLASH_SIZE_ADDR                          0xFFFFEC
 351
 352 #define FLASH_SPI_CMDQ_REG                                               0xAF003040
 353 #define FLASH_SPI_WRITEQ_REG                                     0xAF003044
 354 #define FLASH_SPI_READQ_REG                                              0xAF003048
 355 #define FLASH_CONFIG_REG                         0xAF003050
 356 #define FLASH_GPIO_CONFIG_REG                                    0xAF000030
 357
 358 #define FLASH_CMD_WRITE_ENABLE                                   0x06
 359 #define FLASH_CMD_READ_ENABLE                                    0x03
 360 #define FLASH_CMD_RESET_WRITE_ENABLE                     0x04
 361 #define FLASH_CMD_STATUS_REG_READ                                0x05
 362 #define FLASH_CMD_STATUS_REG_WRITE                               0x01
 363 #define FLASH_CMD_READ_ID                        0x9F
 364
 365 #define PAD_SELECT_REGISTER                      0xAF000410
 366
 367 #define FLASH_PART_SST25VF080B                   0xBF258E
 368
 369 #define EEPROM_CAL_DATA_INTERNAL_LOC             0xbFB00008
 370
 371 #define EEPROM_CALPARAM_START                    0x200
 372 #define EEPROM_SIZE_OFFSET                       524
 373
 374 //As Read/Write time vaires from 1.5 to 3.0 ms.
 375 //so After Ignoring the rdm/wrm time(that is dependent on many factor like interface etc.),
 376 //here time calculated meets the worst case delay, 3.0 ms
 377 #define MAX_FLASH_RETRIES                                                4
 378 #define FLASH_PER_RETRIES_DELAY                          16
 379
 380
 381 #define EEPROM_MAX_CAL_AREA_SIZE                 0xF0000
 382
 383
 384
 385 #define BECM                                     ntohl(0x4245434d)
 386
 387 #define FLASH_2X_MAJOR_NUMBER 0x2
 388 #define DSD_IMAGE_MAGIC_NUMBER 0xBECE0D5D
 389 #define ISO_IMAGE_MAGIC_NUMBER 0xBECE0150
 390 #define NON_CDLESS_DEVICE_BOOT_SIG 0xBECEB007
 391 #define MINOR_VERSION(x) ((x >>16) & 0xFFFF)
 392 #define MAJOR_VERSION(x) (x & 0xFFFF)
 393 #define CORRUPTED_PATTERN 0x0
 394 #define UNINIT_PTR_IN_CS 0xBBBBDDDD
 395
 396 #define VENDOR_PTR_IN_CS 0xAAAACCCC
 397
 398
 399 #define FLASH2X_SECTION_PRESENT 1<<0
 400 #define FLASH2X_SECTION_VALID 1<<1
 401 #define FLASH2X_SECTION_RO 1<<2
 402 #define FLASH2X_SECTION_ACT 1<<3
 403 #define SECTOR_IS_NOT_WRITABLE STATUS_FAILURE
 404 #define INVALID_OFFSET STATUS_FAILURE
 405 #define INVALID_SECTION STATUS_FAILURE
 406 #define SECTOR_1K 1024
 407 #define SECTOR_64K (64 *SECTOR_1K)
 408 #define SECTOR_128K (2 * SECTOR_64K)
 409 #define SECTOR_256k (2 * SECTOR_128K)
 410 #define SECTOR_512K (2 * SECTOR_256k)
 411 #define FLASH_PART_SIZE (16 * 1024 * 1024)
 412 #define RESET_CHIP_SELECT -1
 413 #define CHIP_SELECT_BIT12   12
 414
 415 #define SECTOR_READWRITE_PERMISSION 0
 416 #define SECTOR_READONLY 1
 417 #define SIGNATURE_SIZE  4
 418 #define DEFAULT_BUFF_SIZE 0x10000
 419
 420
 421 #define FIELD_OFFSET_IN_HEADER(HeaderPointer,Field) ((PUCHAR)&((HeaderPointer)(NULL))->Field - (PUCHAR)(NULL))
 422
 423 #if 0
 424 INT BeceemEEPROMBulkRead(
 425         PMINI_ADAPTER Adapter,
 426         PUINT pBuffer,
 427         UINT uiOffset,
 428         UINT uiNumBytes);
 429
 430
 431 INT BeceemFlashBulkRead(
 432         PMINI_ADAPTER Adapter,
 433         PUINT pBuffer,
 434         UINT uiOffset,
 435         UINT uiNumBytes);
 436
 437 UINT BcmGetEEPROMSize(PMINI_ADAPTER Adapter);
 438
 439 UINT BcmGetFlashSize(PMINI_ADAPTER Adapter);
 440
 441 UINT BcmGetFlashSectorSize(PMINI_ADAPTER Adapter);
 442
 443
 444
 445 INT BeceemFlashBulkWrite(
 446         PMINI_ADAPTER Adapter,
 447         PUINT pBuffer,
 448         UINT uiOffset,
 449         UINT uiNumBytes,
 450         BOOLEAN bVerify);
 451
 452 INT PropagateCalParamsFromFlashToMemory(PMINI_ADAPTER Adapter);
 453
 454 INT PropagateCalParamsFromEEPROMToMemory(PMINI_ADAPTER Adapter);
 455
 456
 457 INT BeceemEEPROMBulkWrite(
 458         PMINI_ADAPTER Adapter,
 459         PUCHAR pBuffer,
 460         UINT uiOffset,
 461         UINT uiNumBytes,
 462         BOOLEAN bVerify);
 463
 464
 465 INT ReadBeceemEEPROM(PMINI_ADAPTER Adapter,UINT dwAddress, UINT *pdwData);
 466
 467 NVM_TYPE BcmGetNvmType(PMINI_ADAPTER Adapter);
 468
 469 INT BeceemNVMRead(
 470         PMINI_ADAPTER Adapter,
 471         PUINT pBuffer,
 472         UINT uiOffset,
 473         UINT uiNumBytes);
 474
 475 INT BeceemNVMWrite(
 476         PMINI_ADAPTER Adapter,
 477         PUINT pBuffer,
 478         UINT uiOffset,
 479         UINT uiNumBytes,
 480         BOOLEAN bVerify);
 481
 482 INT ReadMacAddressFromEEPROM(PMINI_ADAPTER Adapter);
 483
 484 INT BcmUpdateSectorSize(PMINI_ADAPTER Adapter,UINT uiSectorSize);
 485
 486 INT BcmInitNVM(PMINI_ADAPTER Adapter);
 487
 488 VOID BcmValidateNvmType(PMINI_ADAPTER Adapter);
 489
 490 VOID BcmGetFlashCSInfo(PMINI_ADAPTER Adapter);
 491
 492 #endif
 493
 494 #endif
 495