2 * linux/drivers/video/omap2/dss/core.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "CORE"
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/clk.h>
28 #include <linux/err.h>
29 #include <linux/platform_device.h>
30 #include <linux/seq_file.h>
31 #include <linux/debugfs.h>
33 #include <linux/device.h>
34 #include <linux/regulator/consumer.h>
36 #include <plat/display.h>
37 #include <plat/clock.h>
42 struct platform_device
*pdev
;
48 struct clk
*dss_54m_fck
;
49 struct clk
*dss_96m_fck
;
50 unsigned num_clks_enabled
;
52 struct regulator
*vdds_dsi_reg
;
53 struct regulator
*vdds_sdi_reg
;
54 struct regulator
*vdda_dac_reg
;
57 static void dss_clk_enable_all_no_ctx(void);
58 static void dss_clk_disable_all_no_ctx(void);
59 static void dss_clk_enable_no_ctx(enum dss_clock clks
);
60 static void dss_clk_disable_no_ctx(enum dss_clock clks
);
62 static char *def_disp_name
;
63 module_param_named(def_disp
, def_disp_name
, charp
, 0);
64 MODULE_PARM_DESC(def_disp_name
, "default display name");
67 unsigned int dss_debug
;
68 module_param_named(debug
, dss_debug
, bool, 0644);
72 static int dss_get_ctx_id(void)
74 struct omap_dss_board_info
*pdata
= core
.pdev
->dev
.platform_data
;
77 if (!pdata
->get_last_off_on_transaction_id
)
79 r
= pdata
->get_last_off_on_transaction_id(&core
.pdev
->dev
);
81 dev_err(&core
.pdev
->dev
, "getting transaction ID failed, "
82 "will force context restore\n");
88 int dss_need_ctx_restore(void)
90 int id
= dss_get_ctx_id();
92 if (id
< 0 || id
!= core
.ctx_id
) {
93 DSSDBG("ctx id %d -> id %d\n",
102 static void save_all_ctx(void)
104 DSSDBG("save context\n");
106 dss_clk_enable_no_ctx(DSS_CLK_ICK
| DSS_CLK_FCK1
);
109 dispc_save_context();
110 #ifdef CONFIG_OMAP2_DSS_DSI
114 dss_clk_disable_no_ctx(DSS_CLK_ICK
| DSS_CLK_FCK1
);
117 static void restore_all_ctx(void)
119 DSSDBG("restore context\n");
121 dss_clk_enable_all_no_ctx();
123 dss_restore_context();
124 dispc_restore_context();
125 #ifdef CONFIG_OMAP2_DSS_DSI
126 dsi_restore_context();
129 dss_clk_disable_all_no_ctx();
132 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
134 static void core_dump_clocks(struct seq_file
*s
)
137 struct clk
*clocks
[5] = {
145 seq_printf(s
, "- CORE -\n");
147 seq_printf(s
, "internal clk count\t\t%u\n", core
.num_clks_enabled
);
149 for (i
= 0; i
< 5; i
++) {
152 seq_printf(s
, "%-15s\t%lu\t%d\n",
154 clk_get_rate(clocks
[i
]),
155 clocks
[i
]->usecount
);
158 #endif /* defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT) */
160 static int dss_get_clock(struct clk
**clock
, const char *clk_name
)
164 clk
= clk_get(&core
.pdev
->dev
, clk_name
);
167 DSSERR("can't get clock %s", clk_name
);
173 DSSDBG("clk %s, rate %ld\n", clk_name
, clk_get_rate(clk
));
178 static int dss_get_clocks(void)
183 core
.dss1_fck
= NULL
;
184 core
.dss2_fck
= NULL
;
185 core
.dss_54m_fck
= NULL
;
186 core
.dss_96m_fck
= NULL
;
188 r
= dss_get_clock(&core
.dss_ick
, "ick");
192 r
= dss_get_clock(&core
.dss1_fck
, "dss1_fck");
196 r
= dss_get_clock(&core
.dss2_fck
, "dss2_fck");
200 r
= dss_get_clock(&core
.dss_54m_fck
, "tv_fck");
204 r
= dss_get_clock(&core
.dss_96m_fck
, "video_fck");
212 clk_put(core
.dss_ick
);
214 clk_put(core
.dss1_fck
);
216 clk_put(core
.dss2_fck
);
217 if (core
.dss_54m_fck
)
218 clk_put(core
.dss_54m_fck
);
219 if (core
.dss_96m_fck
)
220 clk_put(core
.dss_96m_fck
);
225 static void dss_put_clocks(void)
227 if (core
.dss_96m_fck
)
228 clk_put(core
.dss_96m_fck
);
229 clk_put(core
.dss_54m_fck
);
230 clk_put(core
.dss1_fck
);
231 clk_put(core
.dss2_fck
);
232 clk_put(core
.dss_ick
);
235 unsigned long dss_clk_get_rate(enum dss_clock clk
)
239 return clk_get_rate(core
.dss_ick
);
241 return clk_get_rate(core
.dss1_fck
);
243 return clk_get_rate(core
.dss2_fck
);
245 return clk_get_rate(core
.dss_54m_fck
);
247 return clk_get_rate(core
.dss_96m_fck
);
254 static unsigned count_clk_bits(enum dss_clock clks
)
256 unsigned num_clks
= 0;
258 if (clks
& DSS_CLK_ICK
)
260 if (clks
& DSS_CLK_FCK1
)
262 if (clks
& DSS_CLK_FCK2
)
264 if (clks
& DSS_CLK_54M
)
266 if (clks
& DSS_CLK_96M
)
272 static void dss_clk_enable_no_ctx(enum dss_clock clks
)
274 unsigned num_clks
= count_clk_bits(clks
);
276 if (clks
& DSS_CLK_ICK
)
277 clk_enable(core
.dss_ick
);
278 if (clks
& DSS_CLK_FCK1
)
279 clk_enable(core
.dss1_fck
);
280 if (clks
& DSS_CLK_FCK2
)
281 clk_enable(core
.dss2_fck
);
282 if (clks
& DSS_CLK_54M
)
283 clk_enable(core
.dss_54m_fck
);
284 if (clks
& DSS_CLK_96M
)
285 clk_enable(core
.dss_96m_fck
);
287 core
.num_clks_enabled
+= num_clks
;
290 void dss_clk_enable(enum dss_clock clks
)
292 bool check_ctx
= core
.num_clks_enabled
== 0;
294 dss_clk_enable_no_ctx(clks
);
296 if (check_ctx
&& cpu_is_omap34xx() && dss_need_ctx_restore())
300 static void dss_clk_disable_no_ctx(enum dss_clock clks
)
302 unsigned num_clks
= count_clk_bits(clks
);
304 if (clks
& DSS_CLK_ICK
)
305 clk_disable(core
.dss_ick
);
306 if (clks
& DSS_CLK_FCK1
)
307 clk_disable(core
.dss1_fck
);
308 if (clks
& DSS_CLK_FCK2
)
309 clk_disable(core
.dss2_fck
);
310 if (clks
& DSS_CLK_54M
)
311 clk_disable(core
.dss_54m_fck
);
312 if (clks
& DSS_CLK_96M
)
313 clk_disable(core
.dss_96m_fck
);
315 core
.num_clks_enabled
-= num_clks
;
318 void dss_clk_disable(enum dss_clock clks
)
320 if (cpu_is_omap34xx()) {
321 unsigned num_clks
= count_clk_bits(clks
);
323 BUG_ON(core
.num_clks_enabled
< num_clks
);
325 if (core
.num_clks_enabled
== num_clks
)
329 dss_clk_disable_no_ctx(clks
);
332 static void dss_clk_enable_all_no_ctx(void)
336 clks
= DSS_CLK_ICK
| DSS_CLK_FCK1
| DSS_CLK_FCK2
| DSS_CLK_54M
;
337 if (cpu_is_omap34xx())
339 dss_clk_enable_no_ctx(clks
);
342 static void dss_clk_disable_all_no_ctx(void)
346 clks
= DSS_CLK_ICK
| DSS_CLK_FCK1
| DSS_CLK_FCK2
| DSS_CLK_54M
;
347 if (cpu_is_omap34xx())
349 dss_clk_disable_no_ctx(clks
);
352 static void dss_clk_disable_all(void)
356 clks
= DSS_CLK_ICK
| DSS_CLK_FCK1
| DSS_CLK_FCK2
| DSS_CLK_54M
;
357 if (cpu_is_omap34xx())
359 dss_clk_disable(clks
);
364 struct regulator
*dss_get_vdds_dsi(void)
366 struct regulator
*reg
;
368 if (core
.vdds_dsi_reg
!= NULL
)
369 return core
.vdds_dsi_reg
;
371 reg
= regulator_get(&core
.pdev
->dev
, "vdds_dsi");
373 core
.vdds_dsi_reg
= reg
;
378 struct regulator
*dss_get_vdds_sdi(void)
380 struct regulator
*reg
;
382 if (core
.vdds_sdi_reg
!= NULL
)
383 return core
.vdds_sdi_reg
;
385 reg
= regulator_get(&core
.pdev
->dev
, "vdds_sdi");
387 core
.vdds_sdi_reg
= reg
;
392 struct regulator
*dss_get_vdda_dac(void)
394 struct regulator
*reg
;
396 if (core
.vdda_dac_reg
!= NULL
)
397 return core
.vdda_dac_reg
;
399 reg
= regulator_get(&core
.pdev
->dev
, "vdda_dac");
401 core
.vdda_dac_reg
= reg
;
407 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
408 static void dss_debug_dump_clocks(struct seq_file
*s
)
412 dispc_dump_clocks(s
);
413 #ifdef CONFIG_OMAP2_DSS_DSI
418 static int dss_debug_show(struct seq_file
*s
, void *unused
)
420 void (*func
)(struct seq_file
*) = s
->private;
425 static int dss_debug_open(struct inode
*inode
, struct file
*file
)
427 return single_open(file
, dss_debug_show
, inode
->i_private
);
430 static const struct file_operations dss_debug_fops
= {
431 .open
= dss_debug_open
,
434 .release
= single_release
,
437 static struct dentry
*dss_debugfs_dir
;
439 static int dss_initialize_debugfs(void)
441 dss_debugfs_dir
= debugfs_create_dir("omapdss", NULL
);
442 if (IS_ERR(dss_debugfs_dir
)) {
443 int err
= PTR_ERR(dss_debugfs_dir
);
444 dss_debugfs_dir
= NULL
;
448 debugfs_create_file("clk", S_IRUGO
, dss_debugfs_dir
,
449 &dss_debug_dump_clocks
, &dss_debug_fops
);
451 #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
452 debugfs_create_file("dispc_irq", S_IRUGO
, dss_debugfs_dir
,
453 &dispc_dump_irqs
, &dss_debug_fops
);
456 #if defined(CONFIG_OMAP2_DSS_DSI) && defined(CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS)
457 debugfs_create_file("dsi_irq", S_IRUGO
, dss_debugfs_dir
,
458 &dsi_dump_irqs
, &dss_debug_fops
);
461 debugfs_create_file("dss", S_IRUGO
, dss_debugfs_dir
,
462 &dss_dump_regs
, &dss_debug_fops
);
463 debugfs_create_file("dispc", S_IRUGO
, dss_debugfs_dir
,
464 &dispc_dump_regs
, &dss_debug_fops
);
465 #ifdef CONFIG_OMAP2_DSS_RFBI
466 debugfs_create_file("rfbi", S_IRUGO
, dss_debugfs_dir
,
467 &rfbi_dump_regs
, &dss_debug_fops
);
469 #ifdef CONFIG_OMAP2_DSS_DSI
470 debugfs_create_file("dsi", S_IRUGO
, dss_debugfs_dir
,
471 &dsi_dump_regs
, &dss_debug_fops
);
473 #ifdef CONFIG_OMAP2_DSS_VENC
474 debugfs_create_file("venc", S_IRUGO
, dss_debugfs_dir
,
475 &venc_dump_regs
, &dss_debug_fops
);
480 static void dss_uninitialize_debugfs(void)
483 debugfs_remove_recursive(dss_debugfs_dir
);
485 #else /* CONFIG_DEBUG_FS && CONFIG_OMAP2_DSS_DEBUG_SUPPORT */
486 static inline int dss_initialize_debugfs(void)
490 static inline void dss_uninitialize_debugfs(void)
493 #endif /* CONFIG_DEBUG_FS && CONFIG_OMAP2_DSS_DEBUG_SUPPORT */
495 /* PLATFORM DEVICE */
496 static int omap_dss_probe(struct platform_device
*pdev
)
498 struct omap_dss_board_info
*pdata
= pdev
->dev
.platform_data
;
505 dss_init_overlay_managers(pdev
);
506 dss_init_overlays(pdev
);
508 r
= dss_get_clocks();
512 dss_clk_enable_all_no_ctx();
514 core
.ctx_id
= dss_get_ctx_id();
515 DSSDBG("initial ctx id %u\n", core
.ctx_id
);
517 #ifdef CONFIG_FB_OMAP_BOOTLOADER_INIT
519 if (omap_readl(0x48050440) & 1) /* LCD enabled? */
523 r
= dss_init(skip_init
);
525 DSSERR("Failed to initialize DSS\n");
531 DSSERR("Failed to initialize rfbi\n");
537 DSSERR("Failed to initialize dpi\n");
543 DSSERR("Failed to initialize dispc\n");
549 DSSERR("Failed to initialize venc\n");
553 if (cpu_is_omap34xx()) {
554 r
= sdi_init(skip_init
);
556 DSSERR("Failed to initialize SDI\n");
562 DSSERR("Failed to initialize DSI\n");
567 r
= dss_initialize_debugfs();
571 for (i
= 0; i
< pdata
->num_devices
; ++i
) {
572 struct omap_dss_device
*dssdev
= pdata
->devices
[i
];
574 r
= omap_dss_register_device(dssdev
);
576 DSSERR("device %d %s register failed %d\n", i
,
577 dssdev
->name
?: "unnamed", r
);
580 omap_dss_unregister_device(pdata
->devices
[i
]);
585 if (def_disp_name
&& strcmp(def_disp_name
, dssdev
->name
) == 0)
586 pdata
->default_device
= dssdev
;
589 dss_clk_disable_all();
594 dss_uninitialize_debugfs();
596 if (cpu_is_omap34xx())
599 if (cpu_is_omap34xx())
612 dss_clk_disable_all_no_ctx();
619 static int omap_dss_remove(struct platform_device
*pdev
)
621 struct omap_dss_board_info
*pdata
= pdev
->dev
.platform_data
;
625 dss_uninitialize_debugfs();
631 if (cpu_is_omap34xx()) {
638 /* these should be removed at some point */
639 c
= core
.dss_ick
->usecount
;
641 DSSERR("warning: dss_ick usecount %d, disabling\n", c
);
643 clk_disable(core
.dss_ick
);
646 c
= core
.dss1_fck
->usecount
;
648 DSSERR("warning: dss1_fck usecount %d, disabling\n", c
);
650 clk_disable(core
.dss1_fck
);
653 c
= core
.dss2_fck
->usecount
;
655 DSSERR("warning: dss2_fck usecount %d, disabling\n", c
);
657 clk_disable(core
.dss2_fck
);
660 c
= core
.dss_54m_fck
->usecount
;
662 DSSERR("warning: dss_54m_fck usecount %d, disabling\n", c
);
664 clk_disable(core
.dss_54m_fck
);
667 if (core
.dss_96m_fck
) {
668 c
= core
.dss_96m_fck
->usecount
;
670 DSSERR("warning: dss_96m_fck usecount %d, disabling\n",
673 clk_disable(core
.dss_96m_fck
);
679 dss_uninit_overlays(pdev
);
680 dss_uninit_overlay_managers(pdev
);
682 for (i
= 0; i
< pdata
->num_devices
; ++i
)
683 omap_dss_unregister_device(pdata
->devices
[i
]);
688 static void omap_dss_shutdown(struct platform_device
*pdev
)
690 DSSDBG("shutdown\n");
691 dss_disable_all_devices();
694 static int omap_dss_suspend(struct platform_device
*pdev
, pm_message_t state
)
696 DSSDBG("suspend %d\n", state
.event
);
698 return dss_suspend_all_devices();
701 static int omap_dss_resume(struct platform_device
*pdev
)
705 return dss_resume_all_devices();
708 static struct platform_driver omap_dss_driver
= {
709 .probe
= omap_dss_probe
,
710 .remove
= omap_dss_remove
,
711 .shutdown
= omap_dss_shutdown
,
712 .suspend
= omap_dss_suspend
,
713 .resume
= omap_dss_resume
,
716 .owner
= THIS_MODULE
,
721 static int dss_bus_match(struct device
*dev
, struct device_driver
*driver
)
723 struct omap_dss_device
*dssdev
= to_dss_device(dev
);
725 DSSDBG("bus_match. dev %s/%s, drv %s\n",
726 dev_name(dev
), dssdev
->driver_name
, driver
->name
);
728 return strcmp(dssdev
->driver_name
, driver
->name
) == 0;
731 static ssize_t
device_name_show(struct device
*dev
,
732 struct device_attribute
*attr
, char *buf
)
734 struct omap_dss_device
*dssdev
= to_dss_device(dev
);
735 return snprintf(buf
, PAGE_SIZE
, "%s\n",
740 static struct device_attribute default_dev_attrs
[] = {
741 __ATTR(name
, S_IRUGO
, device_name_show
, NULL
),
745 static ssize_t
driver_name_show(struct device_driver
*drv
, char *buf
)
747 struct omap_dss_driver
*dssdrv
= to_dss_driver(drv
);
748 return snprintf(buf
, PAGE_SIZE
, "%s\n",
749 dssdrv
->driver
.name
?
750 dssdrv
->driver
.name
: "");
752 static struct driver_attribute default_drv_attrs
[] = {
753 __ATTR(name
, S_IRUGO
, driver_name_show
, NULL
),
757 static struct bus_type dss_bus_type
= {
759 .match
= dss_bus_match
,
760 .dev_attrs
= default_dev_attrs
,
761 .drv_attrs
= default_drv_attrs
,
764 static void dss_bus_release(struct device
*dev
)
766 DSSDBG("bus_release\n");
769 static struct device dss_bus
= {
770 .release
= dss_bus_release
,
773 struct bus_type
*dss_get_bus(void)
775 return &dss_bus_type
;
779 static int dss_driver_probe(struct device
*dev
)
782 struct omap_dss_driver
*dssdrv
= to_dss_driver(dev
->driver
);
783 struct omap_dss_device
*dssdev
= to_dss_device(dev
);
784 struct omap_dss_board_info
*pdata
= core
.pdev
->dev
.platform_data
;
787 DSSDBG("driver_probe: dev %s/%s, drv %s\n",
788 dev_name(dev
), dssdev
->driver_name
,
789 dssdrv
->driver
.name
);
791 dss_init_device(core
.pdev
, dssdev
);
793 force
= pdata
->default_device
== dssdev
;
794 dss_recheck_connections(dssdev
, force
);
796 r
= dssdrv
->probe(dssdev
);
799 DSSERR("driver probe failed: %d\n", r
);
800 dss_uninit_device(core
.pdev
, dssdev
);
804 DSSDBG("probe done for device %s\n", dev_name(dev
));
806 dssdev
->driver
= dssdrv
;
811 static int dss_driver_remove(struct device
*dev
)
813 struct omap_dss_driver
*dssdrv
= to_dss_driver(dev
->driver
);
814 struct omap_dss_device
*dssdev
= to_dss_device(dev
);
816 DSSDBG("driver_remove: dev %s/%s\n", dev_name(dev
),
817 dssdev
->driver_name
);
819 dssdrv
->remove(dssdev
);
821 dss_uninit_device(core
.pdev
, dssdev
);
823 dssdev
->driver
= NULL
;
828 int omap_dss_register_driver(struct omap_dss_driver
*dssdriver
)
830 dssdriver
->driver
.bus
= &dss_bus_type
;
831 dssdriver
->driver
.probe
= dss_driver_probe
;
832 dssdriver
->driver
.remove
= dss_driver_remove
;
834 if (dssdriver
->get_resolution
== NULL
)
835 dssdriver
->get_resolution
= omapdss_default_get_resolution
;
836 if (dssdriver
->get_recommended_bpp
== NULL
)
837 dssdriver
->get_recommended_bpp
=
838 omapdss_default_get_recommended_bpp
;
840 return driver_register(&dssdriver
->driver
);
842 EXPORT_SYMBOL(omap_dss_register_driver
);
844 void omap_dss_unregister_driver(struct omap_dss_driver
*dssdriver
)
846 driver_unregister(&dssdriver
->driver
);
848 EXPORT_SYMBOL(omap_dss_unregister_driver
);
851 static void reset_device(struct device
*dev
, int check
)
853 u8
*dev_p
= (u8
*)dev
;
854 u8
*dev_end
= dev_p
+ sizeof(*dev
);
857 saved_pdata
= dev
->platform_data
;
860 * Check if there is any other setting than platform_data
861 * in struct device; warn that these will be reset by our
864 dev
->platform_data
= NULL
;
865 while (dev_p
< dev_end
) {
867 WARN("%s: struct device fields will be "
875 memset(dev
, 0, sizeof(*dev
));
876 dev
->platform_data
= saved_pdata
;
880 static void omap_dss_dev_release(struct device
*dev
)
882 reset_device(dev
, 0);
885 int omap_dss_register_device(struct omap_dss_device
*dssdev
)
889 WARN_ON(!dssdev
->driver_name
);
891 reset_device(&dssdev
->dev
, 1);
892 dssdev
->dev
.bus
= &dss_bus_type
;
893 dssdev
->dev
.parent
= &dss_bus
;
894 dssdev
->dev
.release
= omap_dss_dev_release
;
895 dev_set_name(&dssdev
->dev
, "display%d", dev_num
++);
896 return device_register(&dssdev
->dev
);
899 void omap_dss_unregister_device(struct omap_dss_device
*dssdev
)
901 device_unregister(&dssdev
->dev
);
905 static int omap_dss_bus_register(void)
909 r
= bus_register(&dss_bus_type
);
911 DSSERR("bus register failed\n");
915 dev_set_name(&dss_bus
, "omapdss");
916 r
= device_register(&dss_bus
);
918 DSSERR("bus driver register failed\n");
919 bus_unregister(&dss_bus_type
);
928 #ifdef CONFIG_OMAP2_DSS_MODULE
929 static void omap_dss_bus_unregister(void)
931 device_unregister(&dss_bus
);
933 bus_unregister(&dss_bus_type
);
936 static int __init
omap_dss_init(void)
940 r
= omap_dss_bus_register();
944 r
= platform_driver_register(&omap_dss_driver
);
946 omap_dss_bus_unregister();
953 static void __exit
omap_dss_exit(void)
955 if (core
.vdds_dsi_reg
!= NULL
) {
956 regulator_put(core
.vdds_dsi_reg
);
957 core
.vdds_dsi_reg
= NULL
;
960 if (core
.vdds_sdi_reg
!= NULL
) {
961 regulator_put(core
.vdds_sdi_reg
);
962 core
.vdds_sdi_reg
= NULL
;
965 if (core
.vdda_dac_reg
!= NULL
) {
966 regulator_put(core
.vdda_dac_reg
);
967 core
.vdda_dac_reg
= NULL
;
970 platform_driver_unregister(&omap_dss_driver
);
972 omap_dss_bus_unregister();
975 module_init(omap_dss_init
);
976 module_exit(omap_dss_exit
);
978 static int __init
omap_dss_init(void)
980 return omap_dss_bus_register();
983 static int __init
omap_dss_init2(void)
985 return platform_driver_register(&omap_dss_driver
);
988 core_initcall(omap_dss_init
);
989 device_initcall(omap_dss_init2
);
992 MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@nokia.com>");
993 MODULE_DESCRIPTION("OMAP2/3 Display Subsystem");
994 MODULE_LICENSE("GPL v2");