release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/video/kyro/STG4000Reg.h

   1 /*
   2  *  linux/drivers/video/kyro/STG4000Reg.h
   3  *
   4  *  Copyright (C) 2002 STMicroelectronics
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file COPYING in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #ifndef _STG4000REG_H
  12 #define _STG4000REG_H
  13
  14 #define DWFILL unsigned long :32
  15 #define WFILL unsigned short :16
  16
  17 /*
  18  * Macros that access memory mapped card registers in PCI space
  19  * Add an appropraite section for your OS or processor architecture.
  20  */
  21 #if defined(__KERNEL__)
  22 #include <asm/page.h>
  23 #include <asm/io.h>
  24 #define STG_WRITE_REG(reg,data) (writel(data,&pSTGReg->reg))
  25 #define STG_READ_REG(reg)      (readl(&pSTGReg->reg))
  26 #else
  27 #define STG_WRITE_REG(reg,data) (pSTGReg->reg = data)
  28 #define STG_READ_REG(reg)      (pSTGReg->reg)
  29 #endif /* __KERNEL__ */
  30
  31 #define SET_BIT(n) (1<<(n))
  32 #define CLEAR_BIT(n) (tmp &= ~(1<<n))
  33 #define CLEAR_BITS_FRM_TO(frm, to) \
  34 {\
  35 int i; \
  36     for(i = frm; i<= to; i++) \
  37         { \
  38             tmp &= ~(1<<i); \
  39         } \
  40 }
  41
  42 #define CLEAR_BIT_2(n) (usTemp &= ~(1<<n))
  43 #define CLEAR_BITS_FRM_TO_2(frm, to) \
  44 {\
  45 int i; \
  46     for(i = frm; i<= to; i++) \
  47         { \
  48             usTemp &= ~(1<<i); \
  49         } \
  50 }
  51
  52 /* LUT select */
  53 typedef enum _LUT_USES {
  54         NO_LUT = 0, RESERVED, GRAPHICS, OVERLAY
  55 } LUT_USES;
  56
  57 /* Primary surface pixel format select */
  58 typedef enum _PIXEL_FORMAT {
  59         _8BPP = 0, _15BPP, _16BPP, _24BPP, _32BPP
  60 } PIXEL_FORMAT;
  61
  62 /* Overlay blending mode select */
  63 typedef enum _BLEND_MODE {
  64         GRAPHICS_MODE = 0, COLOR_KEY, PER_PIXEL_ALPHA, GLOBAL_ALPHA,
  65         CK_PIXEL_ALPHA, CK_GLOBAL_ALPHA
  66 } OVRL_BLEND_MODE;
  67
  68 /* Overlay Pixel format select */
  69 typedef enum _OVRL_PIX_FORMAT {
  70         UYVY, VYUY, YUYV, YVYU
  71 } OVRL_PIX_FORMAT;
  72
  73 /* Register Table */
  74 typedef struct {
  75         /* 0h  */
  76         volatile unsigned long Thread0Enable;   /* 0x0000 */
  77         volatile unsigned long Thread1Enable;   /* 0x0004 */
  78         volatile unsigned long Thread0Recover;  /* 0x0008 */
  79         volatile unsigned long Thread1Recover;  /* 0x000C */
  80         volatile unsigned long Thread0Step;     /* 0x0010 */
  81         volatile unsigned long Thread1Step;     /* 0x0014 */
  82         volatile unsigned long VideoInStatus;   /* 0x0018 */
  83         volatile unsigned long Core2InSignStart;        /* 0x001C */
  84         volatile unsigned long Core1ResetVector;        /* 0x0020 */
  85         volatile unsigned long Core1ROMOffset;  /* 0x0024 */
  86         volatile unsigned long Core1ArbiterPriority;    /* 0x0028 */
  87         volatile unsigned long VideoInControl;  /* 0x002C */
  88         volatile unsigned long VideoInReg0CtrlA;        /* 0x0030 */
  89         volatile unsigned long VideoInReg0CtrlB;        /* 0x0034 */
  90         volatile unsigned long VideoInReg1CtrlA;        /* 0x0038 */
  91         volatile unsigned long VideoInReg1CtrlB;        /* 0x003C */
  92         volatile unsigned long Thread0Kicker;   /* 0x0040 */
  93         volatile unsigned long Core2InputSign;  /* 0x0044 */
  94         volatile unsigned long Thread0ProgCtr;  /* 0x0048 */
  95         volatile unsigned long Thread1ProgCtr;  /* 0x004C */
  96         volatile unsigned long Thread1Kicker;   /* 0x0050 */
  97         volatile unsigned long GPRegister1;     /* 0x0054 */
  98         volatile unsigned long GPRegister2;     /* 0x0058 */
  99         volatile unsigned long GPRegister3;     /* 0x005C */
 100         volatile unsigned long GPRegister4;     /* 0x0060 */
 101         volatile unsigned long SerialIntA;      /* 0x0064 */
 102
 103         volatile unsigned long Fill0[6];        /* GAP 0x0068 - 0x007C */
 104
 105         volatile unsigned long SoftwareReset;   /* 0x0080 */
 106         volatile unsigned long SerialIntB;      /* 0x0084 */
 107
 108         volatile unsigned long Fill1[37];       /* GAP 0x0088 - 0x011C */
 109
 110         volatile unsigned long ROMELQV; /* 0x011C */
 111         volatile unsigned long WLWH;    /* 0x0120 */
 112         volatile unsigned long ROMELWL; /* 0x0124 */
 113
 114         volatile unsigned long dwFill_1;        /* GAP 0x0128 */
 115
 116         volatile unsigned long IntStatus;       /* 0x012C */
 117         volatile unsigned long IntMask; /* 0x0130 */
 118         volatile unsigned long IntClear;        /* 0x0134 */
 119
 120         volatile unsigned long Fill2[6];        /* GAP 0x0138 - 0x014C */
 121
 122         volatile unsigned long ROMGPIOA;        /* 0x0150 */
 123         volatile unsigned long ROMGPIOB;        /* 0x0154 */
 124         volatile unsigned long ROMGPIOC;        /* 0x0158 */
 125         volatile unsigned long ROMGPIOD;        /* 0x015C */
 126
 127         volatile unsigned long Fill3[2];        /* GAP 0x0160 - 0x0168 */
 128
 129         volatile unsigned long AGPIntID;        /* 0x0168 */
 130         volatile unsigned long AGPIntClassCode; /* 0x016C */
 131         volatile unsigned long AGPIntBIST;      /* 0x0170 */
 132         volatile unsigned long AGPIntSSID;      /* 0x0174 */
 133         volatile unsigned long AGPIntPMCSR;     /* 0x0178 */
 134         volatile unsigned long VGAFrameBufBase; /* 0x017C */
 135         volatile unsigned long VGANotify;       /* 0x0180 */
 136         volatile unsigned long DACPLLMode;      /* 0x0184 */
 137         volatile unsigned long Core1VideoClockDiv;      /* 0x0188 */
 138         volatile unsigned long AGPIntStat;      /* 0x018C */
 139
 140         /*
 141            volatile unsigned long Fill4[0x0400/4 - 0x0190/4]; //GAP 0x0190 - 0x0400
 142            volatile unsigned long Fill5[0x05FC/4 - 0x0400/4]; //GAP 0x0400 - 0x05FC Fog Table
 143            volatile unsigned long Fill6[0x0604/4 - 0x0600/4]; //GAP 0x0600 - 0x0604
 144            volatile unsigned long Fill7[0x0680/4 - 0x0608/4]; //GAP 0x0608 - 0x0680
 145            volatile unsigned long Fill8[0x07FC/4 - 0x0684/4]; //GAP 0x0684 - 0x07FC
 146          */
 147         volatile unsigned long Fill4[412];      /* 0x0190 - 0x07FC */
 148
 149         volatile unsigned long TACtrlStreamBase;        /* 0x0800 */
 150         volatile unsigned long TAObjDataBase;   /* 0x0804 */
 151         volatile unsigned long TAPtrDataBase;   /* 0x0808 */
 152         volatile unsigned long TARegionDataBase;        /* 0x080C */
 153         volatile unsigned long TATailPtrBase;   /* 0x0810 */
 154         volatile unsigned long TAPtrRegionSize; /* 0x0814 */
 155         volatile unsigned long TAConfiguration; /* 0x0818 */
 156         volatile unsigned long TAObjDataStartAddr;      /* 0x081C */
 157         volatile unsigned long TAObjDataEndAddr;        /* 0x0820 */
 158         volatile unsigned long TAXScreenClip;   /* 0x0824 */
 159         volatile unsigned long TAYScreenClip;   /* 0x0828 */
 160         volatile unsigned long TARHWClamp;      /* 0x082C */
 161         volatile unsigned long TARHWCompare;    /* 0x0830 */
 162         volatile unsigned long TAStart; /* 0x0834 */
 163         volatile unsigned long TAObjReStart;    /* 0x0838 */
 164         volatile unsigned long TAPtrReStart;    /* 0x083C */
 165         volatile unsigned long TAStatus1;       /* 0x0840 */
 166         volatile unsigned long TAStatus2;       /* 0x0844 */
 167         volatile unsigned long TAIntStatus;     /* 0x0848 */
 168         volatile unsigned long TAIntMask;       /* 0x084C */
 169
 170         volatile unsigned long Fill5[235];      /* GAP 0x0850 - 0x0BF8 */
 171
 172         volatile unsigned long TextureAddrThresh;       /* 0x0BFC */
 173         volatile unsigned long Core1Translation;        /* 0x0C00 */
 174         volatile unsigned long TextureAddrReMap;        /* 0x0C04 */
 175         volatile unsigned long RenderOutAGPRemap;       /* 0x0C08 */
 176         volatile unsigned long _3DRegionReadTrans;      /* 0x0C0C */
 177         volatile unsigned long _3DPtrReadTrans; /* 0x0C10 */
 178         volatile unsigned long _3DParamReadTrans;       /* 0x0C14 */
 179         volatile unsigned long _3DRegionReadThresh;     /* 0x0C18 */
 180         volatile unsigned long _3DPtrReadThresh;        /* 0x0C1C */
 181         volatile unsigned long _3DParamReadThresh;      /* 0x0C20 */
 182         volatile unsigned long _3DRegionReadAGPRemap;   /* 0x0C24 */
 183         volatile unsigned long _3DPtrReadAGPRemap;      /* 0x0C28 */
 184         volatile unsigned long _3DParamReadAGPRemap;    /* 0x0C2C */
 185         volatile unsigned long ZBufferAGPRemap; /* 0x0C30 */
 186         volatile unsigned long TAIndexAGPRemap; /* 0x0C34 */
 187         volatile unsigned long TAVertexAGPRemap;        /* 0x0C38 */
 188         volatile unsigned long TAUVAddrTrans;   /* 0x0C3C */
 189         volatile unsigned long TATailPtrCacheTrans;     /* 0x0C40 */
 190         volatile unsigned long TAParamWriteTrans;       /* 0x0C44 */
 191         volatile unsigned long TAPtrWriteTrans; /* 0x0C48 */
 192         volatile unsigned long TAParamWriteThresh;      /* 0x0C4C */
 193         volatile unsigned long TAPtrWriteThresh;        /* 0x0C50 */
 194         volatile unsigned long TATailPtrCacheAGPRe;     /* 0x0C54 */
 195         volatile unsigned long TAParamWriteAGPRe;       /* 0x0C58 */
 196         volatile unsigned long TAPtrWriteAGPRe; /* 0x0C5C */
 197         volatile unsigned long SDRAMArbiterConf;        /* 0x0C60 */
 198         volatile unsigned long SDRAMConf0;      /* 0x0C64 */
 199         volatile unsigned long SDRAMConf1;      /* 0x0C68 */
 200         volatile unsigned long SDRAMConf2;      /* 0x0C6C */
 201         volatile unsigned long SDRAMRefresh;    /* 0x0C70 */
 202         volatile unsigned long SDRAMPowerStat;  /* 0x0C74 */
 203
 204         volatile unsigned long Fill6[2];        /* GAP 0x0C78 - 0x0C7C */
 205
 206         volatile unsigned long RAMBistData;     /* 0x0C80 */
 207         volatile unsigned long RAMBistCtrl;     /* 0x0C84 */
 208         volatile unsigned long FIFOBistKey;     /* 0x0C88 */
 209         volatile unsigned long RAMBistResult;   /* 0x0C8C */
 210         volatile unsigned long FIFOBistResult;  /* 0x0C90 */
 211
 212         /*
 213            volatile unsigned long Fill11[0x0CBC/4 - 0x0C94/4]; //GAP 0x0C94 - 0x0CBC
 214            volatile unsigned long Fill12[0x0CD0/4 - 0x0CC0/4]; //GAP 0x0CC0 - 0x0CD0 3DRegisters
 215          */
 216
 217         volatile unsigned long Fill7[16];       /* 0x0c94 - 0x0cd0 */
 218
 219         volatile unsigned long SDRAMAddrSign;   /* 0x0CD4 */
 220         volatile unsigned long SDRAMDataSign;   /* 0x0CD8 */
 221         volatile unsigned long SDRAMSignConf;   /* 0x0CDC */
 222
 223         /* DWFILL; //GAP 0x0CE0 */
 224         volatile unsigned long dwFill_2;
 225
 226         volatile unsigned long ISPSignature;    /* 0x0CE4 */
 227
 228         volatile unsigned long Fill8[454];      /*GAP 0x0CE8 - 0x13FC */
 229
 230         volatile unsigned long DACPrimAddress;  /* 0x1400 */
 231         volatile unsigned long DACPrimSize;     /* 0x1404 */
 232         volatile unsigned long DACCursorAddr;   /* 0x1408 */
 233         volatile unsigned long DACCursorCtrl;   /* 0x140C */
 234         volatile unsigned long DACOverlayAddr;  /* 0x1410 */
 235         volatile unsigned long DACOverlayUAddr; /* 0x1414 */
 236         volatile unsigned long DACOverlayVAddr; /* 0x1418 */
 237         volatile unsigned long DACOverlaySize;  /* 0x141C */
 238         volatile unsigned long DACOverlayVtDec; /* 0x1420 */
 239
 240         volatile unsigned long Fill9[9];        /* GAP 0x1424 - 0x1444 */
 241
 242         volatile unsigned long DACVerticalScal; /* 0x1448 */
 243         volatile unsigned long DACPixelFormat;  /* 0x144C */
 244         volatile unsigned long DACHorizontalScal;       /* 0x1450 */
 245         volatile unsigned long DACVidWinStart;  /* 0x1454 */
 246         volatile unsigned long DACVidWinEnd;    /* 0x1458 */
 247         volatile unsigned long DACBlendCtrl;    /* 0x145C */
 248         volatile unsigned long DACHorTim1;      /* 0x1460 */
 249         volatile unsigned long DACHorTim2;      /* 0x1464 */
 250         volatile unsigned long DACHorTim3;      /* 0x1468 */
 251         volatile unsigned long DACVerTim1;      /* 0x146C */
 252         volatile unsigned long DACVerTim2;      /* 0x1470 */
 253         volatile unsigned long DACVerTim3;      /* 0x1474 */
 254         volatile unsigned long DACBorderColor;  /* 0x1478 */
 255         volatile unsigned long DACSyncCtrl;     /* 0x147C */
 256         volatile unsigned long DACStreamCtrl;   /* 0x1480 */
 257         volatile unsigned long DACLUTAddress;   /* 0x1484 */
 258         volatile unsigned long DACLUTData;      /* 0x1488 */
 259         volatile unsigned long DACBurstCtrl;    /* 0x148C */
 260         volatile unsigned long DACCrcTrigger;   /* 0x1490 */
 261         volatile unsigned long DACCrcDone;      /* 0x1494 */
 262         volatile unsigned long DACCrcResult1;   /* 0x1498 */
 263         volatile unsigned long DACCrcResult2;   /* 0x149C */
 264         volatile unsigned long DACLinecount;    /* 0x14A0 */
 265
 266         volatile unsigned long Fill10[151];     /*GAP 0x14A4 - 0x16FC */
 267
 268         volatile unsigned long DigVidPortCtrl;  /* 0x1700 */
 269         volatile unsigned long DigVidPortStat;  /* 0x1704 */
 270
 271         /*
 272            volatile unsigned long Fill11[0x1FFC/4 - 0x1708/4]; //GAP 0x1708 - 0x1FFC
 273            volatile unsigned long Fill17[0x3000/4 - 0x2FFC/4]; //GAP 0x2000 - 0x2FFC ALUT
 274          */
 275
 276         volatile unsigned long Fill11[1598];
 277
 278         /* DWFILL; //GAP 0x3000          ALUT 256MB offset */
 279         volatile unsigned long Fill_3;
 280
 281 } STG4000REG;
 282
 283 #endif /* _STG4000REG_H */