4 * lirc_serial - Device driver that records pulse- and pause-lengths
5 * (space-lengths) between DDCD event on a serial port.
7 * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
8 * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
9 * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
10 * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
11 * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 * Steve's changes to improve transmission fidelity:
30 * - for systems with the rdtsc instruction and the clock counter, a
31 * send_pule that times the pulses directly using the counter.
32 * This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
33 * not needed. Measurement shows very stable waveform, even where
34 * PCI activity slows the access to the UART, which trips up other
36 * - For other system, non-integer-microsecond pulse/space lengths,
37 * done using fixed point binary. So, much more accurate carrier
39 * - fine tuned transmitter latency, taking advantage of fractional
40 * microseconds in previous change
41 * - Fixed bug in the way transmitter latency was accounted for by
42 * tuning the pulse lengths down - the send_pulse routine ignored
43 * this overhead as it timed the overall pulse length - so the
44 * pulse frequency was right but overall pulse length was too
45 * long. Fixed by accounting for latency on each pulse/space
48 * Steve Davies <steve@daviesfam.org> July 2001
51 #include <linux/module.h>
52 #include <linux/errno.h>
53 #include <linux/signal.h>
54 #include <linux/sched.h>
56 #include <linux/interrupt.h>
57 #include <linux/ioport.h>
58 #include <linux/kernel.h>
59 #include <linux/serial_reg.h>
60 #include <linux/time.h>
61 #include <linux/string.h>
62 #include <linux/types.h>
63 #include <linux/wait.h>
65 #include <linux/delay.h>
66 #include <linux/poll.h>
67 #include <linux/platform_device.h>
69 #include <asm/system.h>
71 #include <linux/irq.h>
72 #include <linux/fcntl.h>
73 #include <linux/spinlock.h>
75 #ifdef CONFIG_LIRC_SERIAL_NSLU2
76 #include <asm/hardware.h>
78 /* From Intel IXP42X Developer's Manual (#252480-005): */
79 /* ftp://download.intel.com/design/network/manuals/25248005.pdf */
80 #define UART_IE_IXP42X_UUE 0x40 /* IXP42X UART Unit enable */
81 #define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
83 #include <media/lirc.h>
84 #include <media/lirc_dev.h>
86 #define LIRC_DRIVER_NAME "lirc_serial"
90 int signal_pin_change
;
93 long (*send_pulse
)(unsigned long length
);
94 void (*send_space
)(long length
);
99 #define LIRC_HOMEBREW 0
101 #define LIRC_IRDEO_REMOTE 2
102 #define LIRC_ANIMAX 3
106 /*** module parameters ***/
112 static int softcarrier
= 1;
113 static int share_irq
;
115 static int sense
= -1; /* -1 = auto, 0 = active high, 1 = active low */
116 static int txsense
; /* 0 = active high, 1 = active low */
118 #define dprintk(fmt, args...) \
121 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
125 /* forward declarations */
126 static long send_pulse_irdeo(unsigned long length
);
127 static long send_pulse_homebrew(unsigned long length
);
128 static void send_space_irdeo(long length
);
129 static void send_space_homebrew(long length
);
131 static struct lirc_serial hardware
[] = {
133 .signal_pin
= UART_MSR_DCD
,
134 .signal_pin_change
= UART_MSR_DDCD
,
135 .on
= (UART_MCR_RTS
| UART_MCR_OUT2
| UART_MCR_DTR
),
136 .off
= (UART_MCR_RTS
| UART_MCR_OUT2
),
137 .send_pulse
= send_pulse_homebrew
,
138 .send_space
= send_space_homebrew
,
139 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
140 .features
= (LIRC_CAN_SET_SEND_DUTY_CYCLE
|
141 LIRC_CAN_SET_SEND_CARRIER
|
142 LIRC_CAN_SEND_PULSE
| LIRC_CAN_REC_MODE2
)
144 .features
= LIRC_CAN_REC_MODE2
149 .signal_pin
= UART_MSR_DSR
,
150 .signal_pin_change
= UART_MSR_DDSR
,
152 .off
= (UART_MCR_RTS
| UART_MCR_DTR
| UART_MCR_OUT2
),
153 .send_pulse
= send_pulse_irdeo
,
154 .send_space
= send_space_irdeo
,
155 .features
= (LIRC_CAN_SET_SEND_DUTY_CYCLE
|
156 LIRC_CAN_SEND_PULSE
| LIRC_CAN_REC_MODE2
)
159 [LIRC_IRDEO_REMOTE
] = {
160 .signal_pin
= UART_MSR_DSR
,
161 .signal_pin_change
= UART_MSR_DDSR
,
162 .on
= (UART_MCR_RTS
| UART_MCR_DTR
| UART_MCR_OUT2
),
163 .off
= (UART_MCR_RTS
| UART_MCR_DTR
| UART_MCR_OUT2
),
164 .send_pulse
= send_pulse_irdeo
,
165 .send_space
= send_space_irdeo
,
166 .features
= (LIRC_CAN_SET_SEND_DUTY_CYCLE
|
167 LIRC_CAN_SEND_PULSE
| LIRC_CAN_REC_MODE2
)
171 .signal_pin
= UART_MSR_DCD
,
172 .signal_pin_change
= UART_MSR_DDCD
,
174 .off
= (UART_MCR_RTS
| UART_MCR_DTR
| UART_MCR_OUT2
),
177 .features
= LIRC_CAN_REC_MODE2
181 .signal_pin
= UART_MSR_DSR
,
182 .signal_pin_change
= UART_MSR_DDSR
,
183 .on
= (UART_MCR_RTS
| UART_MCR_OUT2
| UART_MCR_DTR
),
184 .off
= (UART_MCR_RTS
| UART_MCR_OUT2
),
185 .send_pulse
= send_pulse_homebrew
,
186 .send_space
= send_space_homebrew
,
187 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
188 .features
= (LIRC_CAN_SET_SEND_DUTY_CYCLE
|
189 LIRC_CAN_SET_SEND_CARRIER
|
190 LIRC_CAN_SEND_PULSE
| LIRC_CAN_REC_MODE2
)
192 .features
= LIRC_CAN_REC_MODE2
196 #ifdef CONFIG_LIRC_SERIAL_NSLU2
198 * Modified Linksys Network Storage Link USB 2.0 (NSLU2):
199 * We receive on CTS of the 2nd serial port (R142,LHS), we
200 * transmit with a IR diode between GPIO[1] (green status LED),
201 * and ground (Matthias Goebl <matthias.goebl@goebl.net>).
202 * See also http://www.nslu2-linux.org for this device
205 .signal_pin
= UART_MSR_CTS
,
206 .signal_pin_change
= UART_MSR_DCTS
,
207 .on
= (UART_MCR_RTS
| UART_MCR_OUT2
| UART_MCR_DTR
),
208 .off
= (UART_MCR_RTS
| UART_MCR_OUT2
),
209 .send_pulse
= send_pulse_homebrew
,
210 .send_space
= send_space_homebrew
,
211 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
212 .features
= (LIRC_CAN_SET_SEND_DUTY_CYCLE
|
213 LIRC_CAN_SET_SEND_CARRIER
|
214 LIRC_CAN_SEND_PULSE
| LIRC_CAN_REC_MODE2
)
216 .features
= LIRC_CAN_REC_MODE2
223 #define RS_ISR_PASS_LIMIT 256
226 * A long pulse code from a remote might take up to 300 bytes. The
227 * daemon should read the bytes as soon as they are generated, so take
228 * the number of keys you think you can push before the daemon runs
229 * and multiply by 300. The driver will warn you if you overrun this
230 * buffer. If you have a slow computer or non-busmastering IDE disks,
231 * maybe you will need to increase this.
234 /* This MUST be a power of two! It has to be larger than 1 as well. */
238 static struct timeval lasttv
= {0, 0};
240 static struct lirc_buffer rbuf
;
242 static unsigned int freq
= 38000;
243 static unsigned int duty_cycle
= 50;
245 /* Initialized in init_timing_params() */
246 static unsigned long period
;
247 static unsigned long pulse_width
;
248 static unsigned long space_width
;
250 #if defined(__i386__)
253 * Linux I/O port programming mini-HOWTO
254 * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
255 * v, 28 December 1997
258 * Actually, a port I/O instruction on most ports in the 0-0x3ff range
259 * takes almost exactly 1 microsecond, so if you're, for example, using
260 * the parallel port directly, just do additional inb()s from that port
264 /* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
265 * comment above plus trimming to match actual measured frequency.
266 * This will be sensitive to cpu speed, though hopefully most of the 1.5us
267 * is spent in the uart access. Still - for reference test machine was a
268 * 1.13GHz Athlon system - Steve
272 * changed from 400 to 450 as this works better on slower machines;
273 * faster machines will use the rdtsc code anyway
275 #define LIRC_SERIAL_TRANSMITTER_LATENCY 450
279 /* does anybody have information on other platforms ? */
281 #define LIRC_SERIAL_TRANSMITTER_LATENCY 256
283 #endif /* __i386__ */
285 /* fetch serial input packet (1 byte) from register offset */
286 static u8
sinp(int offset
)
289 /* the register is memory-mapped */
292 return inb(io
+ offset
);
295 /* write serial output packet (1 byte) of value to register offset */
296 static void soutp(int offset
, u8 value
)
299 /* the register is memory-mapped */
302 outb(value
, io
+ offset
);
307 #ifdef CONFIG_LIRC_SERIAL_NSLU2
309 * On NSLU2, we put the transmit diode between the output of the green
310 * status LED and ground
312 if (type
== LIRC_NSLU2
) {
313 gpio_line_set(NSLU2_LED_GRN
, IXP4XX_GPIO_LOW
);
318 soutp(UART_MCR
, hardware
[type
].off
);
320 soutp(UART_MCR
, hardware
[type
].on
);
323 static void off(void)
325 #ifdef CONFIG_LIRC_SERIAL_NSLU2
326 if (type
== LIRC_NSLU2
) {
327 gpio_line_set(NSLU2_LED_GRN
, IXP4XX_GPIO_HIGH
);
332 soutp(UART_MCR
, hardware
[type
].on
);
334 soutp(UART_MCR
, hardware
[type
].off
);
337 #ifndef MAX_UDELAY_MS
338 #define MAX_UDELAY_US 5000
340 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
343 static void safe_udelay(unsigned long usecs
)
345 while (usecs
> MAX_UDELAY_US
) {
346 udelay(MAX_UDELAY_US
);
347 usecs
-= MAX_UDELAY_US
;
354 * This is an overflow/precision juggle, complicated in that we can't
355 * do long long divide in the kernel
359 * When we use the rdtsc instruction to measure clocks, we keep the
360 * pulse and space widths as clock cycles. As this is CPU speed
361 * dependent, the widths must be calculated in init_port and ioctl
365 /* So send_pulse can quickly convert microseconds to clocks */
366 static unsigned long conv_us_to_clocks
;
368 static int init_timing_params(unsigned int new_duty_cycle
,
369 unsigned int new_freq
)
371 unsigned long long loops_per_sec
, work
;
373 duty_cycle
= new_duty_cycle
;
376 loops_per_sec
= current_cpu_data
.loops_per_jiffy
;
379 /* How many clocks in a microsecond?, avoiding long long divide */
380 work
= loops_per_sec
;
381 work
*= 4295; /* 4295 = 2^32 / 1e6 */
382 conv_us_to_clocks
= (work
>> 32);
385 * Carrier period in clocks, approach good up to 32GHz clock,
386 * gets carrier frequency within 8Hz
388 period
= loops_per_sec
>> 3;
389 period
/= (freq
>> 3);
391 /* Derive pulse and space from the period */
392 pulse_width
= period
* duty_cycle
/ 100;
393 space_width
= period
- pulse_width
;
394 dprintk("in init_timing_params, freq=%d, duty_cycle=%d, "
395 "clk/jiffy=%ld, pulse=%ld, space=%ld, "
396 "conv_us_to_clocks=%ld\n",
397 freq
, duty_cycle
, current_cpu_data
.loops_per_jiffy
,
398 pulse_width
, space_width
, conv_us_to_clocks
);
401 #else /* ! USE_RDTSC */
402 static int init_timing_params(unsigned int new_duty_cycle
,
403 unsigned int new_freq
)
406 * period, pulse/space width are kept with 8 binary places -
407 * IE multiplied by 256.
409 if (256 * 1000000L / new_freq
* new_duty_cycle
/ 100 <=
410 LIRC_SERIAL_TRANSMITTER_LATENCY
)
412 if (256 * 1000000L / new_freq
* (100 - new_duty_cycle
) / 100 <=
413 LIRC_SERIAL_TRANSMITTER_LATENCY
)
415 duty_cycle
= new_duty_cycle
;
417 period
= 256 * 1000000L / freq
;
418 pulse_width
= period
* duty_cycle
/ 100;
419 space_width
= period
- pulse_width
;
420 dprintk("in init_timing_params, freq=%d pulse=%ld, "
421 "space=%ld\n", freq
, pulse_width
, space_width
);
424 #endif /* USE_RDTSC */
427 /* return value: space length delta */
429 static long send_pulse_irdeo(unsigned long length
)
433 unsigned char output
;
434 unsigned char chunk
, shifted
;
436 /* how many bits have to be sent ? */
437 rawbits
= length
* 1152 / 10000;
442 for (i
= 0, output
= 0x7f; rawbits
> 0; rawbits
-= 3) {
443 shifted
= chunk
<< (i
* 3);
445 output
&= (~shifted
);
448 soutp(UART_TX
, output
);
449 while (!(sinp(UART_LSR
) & UART_LSR_THRE
))
456 soutp(UART_TX
, output
);
457 while (!(sinp(UART_LSR
) & UART_LSR_TEMT
))
462 ret
= (-rawbits
) * 10000 / 1152;
464 ret
= (3 - i
) * 3 * 10000 / 1152 + (-rawbits
) * 10000 / 1152;
470 /* Version that uses Pentium rdtsc instruction to measure clocks */
473 * This version does sub-microsecond timing using rdtsc instruction,
474 * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY
475 * Implicitly i586 architecture... - Steve
478 static long send_pulse_homebrew_softcarrier(unsigned long length
)
481 unsigned long target
, start
, now
;
483 /* Get going quick as we can */
486 /* Convert length from microseconds to clocks */
487 length
*= conv_us_to_clocks
;
488 /* And loop till time is up - flipping at right intervals */
490 target
= pulse_width
;
492 while ((now
- start
) < length
) {
493 /* Delay till flip time */
496 } while ((now
- start
) < target
);
502 target
+= space_width
;
505 target
+= pulse_width
;
510 return ((now
- start
) - length
) / conv_us_to_clocks
;
512 #else /* ! USE_RDTSC */
513 /* Version using udelay() */
516 * here we use fixed point arithmetic, with 8
517 * fractional bits. that gets us within 0.1% or so of the right average
518 * frequency, albeit with some jitter in pulse length - Steve
521 /* To match 8 fractional bits used for pulse/space length */
523 static long send_pulse_homebrew_softcarrier(unsigned long length
)
526 unsigned long actual
, target
, d
;
529 actual
= 0; target
= 0; flag
= 0;
530 while (actual
< length
) {
533 target
+= space_width
;
536 target
+= pulse_width
;
538 d
= (target
- actual
-
539 LIRC_SERIAL_TRANSMITTER_LATENCY
+ 128) >> 8;
541 * Note - we've checked in ioctl that the pulse/space
542 * widths are big enough so that d is > 0
545 actual
+= (d
<< 8) + LIRC_SERIAL_TRANSMITTER_LATENCY
;
548 return (actual
-length
) >> 8;
550 #endif /* USE_RDTSC */
552 static long send_pulse_homebrew(unsigned long length
)
558 return send_pulse_homebrew_softcarrier(length
);
566 static void send_space_irdeo(long length
)
574 static void send_space_homebrew(long length
)
582 static void rbwrite(int l
)
584 if (lirc_buffer_full(&rbuf
)) {
585 /* no new signals will be accepted */
586 dprintk("Buffer overrun\n");
589 lirc_buffer_write(&rbuf
, (void *)&l
);
592 static void frbwrite(int l
)
594 /* simple noise filter */
595 static int pulse
, space
;
596 static unsigned int ptr
;
598 if (ptr
> 0 && (l
& PULSE_BIT
)) {
599 pulse
+= l
& PULSE_MASK
;
602 rbwrite(pulse
| PULSE_BIT
);
608 if (!(l
& PULSE_BIT
)) {
618 if (space
> PULSE_MASK
)
621 if (space
> PULSE_MASK
)
627 rbwrite(pulse
| PULSE_BIT
);
635 static irqreturn_t
irq_handler(int i
, void *blah
)
642 static int last_dcd
= -1;
644 if ((sinp(UART_IIR
) & UART_IIR_NO_INT
)) {
645 /* not our interrupt */
652 status
= sinp(UART_MSR
);
653 if (counter
> RS_ISR_PASS_LIMIT
) {
654 printk(KERN_WARNING LIRC_DRIVER_NAME
": AIEEEE: "
658 if ((status
& hardware
[type
].signal_pin_change
)
660 /* get current time */
661 do_gettimeofday(&tv
);
663 /* New mode, written by Trent Piepho
664 <xyzzy@u.washington.edu>. */
667 * The old format was not very portable.
668 * We now use an int to pass pulses
669 * and spaces to user space.
671 * If PULSE_BIT is set a pulse has been
672 * received, otherwise a space has been
673 * received. The driver needs to know if your
674 * receiver is active high or active low, or
675 * the space/pulse sense could be
676 * inverted. The bits denoted by PULSE_MASK are
677 * the length in microseconds. Lengths greater
678 * than or equal to 16 seconds are clamped to
679 * PULSE_MASK. All other bits are unused.
680 * This is a much simpler interface for user
681 * programs, as well as eliminating "out of
682 * phase" errors with space/pulse
686 /* calc time since last interrupt in microseconds */
687 dcd
= (status
& hardware
[type
].signal_pin
) ? 1 : 0;
689 if (dcd
== last_dcd
) {
690 printk(KERN_WARNING LIRC_DRIVER_NAME
691 ": ignoring spike: %d %d %lx %lx %lx %lx\n",
693 tv
.tv_sec
, lasttv
.tv_sec
,
694 tv
.tv_usec
, lasttv
.tv_usec
);
698 deltv
= tv
.tv_sec
-lasttv
.tv_sec
;
699 if (tv
.tv_sec
< lasttv
.tv_sec
||
700 (tv
.tv_sec
== lasttv
.tv_sec
&&
701 tv
.tv_usec
< lasttv
.tv_usec
)) {
702 printk(KERN_WARNING LIRC_DRIVER_NAME
703 ": AIEEEE: your clock just jumped "
705 printk(KERN_WARNING LIRC_DRIVER_NAME
706 ": %d %d %lx %lx %lx %lx\n",
708 tv
.tv_sec
, lasttv
.tv_sec
,
709 tv
.tv_usec
, lasttv
.tv_usec
);
711 } else if (deltv
> 15) {
712 data
= PULSE_MASK
; /* really long time */
715 printk(KERN_WARNING LIRC_DRIVER_NAME
717 "%d %d %lx %lx %lx %lx\n",
719 tv
.tv_sec
, lasttv
.tv_sec
,
720 tv
.tv_usec
, lasttv
.tv_usec
);
722 * detecting pulse while this
725 sense
= sense
? 0 : 1;
728 data
= (int) (deltv
*1000000 +
731 frbwrite(dcd
^sense
? data
: (data
|PULSE_BIT
));
734 wake_up_interruptible(&rbuf
.wait_poll
);
736 } while (!(sinp(UART_IIR
) & UART_IIR_NO_INT
)); /* still pending ? */
741 static int hardware_init_port(void)
743 u8 scratch
, scratch2
, scratch3
;
746 * This is a simple port existence test, borrowed from the autoconfig
747 * function in drivers/serial/8250.c
749 scratch
= sinp(UART_IER
);
754 scratch2
= sinp(UART_IER
) & 0x0f;
755 soutp(UART_IER
, 0x0f);
759 scratch3
= sinp(UART_IER
) & 0x0f;
760 soutp(UART_IER
, scratch
);
761 if (scratch2
!= 0 || scratch3
!= 0x0f) {
762 /* we fail, there's nothing here */
763 printk(KERN_ERR LIRC_DRIVER_NAME
": port existence test "
764 "failed, cannot continue\n");
771 soutp(UART_LCR
, sinp(UART_LCR
) & (~UART_LCR_DLAB
));
773 /* First of all, disable all interrupts */
774 soutp(UART_IER
, sinp(UART_IER
) &
775 (~(UART_IER_MSI
|UART_IER_RLSI
|UART_IER_THRI
|UART_IER_RDI
)));
777 /* Clear registers. */
783 #ifdef CONFIG_LIRC_SERIAL_NSLU2
784 if (type
== LIRC_NSLU2
) {
785 /* Setup NSLU2 UART */
788 soutp(UART_IER
, sinp(UART_IER
) | UART_IE_IXP42X_UUE
);
789 /* Disable Receiver data Time out interrupt */
790 soutp(UART_IER
, sinp(UART_IER
) & ~UART_IE_IXP42X_RTOIE
);
791 /* set out2 = interrupt unmask; off() doesn't set MCR
793 soutp(UART_MCR
, UART_MCR_RTS
|UART_MCR_OUT2
);
797 /* Set line for power source */
800 /* Clear registers again to be sure. */
808 case LIRC_IRDEO_REMOTE
:
809 /* setup port to 7N1 @ 115200 Baud */
810 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
813 soutp(UART_LCR
, sinp(UART_LCR
) | UART_LCR_DLAB
);
814 /* Set divisor to 1 => 115200 Baud */
817 /* Set DLAB 0 + 7N1 */
818 soutp(UART_LCR
, UART_LCR_WLEN7
);
819 /* THR interrupt already disabled at this point */
828 static int init_port(void)
832 /* Reserve io region. */
834 * Future MMAP-Developers: Attention!
835 * For memory mapped I/O you *might* need to use ioremap() first,
836 * for the NSLU2 it's done in boot code.
839 && (request_mem_region(iommap
, 8 << ioshift
,
840 LIRC_DRIVER_NAME
) == NULL
))
842 && (request_region(io
, 8, LIRC_DRIVER_NAME
) == NULL
))) {
843 printk(KERN_ERR LIRC_DRIVER_NAME
844 ": port %04x already in use\n", io
);
845 printk(KERN_WARNING LIRC_DRIVER_NAME
846 ": use 'setserial /dev/ttySX uart none'\n");
847 printk(KERN_WARNING LIRC_DRIVER_NAME
848 ": or compile the serial port driver as module and\n");
849 printk(KERN_WARNING LIRC_DRIVER_NAME
850 ": make sure this module is loaded first\n");
854 if (hardware_init_port() < 0)
857 /* Initialize pulse/space widths */
858 init_timing_params(duty_cycle
, freq
);
860 /* If pin is high, then this must be an active low receiver. */
862 /* wait 1/2 sec for the power supply */
866 * probe 9 times every 0.04s, collect "votes" for
871 for (i
= 0; i
< 9; i
++) {
872 if (sinp(UART_MSR
) & hardware
[type
].signal_pin
)
878 sense
= (nlow
>= nhigh
? 1 : 0);
879 printk(KERN_INFO LIRC_DRIVER_NAME
": auto-detected active "
880 "%s receiver\n", sense
? "low" : "high");
882 printk(KERN_INFO LIRC_DRIVER_NAME
": Manually using active "
883 "%s receiver\n", sense
? "low" : "high");
888 static int set_use_inc(void *data
)
893 /* initialize timestamp */
894 do_gettimeofday(&lasttv
);
896 result
= request_irq(irq
, irq_handler
,
897 IRQF_DISABLED
| (share_irq
? IRQF_SHARED
: 0),
898 LIRC_DRIVER_NAME
, (void *)&hardware
);
902 printk(KERN_ERR LIRC_DRIVER_NAME
": IRQ %d busy\n", irq
);
905 printk(KERN_ERR LIRC_DRIVER_NAME
906 ": Bad irq number or handler\n");
909 dprintk("Interrupt %d, port %04x obtained\n", irq
, io
);
913 spin_lock_irqsave(&hardware
[type
].lock
, flags
);
916 soutp(UART_LCR
, sinp(UART_LCR
) & (~UART_LCR_DLAB
));
918 soutp(UART_IER
, sinp(UART_IER
)|UART_IER_MSI
);
920 spin_unlock_irqrestore(&hardware
[type
].lock
, flags
);
925 static void set_use_dec(void *data
)
926 { unsigned long flags
;
928 spin_lock_irqsave(&hardware
[type
].lock
, flags
);
931 soutp(UART_LCR
, sinp(UART_LCR
) & (~UART_LCR_DLAB
));
933 /* First of all, disable all interrupts */
934 soutp(UART_IER
, sinp(UART_IER
) &
935 (~(UART_IER_MSI
|UART_IER_RLSI
|UART_IER_THRI
|UART_IER_RDI
)));
936 spin_unlock_irqrestore(&hardware
[type
].lock
, flags
);
938 free_irq(irq
, (void *)&hardware
);
940 dprintk("freed IRQ %d\n", irq
);
943 static ssize_t
lirc_write(struct file
*file
, const char *buf
,
944 size_t n
, loff_t
*ppos
)
951 if (!(hardware
[type
].features
& LIRC_CAN_SEND_PULSE
))
954 count
= n
/ sizeof(int);
955 if (n
% sizeof(int) || count
% 2 == 0)
957 wbuf
= memdup_user(buf
, n
);
959 return PTR_ERR(wbuf
);
960 spin_lock_irqsave(&hardware
[type
].lock
, flags
);
961 if (type
== LIRC_IRDEO
) {
965 for (i
= 0; i
< count
; i
++) {
967 hardware
[type
].send_space(wbuf
[i
] - delta
);
969 delta
= hardware
[type
].send_pulse(wbuf
[i
]);
972 spin_unlock_irqrestore(&hardware
[type
].lock
, flags
);
976 static long lirc_ioctl(struct file
*filep
, unsigned int cmd
, unsigned long arg
)
983 case LIRC_GET_SEND_MODE
:
984 if (!(hardware
[type
].features
&LIRC_CAN_SEND_MASK
))
987 result
= put_user(LIRC_SEND2MODE
988 (hardware
[type
].features
&LIRC_CAN_SEND_MASK
),
989 (unsigned long *) arg
);
994 case LIRC_SET_SEND_MODE
:
995 if (!(hardware
[type
].features
&LIRC_CAN_SEND_MASK
))
998 result
= get_user(value
, (unsigned long *) arg
);
1001 /* only LIRC_MODE_PULSE supported */
1002 if (value
!= LIRC_MODE_PULSE
)
1006 case LIRC_GET_LENGTH
:
1010 case LIRC_SET_SEND_DUTY_CYCLE
:
1011 dprintk("SET_SEND_DUTY_CYCLE\n");
1012 if (!(hardware
[type
].features
&LIRC_CAN_SET_SEND_DUTY_CYCLE
))
1013 return -ENOIOCTLCMD
;
1015 result
= get_user(ivalue
, (unsigned int *) arg
);
1018 if (ivalue
<= 0 || ivalue
> 100)
1020 return init_timing_params(ivalue
, freq
);
1023 case LIRC_SET_SEND_CARRIER
:
1024 dprintk("SET_SEND_CARRIER\n");
1025 if (!(hardware
[type
].features
&LIRC_CAN_SET_SEND_CARRIER
))
1026 return -ENOIOCTLCMD
;
1028 result
= get_user(ivalue
, (unsigned int *) arg
);
1031 if (ivalue
> 500000 || ivalue
< 20000)
1033 return init_timing_params(duty_cycle
, ivalue
);
1037 return lirc_dev_fop_ioctl(filep
, cmd
, arg
);
1042 static const struct file_operations lirc_fops
= {
1043 .owner
= THIS_MODULE
,
1044 .write
= lirc_write
,
1045 .unlocked_ioctl
= lirc_ioctl
,
1046 .read
= lirc_dev_fop_read
,
1047 .poll
= lirc_dev_fop_poll
,
1048 .open
= lirc_dev_fop_open
,
1049 .release
= lirc_dev_fop_close
,
1052 static struct lirc_driver driver
= {
1053 .name
= LIRC_DRIVER_NAME
,
1060 .set_use_inc
= set_use_inc
,
1061 .set_use_dec
= set_use_dec
,
1064 .owner
= THIS_MODULE
,
1067 static struct platform_device
*lirc_serial_dev
;
1069 static int __devinit
lirc_serial_probe(struct platform_device
*dev
)
1074 static int __devexit
lirc_serial_remove(struct platform_device
*dev
)
1079 static int lirc_serial_suspend(struct platform_device
*dev
,
1083 soutp(UART_LCR
, sinp(UART_LCR
) & (~UART_LCR_DLAB
));
1085 /* Disable all interrupts */
1086 soutp(UART_IER
, sinp(UART_IER
) &
1087 (~(UART_IER_MSI
|UART_IER_RLSI
|UART_IER_THRI
|UART_IER_RDI
)));
1089 /* Clear registers. */
1098 /* twisty maze... need a forward-declaration here... */
1099 static void lirc_serial_exit(void);
1101 static int lirc_serial_resume(struct platform_device
*dev
)
1103 unsigned long flags
;
1105 if (hardware_init_port() < 0) {
1110 spin_lock_irqsave(&hardware
[type
].lock
, flags
);
1111 /* Enable Interrupt */
1112 do_gettimeofday(&lasttv
);
1113 soutp(UART_IER
, sinp(UART_IER
)|UART_IER_MSI
);
1116 lirc_buffer_clear(&rbuf
);
1118 spin_unlock_irqrestore(&hardware
[type
].lock
, flags
);
1123 static struct platform_driver lirc_serial_driver
= {
1124 .probe
= lirc_serial_probe
,
1125 .remove
= __devexit_p(lirc_serial_remove
),
1126 .suspend
= lirc_serial_suspend
,
1127 .resume
= lirc_serial_resume
,
1129 .name
= "lirc_serial",
1130 .owner
= THIS_MODULE
,
1134 static int __init
lirc_serial_init(void)
1138 /* Init read buffer. */
1139 result
= lirc_buffer_init(&rbuf
, sizeof(int), RBUF_LEN
);
1143 result
= platform_driver_register(&lirc_serial_driver
);
1145 printk("lirc register returned %d\n", result
);
1146 goto exit_buffer_free
;
1149 lirc_serial_dev
= platform_device_alloc("lirc_serial", 0);
1150 if (!lirc_serial_dev
) {
1152 goto exit_driver_unregister
;
1155 result
= platform_device_add(lirc_serial_dev
);
1157 goto exit_device_put
;
1162 platform_device_put(lirc_serial_dev
);
1163 exit_driver_unregister
:
1164 platform_driver_unregister(&lirc_serial_driver
);
1166 lirc_buffer_free(&rbuf
);
1170 static void lirc_serial_exit(void)
1172 platform_device_unregister(lirc_serial_dev
);
1173 platform_driver_unregister(&lirc_serial_driver
);
1174 lirc_buffer_free(&rbuf
);
1177 static int __init
lirc_serial_init_module(void)
1181 result
= lirc_serial_init();
1188 case LIRC_IRDEO_REMOTE
:
1191 /* if nothing specified, use ttyS0/com1 and irq 4 */
1192 io
= io
? io
: 0x3f8;
1193 irq
= irq
? irq
: 4;
1195 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1197 io
= io
? io
: IRQ_IXP4XX_UART2
;
1198 irq
= irq
? irq
: (IXP4XX_UART2_BASE_VIRT
+ REG_OFFSET
);
1199 iommap
= iommap
? iommap
: IXP4XX_UART2_BASE_PHYS
;
1200 ioshift
= ioshift
? ioshift
: 2;
1205 goto exit_serial_exit
;
1211 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1214 hardware
[type
].features
&=
1215 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE
|
1216 LIRC_CAN_SET_SEND_CARRIER
);
1221 result
= init_port();
1223 goto exit_serial_exit
;
1224 driver
.features
= hardware
[type
].features
;
1225 driver
.dev
= &lirc_serial_dev
->dev
;
1226 driver
.minor
= lirc_register_driver(&driver
);
1227 if (driver
.minor
< 0) {
1228 printk(KERN_ERR LIRC_DRIVER_NAME
1229 ": register_chrdev failed!\n");
1235 release_region(io
, 8);
1241 static void __exit
lirc_serial_exit_module(void)
1245 release_mem_region(iommap
, 8 << ioshift
);
1247 release_region(io
, 8);
1248 lirc_unregister_driver(driver
.minor
);
1249 dprintk("cleaned up module\n");
1253 module_init(lirc_serial_init_module
);
1254 module_exit(lirc_serial_exit_module
);
1256 MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
1257 MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
1258 "Christoph Bartelmus, Andrei Tanas");
1259 MODULE_LICENSE("GPL");
1261 module_param(type
, int, S_IRUGO
);
1262 MODULE_PARM_DESC(type
, "Hardware type (0 = home-brew, 1 = IRdeo,"
1263 " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
1264 " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
1266 module_param(io
, int, S_IRUGO
);
1267 MODULE_PARM_DESC(io
, "I/O address base (0x3f8 or 0x2f8)");
1269 /* some architectures (e.g. intel xscale) have memory mapped registers */
1270 module_param(iommap
, bool, S_IRUGO
);
1271 MODULE_PARM_DESC(iommap
, "physical base for memory mapped I/O"
1272 " (0 = no memory mapped io)");
1275 * some architectures (e.g. intel xscale) align the 8bit serial registers
1276 * on 32bit word boundaries.
1277 * See linux-kernel/serial/8250.c serial_in()/out()
1279 module_param(ioshift
, int, S_IRUGO
);
1280 MODULE_PARM_DESC(ioshift
, "shift I/O register offset (0 = no shift)");
1282 module_param(irq
, int, S_IRUGO
);
1283 MODULE_PARM_DESC(irq
, "Interrupt (4 or 3)");
1285 module_param(share_irq
, bool, S_IRUGO
);
1286 MODULE_PARM_DESC(share_irq
, "Share interrupts (0 = off, 1 = on)");
1288 module_param(sense
, bool, S_IRUGO
);
1289 MODULE_PARM_DESC(sense
, "Override autodetection of IR receiver circuit"
1290 " (0 = active high, 1 = active low )");
1292 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
1293 module_param(txsense
, bool, S_IRUGO
);
1294 MODULE_PARM_DESC(txsense
, "Sense of transmitter circuit"
1295 " (0 = active high, 1 = active low )");
1298 module_param(softcarrier
, bool, S_IRUGO
);
1299 MODULE_PARM_DESC(softcarrier
, "Software carrier (0 = off, 1 = on, default on)");
1301 module_param(debug
, bool, S_IRUGO
| S_IWUSR
);
1302 MODULE_PARM_DESC(debug
, "Enable debugging messages");