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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / serial / pnx8xxx_uart.c
blobd1f2d2a2e0737f46297f0ad034ca67110c072d74
1 /*
2 * UART driver for PNX8XXX SoCs
3 *
4 * Author: Per Hallsmark per.hallsmark@mvista.com
5 * Ported to 2.6 kernel by EmbeddedAlley
6 * Reworked by Vitaly Wool <vitalywool@gmail.com>
7 *
8 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
9 * Copyright (C) 2000 Deep Blue Solutions Ltd.
10 *
11 * This file is licensed under the terms of the GNU General Public License
12 * version 2. This program is licensed "as is" without any warranty of
13 * any kind, whether express or implied.
14 *
15 */
16
17 #if defined(CONFIG_SERIAL_PNX8XXX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
18 #define SUPPORT_SYSRQ
19 #endif
20
21 #include <linux/module.h>
22 #include <linux/ioport.h>
23 #include <linux/init.h>
24 #include <linux/console.h>
25 #include <linux/sysrq.h>
26 #include <linux/device.h>
27 #include <linux/platform_device.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/serial_core.h>
31 #include <linux/serial.h>
32 #include <linux/serial_pnx8xxx.h>
33
34 #include <asm/io.h>
35 #include <asm/irq.h>
36
37 /* We'll be using StrongARM sa1100 serial port major/minor */
38 #define SERIAL_PNX8XXX_MAJOR 204
39 #define MINOR_START 5
40
41 #define NR_PORTS 2
42
43 #define PNX8XXX_ISR_PASS_LIMIT 256
44
45 /*
46 * Convert from ignore_status_mask or read_status_mask to FIFO
47 * and interrupt status bits
48 */
49 #define SM_TO_FIFO(x) ((x) >> 10)
50 #define SM_TO_ISTAT(x) ((x) & 0x000001ff)
51 #define FIFO_TO_SM(x) ((x) << 10)
52 #define ISTAT_TO_SM(x) ((x) & 0x000001ff)
53
54 /*
55 * This is the size of our serial port register set.
56 */
57 #define UART_PORT_SIZE 0x1000
58
59 /*
60 * This determines how often we check the modem status signals
61 * for any change. They generally aren't connected to an IRQ
62 * so we have to poll them. We also check immediately before
63 * filling the TX fifo incase CTS has been dropped.
64 */
65 #define MCTRL_TIMEOUT (250*HZ/1000)
66
67 extern struct pnx8xxx_port pnx8xxx_ports[];
68
69 static inline int serial_in(struct pnx8xxx_port *sport, int offset)
70 {
71 return (__raw_readl(sport->port.membase + offset));
72 }
73
74 static inline void serial_out(struct pnx8xxx_port *sport, int offset, int value)
75 {
76 __raw_writel(value, sport->port.membase + offset);
77 }
78
79 /*
80 * Handle any change of modem status signal since we were last called.
81 */
82 static void pnx8xxx_mctrl_check(struct pnx8xxx_port *sport)
83 {
84 unsigned int status, changed;
85
86 status = sport->port.ops->get_mctrl(&sport->port);
87 changed = status ^ sport->old_status;
88
89 if (changed == 0)
90 return;
91
92 sport->old_status = status;
93
94 if (changed & TIOCM_RI)
95 sport->port.icount.rng++;
96 if (changed & TIOCM_DSR)
97 sport->port.icount.dsr++;
98 if (changed & TIOCM_CAR)
99 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
100 if (changed & TIOCM_CTS)
101 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
102
103 wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
104 }
105
106 /*
107 * This is our per-port timeout handler, for checking the
108 * modem status signals.
109 */
110 static void pnx8xxx_timeout(unsigned long data)
111 {
112 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)data;
113 unsigned long flags;
114
115 if (sport->port.state) {
116 spin_lock_irqsave(&sport->port.lock, flags);
117 pnx8xxx_mctrl_check(sport);
118 spin_unlock_irqrestore(&sport->port.lock, flags);
119
120 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
121 }
122 }
123
124 /*
125 * interrupts disabled on entry
126 */
127 static void pnx8xxx_stop_tx(struct uart_port *port)
128 {
129 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
130 u32 ien;
131
132 /* Disable TX intr */
133 ien = serial_in(sport, PNX8XXX_IEN);
134 serial_out(sport, PNX8XXX_IEN, ien & ~PNX8XXX_UART_INT_ALLTX);
135
136 /* Clear all pending TX intr */
137 serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLTX);
138 }
139
140 /*
141 * interrupts may not be disabled on entry
142 */
143 static void pnx8xxx_start_tx(struct uart_port *port)
144 {
145 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
146 u32 ien;
147
148 /* Clear all pending TX intr */
149 serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLTX);
150
151 /* Enable TX intr */
152 ien = serial_in(sport, PNX8XXX_IEN);
153 serial_out(sport, PNX8XXX_IEN, ien | PNX8XXX_UART_INT_ALLTX);
154 }
155
156 /*
157 * Interrupts enabled
158 */
159 static void pnx8xxx_stop_rx(struct uart_port *port)
160 {
161 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
162 u32 ien;
163
164 /* Disable RX intr */
165 ien = serial_in(sport, PNX8XXX_IEN);
166 serial_out(sport, PNX8XXX_IEN, ien & ~PNX8XXX_UART_INT_ALLRX);
167
168 /* Clear all pending RX intr */
169 serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLRX);
170 }
171
172 /*
173 * Set the modem control timer to fire immediately.
174 */
175 static void pnx8xxx_enable_ms(struct uart_port *port)
176 {
177 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
178
179 mod_timer(&sport->timer, jiffies);
180 }
181
182 static void pnx8xxx_rx_chars(struct pnx8xxx_port *sport)
183 {
184 struct tty_struct *tty = sport->port.state->port.tty;
185 unsigned int status, ch, flg;
186
187 status = FIFO_TO_SM(serial_in(sport, PNX8XXX_FIFO)) |
188 ISTAT_TO_SM(serial_in(sport, PNX8XXX_ISTAT));
189 while (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFIFO)) {
190 ch = serial_in(sport, PNX8XXX_FIFO) & 0xff;
191
192 sport->port.icount.rx++;
193
194 flg = TTY_NORMAL;
195
196 /*
197 * note that the error handling code is
198 * out of the main execution path
199 */
200 if (status & (FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE |
201 PNX8XXX_UART_FIFO_RXPAR |
202 PNX8XXX_UART_FIFO_RXBRK) |
203 ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN))) {
204 if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXBRK)) {
205 status &= ~(FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE) |
206 FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR));
207 sport->port.icount.brk++;
208 if (uart_handle_break(&sport->port))
209 goto ignore_char;
210 } else if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR))
211 sport->port.icount.parity++;
212 else if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE))
213 sport->port.icount.frame++;
214 if (status & ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN))
215 sport->port.icount.overrun++;
216
217 status &= sport->port.read_status_mask;
218
219 if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR))
220 flg = TTY_PARITY;
221 else if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE))
222 flg = TTY_FRAME;
223
224 #ifdef SUPPORT_SYSRQ
225 sport->port.sysrq = 0;
226 #endif
227 }
228
229 if (uart_handle_sysrq_char(&sport->port, ch))
230 goto ignore_char;
231
232 uart_insert_char(&sport->port, status,
233 ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN), ch, flg);
234
235 ignore_char:
236 serial_out(sport, PNX8XXX_LCR, serial_in(sport, PNX8XXX_LCR) |
237 PNX8XXX_UART_LCR_RX_NEXT);
238 status = FIFO_TO_SM(serial_in(sport, PNX8XXX_FIFO)) |
239 ISTAT_TO_SM(serial_in(sport, PNX8XXX_ISTAT));
240 }
241 tty_flip_buffer_push(tty);
242 }
243
244 static void pnx8xxx_tx_chars(struct pnx8xxx_port *sport)
245 {
246 struct circ_buf *xmit = &sport->port.state->xmit;
247
248 if (sport->port.x_char) {
249 serial_out(sport, PNX8XXX_FIFO, sport->port.x_char);
250 sport->port.icount.tx++;
251 sport->port.x_char = 0;
252 return;
253 }
254
255 /*
256 * Check the modem control lines before
257 * transmitting anything.
258 */
259 pnx8xxx_mctrl_check(sport);
260
261 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
262 pnx8xxx_stop_tx(&sport->port);
263 return;
264 }
265
266 /*
267 * TX while bytes available
268 */
269 while (((serial_in(sport, PNX8XXX_FIFO) &
270 PNX8XXX_UART_FIFO_TXFIFO) >> 16) < 16) {
271 serial_out(sport, PNX8XXX_FIFO, xmit->buf[xmit->tail]);
272 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
273 sport->port.icount.tx++;
274 if (uart_circ_empty(xmit))
275 break;
276 }
277
278 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
279 uart_write_wakeup(&sport->port);
280
281 if (uart_circ_empty(xmit))
282 pnx8xxx_stop_tx(&sport->port);
283 }
284
285 static irqreturn_t pnx8xxx_int(int irq, void *dev_id)
286 {
287 struct pnx8xxx_port *sport = dev_id;
288 unsigned int status;
289
290 spin_lock(&sport->port.lock);
291 /* Get the interrupts */
292 status = serial_in(sport, PNX8XXX_ISTAT) & serial_in(sport, PNX8XXX_IEN);
293
294 /* Byte or break signal received */
295 if (status & (PNX8XXX_UART_INT_RX | PNX8XXX_UART_INT_BREAK))
296 pnx8xxx_rx_chars(sport);
297
298 /* TX holding register empty - transmit a byte */
299 if (status & PNX8XXX_UART_INT_TX)
300 pnx8xxx_tx_chars(sport);
301
302 /* Clear the ISTAT register */
303 serial_out(sport, PNX8XXX_ICLR, status);
304
305 spin_unlock(&sport->port.lock);
306 return IRQ_HANDLED;
307 }
308
309 /*
310 * Return TIOCSER_TEMT when transmitter is not busy.
311 */
312 static unsigned int pnx8xxx_tx_empty(struct uart_port *port)
313 {
314 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
315
316 return serial_in(sport, PNX8XXX_FIFO) & PNX8XXX_UART_FIFO_TXFIFO_STA ? 0 : TIOCSER_TEMT;
317 }
318
319 static unsigned int pnx8xxx_get_mctrl(struct uart_port *port)
320 {
321 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
322 unsigned int mctrl = TIOCM_DSR;
323 unsigned int msr;
324
325 /* REVISIT */
326
327 msr = serial_in(sport, PNX8XXX_MCR);
328
329 mctrl |= msr & PNX8XXX_UART_MCR_CTS ? TIOCM_CTS : 0;
330 mctrl |= msr & PNX8XXX_UART_MCR_DCD ? TIOCM_CAR : 0;
331
332 return mctrl;
333 }
334
335 static void pnx8xxx_set_mctrl(struct uart_port *port, unsigned int mctrl)
336 {
337 }
338
339 /*
340 * Interrupts always disabled.
341 */
342 static void pnx8xxx_break_ctl(struct uart_port *port, int break_state)
343 {
344 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
345 unsigned long flags;
346 unsigned int lcr;
347
348 spin_lock_irqsave(&sport->port.lock, flags);
349 lcr = serial_in(sport, PNX8XXX_LCR);
350 if (break_state == -1)
351 lcr |= PNX8XXX_UART_LCR_TXBREAK;
352 else
353 lcr &= ~PNX8XXX_UART_LCR_TXBREAK;
354 serial_out(sport, PNX8XXX_LCR, lcr);
355 spin_unlock_irqrestore(&sport->port.lock, flags);
356 }
357
358 static int pnx8xxx_startup(struct uart_port *port)
359 {
360 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
361 int retval;
362
363 /*
364 * Allocate the IRQ
365 */
366 retval = request_irq(sport->port.irq, pnx8xxx_int, 0,
367 "pnx8xxx-uart", sport);
368 if (retval)
369 return retval;
370
371 /*
372 * Finally, clear and enable interrupts
373 */
374
375 serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLRX |
376 PNX8XXX_UART_INT_ALLTX);
377
378 serial_out(sport, PNX8XXX_IEN, serial_in(sport, PNX8XXX_IEN) |
379 PNX8XXX_UART_INT_ALLRX |
380 PNX8XXX_UART_INT_ALLTX);
381
382 /*
383 * Enable modem status interrupts
384 */
385 spin_lock_irq(&sport->port.lock);
386 pnx8xxx_enable_ms(&sport->port);
387 spin_unlock_irq(&sport->port.lock);
388
389 return 0;
390 }
391
392 static void pnx8xxx_shutdown(struct uart_port *port)
393 {
394 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
395 int lcr;
396
397 /*
398 * Stop our timer.
399 */
400 del_timer_sync(&sport->timer);
401
402 /*
403 * Disable all interrupts
404 */
405 serial_out(sport, PNX8XXX_IEN, 0);
406
407 /*
408 * Reset the Tx and Rx FIFOS, disable the break condition
409 */
410 lcr = serial_in(sport, PNX8XXX_LCR);
411 lcr &= ~PNX8XXX_UART_LCR_TXBREAK;
412 lcr |= PNX8XXX_UART_LCR_TX_RST | PNX8XXX_UART_LCR_RX_RST;
413 serial_out(sport, PNX8XXX_LCR, lcr);
414
415 /*
416 * Clear all interrupts
417 */
418 serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLRX |
419 PNX8XXX_UART_INT_ALLTX);
420
421 /*
422 * Free the interrupt
423 */
424 free_irq(sport->port.irq, sport);
425 }
426
427 static void
428 pnx8xxx_set_termios(struct uart_port *port, struct ktermios *termios,
429 struct ktermios *old)
430 {
431 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
432 unsigned long flags;
433 unsigned int lcr_fcr, old_ien, baud, quot;
434 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
435
436 /*
437 * We only support CS7 and CS8.
438 */
439 while ((termios->c_cflag & CSIZE) != CS7 &&
440 (termios->c_cflag & CSIZE) != CS8) {
441 termios->c_cflag &= ~CSIZE;
442 termios->c_cflag |= old_csize;
443 old_csize = CS8;
444 }
445
446 if ((termios->c_cflag & CSIZE) == CS8)
447 lcr_fcr = PNX8XXX_UART_LCR_8BIT;
448 else
449 lcr_fcr = 0;
450
451 if (termios->c_cflag & CSTOPB)
452 lcr_fcr |= PNX8XXX_UART_LCR_2STOPB;
453 if (termios->c_cflag & PARENB) {
454 lcr_fcr |= PNX8XXX_UART_LCR_PAREN;
455 if (!(termios->c_cflag & PARODD))
456 lcr_fcr |= PNX8XXX_UART_LCR_PAREVN;
457 }
458
459 /*
460 * Ask the core to calculate the divisor for us.
461 */
462 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
463 quot = uart_get_divisor(port, baud);
464
465 spin_lock_irqsave(&sport->port.lock, flags);
466
467 sport->port.read_status_mask = ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN) |
468 ISTAT_TO_SM(PNX8XXX_UART_INT_EMPTY) |
469 ISTAT_TO_SM(PNX8XXX_UART_INT_RX);
470 if (termios->c_iflag & INPCK)
471 sport->port.read_status_mask |=
472 FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE) |
473 FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR);
474 if (termios->c_iflag & (BRKINT | PARMRK))
475 sport->port.read_status_mask |=
476 ISTAT_TO_SM(PNX8XXX_UART_INT_BREAK);
477
478 /*
479 * Characters to ignore
480 */
481 sport->port.ignore_status_mask = 0;
482 if (termios->c_iflag & IGNPAR)
483 sport->port.ignore_status_mask |=
484 FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE) |
485 FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR);
486 if (termios->c_iflag & IGNBRK) {
487 sport->port.ignore_status_mask |=
488 ISTAT_TO_SM(PNX8XXX_UART_INT_BREAK);
489 /*
490 * If we're ignoring parity and break indicators,
491 * ignore overruns too (for real raw support).
492 */
493 if (termios->c_iflag & IGNPAR)
494 sport->port.ignore_status_mask |=
495 ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN);
496 }
497
498 /*
499 * ignore all characters if CREAD is not set
500 */
501 if ((termios->c_cflag & CREAD) == 0)
502 sport->port.ignore_status_mask |=
503 ISTAT_TO_SM(PNX8XXX_UART_INT_RX);
504
505 del_timer_sync(&sport->timer);
506
507 /*
508 * Update the per-port timeout.
509 */
510 uart_update_timeout(port, termios->c_cflag, baud);
511
512 /*
513 * disable interrupts and drain transmitter
514 */
515 old_ien = serial_in(sport, PNX8XXX_IEN);
516 serial_out(sport, PNX8XXX_IEN, old_ien & ~(PNX8XXX_UART_INT_ALLTX |
517 PNX8XXX_UART_INT_ALLRX));
518
519 while (serial_in(sport, PNX8XXX_FIFO) & PNX8XXX_UART_FIFO_TXFIFO_STA)
520 barrier();
521
522 /* then, disable everything */
523 serial_out(sport, PNX8XXX_IEN, 0);
524
525 /* Reset the Rx and Tx FIFOs too */
526 lcr_fcr |= PNX8XXX_UART_LCR_TX_RST;
527 lcr_fcr |= PNX8XXX_UART_LCR_RX_RST;
528
529 /* set the parity, stop bits and data size */
530 serial_out(sport, PNX8XXX_LCR, lcr_fcr);
531
532 /* set the baud rate */
533 quot -= 1;
534 serial_out(sport, PNX8XXX_BAUD, quot);
535
536 serial_out(sport, PNX8XXX_ICLR, -1);
537
538 serial_out(sport, PNX8XXX_IEN, old_ien);
539
540 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
541 pnx8xxx_enable_ms(&sport->port);
542
543 spin_unlock_irqrestore(&sport->port.lock, flags);
544 }
545
546 static const char *pnx8xxx_type(struct uart_port *port)
547 {
548 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
549
550 return sport->port.type == PORT_PNX8XXX ? "PNX8XXX" : NULL;
551 }
552
553 /*
554 * Release the memory region(s) being used by 'port'.
555 */
556 static void pnx8xxx_release_port(struct uart_port *port)
557 {
558 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
559
560 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
561 }
562
563 /*
564 * Request the memory region(s) being used by 'port'.
565 */
566 static int pnx8xxx_request_port(struct uart_port *port)
567 {
568 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
569 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
570 "pnx8xxx-uart") != NULL ? 0 : -EBUSY;
571 }
572
573 /*
574 * Configure/autoconfigure the port.
575 */
576 static void pnx8xxx_config_port(struct uart_port *port, int flags)
577 {
578 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
579
580 if (flags & UART_CONFIG_TYPE &&
581 pnx8xxx_request_port(&sport->port) == 0)
582 sport->port.type = PORT_PNX8XXX;
583 }
584
585 /*
586 * Verify the new serial_struct (for TIOCSSERIAL).
587 * The only change we allow are to the flags and type, and
588 * even then only between PORT_PNX8XXX and PORT_UNKNOWN
589 */
590 static int
591 pnx8xxx_verify_port(struct uart_port *port, struct serial_struct *ser)
592 {
593 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
594 int ret = 0;
595
596 if (ser->type != PORT_UNKNOWN && ser->type != PORT_PNX8XXX)
597 ret = -EINVAL;
598 if (sport->port.irq != ser->irq)
599 ret = -EINVAL;
600 if (ser->io_type != SERIAL_IO_MEM)
601 ret = -EINVAL;
602 if (sport->port.uartclk / 16 != ser->baud_base)
603 ret = -EINVAL;
604 if ((void *)sport->port.mapbase != ser->iomem_base)
605 ret = -EINVAL;
606 if (sport->port.iobase != ser->port)
607 ret = -EINVAL;
608 if (ser->hub6 != 0)
609 ret = -EINVAL;
610 return ret;
611 }
612
613 static struct uart_ops pnx8xxx_pops = {
614 .tx_empty = pnx8xxx_tx_empty,
615 .set_mctrl = pnx8xxx_set_mctrl,
616 .get_mctrl = pnx8xxx_get_mctrl,
617 .stop_tx = pnx8xxx_stop_tx,
618 .start_tx = pnx8xxx_start_tx,
619 .stop_rx = pnx8xxx_stop_rx,
620 .enable_ms = pnx8xxx_enable_ms,
621 .break_ctl = pnx8xxx_break_ctl,
622 .startup = pnx8xxx_startup,
623 .shutdown = pnx8xxx_shutdown,
624 .set_termios = pnx8xxx_set_termios,
625 .type = pnx8xxx_type,
626 .release_port = pnx8xxx_release_port,
627 .request_port = pnx8xxx_request_port,
628 .config_port = pnx8xxx_config_port,
629 .verify_port = pnx8xxx_verify_port,
630 };
631
632
633 /*
634 * Setup the PNX8XXX serial ports.
635 *
636 * Note also that we support "console=ttySx" where "x" is either 0 or 1.
637 */
638 static void __init pnx8xxx_init_ports(void)
639 {
640 static int first = 1;
641 int i;
642
643 if (!first)
644 return;
645 first = 0;
646
647 for (i = 0; i < NR_PORTS; i++) {
648 init_timer(&pnx8xxx_ports[i].timer);
649 pnx8xxx_ports[i].timer.function = pnx8xxx_timeout;
650 pnx8xxx_ports[i].timer.data = (unsigned long)&pnx8xxx_ports[i];
651 pnx8xxx_ports[i].port.ops = &pnx8xxx_pops;
652 }
653 }
654
655 #ifdef CONFIG_SERIAL_PNX8XXX_CONSOLE
656
657 static void pnx8xxx_console_putchar(struct uart_port *port, int ch)
658 {
659 struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
660 int status;
661
662 do {
663 /* Wait for UART_TX register to empty */
664 status = serial_in(sport, PNX8XXX_FIFO);
665 } while (status & PNX8XXX_UART_FIFO_TXFIFO);
666 serial_out(sport, PNX8XXX_FIFO, ch);
667 }
668
669 /*
670 * Interrupts are disabled on entering
671 */static void
672 pnx8xxx_console_write(struct console *co, const char *s, unsigned int count)
673 {
674 struct pnx8xxx_port *sport = &pnx8xxx_ports[co->index];
675 unsigned int old_ien, status;
676
677 /*
678 * First, save IEN and then disable interrupts
679 */
680 old_ien = serial_in(sport, PNX8XXX_IEN);
681 serial_out(sport, PNX8XXX_IEN, old_ien & ~(PNX8XXX_UART_INT_ALLTX |
682 PNX8XXX_UART_INT_ALLRX));
683
684 uart_console_write(&sport->port, s, count, pnx8xxx_console_putchar);
685
686 /*
687 * Finally, wait for transmitter to become empty
688 * and restore IEN
689 */
690 do {
691 /* Wait for UART_TX register to empty */
692 status = serial_in(sport, PNX8XXX_FIFO);
693 } while (status & PNX8XXX_UART_FIFO_TXFIFO);
694
695 /* Clear TX and EMPTY interrupt */
696 serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_TX |
697 PNX8XXX_UART_INT_EMPTY);
698
699 serial_out(sport, PNX8XXX_IEN, old_ien);
700 }
701
702 static int __init
703 pnx8xxx_console_setup(struct console *co, char *options)
704 {
705 struct pnx8xxx_port *sport;
706 int baud = 38400;
707 int bits = 8;
708 int parity = 'n';
709 int flow = 'n';
710
711 /*
712 * Check whether an invalid uart number has been specified, and
713 * if so, search for the first available port that does have
714 * console support.
715 */
716 if (co->index == -1 || co->index >= NR_PORTS)
717 co->index = 0;
718 sport = &pnx8xxx_ports[co->index];
719
720 if (options)
721 uart_parse_options(options, &baud, &parity, &bits, &flow);
722
723 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
724 }
725
726 static struct uart_driver pnx8xxx_reg;
727 static struct console pnx8xxx_console = {
728 .name = "ttyS",
729 .write = pnx8xxx_console_write,
730 .device = uart_console_device,
731 .setup = pnx8xxx_console_setup,
732 .flags = CON_PRINTBUFFER,
733 .index = -1,
734 .data = &pnx8xxx_reg,
735 };
736
737 static int __init pnx8xxx_rs_console_init(void)
738 {
739 pnx8xxx_init_ports();
740 register_console(&pnx8xxx_console);
741 return 0;
742 }
743 console_initcall(pnx8xxx_rs_console_init);
744
745 #define PNX8XXX_CONSOLE &pnx8xxx_console
746 #else
747 #define PNX8XXX_CONSOLE NULL
748 #endif
749
750 static struct uart_driver pnx8xxx_reg = {
751 .owner = THIS_MODULE,
752 .driver_name = "ttyS",
753 .dev_name = "ttyS",
754 .major = SERIAL_PNX8XXX_MAJOR,
755 .minor = MINOR_START,
756 .nr = NR_PORTS,
757 .cons = PNX8XXX_CONSOLE,
758 };
759
760 static int pnx8xxx_serial_suspend(struct platform_device *pdev, pm_message_t state)
761 {
762 struct pnx8xxx_port *sport = platform_get_drvdata(pdev);
763
764 return uart_suspend_port(&pnx8xxx_reg, &sport->port);
765 }
766
767 static int pnx8xxx_serial_resume(struct platform_device *pdev)
768 {
769 struct pnx8xxx_port *sport = platform_get_drvdata(pdev);
770
771 return uart_resume_port(&pnx8xxx_reg, &sport->port);
772 }
773
774 static int pnx8xxx_serial_probe(struct platform_device *pdev)
775 {
776 struct resource *res = pdev->resource;
777 int i;
778
779 for (i = 0; i < pdev->num_resources; i++, res++) {
780 if (!(res->flags & IORESOURCE_MEM))
781 continue;
782
783 for (i = 0; i < NR_PORTS; i++) {
784 if (pnx8xxx_ports[i].port.mapbase != res->start)
785 continue;
786
787 pnx8xxx_ports[i].port.dev = &pdev->dev;
788 uart_add_one_port(&pnx8xxx_reg, &pnx8xxx_ports[i].port);
789 platform_set_drvdata(pdev, &pnx8xxx_ports[i]);
790 break;
791 }
792 }
793
794 return 0;
795 }
796
797 static int pnx8xxx_serial_remove(struct platform_device *pdev)
798 {
799 struct pnx8xxx_port *sport = platform_get_drvdata(pdev);
800
801 platform_set_drvdata(pdev, NULL);
802
803 if (sport)
804 uart_remove_one_port(&pnx8xxx_reg, &sport->port);
805
806 return 0;
807 }
808
809 static struct platform_driver pnx8xxx_serial_driver = {
810 .driver = {
811 .name = "pnx8xxx-uart",
812 .owner = THIS_MODULE,
813 },
814 .probe = pnx8xxx_serial_probe,
815 .remove = pnx8xxx_serial_remove,
816 .suspend = pnx8xxx_serial_suspend,
817 .resume = pnx8xxx_serial_resume,
818 };
819
820 static int __init pnx8xxx_serial_init(void)
821 {
822 int ret;
823
824 printk(KERN_INFO "Serial: PNX8XXX driver\n");
825
826 pnx8xxx_init_ports();
827
828 ret = uart_register_driver(&pnx8xxx_reg);
829 if (ret == 0) {
830 ret = platform_driver_register(&pnx8xxx_serial_driver);
831 if (ret)
832 uart_unregister_driver(&pnx8xxx_reg);
833 }
834 return ret;
835 }
836
837 static void __exit pnx8xxx_serial_exit(void)
838 {
839 platform_driver_unregister(&pnx8xxx_serial_driver);
840 uart_unregister_driver(&pnx8xxx_reg);
841 }
842
843 module_init(pnx8xxx_serial_init);
844 module_exit(pnx8xxx_serial_exit);
845
846 MODULE_AUTHOR("Embedded Alley Solutions, Inc.");
847 MODULE_DESCRIPTION("PNX8XXX SoCs serial port driver");
848 MODULE_LICENSE("GPL");
849 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_PNX8XXX_MAJOR);
850 MODULE_ALIAS("platform:pnx8xxx-uart");
Tomato firmware and modifications.