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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / net / usb / smsc95xx.c
blob455ade66ecdd66db7cfebf27684bcdda00d85016
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2008 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 *****************************************************************************/
20
21 #include <linux/module.h>
22 #include <linux/kmod.h>
23 #include <linux/init.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/mii.h>
28 #include <linux/usb.h>
29 #include <linux/crc32.h>
30 #include <linux/usb/usbnet.h>
31 #include <linux/slab.h>
32 #include "smsc95xx.h"
33
34 #define SMSC_CHIPNAME "smsc95xx"
35 #define SMSC_DRIVER_VERSION "1.0.4"
36 #define HS_USB_PKT_SIZE (512)
37 #define FS_USB_PKT_SIZE (64)
38 #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
39 #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
40 #define DEFAULT_BULK_IN_DELAY (0x00002000)
41 #define MAX_SINGLE_PACKET_SIZE (2048)
42 #define LAN95XX_EEPROM_MAGIC (0x9500)
43 #define EEPROM_MAC_OFFSET (0x01)
44 #define DEFAULT_TX_CSUM_ENABLE (true)
45 #define DEFAULT_RX_CSUM_ENABLE (true)
46 #define SMSC95XX_INTERNAL_PHY_ID (1)
47 #define SMSC95XX_TX_OVERHEAD (8)
48 #define SMSC95XX_TX_OVERHEAD_CSUM (12)
49
50 struct smsc95xx_priv {
51 u32 mac_cr;
52 spinlock_t mac_cr_lock;
53 bool use_tx_csum;
54 bool use_rx_csum;
55 };
56
57 struct usb_context {
58 struct usb_ctrlrequest req;
59 struct usbnet *dev;
60 };
61
62 static int turbo_mode = true;
63 module_param(turbo_mode, bool, 0644);
64 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
65
66 static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data)
67 {
68 u32 *buf = kmalloc(4, GFP_KERNEL);
69 int ret;
70
71 BUG_ON(!dev);
72
73 if (!buf)
74 return -ENOMEM;
75
76 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
77 USB_VENDOR_REQUEST_READ_REGISTER,
78 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
79 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
80
81 if (unlikely(ret < 0))
82 netdev_warn(dev->net, "Failed to read register index 0x%08x\n", index);
83
84 le32_to_cpus(buf);
85 *data = *buf;
86 kfree(buf);
87
88 return ret;
89 }
90
91 static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data)
92 {
93 u32 *buf = kmalloc(4, GFP_KERNEL);
94 int ret;
95
96 BUG_ON(!dev);
97
98 if (!buf)
99 return -ENOMEM;
100
101 *buf = data;
102 cpu_to_le32s(buf);
103
104 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
105 USB_VENDOR_REQUEST_WRITE_REGISTER,
106 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
107 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
108
109 if (unlikely(ret < 0))
110 netdev_warn(dev->net, "Failed to write register index 0x%08x\n", index);
111
112 kfree(buf);
113
114 return ret;
115 }
116
117 /* Loop until the read is completed with timeout
118 * called with phy_mutex held */
119 static int smsc95xx_phy_wait_not_busy(struct usbnet *dev)
120 {
121 unsigned long start_time = jiffies;
122 u32 val;
123
124 do {
125 smsc95xx_read_reg(dev, MII_ADDR, &val);
126 if (!(val & MII_BUSY_))
127 return 0;
128 } while (!time_after(jiffies, start_time + HZ));
129
130 return -EIO;
131 }
132
133 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
134 {
135 struct usbnet *dev = netdev_priv(netdev);
136 u32 val, addr;
137
138 mutex_lock(&dev->phy_mutex);
139
140 /* confirm MII not busy */
141 if (smsc95xx_phy_wait_not_busy(dev)) {
142 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n");
143 mutex_unlock(&dev->phy_mutex);
144 return -EIO;
145 }
146
147 /* set the address, index & direction (read from PHY) */
148 phy_id &= dev->mii.phy_id_mask;
149 idx &= dev->mii.reg_num_mask;
150 addr = (phy_id << 11) | (idx << 6) | MII_READ_;
151 smsc95xx_write_reg(dev, MII_ADDR, addr);
152
153 if (smsc95xx_phy_wait_not_busy(dev)) {
154 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
155 mutex_unlock(&dev->phy_mutex);
156 return -EIO;
157 }
158
159 smsc95xx_read_reg(dev, MII_DATA, &val);
160
161 mutex_unlock(&dev->phy_mutex);
162
163 return (u16)(val & 0xFFFF);
164 }
165
166 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
167 int regval)
168 {
169 struct usbnet *dev = netdev_priv(netdev);
170 u32 val, addr;
171
172 mutex_lock(&dev->phy_mutex);
173
174 /* confirm MII not busy */
175 if (smsc95xx_phy_wait_not_busy(dev)) {
176 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n");
177 mutex_unlock(&dev->phy_mutex);
178 return;
179 }
180
181 val = regval;
182 smsc95xx_write_reg(dev, MII_DATA, val);
183
184 /* set the address, index & direction (write to PHY) */
185 phy_id &= dev->mii.phy_id_mask;
186 idx &= dev->mii.reg_num_mask;
187 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
188 smsc95xx_write_reg(dev, MII_ADDR, addr);
189
190 if (smsc95xx_phy_wait_not_busy(dev))
191 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
192
193 mutex_unlock(&dev->phy_mutex);
194 }
195
196 static int smsc95xx_wait_eeprom(struct usbnet *dev)
197 {
198 unsigned long start_time = jiffies;
199 u32 val;
200
201 do {
202 smsc95xx_read_reg(dev, E2P_CMD, &val);
203 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
204 break;
205 udelay(40);
206 } while (!time_after(jiffies, start_time + HZ));
207
208 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
209 netdev_warn(dev->net, "EEPROM read operation timeout\n");
210 return -EIO;
211 }
212
213 return 0;
214 }
215
216 static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
217 {
218 unsigned long start_time = jiffies;
219 u32 val;
220
221 do {
222 smsc95xx_read_reg(dev, E2P_CMD, &val);
223
224 if (!(val & E2P_CMD_BUSY_))
225 return 0;
226
227 udelay(40);
228 } while (!time_after(jiffies, start_time + HZ));
229
230 netdev_warn(dev->net, "EEPROM is busy\n");
231 return -EIO;
232 }
233
234 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
235 u8 *data)
236 {
237 u32 val;
238 int i, ret;
239
240 BUG_ON(!dev);
241 BUG_ON(!data);
242
243 ret = smsc95xx_eeprom_confirm_not_busy(dev);
244 if (ret)
245 return ret;
246
247 for (i = 0; i < length; i++) {
248 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
249 smsc95xx_write_reg(dev, E2P_CMD, val);
250
251 ret = smsc95xx_wait_eeprom(dev);
252 if (ret < 0)
253 return ret;
254
255 smsc95xx_read_reg(dev, E2P_DATA, &val);
256
257 data[i] = val & 0xFF;
258 offset++;
259 }
260
261 return 0;
262 }
263
264 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
265 u8 *data)
266 {
267 u32 val;
268 int i, ret;
269
270 BUG_ON(!dev);
271 BUG_ON(!data);
272
273 ret = smsc95xx_eeprom_confirm_not_busy(dev);
274 if (ret)
275 return ret;
276
277 /* Issue write/erase enable command */
278 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
279 smsc95xx_write_reg(dev, E2P_CMD, val);
280
281 ret = smsc95xx_wait_eeprom(dev);
282 if (ret < 0)
283 return ret;
284
285 for (i = 0; i < length; i++) {
286
287 /* Fill data register */
288 val = data[i];
289 smsc95xx_write_reg(dev, E2P_DATA, val);
290
291 /* Send "write" command */
292 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
293 smsc95xx_write_reg(dev, E2P_CMD, val);
294
295 ret = smsc95xx_wait_eeprom(dev);
296 if (ret < 0)
297 return ret;
298
299 offset++;
300 }
301
302 return 0;
303 }
304
305 static void smsc95xx_async_cmd_callback(struct urb *urb)
306 {
307 struct usb_context *usb_context = urb->context;
308 struct usbnet *dev = usb_context->dev;
309 int status = urb->status;
310
311 if (status < 0)
312 netdev_warn(dev->net, "async callback failed with %d\n", status);
313
314 kfree(usb_context);
315 usb_free_urb(urb);
316 }
317
318 static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data)
319 {
320 struct usb_context *usb_context;
321 int status;
322 struct urb *urb;
323 const u16 size = 4;
324
325 urb = usb_alloc_urb(0, GFP_ATOMIC);
326 if (!urb) {
327 netdev_warn(dev->net, "Error allocating URB\n");
328 return -ENOMEM;
329 }
330
331 usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC);
332 if (usb_context == NULL) {
333 netdev_warn(dev->net, "Error allocating control msg\n");
334 usb_free_urb(urb);
335 return -ENOMEM;
336 }
337
338 usb_context->req.bRequestType =
339 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
340 usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER;
341 usb_context->req.wValue = 00;
342 usb_context->req.wIndex = cpu_to_le16(index);
343 usb_context->req.wLength = cpu_to_le16(size);
344
345 usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
346 (void *)&usb_context->req, data, size,
347 smsc95xx_async_cmd_callback,
348 (void *)usb_context);
349
350 status = usb_submit_urb(urb, GFP_ATOMIC);
351 if (status < 0) {
352 netdev_warn(dev->net, "Error submitting control msg, sts=%d\n",
353 status);
354 kfree(usb_context);
355 usb_free_urb(urb);
356 }
357
358 return status;
359 }
360
361 /* returns hash bit number for given MAC address
362 * example:
363 * 01 00 5E 00 00 01 -> returns bit number 31 */
364 static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
365 {
366 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
367 }
368
369 static void smsc95xx_set_multicast(struct net_device *netdev)
370 {
371 struct usbnet *dev = netdev_priv(netdev);
372 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
373 u32 hash_hi = 0;
374 u32 hash_lo = 0;
375 unsigned long flags;
376
377 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
378
379 if (dev->net->flags & IFF_PROMISC) {
380 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
381 pdata->mac_cr |= MAC_CR_PRMS_;
382 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
383 } else if (dev->net->flags & IFF_ALLMULTI) {
384 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
385 pdata->mac_cr |= MAC_CR_MCPAS_;
386 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
387 } else if (!netdev_mc_empty(dev->net)) {
388 struct netdev_hw_addr *ha;
389
390 pdata->mac_cr |= MAC_CR_HPFILT_;
391 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
392
393 netdev_for_each_mc_addr(ha, netdev) {
394 u32 bitnum = smsc95xx_hash(ha->addr);
395 u32 mask = 0x01 << (bitnum & 0x1F);
396 if (bitnum & 0x20)
397 hash_hi |= mask;
398 else
399 hash_lo |= mask;
400 }
401
402 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
403 hash_hi, hash_lo);
404 } else {
405 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
406 pdata->mac_cr &=
407 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
408 }
409
410 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
411
412 /* Initiate async writes, as we can't wait for completion here */
413 smsc95xx_write_reg_async(dev, HASHH, &hash_hi);
414 smsc95xx_write_reg_async(dev, HASHL, &hash_lo);
415 smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
416 }
417
418 static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
419 u16 lcladv, u16 rmtadv)
420 {
421 u32 flow, afc_cfg = 0;
422
423 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
424 if (ret < 0) {
425 netdev_warn(dev->net, "error reading AFC_CFG\n");
426 return;
427 }
428
429 if (duplex == DUPLEX_FULL) {
430 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
431
432 if (cap & FLOW_CTRL_RX)
433 flow = 0xFFFF0002;
434 else
435 flow = 0;
436
437 if (cap & FLOW_CTRL_TX)
438 afc_cfg |= 0xF;
439 else
440 afc_cfg &= ~0xF;
441
442 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
443 cap & FLOW_CTRL_RX ? "enabled" : "disabled",
444 cap & FLOW_CTRL_TX ? "enabled" : "disabled");
445 } else {
446 netif_dbg(dev, link, dev->net, "half duplex\n");
447 flow = 0;
448 afc_cfg |= 0xF;
449 }
450
451 smsc95xx_write_reg(dev, FLOW, flow);
452 smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
453 }
454
455 static int smsc95xx_link_reset(struct usbnet *dev)
456 {
457 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
458 struct mii_if_info *mii = &dev->mii;
459 struct ethtool_cmd ecmd;
460 unsigned long flags;
461 u16 lcladv, rmtadv;
462 u32 intdata;
463
464 /* clear interrupt status */
465 smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
466 intdata = 0xFFFFFFFF;
467 smsc95xx_write_reg(dev, INT_STS, intdata);
468
469 mii_check_media(mii, 1, 1);
470 mii_ethtool_gset(&dev->mii, &ecmd);
471 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
472 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
473
474 netif_dbg(dev, link, dev->net, "speed: %d duplex: %d lcladv: %04x rmtadv: %04x\n",
475 ecmd.speed, ecmd.duplex, lcladv, rmtadv);
476
477 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
478 if (ecmd.duplex != DUPLEX_FULL) {
479 pdata->mac_cr &= ~MAC_CR_FDPX_;
480 pdata->mac_cr |= MAC_CR_RCVOWN_;
481 } else {
482 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
483 pdata->mac_cr |= MAC_CR_FDPX_;
484 }
485 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
486
487 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
488
489 smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
490
491 return 0;
492 }
493
494 static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
495 {
496 u32 intdata;
497
498 if (urb->actual_length != 4) {
499 netdev_warn(dev->net, "unexpected urb length %d\n",
500 urb->actual_length);
501 return;
502 }
503
504 memcpy(&intdata, urb->transfer_buffer, 4);
505 le32_to_cpus(&intdata);
506
507 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
508
509 if (intdata & INT_ENP_PHY_INT_)
510 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
511 else
512 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
513 intdata);
514 }
515
516 /* Enable or disable Tx & Rx checksum offload engines */
517 static int smsc95xx_set_csums(struct usbnet *dev)
518 {
519 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
520 u32 read_buf;
521 int ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
522 if (ret < 0) {
523 netdev_warn(dev->net, "Failed to read COE_CR: %d\n", ret);
524 return ret;
525 }
526
527 if (pdata->use_tx_csum)
528 read_buf |= Tx_COE_EN_;
529 else
530 read_buf &= ~Tx_COE_EN_;
531
532 if (pdata->use_rx_csum)
533 read_buf |= Rx_COE_EN_;
534 else
535 read_buf &= ~Rx_COE_EN_;
536
537 ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
538 if (ret < 0) {
539 netdev_warn(dev->net, "Failed to write COE_CR: %d\n", ret);
540 return ret;
541 }
542
543 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
544 return 0;
545 }
546
547 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
548 {
549 return MAX_EEPROM_SIZE;
550 }
551
552 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
553 struct ethtool_eeprom *ee, u8 *data)
554 {
555 struct usbnet *dev = netdev_priv(netdev);
556
557 ee->magic = LAN95XX_EEPROM_MAGIC;
558
559 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
560 }
561
562 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
563 struct ethtool_eeprom *ee, u8 *data)
564 {
565 struct usbnet *dev = netdev_priv(netdev);
566
567 if (ee->magic != LAN95XX_EEPROM_MAGIC) {
568 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
569 ee->magic);
570 return -EINVAL;
571 }
572
573 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
574 }
575
576 static u32 smsc95xx_ethtool_get_rx_csum(struct net_device *netdev)
577 {
578 struct usbnet *dev = netdev_priv(netdev);
579 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
580
581 return pdata->use_rx_csum;
582 }
583
584 static int smsc95xx_ethtool_set_rx_csum(struct net_device *netdev, u32 val)
585 {
586 struct usbnet *dev = netdev_priv(netdev);
587 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
588
589 pdata->use_rx_csum = !!val;
590
591 return smsc95xx_set_csums(dev);
592 }
593
594 static u32 smsc95xx_ethtool_get_tx_csum(struct net_device *netdev)
595 {
596 struct usbnet *dev = netdev_priv(netdev);
597 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
598
599 return pdata->use_tx_csum;
600 }
601
602 static int smsc95xx_ethtool_set_tx_csum(struct net_device *netdev, u32 val)
603 {
604 struct usbnet *dev = netdev_priv(netdev);
605 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
606
607 pdata->use_tx_csum = !!val;
608
609 ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
610 return smsc95xx_set_csums(dev);
611 }
612
613 static const struct ethtool_ops smsc95xx_ethtool_ops = {
614 .get_link = usbnet_get_link,
615 .nway_reset = usbnet_nway_reset,
616 .get_drvinfo = usbnet_get_drvinfo,
617 .get_msglevel = usbnet_get_msglevel,
618 .set_msglevel = usbnet_set_msglevel,
619 .get_settings = usbnet_get_settings,
620 .set_settings = usbnet_set_settings,
621 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
622 .get_eeprom = smsc95xx_ethtool_get_eeprom,
623 .set_eeprom = smsc95xx_ethtool_set_eeprom,
624 .get_tx_csum = smsc95xx_ethtool_get_tx_csum,
625 .set_tx_csum = smsc95xx_ethtool_set_tx_csum,
626 .get_rx_csum = smsc95xx_ethtool_get_rx_csum,
627 .set_rx_csum = smsc95xx_ethtool_set_rx_csum,
628 };
629
630 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
631 {
632 struct usbnet *dev = netdev_priv(netdev);
633
634 if (!netif_running(netdev))
635 return -EINVAL;
636
637 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
638 }
639
640 static void smsc95xx_init_mac_address(struct usbnet *dev)
641 {
642 /* try reading mac address from EEPROM */
643 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
644 dev->net->dev_addr) == 0) {
645 if (is_valid_ether_addr(dev->net->dev_addr)) {
646 /* eeprom values are valid so use them */
647 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
648 return;
649 }
650 }
651
652 /* no eeprom, or eeprom values are invalid. generate random MAC */
653 random_ether_addr(dev->net->dev_addr);
654 netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr\n");
655 }
656
657 static int smsc95xx_set_mac_address(struct usbnet *dev)
658 {
659 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
660 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
661 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
662 int ret;
663
664 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
665 if (ret < 0) {
666 netdev_warn(dev->net, "Failed to write ADDRL: %d\n", ret);
667 return ret;
668 }
669
670 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
671 if (ret < 0) {
672 netdev_warn(dev->net, "Failed to write ADDRH: %d\n", ret);
673 return ret;
674 }
675
676 return 0;
677 }
678
679 /* starts the TX path */
680 static void smsc95xx_start_tx_path(struct usbnet *dev)
681 {
682 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
683 unsigned long flags;
684 u32 reg_val;
685
686 /* Enable Tx at MAC */
687 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
688 pdata->mac_cr |= MAC_CR_TXEN_;
689 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
690
691 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
692
693 /* Enable Tx at SCSRs */
694 reg_val = TX_CFG_ON_;
695 smsc95xx_write_reg(dev, TX_CFG, reg_val);
696 }
697
698 /* Starts the Receive path */
699 static void smsc95xx_start_rx_path(struct usbnet *dev)
700 {
701 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
702 unsigned long flags;
703
704 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
705 pdata->mac_cr |= MAC_CR_RXEN_;
706 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
707
708 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
709 }
710
711 static int smsc95xx_phy_initialize(struct usbnet *dev)
712 {
713 int bmcr, timeout = 0;
714
715 /* Initialize MII structure */
716 dev->mii.dev = dev->net;
717 dev->mii.mdio_read = smsc95xx_mdio_read;
718 dev->mii.mdio_write = smsc95xx_mdio_write;
719 dev->mii.phy_id_mask = 0x1f;
720 dev->mii.reg_num_mask = 0x1f;
721 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
722
723 /* reset phy and wait for reset to complete */
724 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
725
726 do {
727 msleep(10);
728 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
729 timeout++;
730 } while ((bmcr & MII_BMCR) && (timeout < 100));
731
732 if (timeout >= 100) {
733 netdev_warn(dev->net, "timeout on PHY Reset");
734 return -EIO;
735 }
736
737 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
738 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
739 ADVERTISE_PAUSE_ASYM);
740
741 /* read to clear */
742 smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
743
744 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
745 PHY_INT_MASK_DEFAULT_);
746 mii_nway_restart(&dev->mii);
747
748 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
749 return 0;
750 }
751
752 static int smsc95xx_reset(struct usbnet *dev)
753 {
754 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
755 struct net_device *netdev = dev->net;
756 u32 read_buf, write_buf, burst_cap;
757 int ret = 0, timeout;
758
759 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
760
761 write_buf = HW_CFG_LRST_;
762 ret = smsc95xx_write_reg(dev, HW_CFG, write_buf);
763 if (ret < 0) {
764 netdev_warn(dev->net, "Failed to write HW_CFG_LRST_ bit in HW_CFG register, ret = %d\n",
765 ret);
766 return ret;
767 }
768
769 timeout = 0;
770 do {
771 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
772 if (ret < 0) {
773 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
774 return ret;
775 }
776 msleep(10);
777 timeout++;
778 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
779
780 if (timeout >= 100) {
781 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
782 return ret;
783 }
784
785 write_buf = PM_CTL_PHY_RST_;
786 ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf);
787 if (ret < 0) {
788 netdev_warn(dev->net, "Failed to write PM_CTRL: %d\n", ret);
789 return ret;
790 }
791
792 timeout = 0;
793 do {
794 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
795 if (ret < 0) {
796 netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret);
797 return ret;
798 }
799 msleep(10);
800 timeout++;
801 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
802
803 if (timeout >= 100) {
804 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
805 return ret;
806 }
807
808 smsc95xx_init_mac_address(dev);
809
810 ret = smsc95xx_set_mac_address(dev);
811 if (ret < 0)
812 return ret;
813
814 netif_dbg(dev, ifup, dev->net,
815 "MAC Address: %pM\n", dev->net->dev_addr);
816
817 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
818 if (ret < 0) {
819 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
820 return ret;
821 }
822
823 netif_dbg(dev, ifup, dev->net,
824 "Read Value from HW_CFG : 0x%08x\n", read_buf);
825
826 read_buf |= HW_CFG_BIR_;
827
828 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
829 if (ret < 0) {
830 netdev_warn(dev->net, "Failed to write HW_CFG_BIR_ bit in HW_CFG register, ret = %d\n",
831 ret);
832 return ret;
833 }
834
835 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
836 if (ret < 0) {
837 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
838 return ret;
839 }
840 netif_dbg(dev, ifup, dev->net,
841 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
842 read_buf);
843
844 if (!turbo_mode) {
845 burst_cap = 0;
846 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
847 } else if (dev->udev->speed == USB_SPEED_HIGH) {
848 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
849 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
850 } else {
851 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
852 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
853 }
854
855 netif_dbg(dev, ifup, dev->net,
856 "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size);
857
858 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
859 if (ret < 0) {
860 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret);
861 return ret;
862 }
863
864 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
865 if (ret < 0) {
866 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret);
867 return ret;
868 }
869 netif_dbg(dev, ifup, dev->net,
870 "Read Value from BURST_CAP after writing: 0x%08x\n",
871 read_buf);
872
873 read_buf = DEFAULT_BULK_IN_DELAY;
874 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf);
875 if (ret < 0) {
876 netdev_warn(dev->net, "ret = %d\n", ret);
877 return ret;
878 }
879
880 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
881 if (ret < 0) {
882 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret);
883 return ret;
884 }
885 netif_dbg(dev, ifup, dev->net,
886 "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
887 read_buf);
888
889 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
890 if (ret < 0) {
891 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
892 return ret;
893 }
894 netif_dbg(dev, ifup, dev->net,
895 "Read Value from HW_CFG: 0x%08x\n", read_buf);
896
897 if (turbo_mode)
898 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
899
900 read_buf &= ~HW_CFG_RXDOFF_;
901
902 /* set Rx data offset=2, Make IP header aligns on word boundary. */
903 read_buf |= NET_IP_ALIGN << 9;
904
905 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
906 if (ret < 0) {
907 netdev_warn(dev->net, "Failed to write HW_CFG register, ret=%d\n",
908 ret);
909 return ret;
910 }
911
912 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
913 if (ret < 0) {
914 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
915 return ret;
916 }
917 netif_dbg(dev, ifup, dev->net,
918 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
919
920 write_buf = 0xFFFFFFFF;
921 ret = smsc95xx_write_reg(dev, INT_STS, write_buf);
922 if (ret < 0) {
923 netdev_warn(dev->net, "Failed to write INT_STS register, ret=%d\n",
924 ret);
925 return ret;
926 }
927
928 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
929 if (ret < 0) {
930 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
931 return ret;
932 }
933 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
934
935 /* Configure GPIO pins as LED outputs */
936 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
937 LED_GPIO_CFG_FDX_LED;
938 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
939 if (ret < 0) {
940 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG register, ret=%d\n",
941 ret);
942 return ret;
943 }
944
945 /* Init Tx */
946 write_buf = 0;
947 ret = smsc95xx_write_reg(dev, FLOW, write_buf);
948 if (ret < 0) {
949 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret);
950 return ret;
951 }
952
953 read_buf = AFC_CFG_DEFAULT;
954 ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf);
955 if (ret < 0) {
956 netdev_warn(dev->net, "Failed to write AFC_CFG: %d\n", ret);
957 return ret;
958 }
959
960 /* Don't need mac_cr_lock during initialisation */
961 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
962 if (ret < 0) {
963 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret);
964 return ret;
965 }
966
967 /* Init Rx */
968 /* Set Vlan */
969 write_buf = (u32)ETH_P_8021Q;
970 ret = smsc95xx_write_reg(dev, VLAN1, write_buf);
971 if (ret < 0) {
972 netdev_warn(dev->net, "Failed to write VAN1: %d\n", ret);
973 return ret;
974 }
975
976 /* Enable or disable checksum offload engines */
977 ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
978 ret = smsc95xx_set_csums(dev);
979 if (ret < 0) {
980 netdev_warn(dev->net, "Failed to set csum offload: %d\n", ret);
981 return ret;
982 }
983
984 smsc95xx_set_multicast(dev->net);
985
986 if (smsc95xx_phy_initialize(dev) < 0)
987 return -EIO;
988
989 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
990 if (ret < 0) {
991 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret);
992 return ret;
993 }
994
995 /* enable PHY interrupts */
996 read_buf |= INT_EP_CTL_PHY_INT_;
997
998 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
999 if (ret < 0) {
1000 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret);
1001 return ret;
1002 }
1003
1004 smsc95xx_start_tx_path(dev);
1005 smsc95xx_start_rx_path(dev);
1006
1007 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
1008 return 0;
1009 }
1010
1011 static const struct net_device_ops smsc95xx_netdev_ops = {
1012 .ndo_open = usbnet_open,
1013 .ndo_stop = usbnet_stop,
1014 .ndo_start_xmit = usbnet_start_xmit,
1015 .ndo_tx_timeout = usbnet_tx_timeout,
1016 .ndo_change_mtu = usbnet_change_mtu,
1017 .ndo_set_mac_address = eth_mac_addr,
1018 .ndo_validate_addr = eth_validate_addr,
1019 .ndo_do_ioctl = smsc95xx_ioctl,
1020 .ndo_set_multicast_list = smsc95xx_set_multicast,
1021 };
1022
1023 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1024 {
1025 struct smsc95xx_priv *pdata = NULL;
1026 int ret;
1027
1028 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1029
1030 ret = usbnet_get_endpoints(dev, intf);
1031 if (ret < 0) {
1032 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1033 return ret;
1034 }
1035
1036 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
1037 GFP_KERNEL);
1038
1039 pdata = (struct smsc95xx_priv *)(dev->data[0]);
1040 if (!pdata) {
1041 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n");
1042 return -ENOMEM;
1043 }
1044
1045 spin_lock_init(&pdata->mac_cr_lock);
1046
1047 pdata->use_tx_csum = DEFAULT_TX_CSUM_ENABLE;
1048 pdata->use_rx_csum = DEFAULT_RX_CSUM_ENABLE;
1049
1050 /* Init all registers */
1051 ret = smsc95xx_reset(dev);
1052
1053 dev->net->netdev_ops = &smsc95xx_netdev_ops;
1054 dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
1055 dev->net->flags |= IFF_MULTICAST;
1056 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD;
1057 return 0;
1058 }
1059
1060 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1061 {
1062 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1063 if (pdata) {
1064 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
1065 kfree(pdata);
1066 pdata = NULL;
1067 dev->data[0] = 0;
1068 }
1069 }
1070
1071 static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1072 {
1073 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1074 skb->ip_summed = CHECKSUM_COMPLETE;
1075 skb_trim(skb, skb->len - 2);
1076 }
1077
1078 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1079 {
1080 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1081
1082 while (skb->len > 0) {
1083 u32 header, align_count;
1084 struct sk_buff *ax_skb;
1085 unsigned char *packet;
1086 u16 size;
1087
1088 memcpy(&header, skb->data, sizeof(header));
1089 le32_to_cpus(&header);
1090 skb_pull(skb, 4 + NET_IP_ALIGN);
1091 packet = skb->data;
1092
1093 /* get the packet length */
1094 size = (u16)((header & RX_STS_FL_) >> 16);
1095 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1096
1097 if (unlikely(header & RX_STS_ES_)) {
1098 netif_dbg(dev, rx_err, dev->net,
1099 "Error header=0x%08x\n", header);
1100 dev->net->stats.rx_errors++;
1101 dev->net->stats.rx_dropped++;
1102
1103 if (header & RX_STS_CRC_) {
1104 dev->net->stats.rx_crc_errors++;
1105 } else {
1106 if (header & (RX_STS_TL_ | RX_STS_RF_))
1107 dev->net->stats.rx_frame_errors++;
1108
1109 if ((header & RX_STS_LE_) &&
1110 (!(header & RX_STS_FT_)))
1111 dev->net->stats.rx_length_errors++;
1112 }
1113 } else {
1114 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1115 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1116 netif_dbg(dev, rx_err, dev->net,
1117 "size err header=0x%08x\n", header);
1118 return 0;
1119 }
1120
1121 /* last frame in this batch */
1122 if (skb->len == size) {
1123 if (pdata->use_rx_csum)
1124 smsc95xx_rx_csum_offload(skb);
1125 skb_trim(skb, skb->len - 4); /* remove fcs */
1126 skb->truesize = size + sizeof(struct sk_buff);
1127
1128 return 1;
1129 }
1130
1131 ax_skb = skb_clone(skb, GFP_ATOMIC);
1132 if (unlikely(!ax_skb)) {
1133 netdev_warn(dev->net, "Error allocating skb\n");
1134 return 0;
1135 }
1136
1137 ax_skb->len = size;
1138 ax_skb->data = packet;
1139 skb_set_tail_pointer(ax_skb, size);
1140
1141 if (pdata->use_rx_csum)
1142 smsc95xx_rx_csum_offload(ax_skb);
1143 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1144 ax_skb->truesize = size + sizeof(struct sk_buff);
1145
1146 usbnet_skb_return(dev, ax_skb);
1147 }
1148
1149 skb_pull(skb, size);
1150
1151 /* padding bytes before the next frame starts */
1152 if (skb->len)
1153 skb_pull(skb, align_count);
1154 }
1155
1156 if (unlikely(skb->len < 0)) {
1157 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len);
1158 return 0;
1159 }
1160
1161 return 1;
1162 }
1163
1164 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1165 {
1166 int len = skb->data - skb->head;
1167 u16 high_16 = (u16)(skb->csum_offset + skb->csum_start - len);
1168 u16 low_16 = (u16)(skb->csum_start - len);
1169 return (high_16 << 16) | low_16;
1170 }
1171
1172 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1173 struct sk_buff *skb, gfp_t flags)
1174 {
1175 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1176 bool csum = pdata->use_tx_csum && (skb->ip_summed == CHECKSUM_PARTIAL);
1177 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
1178 u32 tx_cmd_a, tx_cmd_b;
1179
1180 /* We do not advertise SG, so skbs should be already linearized */
1181 BUG_ON(skb_shinfo(skb)->nr_frags);
1182
1183 if (skb_headroom(skb) < overhead) {
1184 struct sk_buff *skb2 = skb_copy_expand(skb,
1185 overhead, 0, flags);
1186 dev_kfree_skb_any(skb);
1187 skb = skb2;
1188 if (!skb)
1189 return NULL;
1190 }
1191
1192 if (csum) {
1193 if (skb->len <= 45) {
1194 long csstart = skb->csum_start - skb_headroom(skb);
1195 __wsum calc = csum_partial(skb->data + csstart,
1196 skb->len - csstart, 0);
1197 *((__sum16 *)(skb->data + csstart
1198 + skb->csum_offset)) = csum_fold(calc);
1199
1200 csum = false;
1201 } else {
1202 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1203 skb_push(skb, 4);
1204 memcpy(skb->data, &csum_preamble, 4);
1205 }
1206 }
1207
1208 skb_push(skb, 4);
1209 tx_cmd_b = (u32)(skb->len - 4);
1210 if (csum)
1211 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
1212 cpu_to_le32s(&tx_cmd_b);
1213 memcpy(skb->data, &tx_cmd_b, 4);
1214
1215 skb_push(skb, 4);
1216 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1217 TX_CMD_A_LAST_SEG_;
1218 cpu_to_le32s(&tx_cmd_a);
1219 memcpy(skb->data, &tx_cmd_a, 4);
1220
1221 return skb;
1222 }
1223
1224 static const struct driver_info smsc95xx_info = {
1225 .description = "smsc95xx USB 2.0 Ethernet",
1226 .bind = smsc95xx_bind,
1227 .unbind = smsc95xx_unbind,
1228 .link_reset = smsc95xx_link_reset,
1229 .reset = smsc95xx_reset,
1230 .rx_fixup = smsc95xx_rx_fixup,
1231 .tx_fixup = smsc95xx_tx_fixup,
1232 .status = smsc95xx_status,
1233 .flags = FLAG_ETHER | FLAG_SEND_ZLP,
1234 };
1235
1236 static const struct usb_device_id products[] = {
1237 {
1238 /* SMSC9500 USB Ethernet Device */
1239 USB_DEVICE(0x0424, 0x9500),
1240 .driver_info = (unsigned long) &smsc95xx_info,
1241 },
1242 {
1243 /* SMSC9505 USB Ethernet Device */
1244 USB_DEVICE(0x0424, 0x9505),
1245 .driver_info = (unsigned long) &smsc95xx_info,
1246 },
1247 {
1248 /* SMSC9500A USB Ethernet Device */
1249 USB_DEVICE(0x0424, 0x9E00),
1250 .driver_info = (unsigned long) &smsc95xx_info,
1251 },
1252 {
1253 /* SMSC9505A USB Ethernet Device */
1254 USB_DEVICE(0x0424, 0x9E01),
1255 .driver_info = (unsigned long) &smsc95xx_info,
1256 },
1257 {
1258 /* SMSC9512/9514 USB Hub & Ethernet Device */
1259 USB_DEVICE(0x0424, 0xec00),
1260 .driver_info = (unsigned long) &smsc95xx_info,
1261 },
1262 {
1263 /* SMSC9500 USB Ethernet Device (SAL10) */
1264 USB_DEVICE(0x0424, 0x9900),
1265 .driver_info = (unsigned long) &smsc95xx_info,
1266 },
1267 {
1268 /* SMSC9505 USB Ethernet Device (SAL10) */
1269 USB_DEVICE(0x0424, 0x9901),
1270 .driver_info = (unsigned long) &smsc95xx_info,
1271 },
1272 {
1273 /* SMSC9500A USB Ethernet Device (SAL10) */
1274 USB_DEVICE(0x0424, 0x9902),
1275 .driver_info = (unsigned long) &smsc95xx_info,
1276 },
1277 {
1278 /* SMSC9505A USB Ethernet Device (SAL10) */
1279 USB_DEVICE(0x0424, 0x9903),
1280 .driver_info = (unsigned long) &smsc95xx_info,
1281 },
1282 {
1283 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
1284 USB_DEVICE(0x0424, 0x9904),
1285 .driver_info = (unsigned long) &smsc95xx_info,
1286 },
1287 {
1288 /* SMSC9500A USB Ethernet Device (HAL) */
1289 USB_DEVICE(0x0424, 0x9905),
1290 .driver_info = (unsigned long) &smsc95xx_info,
1291 },
1292 {
1293 /* SMSC9505A USB Ethernet Device (HAL) */
1294 USB_DEVICE(0x0424, 0x9906),
1295 .driver_info = (unsigned long) &smsc95xx_info,
1296 },
1297 {
1298 /* SMSC9500 USB Ethernet Device (Alternate ID) */
1299 USB_DEVICE(0x0424, 0x9907),
1300 .driver_info = (unsigned long) &smsc95xx_info,
1301 },
1302 {
1303 /* SMSC9500A USB Ethernet Device (Alternate ID) */
1304 USB_DEVICE(0x0424, 0x9908),
1305 .driver_info = (unsigned long) &smsc95xx_info,
1306 },
1307 {
1308 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
1309 USB_DEVICE(0x0424, 0x9909),
1310 .driver_info = (unsigned long) &smsc95xx_info,
1311 },
1312 { }, /* END */
1313 };
1314 MODULE_DEVICE_TABLE(usb, products);
1315
1316 static struct usb_driver smsc95xx_driver = {
1317 .name = "smsc95xx",
1318 .id_table = products,
1319 .probe = usbnet_probe,
1320 .suspend = usbnet_suspend,
1321 .resume = usbnet_resume,
1322 .disconnect = usbnet_disconnect,
1323 };
1324
1325 static int __init smsc95xx_init(void)
1326 {
1327 return usb_register(&smsc95xx_driver);
1328 }
1329 module_init(smsc95xx_init);
1330
1331 static void __exit smsc95xx_exit(void)
1332 {
1333 usb_deregister(&smsc95xx_driver);
1334 }
1335 module_exit(smsc95xx_exit);
1336
1337 MODULE_AUTHOR("Nancy Lin");
1338 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1339 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
1340 MODULE_LICENSE("GPL");
Tomato firmware and modifications.