2 sis190.c: Silicon Integrated Systems SiS190 ethernet driver
4 Copyright (c) 2003 K.M. Liu <kmliu@sis.com>
5 Copyright (c) 2003, 2004 Jeff Garzik <jgarzik@pobox.com>
6 Copyright (c) 2003, 2004, 2005 Francois Romieu <romieu@fr.zoreil.com>
8 Based on r8169.c, tg3.c, 8139cp.c, skge.c, epic100.c and SiS 190/191
11 This software may be used and distributed according to the terms of
12 the GNU General Public License (GPL), incorporated herein by reference.
13 Drivers based on or derived from this code fall under the GPL and must
14 retain the authorship, copyright and license notice. This file is not
15 a complete program and may only be used when the entire operating
16 system is licensed under the GPL.
18 See the file COPYING in this distribution for more information.
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 #include <linux/module.h>
25 #include <linux/moduleparam.h>
26 #include <linux/netdevice.h>
27 #include <linux/rtnetlink.h>
28 #include <linux/etherdevice.h>
29 #include <linux/ethtool.h>
30 #include <linux/pci.h>
31 #include <linux/mii.h>
32 #include <linux/delay.h>
33 #include <linux/crc32.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/slab.h>
38 #define PHY_MAX_ADDR 32
39 #define PHY_ID_ANY 0x1f
40 #define MII_REG_ANY 0x1f
42 #define DRV_VERSION "1.4"
43 #define DRV_NAME "sis190"
44 #define SIS190_DRIVER_NAME DRV_NAME " Gigabit Ethernet driver " DRV_VERSION
46 #define sis190_rx_skb netif_rx
47 #define sis190_rx_quota(count, quota) count
49 #define MAC_ADDR_LEN 6
51 #define NUM_TX_DESC 64 /* [8..1024] */
52 #define NUM_RX_DESC 64 /* [8..8192] */
53 #define TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
54 #define RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
55 #define RX_BUF_SIZE 1536
56 #define RX_BUF_MASK 0xfff8
58 #define SIS190_REGS_SIZE 0x80
59 #define SIS190_TX_TIMEOUT (6*HZ)
60 #define SIS190_PHY_TIMEOUT (10*HZ)
61 #define SIS190_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | \
62 NETIF_MSG_LINK | NETIF_MSG_IFUP | \
65 /* Enhanced PHY access register bit definitions */
66 #define EhnMIIread 0x0000
67 #define EhnMIIwrite 0x0020
68 #define EhnMIIdataShift 16
69 #define EhnMIIpmdShift 6 /* 7016 only */
70 #define EhnMIIregShift 11
71 #define EhnMIIreq 0x0010
72 #define EhnMIInotDone 0x0010
74 /* Write/read MMIO register */
75 #define SIS_W8(reg, val) writeb ((val), ioaddr + (reg))
76 #define SIS_W16(reg, val) writew ((val), ioaddr + (reg))
77 #define SIS_W32(reg, val) writel ((val), ioaddr + (reg))
78 #define SIS_R8(reg) readb (ioaddr + (reg))
79 #define SIS_R16(reg) readw (ioaddr + (reg))
80 #define SIS_R32(reg) readl (ioaddr + (reg))
82 #define SIS_PCI_COMMIT() SIS_R32(IntrControl)
84 enum sis190_registers
{
86 TxDescStartAddr
= 0x04,
87 rsv0
= 0x08, // reserved
88 TxSts
= 0x0c, // unused (Control/Status)
90 RxDescStartAddr
= 0x14,
91 rsv1
= 0x18, // reserved
92 RxSts
= 0x1c, // unused
96 IntrTimer
= 0x2c, // unused (Interupt Timer)
97 PMControl
= 0x30, // unused (Power Mgmt Control/Status)
98 rsv2
= 0x34, // reserved
101 StationControl
= 0x40,
103 GIoCR
= 0x48, // unused (GMAC IO Compensation)
104 GIoCtrl
= 0x4c, // unused (GMAC IO Control)
106 TxLimit
= 0x54, // unused (Tx MAC Timer/TryLimit)
107 RGDelay
= 0x58, // unused (RGMII Tx Internal Delay)
108 rsv3
= 0x5c, // reserved
112 // Undocumented = 0x6c,
114 RxWolData
= 0x74, // unused (Rx WOL Data Access)
115 RxMPSControl
= 0x78, // unused (Rx MPS Control)
116 rsv4
= 0x7c, // reserved
119 enum sis190_register_content
{
121 SoftInt
= 0x40000000, // unused
122 Timeup
= 0x20000000, // unused
123 PauseFrame
= 0x00080000, // unused
124 MagicPacket
= 0x00040000, // unused
125 WakeupFrame
= 0x00020000, // unused
126 LinkChange
= 0x00010000,
127 RxQEmpty
= 0x00000080,
129 TxQ1Empty
= 0x00000020, // unused
130 TxQ1Int
= 0x00000010,
131 TxQ0Empty
= 0x00000008, // unused
132 TxQ0Int
= 0x00000004,
138 CmdRxEnb
= 0x08, // unused
140 RxBufEmpty
= 0x01, // unused
143 Cfg9346_Lock
= 0x00, // unused
144 Cfg9346_Unlock
= 0xc0, // unused
147 AcceptErr
= 0x20, // unused
148 AcceptRunt
= 0x10, // unused
149 AcceptBroadcast
= 0x0800,
150 AcceptMulticast
= 0x0400,
151 AcceptMyPhys
= 0x0200,
152 AcceptAllPhys
= 0x0100,
156 RxCfgDMAShift
= 8, // 0x1a in RxControl ?
159 TxInterFrameGapShift
= 24,
160 TxDMAShift
= 8, /* DMA burst value (0-7) is shift this many bits */
162 LinkStatus
= 0x02, // unused
163 FullDup
= 0x01, // unused
166 TBILinkOK
= 0x02000000, // unused
183 enum _DescStatusBit
{
185 OWNbit
= 0x80000000, // RXOWN/TXOWN
186 INTbit
= 0x40000000, // RXINT/TXINT
187 CRCbit
= 0x00020000, // CRCOFF/CRCEN
188 PADbit
= 0x00010000, // PREADD/PADEN
190 RingEnd
= 0x80000000,
192 LSEN
= 0x08000000, // TSO ? -- FR
211 ColCountMask
= 0x0000ffff,
225 RxDescCountMask
= 0x7f000000, // multi-desc pkt when > 1 ? -- FR
234 RxSizeMask
= 0x0000ffff
236 * The asic could apparently do vlan, TSO, jumbo (sis191 only) and
237 * provide two (unused with Linux) Tx queues. No publically
238 * available documentation alas.
242 enum sis190_eeprom_access_register_bits
{
243 EECS
= 0x00000001, // unused
244 EECLK
= 0x00000002, // unused
245 EEDO
= 0x00000008, // unused
246 EEDI
= 0x00000004, // unused
249 EEWOP
= 0x00000100 // unused
252 /* EEPROM Addresses */
253 enum sis190_eeprom_address
{
254 EEPROMSignature
= 0x00,
255 EEPROMCLK
= 0x01, // unused
260 enum sis190_feature
{
266 struct sis190_private
{
267 void __iomem
*mmio_addr
;
268 struct pci_dev
*pci_dev
;
269 struct net_device
*dev
;
278 struct RxDesc
*RxDescRing
;
279 struct TxDesc
*TxDescRing
;
280 struct sk_buff
*Rx_skbuff
[NUM_RX_DESC
];
281 struct sk_buff
*Tx_skbuff
[NUM_TX_DESC
];
282 struct work_struct phy_task
;
283 struct timer_list timer
;
285 struct mii_if_info mii_if
;
286 struct list_head first_phy
;
297 struct list_head list
;
304 enum sis190_phy_type
{
311 static struct mii_chip_info
{
316 } mii_chip_table
[] = {
317 { "Atheros PHY", { 0x004d, 0xd010 }, LAN
, 0 },
318 { "Atheros PHY AR8012", { 0x004d, 0xd020 }, LAN
, 0 },
319 { "Broadcom PHY BCM5461", { 0x0020, 0x60c0 }, LAN
, F_PHY_BCM5461
},
320 { "Broadcom PHY AC131", { 0x0143, 0xbc70 }, LAN
, 0 },
321 { "Agere PHY ET1101B", { 0x0282, 0xf010 }, LAN
, 0 },
322 { "Marvell PHY 88E1111", { 0x0141, 0x0cc0 }, LAN
, F_PHY_88E1111
},
323 { "Realtek PHY RTL8201", { 0x0000, 0x8200 }, LAN
, 0 },
327 static const struct {
329 } sis_chip_info
[] = {
330 { "SiS 190 PCI Fast Ethernet adapter" },
331 { "SiS 191 PCI Gigabit Ethernet adapter" },
334 static DEFINE_PCI_DEVICE_TABLE(sis190_pci_tbl
) = {
335 { PCI_DEVICE(PCI_VENDOR_ID_SI
, 0x0190), 0, 0, 0 },
336 { PCI_DEVICE(PCI_VENDOR_ID_SI
, 0x0191), 0, 0, 1 },
340 MODULE_DEVICE_TABLE(pci
, sis190_pci_tbl
);
342 static int rx_copybreak
= 200;
348 MODULE_DESCRIPTION("SiS sis190/191 Gigabit Ethernet driver");
349 module_param(rx_copybreak
, int, 0);
350 MODULE_PARM_DESC(rx_copybreak
, "Copy breakpoint for copy-only-tiny-frames");
351 module_param_named(debug
, debug
.msg_enable
, int, 0);
352 MODULE_PARM_DESC(debug
, "Debug verbosity level (0=none, ..., 16=all)");
353 MODULE_AUTHOR("K.M. Liu <kmliu@sis.com>, Ueimor <romieu@fr.zoreil.com>");
354 MODULE_VERSION(DRV_VERSION
);
355 MODULE_LICENSE("GPL");
357 static const u32 sis190_intr_mask
=
358 RxQEmpty
| RxQInt
| TxQ1Int
| TxQ0Int
| RxHalt
| TxHalt
| LinkChange
;
361 * Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
362 * The chips use a 64 element hash table based on the Ethernet CRC.
364 static const int multicast_filter_limit
= 32;
366 static void __mdio_cmd(void __iomem
*ioaddr
, u32 ctl
)
370 SIS_W32(GMIIControl
, ctl
);
374 for (i
= 0; i
< 100; i
++) {
375 if (!(SIS_R32(GMIIControl
) & EhnMIInotDone
))
381 pr_err("PHY command failed !\n");
384 static void mdio_write(void __iomem
*ioaddr
, int phy_id
, int reg
, int val
)
386 __mdio_cmd(ioaddr
, EhnMIIreq
| EhnMIIwrite
|
387 (((u32
) reg
) << EhnMIIregShift
) | (phy_id
<< EhnMIIpmdShift
) |
388 (((u32
) val
) << EhnMIIdataShift
));
391 static int mdio_read(void __iomem
*ioaddr
, int phy_id
, int reg
)
393 __mdio_cmd(ioaddr
, EhnMIIreq
| EhnMIIread
|
394 (((u32
) reg
) << EhnMIIregShift
) | (phy_id
<< EhnMIIpmdShift
));
396 return (u16
) (SIS_R32(GMIIControl
) >> EhnMIIdataShift
);
399 static void __mdio_write(struct net_device
*dev
, int phy_id
, int reg
, int val
)
401 struct sis190_private
*tp
= netdev_priv(dev
);
403 mdio_write(tp
->mmio_addr
, phy_id
, reg
, val
);
406 static int __mdio_read(struct net_device
*dev
, int phy_id
, int reg
)
408 struct sis190_private
*tp
= netdev_priv(dev
);
410 return mdio_read(tp
->mmio_addr
, phy_id
, reg
);
413 static u16
mdio_read_latched(void __iomem
*ioaddr
, int phy_id
, int reg
)
415 mdio_read(ioaddr
, phy_id
, reg
);
416 return mdio_read(ioaddr
, phy_id
, reg
);
419 static u16 __devinit
sis190_read_eeprom(void __iomem
*ioaddr
, u32 reg
)
424 if (!(SIS_R32(ROMControl
) & 0x0002))
427 SIS_W32(ROMInterface
, EEREQ
| EEROP
| (reg
<< 10));
429 for (i
= 0; i
< 200; i
++) {
430 if (!(SIS_R32(ROMInterface
) & EEREQ
)) {
431 data
= (SIS_R32(ROMInterface
) & 0xffff0000) >> 16;
440 static void sis190_irq_mask_and_ack(void __iomem
*ioaddr
)
442 SIS_W32(IntrMask
, 0x00);
443 SIS_W32(IntrStatus
, 0xffffffff);
447 static void sis190_asic_down(void __iomem
*ioaddr
)
449 /* Stop the chip's Tx and Rx DMA processes. */
451 SIS_W32(TxControl
, 0x1a00);
452 SIS_W32(RxControl
, 0x1a00);
454 sis190_irq_mask_and_ack(ioaddr
);
457 static void sis190_mark_as_last_descriptor(struct RxDesc
*desc
)
459 desc
->size
|= cpu_to_le32(RingEnd
);
462 static inline void sis190_give_to_asic(struct RxDesc
*desc
, u32 rx_buf_sz
)
464 u32 eor
= le32_to_cpu(desc
->size
) & RingEnd
;
467 desc
->size
= cpu_to_le32((rx_buf_sz
& RX_BUF_MASK
) | eor
);
469 desc
->status
= cpu_to_le32(OWNbit
| INTbit
);
472 static inline void sis190_map_to_asic(struct RxDesc
*desc
, dma_addr_t mapping
,
475 desc
->addr
= cpu_to_le32(mapping
);
476 sis190_give_to_asic(desc
, rx_buf_sz
);
479 static inline void sis190_make_unusable_by_asic(struct RxDesc
*desc
)
482 desc
->addr
= cpu_to_le32(0xdeadbeef);
483 desc
->size
&= cpu_to_le32(RingEnd
);
488 static struct sk_buff
*sis190_alloc_rx_skb(struct sis190_private
*tp
,
491 u32 rx_buf_sz
= tp
->rx_buf_sz
;
495 skb
= netdev_alloc_skb(tp
->dev
, rx_buf_sz
);
497 goto skb_alloc_failed
;
498 mapping
= pci_map_single(tp
->pci_dev
, skb
->data
, tp
->rx_buf_sz
,
500 if (pci_dma_mapping_error(tp
->pci_dev
, mapping
))
502 sis190_map_to_asic(desc
, mapping
, rx_buf_sz
);
507 dev_kfree_skb_any(skb
);
509 sis190_make_unusable_by_asic(desc
);
513 static u32
sis190_rx_fill(struct sis190_private
*tp
, struct net_device
*dev
,
518 for (cur
= start
; cur
< end
; cur
++) {
519 unsigned int i
= cur
% NUM_RX_DESC
;
521 if (tp
->Rx_skbuff
[i
])
524 tp
->Rx_skbuff
[i
] = sis190_alloc_rx_skb(tp
, tp
->RxDescRing
+ i
);
526 if (!tp
->Rx_skbuff
[i
])
532 static bool sis190_try_rx_copy(struct sis190_private
*tp
,
533 struct sk_buff
**sk_buff
, int pkt_size
,
539 if (pkt_size
>= rx_copybreak
)
542 skb
= netdev_alloc_skb_ip_align(tp
->dev
, pkt_size
);
546 pci_dma_sync_single_for_cpu(tp
->pci_dev
, addr
, tp
->rx_buf_sz
,
548 skb_copy_to_linear_data(skb
, sk_buff
[0]->data
, pkt_size
);
555 static inline int sis190_rx_pkt_err(u32 status
, struct net_device_stats
*stats
)
557 #define ErrMask (OVRUN | SHORT | LIMIT | MIIER | NIBON | COLON | ABORT)
559 if ((status
& CRCOK
) && !(status
& ErrMask
))
562 if (!(status
& CRCOK
))
563 stats
->rx_crc_errors
++;
564 else if (status
& OVRUN
)
565 stats
->rx_over_errors
++;
566 else if (status
& (SHORT
| LIMIT
))
567 stats
->rx_length_errors
++;
568 else if (status
& (MIIER
| NIBON
| COLON
))
569 stats
->rx_frame_errors
++;
575 static int sis190_rx_interrupt(struct net_device
*dev
,
576 struct sis190_private
*tp
, void __iomem
*ioaddr
)
578 struct net_device_stats
*stats
= &dev
->stats
;
579 u32 rx_left
, cur_rx
= tp
->cur_rx
;
582 rx_left
= NUM_RX_DESC
+ tp
->dirty_rx
- cur_rx
;
583 rx_left
= sis190_rx_quota(rx_left
, (u32
) dev
->quota
);
585 for (; rx_left
> 0; rx_left
--, cur_rx
++) {
586 unsigned int entry
= cur_rx
% NUM_RX_DESC
;
587 struct RxDesc
*desc
= tp
->RxDescRing
+ entry
;
590 if (le32_to_cpu(desc
->status
) & OWNbit
)
593 status
= le32_to_cpu(desc
->PSize
);
595 //netif_info(tp, intr, dev, "Rx PSize = %08x\n", status);
597 if (sis190_rx_pkt_err(status
, stats
) < 0)
598 sis190_give_to_asic(desc
, tp
->rx_buf_sz
);
600 struct sk_buff
*skb
= tp
->Rx_skbuff
[entry
];
601 dma_addr_t addr
= le32_to_cpu(desc
->addr
);
602 int pkt_size
= (status
& RxSizeMask
) - 4;
603 struct pci_dev
*pdev
= tp
->pci_dev
;
605 if (unlikely(pkt_size
> tp
->rx_buf_sz
)) {
606 netif_info(tp
, intr
, dev
,
607 "(frag) status = %08x\n", status
);
609 stats
->rx_length_errors
++;
610 sis190_give_to_asic(desc
, tp
->rx_buf_sz
);
615 if (sis190_try_rx_copy(tp
, &skb
, pkt_size
, addr
)) {
616 pci_dma_sync_single_for_device(pdev
, addr
,
617 tp
->rx_buf_sz
, PCI_DMA_FROMDEVICE
);
618 sis190_give_to_asic(desc
, tp
->rx_buf_sz
);
620 pci_unmap_single(pdev
, addr
, tp
->rx_buf_sz
,
622 tp
->Rx_skbuff
[entry
] = NULL
;
623 sis190_make_unusable_by_asic(desc
);
626 skb_put(skb
, pkt_size
);
627 skb
->protocol
= eth_type_trans(skb
, dev
);
632 stats
->rx_bytes
+= pkt_size
;
633 if ((status
& BCAST
) == MCAST
)
637 count
= cur_rx
- tp
->cur_rx
;
640 delta
= sis190_rx_fill(tp
, dev
, tp
->dirty_rx
, tp
->cur_rx
);
642 netif_info(tp
, intr
, dev
, "no Rx buffer allocated\n");
643 tp
->dirty_rx
+= delta
;
645 if ((tp
->dirty_rx
+ NUM_RX_DESC
) == tp
->cur_rx
)
646 netif_emerg(tp
, intr
, dev
, "Rx buffers exhausted\n");
651 static void sis190_unmap_tx_skb(struct pci_dev
*pdev
, struct sk_buff
*skb
,
656 len
= skb
->len
< ETH_ZLEN
? ETH_ZLEN
: skb
->len
;
658 pci_unmap_single(pdev
, le32_to_cpu(desc
->addr
), len
, PCI_DMA_TODEVICE
);
660 memset(desc
, 0x00, sizeof(*desc
));
663 static inline int sis190_tx_pkt_err(u32 status
, struct net_device_stats
*stats
)
665 #define TxErrMask (WND | TABRT | FIFO | LINK)
667 if (!unlikely(status
& TxErrMask
))
671 stats
->tx_window_errors
++;
673 stats
->tx_aborted_errors
++;
675 stats
->tx_fifo_errors
++;
677 stats
->tx_carrier_errors
++;
684 static void sis190_tx_interrupt(struct net_device
*dev
,
685 struct sis190_private
*tp
, void __iomem
*ioaddr
)
687 struct net_device_stats
*stats
= &dev
->stats
;
688 u32 pending
, dirty_tx
= tp
->dirty_tx
;
690 * It would not be needed if queueing was allowed to be enabled
691 * again too early (hint: think preempt and unclocked smp systems).
693 unsigned int queue_stopped
;
696 pending
= tp
->cur_tx
- dirty_tx
;
697 queue_stopped
= (pending
== NUM_TX_DESC
);
699 for (; pending
; pending
--, dirty_tx
++) {
700 unsigned int entry
= dirty_tx
% NUM_TX_DESC
;
701 struct TxDesc
*txd
= tp
->TxDescRing
+ entry
;
702 u32 status
= le32_to_cpu(txd
->status
);
708 skb
= tp
->Tx_skbuff
[entry
];
710 if (likely(sis190_tx_pkt_err(status
, stats
) == 0)) {
712 stats
->tx_bytes
+= skb
->len
;
713 stats
->collisions
+= ((status
& ColCountMask
) - 1);
716 sis190_unmap_tx_skb(tp
->pci_dev
, skb
, txd
);
717 tp
->Tx_skbuff
[entry
] = NULL
;
718 dev_kfree_skb_irq(skb
);
721 if (tp
->dirty_tx
!= dirty_tx
) {
722 tp
->dirty_tx
= dirty_tx
;
725 netif_wake_queue(dev
);
730 * The interrupt handler does all of the Rx thread work and cleans up after
733 static irqreturn_t
sis190_interrupt(int irq
, void *__dev
)
735 struct net_device
*dev
= __dev
;
736 struct sis190_private
*tp
= netdev_priv(dev
);
737 void __iomem
*ioaddr
= tp
->mmio_addr
;
738 unsigned int handled
= 0;
741 status
= SIS_R32(IntrStatus
);
743 if ((status
== 0xffffffff) || !status
)
748 if (unlikely(!netif_running(dev
))) {
749 sis190_asic_down(ioaddr
);
753 SIS_W32(IntrStatus
, status
);
755 // netif_info(tp, intr, dev, "status = %08x\n", status);
757 if (status
& LinkChange
) {
758 netif_info(tp
, intr
, dev
, "link change\n");
759 del_timer(&tp
->timer
);
760 schedule_work(&tp
->phy_task
);
764 sis190_rx_interrupt(dev
, tp
, ioaddr
);
766 if (status
& TxQ0Int
)
767 sis190_tx_interrupt(dev
, tp
, ioaddr
);
769 return IRQ_RETVAL(handled
);
772 #ifdef CONFIG_NET_POLL_CONTROLLER
773 static void sis190_netpoll(struct net_device
*dev
)
775 struct sis190_private
*tp
= netdev_priv(dev
);
776 struct pci_dev
*pdev
= tp
->pci_dev
;
778 disable_irq(pdev
->irq
);
779 sis190_interrupt(pdev
->irq
, dev
);
780 enable_irq(pdev
->irq
);
784 static void sis190_free_rx_skb(struct sis190_private
*tp
,
785 struct sk_buff
**sk_buff
, struct RxDesc
*desc
)
787 struct pci_dev
*pdev
= tp
->pci_dev
;
789 pci_unmap_single(pdev
, le32_to_cpu(desc
->addr
), tp
->rx_buf_sz
,
791 dev_kfree_skb(*sk_buff
);
793 sis190_make_unusable_by_asic(desc
);
796 static void sis190_rx_clear(struct sis190_private
*tp
)
800 for (i
= 0; i
< NUM_RX_DESC
; i
++) {
801 if (!tp
->Rx_skbuff
[i
])
803 sis190_free_rx_skb(tp
, tp
->Rx_skbuff
+ i
, tp
->RxDescRing
+ i
);
807 static void sis190_init_ring_indexes(struct sis190_private
*tp
)
809 tp
->dirty_tx
= tp
->dirty_rx
= tp
->cur_tx
= tp
->cur_rx
= 0;
812 static int sis190_init_ring(struct net_device
*dev
)
814 struct sis190_private
*tp
= netdev_priv(dev
);
816 sis190_init_ring_indexes(tp
);
818 memset(tp
->Tx_skbuff
, 0x0, NUM_TX_DESC
* sizeof(struct sk_buff
*));
819 memset(tp
->Rx_skbuff
, 0x0, NUM_RX_DESC
* sizeof(struct sk_buff
*));
821 if (sis190_rx_fill(tp
, dev
, 0, NUM_RX_DESC
) != NUM_RX_DESC
)
824 sis190_mark_as_last_descriptor(tp
->RxDescRing
+ NUM_RX_DESC
- 1);
833 static void sis190_set_rx_mode(struct net_device
*dev
)
835 struct sis190_private
*tp
= netdev_priv(dev
);
836 void __iomem
*ioaddr
= tp
->mmio_addr
;
838 u32 mc_filter
[2]; /* Multicast hash filter */
841 if (dev
->flags
& IFF_PROMISC
) {
843 AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
|
845 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
846 } else if ((netdev_mc_count(dev
) > multicast_filter_limit
) ||
847 (dev
->flags
& IFF_ALLMULTI
)) {
848 /* Too many to filter perfectly -- accept all multicasts. */
849 rx_mode
= AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
;
850 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
852 struct netdev_hw_addr
*ha
;
854 rx_mode
= AcceptBroadcast
| AcceptMyPhys
;
855 mc_filter
[1] = mc_filter
[0] = 0;
856 netdev_for_each_mc_addr(ha
, dev
) {
858 ether_crc(ETH_ALEN
, ha
->addr
) & 0x3f;
859 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
860 rx_mode
|= AcceptMulticast
;
864 spin_lock_irqsave(&tp
->lock
, flags
);
866 SIS_W16(RxMacControl
, rx_mode
| 0x2);
867 SIS_W32(RxHashTable
, mc_filter
[0]);
868 SIS_W32(RxHashTable
+ 4, mc_filter
[1]);
870 spin_unlock_irqrestore(&tp
->lock
, flags
);
873 static void sis190_soft_reset(void __iomem
*ioaddr
)
875 SIS_W32(IntrControl
, 0x8000);
877 SIS_W32(IntrControl
, 0x0);
878 sis190_asic_down(ioaddr
);
881 static void sis190_hw_start(struct net_device
*dev
)
883 struct sis190_private
*tp
= netdev_priv(dev
);
884 void __iomem
*ioaddr
= tp
->mmio_addr
;
886 sis190_soft_reset(ioaddr
);
888 SIS_W32(TxDescStartAddr
, tp
->tx_dma
);
889 SIS_W32(RxDescStartAddr
, tp
->rx_dma
);
891 SIS_W32(IntrStatus
, 0xffffffff);
892 SIS_W32(IntrMask
, 0x0);
893 SIS_W32(GMIIControl
, 0x0);
894 SIS_W32(TxMacControl
, 0x60);
895 SIS_W16(RxMacControl
, 0x02);
896 SIS_W32(RxHashTable
, 0x0);
898 SIS_W32(RxWolCtrl
, 0x0);
899 SIS_W32(RxWolData
, 0x0);
903 sis190_set_rx_mode(dev
);
905 /* Enable all known interrupts by setting the interrupt mask. */
906 SIS_W32(IntrMask
, sis190_intr_mask
);
908 SIS_W32(TxControl
, 0x1a00 | CmdTxEnb
);
909 SIS_W32(RxControl
, 0x1a1d);
911 netif_start_queue(dev
);
914 static void sis190_phy_task(struct work_struct
*work
)
916 struct sis190_private
*tp
=
917 container_of(work
, struct sis190_private
, phy_task
);
918 struct net_device
*dev
= tp
->dev
;
919 void __iomem
*ioaddr
= tp
->mmio_addr
;
920 int phy_id
= tp
->mii_if
.phy_id
;
925 if (!netif_running(dev
))
928 val
= mdio_read(ioaddr
, phy_id
, MII_BMCR
);
929 if (val
& BMCR_RESET
) {
930 mod_timer(&tp
->timer
, jiffies
+ HZ
/10);
934 val
= mdio_read_latched(ioaddr
, phy_id
, MII_BMSR
);
935 if (!(val
& BMSR_ANEGCOMPLETE
) && tp
->link_status
!= LNK_AUTONEG
) {
936 netif_carrier_off(dev
);
937 netif_warn(tp
, link
, dev
, "auto-negotiating...\n");
938 tp
->link_status
= LNK_AUTONEG
;
939 } else if ((val
& BMSR_LSTATUS
) && tp
->link_status
!= LNK_ON
) {
946 { LPA_1000FULL
, 0x07000c00 | 0x00001000,
947 "1000 Mbps Full Duplex" },
948 { LPA_1000HALF
, 0x07000c00,
949 "1000 Mbps Half Duplex" },
950 { LPA_100FULL
, 0x04000800 | 0x00001000,
951 "100 Mbps Full Duplex" },
952 { LPA_100HALF
, 0x04000800,
953 "100 Mbps Half Duplex" },
954 { LPA_10FULL
, 0x04000400 | 0x00001000,
955 "10 Mbps Full Duplex" },
956 { LPA_10HALF
, 0x04000400,
957 "10 Mbps Half Duplex" },
958 { 0, 0x04000400, "unknown" }
960 u16 adv
, autoexp
, gigadv
, gigrec
;
962 val
= mdio_read(ioaddr
, phy_id
, 0x1f);
963 netif_info(tp
, link
, dev
, "mii ext = %04x\n", val
);
965 val
= mdio_read(ioaddr
, phy_id
, MII_LPA
);
966 adv
= mdio_read(ioaddr
, phy_id
, MII_ADVERTISE
);
967 autoexp
= mdio_read(ioaddr
, phy_id
, MII_EXPANSION
);
968 netif_info(tp
, link
, dev
, "mii lpa=%04x adv=%04x exp=%04x\n",
971 if (val
& LPA_NPAGE
&& autoexp
& EXPANSION_NWAY
) {
972 /* check for gigabit speed */
973 gigadv
= mdio_read(ioaddr
, phy_id
, MII_CTRL1000
);
974 gigrec
= mdio_read(ioaddr
, phy_id
, MII_STAT1000
);
975 val
= (gigadv
& (gigrec
>> 2));
976 if (val
& ADVERTISE_1000FULL
)
978 else if (val
& ADVERTISE_1000HALF
)
984 for (p
= reg31
; p
->val
; p
++) {
985 if ((val
& p
->val
) == p
->val
)
990 p
->ctl
|= SIS_R32(StationControl
) & ~0x0f001c00;
992 if ((tp
->features
& F_HAS_RGMII
) &&
993 (tp
->features
& F_PHY_BCM5461
)) {
994 // Set Tx Delay in RGMII mode.
995 mdio_write(ioaddr
, phy_id
, 0x18, 0xf1c7);
997 mdio_write(ioaddr
, phy_id
, 0x1c, 0x8c00);
998 p
->ctl
|= 0x03000000;
1001 SIS_W32(StationControl
, p
->ctl
);
1003 if (tp
->features
& F_HAS_RGMII
) {
1004 SIS_W32(RGDelay
, 0x0441);
1005 SIS_W32(RGDelay
, 0x0440);
1008 tp
->negotiated_lpa
= p
->val
;
1010 netif_info(tp
, link
, dev
, "link on %s mode\n", p
->msg
);
1011 netif_carrier_on(dev
);
1012 tp
->link_status
= LNK_ON
;
1013 } else if (!(val
& BMSR_LSTATUS
) && tp
->link_status
!= LNK_AUTONEG
)
1014 tp
->link_status
= LNK_OFF
;
1015 mod_timer(&tp
->timer
, jiffies
+ SIS190_PHY_TIMEOUT
);
1021 static void sis190_phy_timer(unsigned long __opaque
)
1023 struct net_device
*dev
= (struct net_device
*)__opaque
;
1024 struct sis190_private
*tp
= netdev_priv(dev
);
1026 if (likely(netif_running(dev
)))
1027 schedule_work(&tp
->phy_task
);
1030 static inline void sis190_delete_timer(struct net_device
*dev
)
1032 struct sis190_private
*tp
= netdev_priv(dev
);
1034 del_timer_sync(&tp
->timer
);
1037 static inline void sis190_request_timer(struct net_device
*dev
)
1039 struct sis190_private
*tp
= netdev_priv(dev
);
1040 struct timer_list
*timer
= &tp
->timer
;
1043 timer
->expires
= jiffies
+ SIS190_PHY_TIMEOUT
;
1044 timer
->data
= (unsigned long)dev
;
1045 timer
->function
= sis190_phy_timer
;
1049 static void sis190_set_rxbufsize(struct sis190_private
*tp
,
1050 struct net_device
*dev
)
1052 unsigned int mtu
= dev
->mtu
;
1054 tp
->rx_buf_sz
= (mtu
> RX_BUF_SIZE
) ? mtu
+ ETH_HLEN
+ 8 : RX_BUF_SIZE
;
1055 /* RxDesc->size has a licence to kill the lower bits */
1056 if (tp
->rx_buf_sz
& 0x07) {
1058 tp
->rx_buf_sz
&= RX_BUF_MASK
;
1062 static int sis190_open(struct net_device
*dev
)
1064 struct sis190_private
*tp
= netdev_priv(dev
);
1065 struct pci_dev
*pdev
= tp
->pci_dev
;
1068 sis190_set_rxbufsize(tp
, dev
);
1071 * Rx and Tx descriptors need 256 bytes alignment.
1072 * pci_alloc_consistent() guarantees a stronger alignment.
1074 tp
->TxDescRing
= pci_alloc_consistent(pdev
, TX_RING_BYTES
, &tp
->tx_dma
);
1075 if (!tp
->TxDescRing
)
1078 tp
->RxDescRing
= pci_alloc_consistent(pdev
, RX_RING_BYTES
, &tp
->rx_dma
);
1079 if (!tp
->RxDescRing
)
1082 rc
= sis190_init_ring(dev
);
1086 sis190_request_timer(dev
);
1088 rc
= request_irq(dev
->irq
, sis190_interrupt
, IRQF_SHARED
, dev
->name
, dev
);
1090 goto err_release_timer_2
;
1092 sis190_hw_start(dev
);
1096 err_release_timer_2
:
1097 sis190_delete_timer(dev
);
1098 sis190_rx_clear(tp
);
1100 pci_free_consistent(tp
->pci_dev
, RX_RING_BYTES
, tp
->RxDescRing
,
1103 pci_free_consistent(tp
->pci_dev
, TX_RING_BYTES
, tp
->TxDescRing
,
1108 static void sis190_tx_clear(struct sis190_private
*tp
)
1112 for (i
= 0; i
< NUM_TX_DESC
; i
++) {
1113 struct sk_buff
*skb
= tp
->Tx_skbuff
[i
];
1118 sis190_unmap_tx_skb(tp
->pci_dev
, skb
, tp
->TxDescRing
+ i
);
1119 tp
->Tx_skbuff
[i
] = NULL
;
1122 tp
->dev
->stats
.tx_dropped
++;
1124 tp
->cur_tx
= tp
->dirty_tx
= 0;
1127 static void sis190_down(struct net_device
*dev
)
1129 struct sis190_private
*tp
= netdev_priv(dev
);
1130 void __iomem
*ioaddr
= tp
->mmio_addr
;
1131 unsigned int poll_locked
= 0;
1133 sis190_delete_timer(dev
);
1135 netif_stop_queue(dev
);
1138 spin_lock_irq(&tp
->lock
);
1140 sis190_asic_down(ioaddr
);
1142 spin_unlock_irq(&tp
->lock
);
1144 synchronize_irq(dev
->irq
);
1149 synchronize_sched();
1151 } while (SIS_R32(IntrMask
));
1153 sis190_tx_clear(tp
);
1154 sis190_rx_clear(tp
);
1157 static int sis190_close(struct net_device
*dev
)
1159 struct sis190_private
*tp
= netdev_priv(dev
);
1160 struct pci_dev
*pdev
= tp
->pci_dev
;
1164 free_irq(dev
->irq
, dev
);
1166 pci_free_consistent(pdev
, TX_RING_BYTES
, tp
->TxDescRing
, tp
->tx_dma
);
1167 pci_free_consistent(pdev
, RX_RING_BYTES
, tp
->RxDescRing
, tp
->rx_dma
);
1169 tp
->TxDescRing
= NULL
;
1170 tp
->RxDescRing
= NULL
;
1175 static netdev_tx_t
sis190_start_xmit(struct sk_buff
*skb
,
1176 struct net_device
*dev
)
1178 struct sis190_private
*tp
= netdev_priv(dev
);
1179 void __iomem
*ioaddr
= tp
->mmio_addr
;
1180 u32 len
, entry
, dirty_tx
;
1181 struct TxDesc
*desc
;
1184 if (unlikely(skb
->len
< ETH_ZLEN
)) {
1185 if (skb_padto(skb
, ETH_ZLEN
)) {
1186 dev
->stats
.tx_dropped
++;
1194 entry
= tp
->cur_tx
% NUM_TX_DESC
;
1195 desc
= tp
->TxDescRing
+ entry
;
1197 if (unlikely(le32_to_cpu(desc
->status
) & OWNbit
)) {
1198 netif_stop_queue(dev
);
1199 netif_err(tp
, tx_err
, dev
,
1200 "BUG! Tx Ring full when queue awake!\n");
1201 return NETDEV_TX_BUSY
;
1204 mapping
= pci_map_single(tp
->pci_dev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
1205 if (pci_dma_mapping_error(tp
->pci_dev
, mapping
)) {
1206 netif_err(tp
, tx_err
, dev
,
1207 "PCI mapping failed, dropping packet");
1208 return NETDEV_TX_BUSY
;
1211 tp
->Tx_skbuff
[entry
] = skb
;
1213 desc
->PSize
= cpu_to_le32(len
);
1214 desc
->addr
= cpu_to_le32(mapping
);
1216 desc
->size
= cpu_to_le32(len
);
1217 if (entry
== (NUM_TX_DESC
- 1))
1218 desc
->size
|= cpu_to_le32(RingEnd
);
1222 desc
->status
= cpu_to_le32(OWNbit
| INTbit
| DEFbit
| CRCbit
| PADbit
);
1223 if (tp
->negotiated_lpa
& (LPA_1000HALF
| LPA_100HALF
| LPA_10HALF
)) {
1225 desc
->status
|= cpu_to_le32(COLEN
| CRSEN
| BKFEN
);
1226 if (tp
->negotiated_lpa
& (LPA_1000HALF
| LPA_1000FULL
))
1227 desc
->status
|= cpu_to_le32(EXTEN
| BSTEN
); /* gigabit HD */
1234 SIS_W32(TxControl
, 0x1a00 | CmdReset
| CmdTxEnb
);
1236 dirty_tx
= tp
->dirty_tx
;
1237 if ((tp
->cur_tx
- NUM_TX_DESC
) == dirty_tx
) {
1238 netif_stop_queue(dev
);
1240 if (dirty_tx
!= tp
->dirty_tx
)
1241 netif_wake_queue(dev
);
1244 return NETDEV_TX_OK
;
1247 static void sis190_free_phy(struct list_head
*first_phy
)
1249 struct sis190_phy
*cur
, *next
;
1251 list_for_each_entry_safe(cur
, next
, first_phy
, list
) {
1257 * sis190_default_phy - Select default PHY for sis190 mac.
1258 * @dev: the net device to probe for
1260 * Select first detected PHY with link as default.
1261 * If no one is link on, select PHY whose types is HOME as default.
1262 * If HOME doesn't exist, select LAN.
1264 static u16
sis190_default_phy(struct net_device
*dev
)
1266 struct sis190_phy
*phy
, *phy_home
, *phy_default
, *phy_lan
;
1267 struct sis190_private
*tp
= netdev_priv(dev
);
1268 struct mii_if_info
*mii_if
= &tp
->mii_if
;
1269 void __iomem
*ioaddr
= tp
->mmio_addr
;
1272 phy_home
= phy_default
= phy_lan
= NULL
;
1274 list_for_each_entry(phy
, &tp
->first_phy
, list
) {
1275 status
= mdio_read_latched(ioaddr
, phy
->phy_id
, MII_BMSR
);
1277 // Link ON & Not select default PHY & not ghost PHY.
1278 if ((status
& BMSR_LSTATUS
) &&
1280 (phy
->type
!= UNKNOWN
)) {
1283 status
= mdio_read(ioaddr
, phy
->phy_id
, MII_BMCR
);
1284 mdio_write(ioaddr
, phy
->phy_id
, MII_BMCR
,
1285 status
| BMCR_ANENABLE
| BMCR_ISOLATE
);
1286 if (phy
->type
== HOME
)
1288 else if (phy
->type
== LAN
)
1295 phy_default
= phy_home
;
1297 phy_default
= phy_lan
;
1299 phy_default
= list_first_entry(&tp
->first_phy
,
1300 struct sis190_phy
, list
);
1303 if (mii_if
->phy_id
!= phy_default
->phy_id
) {
1304 mii_if
->phy_id
= phy_default
->phy_id
;
1305 if (netif_msg_probe(tp
))
1306 pr_info("%s: Using transceiver at address %d as default\n",
1307 pci_name(tp
->pci_dev
), mii_if
->phy_id
);
1310 status
= mdio_read(ioaddr
, mii_if
->phy_id
, MII_BMCR
);
1311 status
&= (~BMCR_ISOLATE
);
1313 mdio_write(ioaddr
, mii_if
->phy_id
, MII_BMCR
, status
);
1314 status
= mdio_read_latched(ioaddr
, mii_if
->phy_id
, MII_BMSR
);
1319 static void sis190_init_phy(struct net_device
*dev
, struct sis190_private
*tp
,
1320 struct sis190_phy
*phy
, unsigned int phy_id
,
1323 void __iomem
*ioaddr
= tp
->mmio_addr
;
1324 struct mii_chip_info
*p
;
1326 INIT_LIST_HEAD(&phy
->list
);
1327 phy
->status
= mii_status
;
1328 phy
->phy_id
= phy_id
;
1330 phy
->id
[0] = mdio_read(ioaddr
, phy_id
, MII_PHYSID1
);
1331 phy
->id
[1] = mdio_read(ioaddr
, phy_id
, MII_PHYSID2
);
1333 for (p
= mii_chip_table
; p
->type
; p
++) {
1334 if ((p
->id
[0] == phy
->id
[0]) &&
1335 (p
->id
[1] == (phy
->id
[1] & 0xfff0))) {
1341 phy
->type
= (p
->type
== MIX
) ?
1342 ((mii_status
& (BMSR_100FULL
| BMSR_100HALF
)) ?
1343 LAN
: HOME
) : p
->type
;
1344 tp
->features
|= p
->feature
;
1345 if (netif_msg_probe(tp
))
1346 pr_info("%s: %s transceiver at address %d\n",
1347 pci_name(tp
->pci_dev
), p
->name
, phy_id
);
1349 phy
->type
= UNKNOWN
;
1350 if (netif_msg_probe(tp
))
1351 pr_info("%s: unknown PHY 0x%x:0x%x transceiver at address %d\n",
1352 pci_name(tp
->pci_dev
),
1353 phy
->id
[0], (phy
->id
[1] & 0xfff0), phy_id
);
1357 static void sis190_mii_probe_88e1111_fixup(struct sis190_private
*tp
)
1359 if (tp
->features
& F_PHY_88E1111
) {
1360 void __iomem
*ioaddr
= tp
->mmio_addr
;
1361 int phy_id
= tp
->mii_if
.phy_id
;
1367 p
= (tp
->features
& F_HAS_RGMII
) ? reg
[0] : reg
[1];
1369 mdio_write(ioaddr
, phy_id
, 0x1b, p
[0]);
1371 mdio_write(ioaddr
, phy_id
, 0x14, p
[1]);
1377 * sis190_mii_probe - Probe MII PHY for sis190
1378 * @dev: the net device to probe for
1380 * Search for total of 32 possible mii phy addresses.
1381 * Identify and set current phy if found one,
1382 * return error if it failed to found.
1384 static int __devinit
sis190_mii_probe(struct net_device
*dev
)
1386 struct sis190_private
*tp
= netdev_priv(dev
);
1387 struct mii_if_info
*mii_if
= &tp
->mii_if
;
1388 void __iomem
*ioaddr
= tp
->mmio_addr
;
1392 INIT_LIST_HEAD(&tp
->first_phy
);
1394 for (phy_id
= 0; phy_id
< PHY_MAX_ADDR
; phy_id
++) {
1395 struct sis190_phy
*phy
;
1398 status
= mdio_read_latched(ioaddr
, phy_id
, MII_BMSR
);
1400 // Try next mii if the current one is not accessible.
1401 if (status
== 0xffff || status
== 0x0000)
1404 phy
= kmalloc(sizeof(*phy
), GFP_KERNEL
);
1406 sis190_free_phy(&tp
->first_phy
);
1411 sis190_init_phy(dev
, tp
, phy
, phy_id
, status
);
1413 list_add(&tp
->first_phy
, &phy
->list
);
1416 if (list_empty(&tp
->first_phy
)) {
1417 if (netif_msg_probe(tp
))
1418 pr_info("%s: No MII transceivers found!\n",
1419 pci_name(tp
->pci_dev
));
1424 /* Select default PHY for mac */
1425 sis190_default_phy(dev
);
1427 sis190_mii_probe_88e1111_fixup(tp
);
1430 mii_if
->mdio_read
= __mdio_read
;
1431 mii_if
->mdio_write
= __mdio_write
;
1432 mii_if
->phy_id_mask
= PHY_ID_ANY
;
1433 mii_if
->reg_num_mask
= MII_REG_ANY
;
1438 static void sis190_mii_remove(struct net_device
*dev
)
1440 struct sis190_private
*tp
= netdev_priv(dev
);
1442 sis190_free_phy(&tp
->first_phy
);
1445 static void sis190_release_board(struct pci_dev
*pdev
)
1447 struct net_device
*dev
= pci_get_drvdata(pdev
);
1448 struct sis190_private
*tp
= netdev_priv(dev
);
1450 iounmap(tp
->mmio_addr
);
1451 pci_release_regions(pdev
);
1452 pci_disable_device(pdev
);
1456 static struct net_device
* __devinit
sis190_init_board(struct pci_dev
*pdev
)
1458 struct sis190_private
*tp
;
1459 struct net_device
*dev
;
1460 void __iomem
*ioaddr
;
1463 dev
= alloc_etherdev(sizeof(*tp
));
1465 if (netif_msg_drv(&debug
))
1466 pr_err("unable to alloc new ethernet\n");
1471 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1473 tp
= netdev_priv(dev
);
1475 tp
->msg_enable
= netif_msg_init(debug
.msg_enable
, SIS190_MSG_DEFAULT
);
1477 rc
= pci_enable_device(pdev
);
1479 if (netif_msg_probe(tp
))
1480 pr_err("%s: enable failure\n", pci_name(pdev
));
1481 goto err_free_dev_1
;
1486 if (!(pci_resource_flags(pdev
, 0) & IORESOURCE_MEM
)) {
1487 if (netif_msg_probe(tp
))
1488 pr_err("%s: region #0 is no MMIO resource\n",
1490 goto err_pci_disable_2
;
1492 if (pci_resource_len(pdev
, 0) < SIS190_REGS_SIZE
) {
1493 if (netif_msg_probe(tp
))
1494 pr_err("%s: invalid PCI region size(s)\n",
1496 goto err_pci_disable_2
;
1499 rc
= pci_request_regions(pdev
, DRV_NAME
);
1501 if (netif_msg_probe(tp
))
1502 pr_err("%s: could not request regions\n",
1504 goto err_pci_disable_2
;
1507 rc
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
1509 if (netif_msg_probe(tp
))
1510 pr_err("%s: DMA configuration failed\n",
1512 goto err_free_res_3
;
1515 pci_set_master(pdev
);
1517 ioaddr
= ioremap(pci_resource_start(pdev
, 0), SIS190_REGS_SIZE
);
1519 if (netif_msg_probe(tp
))
1520 pr_err("%s: cannot remap MMIO, aborting\n",
1523 goto err_free_res_3
;
1527 tp
->mmio_addr
= ioaddr
;
1528 tp
->link_status
= LNK_OFF
;
1530 sis190_irq_mask_and_ack(ioaddr
);
1532 sis190_soft_reset(ioaddr
);
1537 pci_release_regions(pdev
);
1539 pci_disable_device(pdev
);
1547 static void sis190_tx_timeout(struct net_device
*dev
)
1549 struct sis190_private
*tp
= netdev_priv(dev
);
1550 void __iomem
*ioaddr
= tp
->mmio_addr
;
1553 /* Disable Tx, if not already */
1554 tmp8
= SIS_R8(TxControl
);
1555 if (tmp8
& CmdTxEnb
)
1556 SIS_W8(TxControl
, tmp8
& ~CmdTxEnb
);
1558 netif_info(tp
, tx_err
, dev
, "Transmit timeout, status %08x %08x\n",
1559 SIS_R32(TxControl
), SIS_R32(TxSts
));
1561 /* Disable interrupts by clearing the interrupt mask. */
1562 SIS_W32(IntrMask
, 0x0000);
1564 /* Stop a shared interrupt from scavenging while we are. */
1565 spin_lock_irq(&tp
->lock
);
1566 sis190_tx_clear(tp
);
1567 spin_unlock_irq(&tp
->lock
);
1569 /* ...and finally, reset everything. */
1570 sis190_hw_start(dev
);
1572 netif_wake_queue(dev
);
1575 static void sis190_set_rgmii(struct sis190_private
*tp
, u8 reg
)
1577 tp
->features
|= (reg
& 0x80) ? F_HAS_RGMII
: 0;
1580 static int __devinit
sis190_get_mac_addr_from_eeprom(struct pci_dev
*pdev
,
1581 struct net_device
*dev
)
1583 struct sis190_private
*tp
= netdev_priv(dev
);
1584 void __iomem
*ioaddr
= tp
->mmio_addr
;
1588 if (netif_msg_probe(tp
))
1589 pr_info("%s: Read MAC address from EEPROM\n", pci_name(pdev
));
1591 /* Check to see if there is a sane EEPROM */
1592 sig
= (u16
) sis190_read_eeprom(ioaddr
, EEPROMSignature
);
1594 if ((sig
== 0xffff) || (sig
== 0x0000)) {
1595 if (netif_msg_probe(tp
))
1596 pr_info("%s: Error EEPROM read %x\n",
1597 pci_name(pdev
), sig
);
1601 /* Get MAC address from EEPROM */
1602 for (i
= 0; i
< MAC_ADDR_LEN
/ 2; i
++) {
1603 u16 w
= sis190_read_eeprom(ioaddr
, EEPROMMACAddr
+ i
);
1605 ((__le16
*)dev
->dev_addr
)[i
] = cpu_to_le16(w
);
1608 sis190_set_rgmii(tp
, sis190_read_eeprom(ioaddr
, EEPROMInfo
));
1614 * sis190_get_mac_addr_from_apc - Get MAC address for SiS96x model
1616 * @dev: network device to get address for
1618 * SiS96x model, use APC CMOS RAM to store MAC address.
1619 * APC CMOS RAM is accessed through ISA bridge.
1620 * MAC address is read into @net_dev->dev_addr.
1622 static int __devinit
sis190_get_mac_addr_from_apc(struct pci_dev
*pdev
,
1623 struct net_device
*dev
)
1625 static const u16 __devinitdata ids
[] = { 0x0965, 0x0966, 0x0968 };
1626 struct sis190_private
*tp
= netdev_priv(dev
);
1627 struct pci_dev
*isa_bridge
;
1631 if (netif_msg_probe(tp
))
1632 pr_info("%s: Read MAC address from APC\n", pci_name(pdev
));
1634 for (i
= 0; i
< ARRAY_SIZE(ids
); i
++) {
1635 isa_bridge
= pci_get_device(PCI_VENDOR_ID_SI
, ids
[i
], NULL
);
1641 if (netif_msg_probe(tp
))
1642 pr_info("%s: Can not find ISA bridge\n",
1647 /* Enable port 78h & 79h to access APC Registers. */
1648 pci_read_config_byte(isa_bridge
, 0x48, &tmp8
);
1649 reg
= (tmp8
& ~0x02);
1650 pci_write_config_byte(isa_bridge
, 0x48, reg
);
1652 pci_read_config_byte(isa_bridge
, 0x48, ®
);
1654 for (i
= 0; i
< MAC_ADDR_LEN
; i
++) {
1655 outb(0x9 + i
, 0x78);
1656 dev
->dev_addr
[i
] = inb(0x79);
1662 sis190_set_rgmii(tp
, reg
);
1664 /* Restore the value to ISA Bridge */
1665 pci_write_config_byte(isa_bridge
, 0x48, tmp8
);
1666 pci_dev_put(isa_bridge
);
1672 * sis190_init_rxfilter - Initialize the Rx filter
1673 * @dev: network device to initialize
1675 * Set receive filter address to our MAC address
1676 * and enable packet filtering.
1678 static inline void sis190_init_rxfilter(struct net_device
*dev
)
1680 struct sis190_private
*tp
= netdev_priv(dev
);
1681 void __iomem
*ioaddr
= tp
->mmio_addr
;
1685 ctl
= SIS_R16(RxMacControl
);
1687 * Disable packet filtering before setting filter.
1688 * Note: SiS's driver writes 32 bits but RxMacControl is 16 bits
1689 * only and followed by RxMacAddr (6 bytes). Strange. -- FR
1691 SIS_W16(RxMacControl
, ctl
& ~0x0f00);
1693 for (i
= 0; i
< MAC_ADDR_LEN
; i
++)
1694 SIS_W8(RxMacAddr
+ i
, dev
->dev_addr
[i
]);
1696 SIS_W16(RxMacControl
, ctl
);
1700 static int __devinit
sis190_get_mac_addr(struct pci_dev
*pdev
,
1701 struct net_device
*dev
)
1705 rc
= sis190_get_mac_addr_from_eeprom(pdev
, dev
);
1709 pci_read_config_byte(pdev
, 0x73, ®
);
1711 if (reg
& 0x00000001)
1712 rc
= sis190_get_mac_addr_from_apc(pdev
, dev
);
1717 static void sis190_set_speed_auto(struct net_device
*dev
)
1719 struct sis190_private
*tp
= netdev_priv(dev
);
1720 void __iomem
*ioaddr
= tp
->mmio_addr
;
1721 int phy_id
= tp
->mii_if
.phy_id
;
1724 netif_info(tp
, link
, dev
, "Enabling Auto-negotiation\n");
1726 val
= mdio_read(ioaddr
, phy_id
, MII_ADVERTISE
);
1728 // Enable 10/100 Full/Half Mode, leave MII_ADVERTISE bit4:0
1730 mdio_write(ioaddr
, phy_id
, MII_ADVERTISE
, (val
& ADVERTISE_SLCT
) |
1731 ADVERTISE_100FULL
| ADVERTISE_10FULL
|
1732 ADVERTISE_100HALF
| ADVERTISE_10HALF
);
1734 // Enable 1000 Full Mode.
1735 mdio_write(ioaddr
, phy_id
, MII_CTRL1000
, ADVERTISE_1000FULL
);
1737 // Enable auto-negotiation and restart auto-negotiation.
1738 mdio_write(ioaddr
, phy_id
, MII_BMCR
,
1739 BMCR_ANENABLE
| BMCR_ANRESTART
| BMCR_RESET
);
1742 static int sis190_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1744 struct sis190_private
*tp
= netdev_priv(dev
);
1746 return mii_ethtool_gset(&tp
->mii_if
, cmd
);
1749 static int sis190_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1751 struct sis190_private
*tp
= netdev_priv(dev
);
1753 return mii_ethtool_sset(&tp
->mii_if
, cmd
);
1756 static void sis190_get_drvinfo(struct net_device
*dev
,
1757 struct ethtool_drvinfo
*info
)
1759 struct sis190_private
*tp
= netdev_priv(dev
);
1761 strcpy(info
->driver
, DRV_NAME
);
1762 strcpy(info
->version
, DRV_VERSION
);
1763 strcpy(info
->bus_info
, pci_name(tp
->pci_dev
));
1766 static int sis190_get_regs_len(struct net_device
*dev
)
1768 return SIS190_REGS_SIZE
;
1771 static void sis190_get_regs(struct net_device
*dev
, struct ethtool_regs
*regs
,
1774 struct sis190_private
*tp
= netdev_priv(dev
);
1775 unsigned long flags
;
1777 if (regs
->len
> SIS190_REGS_SIZE
)
1778 regs
->len
= SIS190_REGS_SIZE
;
1780 spin_lock_irqsave(&tp
->lock
, flags
);
1781 memcpy_fromio(p
, tp
->mmio_addr
, regs
->len
);
1782 spin_unlock_irqrestore(&tp
->lock
, flags
);
1785 static int sis190_nway_reset(struct net_device
*dev
)
1787 struct sis190_private
*tp
= netdev_priv(dev
);
1789 return mii_nway_restart(&tp
->mii_if
);
1792 static u32
sis190_get_msglevel(struct net_device
*dev
)
1794 struct sis190_private
*tp
= netdev_priv(dev
);
1796 return tp
->msg_enable
;
1799 static void sis190_set_msglevel(struct net_device
*dev
, u32 value
)
1801 struct sis190_private
*tp
= netdev_priv(dev
);
1803 tp
->msg_enable
= value
;
1806 static const struct ethtool_ops sis190_ethtool_ops
= {
1807 .get_settings
= sis190_get_settings
,
1808 .set_settings
= sis190_set_settings
,
1809 .get_drvinfo
= sis190_get_drvinfo
,
1810 .get_regs_len
= sis190_get_regs_len
,
1811 .get_regs
= sis190_get_regs
,
1812 .get_link
= ethtool_op_get_link
,
1813 .get_msglevel
= sis190_get_msglevel
,
1814 .set_msglevel
= sis190_set_msglevel
,
1815 .nway_reset
= sis190_nway_reset
,
1818 static int sis190_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1820 struct sis190_private
*tp
= netdev_priv(dev
);
1822 return !netif_running(dev
) ? -EINVAL
:
1823 generic_mii_ioctl(&tp
->mii_if
, if_mii(ifr
), cmd
, NULL
);
1826 static const struct net_device_ops sis190_netdev_ops
= {
1827 .ndo_open
= sis190_open
,
1828 .ndo_stop
= sis190_close
,
1829 .ndo_do_ioctl
= sis190_ioctl
,
1830 .ndo_start_xmit
= sis190_start_xmit
,
1831 .ndo_tx_timeout
= sis190_tx_timeout
,
1832 .ndo_set_multicast_list
= sis190_set_rx_mode
,
1833 .ndo_change_mtu
= eth_change_mtu
,
1834 .ndo_set_mac_address
= eth_mac_addr
,
1835 .ndo_validate_addr
= eth_validate_addr
,
1836 #ifdef CONFIG_NET_POLL_CONTROLLER
1837 .ndo_poll_controller
= sis190_netpoll
,
1841 static int __devinit
sis190_init_one(struct pci_dev
*pdev
,
1842 const struct pci_device_id
*ent
)
1844 static int printed_version
= 0;
1845 struct sis190_private
*tp
;
1846 struct net_device
*dev
;
1847 void __iomem
*ioaddr
;
1850 if (!printed_version
) {
1851 if (netif_msg_drv(&debug
))
1852 pr_info(SIS190_DRIVER_NAME
" loaded\n");
1853 printed_version
= 1;
1856 dev
= sis190_init_board(pdev
);
1862 pci_set_drvdata(pdev
, dev
);
1864 tp
= netdev_priv(dev
);
1865 ioaddr
= tp
->mmio_addr
;
1867 rc
= sis190_get_mac_addr(pdev
, dev
);
1869 goto err_release_board
;
1871 sis190_init_rxfilter(dev
);
1873 INIT_WORK(&tp
->phy_task
, sis190_phy_task
);
1875 dev
->netdev_ops
= &sis190_netdev_ops
;
1877 SET_ETHTOOL_OPS(dev
, &sis190_ethtool_ops
);
1878 dev
->irq
= pdev
->irq
;
1879 dev
->base_addr
= (unsigned long) 0xdead;
1880 dev
->watchdog_timeo
= SIS190_TX_TIMEOUT
;
1882 spin_lock_init(&tp
->lock
);
1884 rc
= sis190_mii_probe(dev
);
1886 goto err_release_board
;
1888 rc
= register_netdev(dev
);
1890 goto err_remove_mii
;
1892 if (netif_msg_probe(tp
)) {
1893 netdev_info(dev
, "%s: %s at %p (IRQ: %d), %pM\n",
1895 sis_chip_info
[ent
->driver_data
].name
,
1896 ioaddr
, dev
->irq
, dev
->dev_addr
);
1897 netdev_info(dev
, "%s mode.\n",
1898 (tp
->features
& F_HAS_RGMII
) ? "RGMII" : "GMII");
1901 netif_carrier_off(dev
);
1903 sis190_set_speed_auto(dev
);
1908 sis190_mii_remove(dev
);
1910 sis190_release_board(pdev
);
1914 static void __devexit
sis190_remove_one(struct pci_dev
*pdev
)
1916 struct net_device
*dev
= pci_get_drvdata(pdev
);
1918 sis190_mii_remove(dev
);
1919 flush_scheduled_work();
1920 unregister_netdev(dev
);
1921 sis190_release_board(pdev
);
1922 pci_set_drvdata(pdev
, NULL
);
1925 static struct pci_driver sis190_pci_driver
= {
1927 .id_table
= sis190_pci_tbl
,
1928 .probe
= sis190_init_one
,
1929 .remove
= __devexit_p(sis190_remove_one
),
1932 static int __init
sis190_init_module(void)
1934 return pci_register_driver(&sis190_pci_driver
);
1937 static void __exit
sis190_cleanup_module(void)
1939 pci_unregister_driver(&sis190_pci_driver
);
1942 module_init(sis190_init_module
);
1943 module_exit(sis190_cleanup_module
);