2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
4 * Copyright (c) 2003-2010 Chelsio Communications, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
38 #include <linux/types.h>
41 NCHAN
= 4, /* # of HW channels */
42 MAX_MTU
= 9600, /* max MAC MTU, excluding header + FCS */
43 EEPROMSIZE
= 17408, /* Serial EEPROM physical size */
44 EEPROMVSIZE
= 32768, /* Serial EEPROM virtual address space size */
45 RSS_NENTRIES
= 2048, /* # of entries in RSS mapping table */
46 TCB_SIZE
= 128, /* TCB size */
47 NMTUS
= 16, /* size of MTU table */
48 NCCTRL_WIN
= 32, /* # of congestion control windows */
49 NEXACT_MAC
= 336, /* # of exact MAC address filters */
50 L2T_SIZE
= 4096, /* # of L2T entries */
51 MBOX_LEN
= 64, /* mailbox size in bytes */
52 TRACE_LEN
= 112, /* length of trace data and mask */
53 FILTER_OPT_LEN
= 36, /* filter tuple width for optional components */
54 NWOL_PAT
= 8, /* # of WoL patterns */
55 WOL_PAT_LEN
= 128, /* length of WoL patterns */
59 SF_PAGE_SIZE
= 256, /* serial flash page size */
62 enum { RSP_TYPE_FLBUF
, RSP_TYPE_CPL
, RSP_TYPE_INTR
}; /* response entry types */
64 enum { MBOX_OWNER_NONE
, MBOX_OWNER_FW
, MBOX_OWNER_DRV
}; /* mailbox owners */
67 SGE_MAX_WR_LEN
= 512, /* max WR size in bytes */
68 SGE_NTIMERS
= 6, /* # of interrupt holdoff timer values */
69 SGE_NCOUNTERS
= 4, /* # of interrupt packet counter values */
71 SGE_TIMER_RSTRT_CNTR
= 6, /* restart RX packet threshold counter */
72 SGE_TIMER_UPD_CIDX
= 7, /* update cidx only */
74 SGE_EQ_IDXSIZE
= 64, /* egress queue pidx/cidx unit size */
76 SGE_INTRDST_PCI
= 0, /* interrupt destination is PCI-E */
77 SGE_INTRDST_IQ
= 1, /* destination is an ingress queue */
79 SGE_UPDATEDEL_NONE
= 0, /* ingress queue pidx update delivery */
80 SGE_UPDATEDEL_INTR
= 1, /* interrupt */
81 SGE_UPDATEDEL_STPG
= 2, /* status page */
82 SGE_UPDATEDEL_BOTH
= 3, /* interrupt and status page */
84 SGE_HOSTFCMODE_NONE
= 0, /* egress queue cidx updates */
85 SGE_HOSTFCMODE_IQ
= 1, /* sent to ingress queue */
86 SGE_HOSTFCMODE_STPG
= 2, /* sent to status page */
87 SGE_HOSTFCMODE_BOTH
= 3, /* ingress queue and status page */
89 SGE_FETCHBURSTMIN_16B
= 0,/* egress queue descriptor fetch minimum */
90 SGE_FETCHBURSTMIN_32B
= 1,
91 SGE_FETCHBURSTMIN_64B
= 2,
92 SGE_FETCHBURSTMIN_128B
= 3,
94 SGE_FETCHBURSTMAX_64B
= 0,/* egress queue descriptor fetch maximum */
95 SGE_FETCHBURSTMAX_128B
= 1,
96 SGE_FETCHBURSTMAX_256B
= 2,
97 SGE_FETCHBURSTMAX_512B
= 3,
99 SGE_CIDXFLUSHTHRESH_1
= 0,/* egress queue cidx flush threshold */
100 SGE_CIDXFLUSHTHRESH_2
= 1,
101 SGE_CIDXFLUSHTHRESH_4
= 2,
102 SGE_CIDXFLUSHTHRESH_8
= 3,
103 SGE_CIDXFLUSHTHRESH_16
= 4,
104 SGE_CIDXFLUSHTHRESH_32
= 5,
105 SGE_CIDXFLUSHTHRESH_64
= 6,
106 SGE_CIDXFLUSHTHRESH_128
= 7,
108 SGE_INGPADBOUNDARY_SHIFT
= 5,/* ingress queue pad boundary */
111 struct sge_qstat
{ /* data written to SGE queue status entries */
118 * Structure for last 128 bits of response descriptors
121 __be32 hdrbuflen_pidx
;
122 __be32 pldbuflen_qid
;
129 #define RSPD_NEWBUF 0x80000000U
130 #define RSPD_LEN(x) (((x) >> 0) & 0x7fffffffU)
131 #define RSPD_QID(x) RSPD_LEN(x)
133 #define RSPD_GEN(x) ((x) >> 7)
134 #define RSPD_TYPE(x) (((x) >> 4) & 3)
136 #define QINTR_CNT_EN 0x1
137 #define QINTR_TIMER_IDX(x) ((x) << 1)
138 #define QINTR_TIMER_IDX_GET(x) (((x) >> 1) & 0x7)
139 #endif /* __T4_HW_H */