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[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / mtd / maps / l440gx.c
blob95c49b59ad873152f55f18d22557d2d66675d0ae
1 /*
2 * BIOS Flash chip on Intel 440GX board.
4 * Bugs this currently does not work under linuxBIOS.
5 */
7 #include <linux/module.h>
8 #include <linux/pci.h>
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <asm/io.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/map.h>
15 #define PIIXE_IOBASE_RESOURCE 11
17 #define WINDOW_ADDR 0xfff00000
18 #define WINDOW_SIZE 0x00100000
19 #define BUSWIDTH 1
21 static u32 iobase;
22 #define IOBASE iobase
23 #define TRIBUF_PORT (IOBASE+0x37)
24 #define VPP_PORT (IOBASE+0x28)
26 static struct mtd_info *mymtd;
29 /* Is this really the vpp port? */
30 static void l440gx_set_vpp(struct map_info *map, int vpp)
32 unsigned long l;
34 l = inl(VPP_PORT);
35 if (vpp) {
36 l |= 1;
37 } else {
38 l &= ~1;
40 outl(l, VPP_PORT);
43 static struct map_info l440gx_map = {
44 .name = "L440GX BIOS",
45 .size = WINDOW_SIZE,
46 .bankwidth = BUSWIDTH,
47 .phys = WINDOW_ADDR,
50 static int __init init_l440gx(void)
52 struct pci_dev *dev, *pm_dev;
53 struct resource *pm_iobase;
54 __u16 word;
56 dev = pci_get_device(PCI_VENDOR_ID_INTEL,
57 PCI_DEVICE_ID_INTEL_82371AB_0, NULL);
59 pm_dev = pci_get_device(PCI_VENDOR_ID_INTEL,
60 PCI_DEVICE_ID_INTEL_82371AB_3, NULL);
62 pci_dev_put(dev);
64 if (!dev || !pm_dev) {
65 printk(KERN_NOTICE "L440GX flash mapping: failed to find PIIX4 ISA bridge, cannot continue\n");
66 pci_dev_put(pm_dev);
67 return -ENODEV;
70 l440gx_map.virt = ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE);
72 if (!l440gx_map.virt) {
73 printk(KERN_WARNING "Failed to ioremap L440GX flash region\n");
74 pci_dev_put(pm_dev);
75 return -ENOMEM;
77 simple_map_init(&l440gx_map);
78 printk(KERN_NOTICE "window_addr = 0x%08lx\n", (unsigned long)l440gx_map.virt);
80 /* Setup the pm iobase resource
81 * This code should move into some kind of generic bridge
82 * driver but for the moment I'm content with getting the
83 * allocation correct.
85 pm_iobase = &pm_dev->resource[PIIXE_IOBASE_RESOURCE];
86 if (!(pm_iobase->flags & IORESOURCE_IO)) {
87 pm_iobase->name = "pm iobase";
88 pm_iobase->start = 0;
89 pm_iobase->end = 63;
90 pm_iobase->flags = IORESOURCE_IO;
92 /* Put the current value in the resource */
93 pci_read_config_dword(pm_dev, 0x40, &iobase);
94 iobase &= ~1;
95 pm_iobase->start += iobase & ~1;
96 pm_iobase->end += iobase & ~1;
98 pci_dev_put(pm_dev);
100 /* Allocate the resource region */
101 if (pci_assign_resource(pm_dev, PIIXE_IOBASE_RESOURCE) != 0) {
102 pci_dev_put(dev);
103 pci_dev_put(pm_dev);
104 printk(KERN_WARNING "Could not allocate pm iobase resource\n");
105 iounmap(l440gx_map.virt);
106 return -ENXIO;
109 /* Set the iobase */
110 iobase = pm_iobase->start;
111 pci_write_config_dword(pm_dev, 0x40, iobase | 1);
114 /* Set XBCS# */
115 pci_read_config_word(dev, 0x4e, &word);
116 word |= 0x4;
117 pci_write_config_word(dev, 0x4e, word);
119 /* Supply write voltage to the chip */
120 l440gx_set_vpp(&l440gx_map, 1);
122 /* Enable the gate on the WE line */
123 outb(inb(TRIBUF_PORT) & ~1, TRIBUF_PORT);
125 printk(KERN_NOTICE "Enabled WE line to L440GX BIOS flash chip.\n");
127 mymtd = do_map_probe("jedec_probe", &l440gx_map);
128 if (!mymtd) {
129 printk(KERN_NOTICE "JEDEC probe on BIOS chip failed. Using ROM\n");
130 mymtd = do_map_probe("map_rom", &l440gx_map);
132 if (mymtd) {
133 mymtd->owner = THIS_MODULE;
135 add_mtd_device(mymtd);
136 return 0;
139 iounmap(l440gx_map.virt);
140 return -ENXIO;
143 static void __exit cleanup_l440gx(void)
145 del_mtd_device(mymtd);
146 map_destroy(mymtd);
148 iounmap(l440gx_map.virt);
151 module_init(init_l440gx);
152 module_exit(cleanup_l440gx);
154 MODULE_LICENSE("GPL");
155 MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
156 MODULE_DESCRIPTION("MTD map driver for BIOS chips on Intel L440GX motherboards");