GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / media / video / upd64031a.c
blob36c0c461d8be8af15d029c38b45ee2174ddca1d2
1 /*
2 * upd64031A - NEC Electronics Ghost Reduction for NTSC in Japan
4 * 2003 by T.Adachi <tadachi@tadachi-net.com>
5 * 2003 by Takeru KOMORIYA <komoriya@paken.org>
6 * 2006 by Hans Verkuil <hverkuil@xs4all.nl>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/i2c.h>
27 #include <linux/videodev2.h>
28 #include <linux/slab.h>
29 #include <media/v4l2-device.h>
30 #include <media/v4l2-chip-ident.h>
31 #include <media/v4l2-i2c-drv.h>
32 #include <media/upd64031a.h>
34 /* --------------------- read registers functions define -------------------- */
36 /* bit masks */
37 #define GR_MODE_MASK 0xc0
38 #define DIRECT_3DYCS_CONNECT_MASK 0xc0
39 #define SYNC_CIRCUIT_MASK 0xa0
41 /* -------------------------------------------------------------------------- */
43 MODULE_DESCRIPTION("uPD64031A driver");
44 MODULE_AUTHOR("T. Adachi, Takeru KOMORIYA, Hans Verkuil");
45 MODULE_LICENSE("GPL");
47 static int debug;
48 module_param(debug, int, 0644);
50 MODULE_PARM_DESC(debug, "Debug level (0-1)");
53 enum {
54 R00 = 0, R01, R02, R03, R04,
55 R05, R06, R07, R08, R09,
56 R0A, R0B, R0C, R0D, R0E, R0F,
57 /* unused registers
58 R10, R11, R12, R13, R14,
59 R15, R16, R17,
61 TOT_REGS
64 struct upd64031a_state {
65 struct v4l2_subdev sd;
66 u8 regs[TOT_REGS];
67 u8 gr_mode;
68 u8 direct_3dycs_connect;
69 u8 ext_comp_sync;
70 u8 ext_vert_sync;
73 static inline struct upd64031a_state *to_state(struct v4l2_subdev *sd)
75 return container_of(sd, struct upd64031a_state, sd);
78 static u8 upd64031a_init[] = {
79 0x00, 0xb8, 0x48, 0xd2, 0xe6,
80 0x03, 0x10, 0x0b, 0xaf, 0x7f,
81 0x00, 0x00, 0x1d, 0x5e, 0x00,
82 0xd0
85 /* ------------------------------------------------------------------------ */
87 static u8 upd64031a_read(struct v4l2_subdev *sd, u8 reg)
89 struct i2c_client *client = v4l2_get_subdevdata(sd);
90 u8 buf[2];
92 if (reg >= sizeof(buf))
93 return 0xff;
94 i2c_master_recv(client, buf, 2);
95 return buf[reg];
98 /* ------------------------------------------------------------------------ */
100 static void upd64031a_write(struct v4l2_subdev *sd, u8 reg, u8 val)
102 struct i2c_client *client = v4l2_get_subdevdata(sd);
103 u8 buf[2];
105 buf[0] = reg;
106 buf[1] = val;
107 v4l2_dbg(1, debug, sd, "write reg: %02X val: %02X\n", reg, val);
108 if (i2c_master_send(client, buf, 2) != 2)
109 v4l2_err(sd, "I/O error write 0x%02x/0x%02x\n", reg, val);
112 /* ------------------------------------------------------------------------ */
114 /* The input changed due to new input or channel changed */
115 static int upd64031a_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
117 struct upd64031a_state *state = to_state(sd);
118 u8 reg = state->regs[R00];
120 v4l2_dbg(1, debug, sd, "changed input or channel\n");
121 upd64031a_write(sd, R00, reg | 0x10);
122 upd64031a_write(sd, R00, reg & ~0x10);
123 return 0;
126 /* ------------------------------------------------------------------------ */
128 static int upd64031a_s_routing(struct v4l2_subdev *sd,
129 u32 input, u32 output, u32 config)
131 struct upd64031a_state *state = to_state(sd);
132 u8 r00, r05, r08;
134 state->gr_mode = (input & 3) << 6;
135 state->direct_3dycs_connect = (input & 0xc) << 4;
136 state->ext_comp_sync =
137 (input & UPD64031A_COMPOSITE_EXTERNAL) << 1;
138 state->ext_vert_sync =
139 (input & UPD64031A_VERTICAL_EXTERNAL) << 2;
140 r00 = (state->regs[R00] & ~GR_MODE_MASK) | state->gr_mode;
141 r05 = (state->regs[R00] & ~SYNC_CIRCUIT_MASK) |
142 state->ext_comp_sync | state->ext_vert_sync;
143 r08 = (state->regs[R08] & ~DIRECT_3DYCS_CONNECT_MASK) |
144 state->direct_3dycs_connect;
145 upd64031a_write(sd, R00, r00);
146 upd64031a_write(sd, R05, r05);
147 upd64031a_write(sd, R08, r08);
148 return upd64031a_s_frequency(sd, NULL);
151 static int upd64031a_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
153 struct i2c_client *client = v4l2_get_subdevdata(sd);
155 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_UPD64031A, 0);
158 static int upd64031a_log_status(struct v4l2_subdev *sd)
160 v4l2_info(sd, "Status: SA00=0x%02x SA01=0x%02x\n",
161 upd64031a_read(sd, 0), upd64031a_read(sd, 1));
162 return 0;
165 #ifdef CONFIG_VIDEO_ADV_DEBUG
166 static int upd64031a_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
168 struct i2c_client *client = v4l2_get_subdevdata(sd);
170 if (!v4l2_chip_match_i2c_client(client, &reg->match))
171 return -EINVAL;
172 if (!capable(CAP_SYS_ADMIN))
173 return -EPERM;
174 reg->val = upd64031a_read(sd, reg->reg & 0xff);
175 reg->size = 1;
176 return 0;
179 static int upd64031a_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
181 struct i2c_client *client = v4l2_get_subdevdata(sd);
183 if (!v4l2_chip_match_i2c_client(client, &reg->match))
184 return -EINVAL;
185 if (!capable(CAP_SYS_ADMIN))
186 return -EPERM;
187 upd64031a_write(sd, reg->reg & 0xff, reg->val & 0xff);
188 return 0;
190 #endif
192 /* ----------------------------------------------------------------------- */
194 static const struct v4l2_subdev_core_ops upd64031a_core_ops = {
195 .log_status = upd64031a_log_status,
196 .g_chip_ident = upd64031a_g_chip_ident,
197 #ifdef CONFIG_VIDEO_ADV_DEBUG
198 .g_register = upd64031a_g_register,
199 .s_register = upd64031a_s_register,
200 #endif
203 static const struct v4l2_subdev_tuner_ops upd64031a_tuner_ops = {
204 .s_frequency = upd64031a_s_frequency,
207 static const struct v4l2_subdev_video_ops upd64031a_video_ops = {
208 .s_routing = upd64031a_s_routing,
211 static const struct v4l2_subdev_ops upd64031a_ops = {
212 .core = &upd64031a_core_ops,
213 .tuner = &upd64031a_tuner_ops,
214 .video = &upd64031a_video_ops,
217 /* ------------------------------------------------------------------------ */
219 /* i2c implementation */
221 static int upd64031a_probe(struct i2c_client *client,
222 const struct i2c_device_id *id)
224 struct upd64031a_state *state;
225 struct v4l2_subdev *sd;
226 int i;
228 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
229 return -EIO;
231 v4l_info(client, "chip found @ 0x%x (%s)\n",
232 client->addr << 1, client->adapter->name);
234 state = kmalloc(sizeof(struct upd64031a_state), GFP_KERNEL);
235 if (state == NULL)
236 return -ENOMEM;
237 sd = &state->sd;
238 v4l2_i2c_subdev_init(sd, client, &upd64031a_ops);
239 memcpy(state->regs, upd64031a_init, sizeof(state->regs));
240 state->gr_mode = UPD64031A_GR_ON << 6;
241 state->direct_3dycs_connect = UPD64031A_3DYCS_COMPOSITE << 4;
242 state->ext_comp_sync = state->ext_vert_sync = 0;
243 for (i = 0; i < TOT_REGS; i++)
244 upd64031a_write(sd, i, state->regs[i]);
245 return 0;
248 static int upd64031a_remove(struct i2c_client *client)
250 struct v4l2_subdev *sd = i2c_get_clientdata(client);
252 v4l2_device_unregister_subdev(sd);
253 kfree(to_state(sd));
254 return 0;
257 /* ----------------------------------------------------------------------- */
259 static const struct i2c_device_id upd64031a_id[] = {
260 { "upd64031a", 0 },
263 MODULE_DEVICE_TABLE(i2c, upd64031a_id);
265 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
266 .name = "upd64031a",
267 .probe = upd64031a_probe,
268 .remove = upd64031a_remove,
269 .id_table = upd64031a_id,