2 * pluto2.c - Satelco Easywatch Mobile Terrestrial Receiver [DVB-T]
4 * Copyright (C) 2005 Andreas Oberritter <obi@linuxtv.org>
6 * based on pluto2.c 1.10 - http://instinct-wp8.no-ip.org/pluto/
7 * by Dany Salman <salmandany@yahoo.fr>
8 * Copyright (c) 2004 TDF
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <linux/i2c.h>
27 #include <linux/i2c-algo-bit.h>
28 #include <linux/init.h>
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/slab.h>
37 #include "dvb_demux.h"
38 #include "dvb_frontend.h"
43 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr
);
45 #define DRIVER_NAME "pluto2"
47 #define REG_PIDn(n) ((n) << 2) /* PID n pattern registers */
48 #define REG_PCAR 0x0020 /* PC address register */
49 #define REG_TSCR 0x0024 /* TS ctrl & status */
50 #define REG_MISC 0x0028 /* miscellaneous */
51 #define REG_MMAC 0x002c /* MSB MAC address */
52 #define REG_IMAC 0x0030 /* ISB MAC address */
53 #define REG_LMAC 0x0034 /* LSB MAC address */
54 #define REG_SPID 0x0038 /* SPI data */
55 #define REG_SLCS 0x003c /* serial links ctrl/status */
57 #define PID0_NOFIL (0x0001 << 16)
58 #define PIDn_ENP (0x0001 << 15)
59 #define PID0_END (0x0001 << 14)
60 #define PID0_AFIL (0x0001 << 13)
61 #define PIDn_PID (0x1fff << 0)
63 #define TSCR_NBPACKETS (0x00ff << 24)
64 #define TSCR_DEM (0x0001 << 17)
65 #define TSCR_DE (0x0001 << 16)
66 #define TSCR_RSTN (0x0001 << 15)
67 #define TSCR_MSKO (0x0001 << 14)
68 #define TSCR_MSKA (0x0001 << 13)
69 #define TSCR_MSKL (0x0001 << 12)
70 #define TSCR_OVR (0x0001 << 11)
71 #define TSCR_AFUL (0x0001 << 10)
72 #define TSCR_LOCK (0x0001 << 9)
73 #define TSCR_IACK (0x0001 << 8)
74 #define TSCR_ADEF (0x007f << 0)
76 #define MISC_DVR (0x0fff << 4)
77 #define MISC_ALED (0x0001 << 3)
78 #define MISC_FRST (0x0001 << 2)
79 #define MISC_LED1 (0x0001 << 1)
80 #define MISC_LED0 (0x0001 << 0)
82 #define SPID_SPIDR (0x00ff << 0)
84 #define SLCS_SCL (0x0001 << 7)
85 #define SLCS_SDA (0x0001 << 6)
86 #define SLCS_CSN (0x0001 << 2)
87 #define SLCS_OVR (0x0001 << 1)
88 #define SLCS_SWC (0x0001 << 0)
90 #define TS_DMA_PACKETS (8)
91 #define TS_DMA_BYTES (188 * TS_DMA_PACKETS)
93 #define I2C_ADDR_TDA10046 0x10
94 #define I2C_ADDR_TUA6034 0xc2
103 struct dmx_frontend hw_frontend
;
104 struct dmx_frontend mem_frontend
;
105 struct dmxdev dmxdev
;
106 struct dvb_adapter dvb_adapter
;
107 struct dvb_demux demux
;
108 struct dvb_frontend
*fe
;
109 struct dvb_net dvbnet
;
110 unsigned int full_ts_users
;
114 struct i2c_algo_bit_data i2c_bit
;
115 struct i2c_adapter i2c_adap
;
119 unsigned int overflow
;
124 u8 dma_buf
[TS_DMA_BYTES
];
128 static inline struct pluto
*feed_to_pluto(struct dvb_demux_feed
*feed
)
130 return container_of(feed
->demux
, struct pluto
, demux
);
133 static inline struct pluto
*frontend_to_pluto(struct dvb_frontend
*fe
)
135 return container_of(fe
->dvb
, struct pluto
, dvb_adapter
);
138 static inline u32
pluto_readreg(struct pluto
*pluto
, u32 reg
)
140 return readl(&pluto
->io_mem
[reg
]);
143 static inline void pluto_writereg(struct pluto
*pluto
, u32 reg
, u32 val
)
145 writel(val
, &pluto
->io_mem
[reg
]);
148 static inline void pluto_rw(struct pluto
*pluto
, u32 reg
, u32 mask
, u32 bits
)
150 u32 val
= readl(&pluto
->io_mem
[reg
]);
153 writel(val
, &pluto
->io_mem
[reg
]);
156 static void pluto_write_tscr(struct pluto
*pluto
, u32 val
)
158 /* set the number of packets */
160 val
|= TS_DMA_PACKETS
/ 2;
162 pluto_writereg(pluto
, REG_TSCR
, val
);
165 static void pluto_setsda(void *data
, int state
)
167 struct pluto
*pluto
= data
;
170 pluto_rw(pluto
, REG_SLCS
, SLCS_SDA
, SLCS_SDA
);
172 pluto_rw(pluto
, REG_SLCS
, SLCS_SDA
, 0);
175 static void pluto_setscl(void *data
, int state
)
177 struct pluto
*pluto
= data
;
180 pluto_rw(pluto
, REG_SLCS
, SLCS_SCL
, SLCS_SCL
);
182 pluto_rw(pluto
, REG_SLCS
, SLCS_SCL
, 0);
184 if ((state
) && (pluto
->i2cbug
== 0)) {
187 if ((!state
) && (pluto
->i2cbug
== 1))
188 pluto_setsda(pluto
, 1);
193 static int pluto_getsda(void *data
)
195 struct pluto
*pluto
= data
;
197 return pluto_readreg(pluto
, REG_SLCS
) & SLCS_SDA
;
200 static int pluto_getscl(void *data
)
202 struct pluto
*pluto
= data
;
204 return pluto_readreg(pluto
, REG_SLCS
) & SLCS_SCL
;
207 static void pluto_reset_frontend(struct pluto
*pluto
, int reenable
)
209 u32 val
= pluto_readreg(pluto
, REG_MISC
);
211 if (val
& MISC_FRST
) {
213 pluto_writereg(pluto
, REG_MISC
, val
);
217 pluto_writereg(pluto
, REG_MISC
, val
);
221 static void pluto_reset_ts(struct pluto
*pluto
, int reenable
)
223 u32 val
= pluto_readreg(pluto
, REG_TSCR
);
225 if (val
& TSCR_RSTN
) {
227 pluto_write_tscr(pluto
, val
);
231 pluto_write_tscr(pluto
, val
);
235 static void pluto_set_dma_addr(struct pluto
*pluto
)
237 pluto_writereg(pluto
, REG_PCAR
, pluto
->dma_addr
);
240 static int __devinit
pluto_dma_map(struct pluto
*pluto
)
242 pluto
->dma_addr
= pci_map_single(pluto
->pdev
, pluto
->dma_buf
,
243 TS_DMA_BYTES
, PCI_DMA_FROMDEVICE
);
245 return pci_dma_mapping_error(pluto
->pdev
, pluto
->dma_addr
);
248 static void pluto_dma_unmap(struct pluto
*pluto
)
250 pci_unmap_single(pluto
->pdev
, pluto
->dma_addr
,
251 TS_DMA_BYTES
, PCI_DMA_FROMDEVICE
);
254 static int pluto_start_feed(struct dvb_demux_feed
*f
)
256 struct pluto
*pluto
= feed_to_pluto(f
);
258 /* enable PID filtering */
259 if (pluto
->users
++ == 0)
260 pluto_rw(pluto
, REG_PIDn(0), PID0_AFIL
| PID0_NOFIL
, 0);
262 if ((f
->pid
< 0x2000) && (f
->index
< NHWFILTERS
))
263 pluto_rw(pluto
, REG_PIDn(f
->index
), PIDn_ENP
| PIDn_PID
, PIDn_ENP
| f
->pid
);
264 else if (pluto
->full_ts_users
++ == 0)
265 pluto_rw(pluto
, REG_PIDn(0), PID0_NOFIL
, PID0_NOFIL
);
270 static int pluto_stop_feed(struct dvb_demux_feed
*f
)
272 struct pluto
*pluto
= feed_to_pluto(f
);
274 /* disable PID filtering */
275 if (--pluto
->users
== 0)
276 pluto_rw(pluto
, REG_PIDn(0), PID0_AFIL
, PID0_AFIL
);
278 if ((f
->pid
< 0x2000) && (f
->index
< NHWFILTERS
))
279 pluto_rw(pluto
, REG_PIDn(f
->index
), PIDn_ENP
| PIDn_PID
, 0x1fff);
280 else if (--pluto
->full_ts_users
== 0)
281 pluto_rw(pluto
, REG_PIDn(0), PID0_NOFIL
, 0);
286 static void pluto_dma_end(struct pluto
*pluto
, unsigned int nbpackets
)
288 /* synchronize the DMA transfer with the CPU
289 * first so that we see updated contents. */
290 pci_dma_sync_single_for_cpu(pluto
->pdev
, pluto
->dma_addr
,
291 TS_DMA_BYTES
, PCI_DMA_FROMDEVICE
);
293 if ((nbpackets
== 0) || (nbpackets
> TS_DMA_PACKETS
)) {
295 while (pluto
->dma_buf
[i
] == 0x47)
299 pluto_reset_ts(pluto
, 1);
300 dev_printk(KERN_DEBUG
, &pluto
->pdev
->dev
, "resetting TS because of invalid packet counter\n");
304 dvb_dmx_swfilter_packets(&pluto
->demux
, pluto
->dma_buf
, nbpackets
);
306 /* clear the dma buffer. this is needed to be able to identify
307 * new valid ts packets above */
308 memset(pluto
->dma_buf
, 0, nbpackets
* 188);
310 /* reset the dma address */
311 pluto_set_dma_addr(pluto
);
313 /* sync the buffer and give it back to the card */
314 pci_dma_sync_single_for_device(pluto
->pdev
, pluto
->dma_addr
,
315 TS_DMA_BYTES
, PCI_DMA_FROMDEVICE
);
318 static irqreturn_t
pluto_irq(int irq
, void *dev_id
)
320 struct pluto
*pluto
= dev_id
;
323 /* check whether an interrupt occured on this device */
324 tscr
= pluto_readreg(pluto
, REG_TSCR
);
325 if (!(tscr
& (TSCR_DE
| TSCR_OVR
)))
328 if (tscr
== 0xffffffff) {
329 if (pluto
->dead
== 0)
330 dev_err(&pluto
->pdev
->dev
, "card has hung or been ejected.\n");
336 /* dma end interrupt */
337 if (tscr
& TSCR_DE
) {
338 pluto_dma_end(pluto
, (tscr
& TSCR_NBPACKETS
) >> 24);
339 /* overflow interrupt */
342 if (pluto
->overflow
) {
343 dev_err(&pluto
->pdev
->dev
, "overflow irq (%d)\n",
345 pluto_reset_ts(pluto
, 1);
348 } else if (tscr
& TSCR_OVR
) {
352 /* ACK the interrupt */
353 pluto_write_tscr(pluto
, tscr
| TSCR_IACK
);
358 static void __devinit
pluto_enable_irqs(struct pluto
*pluto
)
360 u32 val
= pluto_readreg(pluto
, REG_TSCR
);
362 /* disable AFUL and LOCK interrupts */
363 val
|= (TSCR_MSKA
| TSCR_MSKL
);
364 /* enable DMA and OVERFLOW interrupts */
365 val
&= ~(TSCR_DEM
| TSCR_MSKO
);
366 /* clear pending interrupts */
369 pluto_write_tscr(pluto
, val
);
372 static void pluto_disable_irqs(struct pluto
*pluto
)
374 u32 val
= pluto_readreg(pluto
, REG_TSCR
);
376 /* disable all interrupts */
377 val
|= (TSCR_DEM
| TSCR_MSKO
| TSCR_MSKA
| TSCR_MSKL
);
378 /* clear pending interrupts */
381 pluto_write_tscr(pluto
, val
);
384 static int __devinit
pluto_hw_init(struct pluto
*pluto
)
386 pluto_reset_frontend(pluto
, 1);
388 /* set automatic LED control by FPGA */
389 pluto_rw(pluto
, REG_MISC
, MISC_ALED
, MISC_ALED
);
391 /* set data endianess */
392 #ifdef __LITTLE_ENDIAN
393 pluto_rw(pluto
, REG_PIDn(0), PID0_END
, PID0_END
);
395 pluto_rw(pluto
, REG_PIDn(0), PID0_END
, 0);
397 /* map DMA and set address */
398 pluto_dma_map(pluto
);
399 pluto_set_dma_addr(pluto
);
401 /* enable interrupts */
402 pluto_enable_irqs(pluto
);
405 pluto_reset_ts(pluto
, 1);
410 static void pluto_hw_exit(struct pluto
*pluto
)
412 /* disable interrupts */
413 pluto_disable_irqs(pluto
);
415 pluto_reset_ts(pluto
, 0);
417 /* LED: disable automatic control, enable yellow, disable green */
418 pluto_rw(pluto
, REG_MISC
, MISC_ALED
| MISC_LED1
| MISC_LED0
, MISC_LED1
);
421 pluto_dma_unmap(pluto
);
423 pluto_reset_frontend(pluto
, 0);
426 static inline u32
divide(u32 numerator
, u32 denominator
)
428 if (denominator
== 0)
431 return DIV_ROUND_CLOSEST(numerator
, denominator
);
434 /* LG Innotek TDTE-E001P (Infineon TUA6034) */
435 static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend
*fe
,
436 struct dvb_frontend_parameters
*p
)
438 struct pluto
*pluto
= frontend_to_pluto(fe
);
445 // Fref * 3 = 500.000 Hz
448 //div = divide(p->frequency + 36166667, 166667);
449 div
= divide(p
->frequency
* 3, 500000) + 217;
450 buf
[0] = (div
>> 8) & 0x7f;
451 buf
[1] = (div
>> 0) & 0xff;
453 if (p
->frequency
< 611000000)
455 else if (p
->frequency
< 811000000)
463 if (p
->frequency
< 350000000)
468 if (p
->u
.ofdm
.bandwidth
== BANDWIDTH_8_MHZ
)
471 if (sizeof(buf
) == 6) {
476 buf
[5] = (0 << 7) | (2 << 4);
479 msg
.addr
= I2C_ADDR_TUA6034
>> 1;
482 msg
.len
= sizeof(buf
);
484 if (fe
->ops
.i2c_gate_ctrl
)
485 fe
->ops
.i2c_gate_ctrl(fe
, 1);
486 ret
= i2c_transfer(&pluto
->i2c_adap
, &msg
, 1);
495 static int pluto2_request_firmware(struct dvb_frontend
*fe
,
496 const struct firmware
**fw
, char *name
)
498 struct pluto
*pluto
= frontend_to_pluto(fe
);
500 return request_firmware(fw
, name
, &pluto
->pdev
->dev
);
503 static struct tda1004x_config pluto2_fe_config __devinitdata
= {
504 .demod_address
= I2C_ADDR_TDA10046
>> 1,
507 .xtal_freq
= TDA10046_XTAL_16M
,
508 .agc_config
= TDA10046_AGC_DEFAULT
,
509 .if_freq
= TDA10046_FREQ_3617
,
510 .request_firmware
= pluto2_request_firmware
,
513 static int __devinit
frontend_init(struct pluto
*pluto
)
517 pluto
->fe
= tda10046_attach(&pluto2_fe_config
, &pluto
->i2c_adap
);
519 dev_err(&pluto
->pdev
->dev
, "could not attach frontend\n");
522 pluto
->fe
->ops
.tuner_ops
.set_params
= lg_tdtpe001p_tuner_set_params
;
524 ret
= dvb_register_frontend(&pluto
->dvb_adapter
, pluto
->fe
);
526 if (pluto
->fe
->ops
.release
)
527 pluto
->fe
->ops
.release(pluto
->fe
);
534 static void __devinit
pluto_read_rev(struct pluto
*pluto
)
536 u32 val
= pluto_readreg(pluto
, REG_MISC
) & MISC_DVR
;
537 dev_info(&pluto
->pdev
->dev
, "board revision %d.%d\n",
538 (val
>> 12) & 0x0f, (val
>> 4) & 0xff);
541 static void __devinit
pluto_read_mac(struct pluto
*pluto
, u8
*mac
)
543 u32 val
= pluto_readreg(pluto
, REG_MMAC
);
544 mac
[0] = (val
>> 8) & 0xff;
545 mac
[1] = (val
>> 0) & 0xff;
547 val
= pluto_readreg(pluto
, REG_IMAC
);
548 mac
[2] = (val
>> 8) & 0xff;
549 mac
[3] = (val
>> 0) & 0xff;
551 val
= pluto_readreg(pluto
, REG_LMAC
);
552 mac
[4] = (val
>> 8) & 0xff;
553 mac
[5] = (val
>> 0) & 0xff;
555 dev_info(&pluto
->pdev
->dev
, "MAC %pM\n", mac
);
558 static int __devinit
pluto_read_serial(struct pluto
*pluto
)
560 struct pci_dev
*pdev
= pluto
->pdev
;
564 cis
= pci_iomap(pdev
, 1, 0);
568 dev_info(&pdev
->dev
, "S/N ");
570 for (i
= 0xe0; i
< 0x100; i
+= 4) {
571 u32 val
= readl(&cis
[i
]);
572 for (j
= 0; j
< 32; j
+= 8) {
573 if ((val
& 0xff) == 0xff)
575 printk("%c", val
& 0xff);
581 pci_iounmap(pdev
, cis
);
586 static int __devinit
pluto2_probe(struct pci_dev
*pdev
,
587 const struct pci_device_id
*ent
)
590 struct dvb_adapter
*dvb_adapter
;
591 struct dvb_demux
*dvbdemux
;
592 struct dmx_demux
*dmx
;
595 pluto
= kzalloc(sizeof(struct pluto
), GFP_KERNEL
);
601 ret
= pci_enable_device(pdev
);
605 /* enable interrupts */
606 pci_write_config_dword(pdev
, 0x6c, 0x8000);
608 ret
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
610 goto err_pci_disable_device
;
612 pci_set_master(pdev
);
614 ret
= pci_request_regions(pdev
, DRIVER_NAME
);
616 goto err_pci_disable_device
;
618 pluto
->io_mem
= pci_iomap(pdev
, 0, 0x40);
619 if (!pluto
->io_mem
) {
621 goto err_pci_release_regions
;
624 pci_set_drvdata(pdev
, pluto
);
626 ret
= request_irq(pdev
->irq
, pluto_irq
, IRQF_SHARED
, DRIVER_NAME
, pluto
);
628 goto err_pci_iounmap
;
630 ret
= pluto_hw_init(pluto
);
635 i2c_set_adapdata(&pluto
->i2c_adap
, pluto
);
636 strcpy(pluto
->i2c_adap
.name
, DRIVER_NAME
);
637 pluto
->i2c_adap
.owner
= THIS_MODULE
;
638 pluto
->i2c_adap
.class = I2C_CLASS_TV_DIGITAL
;
639 pluto
->i2c_adap
.dev
.parent
= &pdev
->dev
;
640 pluto
->i2c_adap
.algo_data
= &pluto
->i2c_bit
;
641 pluto
->i2c_bit
.data
= pluto
;
642 pluto
->i2c_bit
.setsda
= pluto_setsda
;
643 pluto
->i2c_bit
.setscl
= pluto_setscl
;
644 pluto
->i2c_bit
.getsda
= pluto_getsda
;
645 pluto
->i2c_bit
.getscl
= pluto_getscl
;
646 pluto
->i2c_bit
.udelay
= 10;
647 pluto
->i2c_bit
.timeout
= 10;
649 /* Raise SCL and SDA */
650 pluto_setsda(pluto
, 1);
651 pluto_setscl(pluto
, 1);
653 ret
= i2c_bit_add_bus(&pluto
->i2c_adap
);
655 goto err_pluto_hw_exit
;
658 ret
= dvb_register_adapter(&pluto
->dvb_adapter
, DRIVER_NAME
,
659 THIS_MODULE
, &pdev
->dev
, adapter_nr
);
661 goto err_i2c_del_adapter
;
663 dvb_adapter
= &pluto
->dvb_adapter
;
665 pluto_read_rev(pluto
);
666 pluto_read_serial(pluto
);
667 pluto_read_mac(pluto
, dvb_adapter
->proposed_mac
);
669 dvbdemux
= &pluto
->demux
;
670 dvbdemux
->filternum
= 256;
671 dvbdemux
->feednum
= 256;
672 dvbdemux
->start_feed
= pluto_start_feed
;
673 dvbdemux
->stop_feed
= pluto_stop_feed
;
674 dvbdemux
->dmx
.capabilities
= (DMX_TS_FILTERING
|
675 DMX_SECTION_FILTERING
| DMX_MEMORY_BASED_FILTERING
);
676 ret
= dvb_dmx_init(dvbdemux
);
678 goto err_dvb_unregister_adapter
;
680 dmx
= &dvbdemux
->dmx
;
682 pluto
->hw_frontend
.source
= DMX_FRONTEND_0
;
683 pluto
->mem_frontend
.source
= DMX_MEMORY_FE
;
684 pluto
->dmxdev
.filternum
= NHWFILTERS
;
685 pluto
->dmxdev
.demux
= dmx
;
687 ret
= dvb_dmxdev_init(&pluto
->dmxdev
, dvb_adapter
);
689 goto err_dvb_dmx_release
;
691 ret
= dmx
->add_frontend(dmx
, &pluto
->hw_frontend
);
693 goto err_dvb_dmxdev_release
;
695 ret
= dmx
->add_frontend(dmx
, &pluto
->mem_frontend
);
697 goto err_remove_hw_frontend
;
699 ret
= dmx
->connect_frontend(dmx
, &pluto
->hw_frontend
);
701 goto err_remove_mem_frontend
;
703 ret
= frontend_init(pluto
);
705 goto err_disconnect_frontend
;
707 dvb_net_init(dvb_adapter
, &pluto
->dvbnet
, dmx
);
711 err_disconnect_frontend
:
712 dmx
->disconnect_frontend(dmx
);
713 err_remove_mem_frontend
:
714 dmx
->remove_frontend(dmx
, &pluto
->mem_frontend
);
715 err_remove_hw_frontend
:
716 dmx
->remove_frontend(dmx
, &pluto
->hw_frontend
);
717 err_dvb_dmxdev_release
:
718 dvb_dmxdev_release(&pluto
->dmxdev
);
720 dvb_dmx_release(dvbdemux
);
721 err_dvb_unregister_adapter
:
722 dvb_unregister_adapter(dvb_adapter
);
724 i2c_del_adapter(&pluto
->i2c_adap
);
726 pluto_hw_exit(pluto
);
728 free_irq(pdev
->irq
, pluto
);
730 pci_iounmap(pdev
, pluto
->io_mem
);
731 err_pci_release_regions
:
732 pci_release_regions(pdev
);
733 err_pci_disable_device
:
734 pci_disable_device(pdev
);
736 pci_set_drvdata(pdev
, NULL
);
741 static void __devexit
pluto2_remove(struct pci_dev
*pdev
)
743 struct pluto
*pluto
= pci_get_drvdata(pdev
);
744 struct dvb_adapter
*dvb_adapter
= &pluto
->dvb_adapter
;
745 struct dvb_demux
*dvbdemux
= &pluto
->demux
;
746 struct dmx_demux
*dmx
= &dvbdemux
->dmx
;
749 dvb_net_release(&pluto
->dvbnet
);
751 dvb_unregister_frontend(pluto
->fe
);
753 dmx
->disconnect_frontend(dmx
);
754 dmx
->remove_frontend(dmx
, &pluto
->mem_frontend
);
755 dmx
->remove_frontend(dmx
, &pluto
->hw_frontend
);
756 dvb_dmxdev_release(&pluto
->dmxdev
);
757 dvb_dmx_release(dvbdemux
);
758 dvb_unregister_adapter(dvb_adapter
);
759 i2c_del_adapter(&pluto
->i2c_adap
);
760 pluto_hw_exit(pluto
);
761 free_irq(pdev
->irq
, pluto
);
762 pci_iounmap(pdev
, pluto
->io_mem
);
763 pci_release_regions(pdev
);
764 pci_disable_device(pdev
);
765 pci_set_drvdata(pdev
, NULL
);
769 #ifndef PCI_VENDOR_ID_SCM
770 #define PCI_VENDOR_ID_SCM 0x0432
772 #ifndef PCI_DEVICE_ID_PLUTO2
773 #define PCI_DEVICE_ID_PLUTO2 0x0001
776 static struct pci_device_id pluto2_id_table
[] __devinitdata
= {
778 .vendor
= PCI_VENDOR_ID_SCM
,
779 .device
= PCI_DEVICE_ID_PLUTO2
,
780 .subvendor
= PCI_ANY_ID
,
781 .subdevice
= PCI_ANY_ID
,
787 MODULE_DEVICE_TABLE(pci
, pluto2_id_table
);
789 static struct pci_driver pluto2_driver
= {
791 .id_table
= pluto2_id_table
,
792 .probe
= pluto2_probe
,
793 .remove
= __devexit_p(pluto2_remove
),
796 static int __init
pluto2_init(void)
798 return pci_register_driver(&pluto2_driver
);
801 static void __exit
pluto2_exit(void)
803 pci_unregister_driver(&pluto2_driver
);
806 module_init(pluto2_init
);
807 module_exit(pluto2_exit
);
809 MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>");
810 MODULE_DESCRIPTION("Pluto2 driver");
811 MODULE_LICENSE("GPL");