release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/media/dvb/frontends/tda10023.c

   1 /*
   2     TDA10023  - DVB-C decoder
   3     (as used in Philips CU1216-3 NIM and the Reelbox DVB-C tuner card)
   4
   5     Copyright (C) 2005 Georg Acher, BayCom GmbH (acher at baycom dot de)
   6     Copyright (c) 2006 Hartmut Birr (e9hack at gmail dot com)
   7
   8     Remotely based on tda10021.c
   9     Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
  10     Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
  11                    Support for TDA10021
  12
  13     This program is free software; you can redistribute it and/or modify
  14     it under the terms of the GNU General Public License as published by
  15     the Free Software Foundation; either version 2 of the License, or
  16     (at your option) any later version.
  17
  18     This program is distributed in the hope that it will be useful,
  19     but WITHOUT ANY WARRANTY; without even the implied warranty of
  20     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21     GNU General Public License for more details.
  22
  23     You should have received a copy of the GNU General Public License
  24     along with this program; if not, write to the Free Software
  25     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26 */
  27
  28 #include <linux/delay.h>
  29 #include <linux/errno.h>
  30 #include <linux/init.h>
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/string.h>
  34 #include <linux/slab.h>
  35
  36 #include <asm/div64.h>
  37
  38 #include "dvb_frontend.h"
  39 #include "tda1002x.h"
  40
  41 #define REG0_INIT_VAL 0x23
  42
  43 struct tda10023_state {
  44         struct i2c_adapter* i2c;
  45         /* configuration settings */
  46         const struct tda10023_config *config;
  47         struct dvb_frontend frontend;
  48
  49         u8 pwm;
  50         u8 reg0;
  51
  52         /* clock settings */
  53         u32 xtal;
  54         u8 pll_m;
  55         u8 pll_p;
  56         u8 pll_n;
  57         u32 sysclk;
  58 };
  59
  60 #define dprintk(x...)
  61
  62 static int verbose;
  63
  64 static u8 tda10023_readreg (struct tda10023_state* state, u8 reg)
  65 {
  66         u8 b0 [] = { reg };
  67         u8 b1 [] = { 0 };
  68         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
  69                                   { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
  70         int ret;
  71
  72         ret = i2c_transfer (state->i2c, msg, 2);
  73         if (ret != 2) {
  74                 int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
  75                 printk(KERN_ERR "DVB: TDA10023(%d): %s: readreg error "
  76                         "(reg == 0x%02x, ret == %i)\n",
  77                         num, __func__, reg, ret);
  78         }
  79         return b1[0];
  80 }
  81
  82 static int tda10023_writereg (struct tda10023_state* state, u8 reg, u8 data)
  83 {
  84         u8 buf[] = { reg, data };
  85         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
  86         int ret;
  87
  88         ret = i2c_transfer (state->i2c, &msg, 1);
  89         if (ret != 1) {
  90                 int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
  91                 printk(KERN_ERR "DVB: TDA10023(%d): %s, writereg error "
  92                         "(reg == 0x%02x, val == 0x%02x, ret == %i)\n",
  93                         num, __func__, reg, data, ret);
  94         }
  95         return (ret != 1) ? -EREMOTEIO : 0;
  96 }
  97
  98
  99 static int tda10023_writebit (struct tda10023_state* state, u8 reg, u8 mask,u8 data)
 100 {
 101         if (mask==0xff)
 102                 return tda10023_writereg(state, reg, data);
 103         else {
 104                 u8 val;
 105                 val=tda10023_readreg(state,reg);
 106                 val&=~mask;
 107                 val|=(data&mask);
 108                 return tda10023_writereg(state, reg, val);
 109         }
 110 }
 111
 112 static void tda10023_writetab(struct tda10023_state* state, u8* tab)
 113 {
 114         u8 r,m,v;
 115         while (1) {
 116                 r=*tab++;
 117                 m=*tab++;
 118                 v=*tab++;
 119                 if (r==0xff) {
 120                         if (m==0xff)
 121                                 break;
 122                         else
 123                                 msleep(m);
 124                 }
 125                 else
 126                         tda10023_writebit(state,r,m,v);
 127         }
 128 }
 129
 130 //get access to tuner
 131 static int lock_tuner(struct tda10023_state* state)
 132 {
 133         u8 buf[2] = { 0x0f, 0xc0 };
 134         struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
 135
 136         if(i2c_transfer(state->i2c, &msg, 1) != 1)
 137         {
 138                 printk("tda10023: lock tuner fails\n");
 139                 return -EREMOTEIO;
 140         }
 141         return 0;
 142 }
 143
 144 //release access from tuner
 145 static int unlock_tuner(struct tda10023_state* state)
 146 {
 147         u8 buf[2] = { 0x0f, 0x40 };
 148         struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
 149
 150         if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
 151         {
 152                 printk("tda10023: unlock tuner fails\n");
 153                 return -EREMOTEIO;
 154         }
 155         return 0;
 156 }
 157
 158 static int tda10023_setup_reg0 (struct tda10023_state* state, u8 reg0)
 159 {
 160         reg0 |= state->reg0 & 0x63;
 161
 162         tda10023_writereg (state, 0x00, reg0 & 0xfe);
 163         tda10023_writereg (state, 0x00, reg0 | 0x01);
 164
 165         state->reg0 = reg0;
 166         return 0;
 167 }
 168
 169 static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr)
 170 {
 171         s32 BDR;
 172         s32 BDRI;
 173         s16 SFIL=0;
 174         u16 NDEC = 0;
 175
 176         /* avoid floating point operations multiplying syscloc and divider
 177            by 10 */
 178         u32 sysclk_x_10 = state->sysclk * 10;
 179
 180         if (sr < (u32)(sysclk_x_10/984)) {
 181                 NDEC=3;
 182                 SFIL=1;
 183         } else if (sr < (u32)(sysclk_x_10/640)) {
 184                 NDEC=3;
 185                 SFIL=0;
 186         } else if (sr < (u32)(sysclk_x_10/492)) {
 187                 NDEC=2;
 188                 SFIL=1;
 189         } else if (sr < (u32)(sysclk_x_10/320)) {
 190                 NDEC=2;
 191                 SFIL=0;
 192         } else if (sr < (u32)(sysclk_x_10/246)) {
 193                 NDEC=1;
 194                 SFIL=1;
 195         } else if (sr < (u32)(sysclk_x_10/160)) {
 196                 NDEC=1;
 197                 SFIL=0;
 198         } else if (sr < (u32)(sysclk_x_10/123)) {
 199                 NDEC=0;
 200                 SFIL=1;
 201         }
 202
 203         BDRI = (state->sysclk)*16;
 204         BDRI>>=NDEC;
 205         BDRI +=sr/2;
 206         BDRI /=sr;
 207
 208         if (BDRI>255)
 209                 BDRI=255;
 210
 211         {
 212                 u64 BDRX;
 213
 214                 BDRX=1<<(24+NDEC);
 215                 BDRX*=sr;
 216                 do_div(BDRX, state->sysclk);    /* BDRX/=SYSCLK; */
 217
 218                 BDR=(s32)BDRX;
 219         }
 220         dprintk("Symbolrate %i, BDR %i BDRI %i, NDEC %i\n",
 221                 sr, BDR, BDRI, NDEC);
 222         tda10023_writebit (state, 0x03, 0xc0, NDEC<<6);
 223         tda10023_writereg (state, 0x0a, BDR&255);
 224         tda10023_writereg (state, 0x0b, (BDR>>8)&255);
 225         tda10023_writereg (state, 0x0c, (BDR>>16)&31);
 226         tda10023_writereg (state, 0x0d, BDRI);
 227         tda10023_writereg (state, 0x3d, (SFIL<<7));
 228         return 0;
 229 }
 230
 231 static int tda10023_init (struct dvb_frontend *fe)
 232 {
 233         struct tda10023_state* state = fe->demodulator_priv;
 234         u8 tda10023_inittab[] = {
 235 /*        reg  mask val */
 236 /* 000 */ 0x2a, 0xff, 0x02,  /* PLL3, Bypass, Power Down */
 237 /* 003 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
 238 /* 006 */ 0x2a, 0xff, 0x03,  /* PLL3, Bypass, Power Down */
 239 /* 009 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
 240                            /* PLL1 */
 241 /* 012 */ 0x28, 0xff, (state->pll_m-1),
 242                            /* PLL2 */
 243 /* 015 */ 0x29, 0xff, ((state->pll_p-1)<<6)|(state->pll_n-1),
 244                            /* GPR FSAMPLING=1 */
 245 /* 018 */ 0x00, 0xff, REG0_INIT_VAL,
 246 /* 021 */ 0x2a, 0xff, 0x08,  /* PLL3 PSACLK=1 */
 247 /* 024 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
 248 /* 027 */ 0x1f, 0xff, 0x00,  /* RESET */
 249 /* 030 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
 250 /* 033 */ 0xe6, 0x0c, 0x04,  /* RSCFG_IND */
 251 /* 036 */ 0x10, 0xc0, 0x80,  /* DECDVBCFG1 PBER=1 */
 252
 253 /* 039 */ 0x0e, 0xff, 0x82,  /* GAIN1 */
 254 /* 042 */ 0x03, 0x08, 0x08,  /* CLKCONF DYN=1 */
 255 /* 045 */ 0x2e, 0xbf, 0x30,  /* AGCCONF2 TRIAGC=0,POSAGC=ENAGCIF=1
 256                                        PPWMTUN=0 PPWMIF=0 */
 257 /* 048 */ 0x01, 0xff, 0x30,  /* AGCREF */
 258 /* 051 */ 0x1e, 0x84, 0x84,  /* CONTROL SACLK_ON=1 */
 259 /* 054 */ 0x1b, 0xff, 0xc8,  /* ADC TWOS=1 */
 260 /* 057 */ 0x3b, 0xff, 0xff,  /* IFMAX */
 261 /* 060 */ 0x3c, 0xff, 0x00,  /* IFMIN */
 262 /* 063 */ 0x34, 0xff, 0x00,  /* PWMREF */
 263 /* 066 */ 0x35, 0xff, 0xff,  /* TUNMAX */
 264 /* 069 */ 0x36, 0xff, 0x00,  /* TUNMIN */
 265 /* 072 */ 0x06, 0xff, 0x7f,  /* EQCONF1 POSI=7 ENADAPT=ENEQUAL=DFE=1 */
 266 /* 075 */ 0x1c, 0x30, 0x30,  /* EQCONF2 STEPALGO=SGNALGO=1 */
 267 /* 078 */ 0x37, 0xff, 0xf6,  /* DELTAF_LSB */
 268 /* 081 */ 0x38, 0xff, 0xff,  /* DELTAF_MSB */
 269 /* 084 */ 0x02, 0xff, 0x93,  /* AGCCONF1  IFS=1 KAGCIF=2 KAGCTUN=3 */
 270 /* 087 */ 0x2d, 0xff, 0xf6,  /* SWEEP SWPOS=1 SWDYN=7 SWSTEP=1 SWLEN=2 */
 271 /* 090 */ 0x04, 0x10, 0x00,  /* SWRAMP=1 */
 272 /* 093 */ 0x12, 0xff, TDA10023_OUTPUT_MODE_PARALLEL_B, /*
 273                                 INTP1 POCLKP=1 FEL=1 MFS=0 */
 274 /* 096 */ 0x2b, 0x01, 0xa1,  /* INTS1 */
 275 /* 099 */ 0x20, 0xff, 0x04,  /* INTP2 SWAPP=? MSBFIRSTP=? INTPSEL=? */
 276 /* 102 */ 0x2c, 0xff, 0x0d,  /* INTP/S TRIP=0 TRIS=0 */
 277 /* 105 */ 0xc4, 0xff, 0x00,
 278 /* 108 */ 0xc3, 0x30, 0x00,
 279 /* 111 */ 0xb5, 0xff, 0x19,  /* ERAGC_THD */
 280 /* 114 */ 0x00, 0x03, 0x01,  /* GPR, CLBS soft reset */
 281 /* 117 */ 0x00, 0x03, 0x03,  /* GPR, CLBS soft reset */
 282 /* 120 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
 283 /* 123 */ 0xff, 0xff, 0xff
 284 };
 285         dprintk("DVB: TDA10023(%d): init chip\n", fe->dvb->num);
 286
 287         /* override default values if set in config */
 288         if (state->config->deltaf) {
 289                 tda10023_inittab[80] = (state->config->deltaf & 0xff);
 290                 tda10023_inittab[83] = (state->config->deltaf >> 8);
 291         }
 292
 293         if (state->config->output_mode)
 294                 tda10023_inittab[95] = state->config->output_mode;
 295
 296         tda10023_writetab(state, tda10023_inittab);
 297
 298         return 0;
 299 }
 300
 301 static int tda10023_set_parameters (struct dvb_frontend *fe,
 302                             struct dvb_frontend_parameters *p)
 303 {
 304         struct tda10023_state* state = fe->demodulator_priv;
 305
 306         static int qamvals[6][6] = {
 307                 //  QAM   LOCKTHR  MSETH   AREF AGCREFNYQ  ERAGCNYQ_THD
 308                 { (5<<2),  0x78,    0x8c,   0x96,   0x78,   0x4c  },  // 4 QAM
 309                 { (0<<2),  0x87,    0xa2,   0x91,   0x8c,   0x57  },  // 16 QAM
 310                 { (1<<2),  0x64,    0x74,   0x96,   0x8c,   0x57  },  // 32 QAM
 311                 { (2<<2),  0x46,    0x43,   0x6a,   0x6a,   0x44  },  // 64 QAM
 312                 { (3<<2),  0x36,    0x34,   0x7e,   0x78,   0x4c  },  // 128 QAM
 313                 { (4<<2),  0x26,    0x23,   0x6c,   0x5c,   0x3c  },  // 256 QAM
 314         };
 315
 316         int qam = p->u.qam.modulation;
 317
 318         if (qam < 0 || qam > 5)
 319                 return -EINVAL;
 320
 321         if (fe->ops.tuner_ops.set_params) {
 322                 fe->ops.tuner_ops.set_params(fe, p);
 323                 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
 324         }
 325
 326         tda10023_set_symbolrate (state, p->u.qam.symbol_rate);
 327         tda10023_writereg (state, 0x05, qamvals[qam][1]);
 328         tda10023_writereg (state, 0x08, qamvals[qam][2]);
 329         tda10023_writereg (state, 0x09, qamvals[qam][3]);
 330         tda10023_writereg (state, 0xb4, qamvals[qam][4]);
 331         tda10023_writereg (state, 0xb6, qamvals[qam][5]);
 332
 333 //      tda10023_writereg (state, 0x04, (p->inversion?0x12:0x32));
 334 //      tda10023_writebit (state, 0x04, 0x60, (p->inversion?0:0x20));
 335         tda10023_writebit (state, 0x04, 0x40, 0x40);
 336         tda10023_setup_reg0 (state, qamvals[qam][0]);
 337
 338         return 0;
 339 }
 340
 341 static int tda10023_read_status(struct dvb_frontend* fe, fe_status_t* status)
 342 {
 343         struct tda10023_state* state = fe->demodulator_priv;
 344         int sync;
 345
 346         *status = 0;
 347
 348         //0x11[1] == CARLOCK -> Carrier locked
 349         //0x11[2] == FSYNC -> Frame synchronisation
 350         //0x11[3] == FEL -> Front End locked
 351         //0x11[6] == NODVB -> DVB Mode Information
 352         sync = tda10023_readreg (state, 0x11);
 353
 354         if (sync & 2)
 355                 *status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;
 356
 357         if (sync & 4)
 358                 *status |= FE_HAS_SYNC|FE_HAS_VITERBI;
 359
 360         if (sync & 8)
 361                 *status |= FE_HAS_LOCK;
 362
 363         return 0;
 364 }
 365
 366 static int tda10023_read_ber(struct dvb_frontend* fe, u32* ber)
 367 {
 368         struct tda10023_state* state = fe->demodulator_priv;
 369         u8 a,b,c;
 370         a=tda10023_readreg(state, 0x14);
 371         b=tda10023_readreg(state, 0x15);
 372         c=tda10023_readreg(state, 0x16)&0xf;
 373         tda10023_writebit (state, 0x10, 0xc0, 0x00);
 374
 375         *ber = a | (b<<8)| (c<<16);
 376         return 0;
 377 }
 378
 379 static int tda10023_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 380 {
 381         struct tda10023_state* state = fe->demodulator_priv;
 382         u8 ifgain=tda10023_readreg(state, 0x2f);
 383
 384         u16 gain = ((255-tda10023_readreg(state, 0x17))) + (255-ifgain)/16;
 385         // Max raw value is about 0xb0 -> Normalize to >0xf0 after 0x90
 386         if (gain>0x90)
 387                 gain=gain+2*(gain-0x90);
 388         if (gain>255)
 389                 gain=255;
 390
 391         *strength = (gain<<8)|gain;
 392         return 0;
 393 }
 394
 395 static int tda10023_read_snr(struct dvb_frontend* fe, u16* snr)
 396 {
 397         struct tda10023_state* state = fe->demodulator_priv;
 398
 399         u8 quality = ~tda10023_readreg(state, 0x18);
 400         *snr = (quality << 8) | quality;
 401         return 0;
 402 }
 403
 404 static int tda10023_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 405 {
 406         struct tda10023_state* state = fe->demodulator_priv;
 407         u8 a,b,c,d;
 408         a= tda10023_readreg (state, 0x74);
 409         b= tda10023_readreg (state, 0x75);
 410         c= tda10023_readreg (state, 0x76);
 411         d= tda10023_readreg (state, 0x77);
 412         *ucblocks = a | (b<<8)|(c<<16)|(d<<24);
 413
 414         tda10023_writebit (state, 0x10, 0x20,0x00);
 415         tda10023_writebit (state, 0x10, 0x20,0x20);
 416         tda10023_writebit (state, 0x13, 0x01, 0x00);
 417
 418         return 0;
 419 }
 420
 421 static int tda10023_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
 422 {
 423         struct tda10023_state* state = fe->demodulator_priv;
 424         int sync,inv;
 425         s8 afc = 0;
 426
 427         sync = tda10023_readreg(state, 0x11);
 428         afc = tda10023_readreg(state, 0x19);
 429         inv = tda10023_readreg(state, 0x04);
 430
 431         if (verbose) {
 432                 /* AFC only valid when carrier has been recovered */
 433                 printk(sync & 2 ? "DVB: TDA10023(%d): AFC (%d) %dHz\n" :
 434                                   "DVB: TDA10023(%d): [AFC (%d) %dHz]\n",
 435                         state->frontend.dvb->num, afc,
 436                        -((s32)p->u.qam.symbol_rate * afc) >> 10);
 437         }
 438
 439         p->inversion = (inv&0x20?0:1);
 440         p->u.qam.modulation = ((state->reg0 >> 2) & 7) + QAM_16;
 441
 442         p->u.qam.fec_inner = FEC_NONE;
 443         p->frequency = ((p->frequency + 31250) / 62500) * 62500;
 444
 445         if (sync & 2)
 446                 p->frequency -= ((s32)p->u.qam.symbol_rate * afc) >> 10;
 447
 448         return 0;
 449 }
 450
 451 static int tda10023_sleep(struct dvb_frontend* fe)
 452 {
 453         struct tda10023_state* state = fe->demodulator_priv;
 454
 455         tda10023_writereg (state, 0x1b, 0x02);  /* pdown ADC */
 456         tda10023_writereg (state, 0x00, 0x80);  /* standby */
 457
 458         return 0;
 459 }
 460
 461 static int tda10023_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
 462 {
 463         struct tda10023_state* state = fe->demodulator_priv;
 464
 465         if (enable) {
 466                 lock_tuner(state);
 467         } else {
 468                 unlock_tuner(state);
 469         }
 470         return 0;
 471 }
 472
 473 static void tda10023_release(struct dvb_frontend* fe)
 474 {
 475         struct tda10023_state* state = fe->demodulator_priv;
 476         kfree(state);
 477 }
 478
 479 static struct dvb_frontend_ops tda10023_ops;
 480
 481 struct dvb_frontend *tda10023_attach(const struct tda10023_config *config,
 482                                      struct i2c_adapter *i2c,
 483                                      u8 pwm)
 484 {
 485         struct tda10023_state* state = NULL;
 486
 487         /* allocate memory for the internal state */
 488         state = kzalloc(sizeof(struct tda10023_state), GFP_KERNEL);
 489         if (state == NULL) goto error;
 490
 491         /* setup the state */
 492         state->config = config;
 493         state->i2c = i2c;
 494
 495         /* wakeup if in standby */
 496         tda10023_writereg (state, 0x00, 0x33);
 497         /* check if the demod is there */
 498         if ((tda10023_readreg(state, 0x1a) & 0xf0) != 0x70) goto error;
 499
 500         /* create dvb_frontend */
 501         memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops));
 502         state->pwm = pwm;
 503         state->reg0 = REG0_INIT_VAL;
 504         if (state->config->xtal) {
 505                 state->xtal  = state->config->xtal;
 506                 state->pll_m = state->config->pll_m;
 507                 state->pll_p = state->config->pll_p;
 508                 state->pll_n = state->config->pll_n;
 509         } else {
 510                 /* set default values if not defined in config */
 511                 state->xtal  = 28920000;
 512                 state->pll_m = 8;
 513                 state->pll_p = 4;
 514                 state->pll_n = 1;
 515         }
 516
 517         /* calc sysclk */
 518         state->sysclk = (state->xtal * state->pll_m / \
 519                         (state->pll_n * state->pll_p));
 520
 521         state->frontend.ops.info.symbol_rate_min = (state->sysclk/2)/64;
 522         state->frontend.ops.info.symbol_rate_max = (state->sysclk/2)/4;
 523
 524         dprintk("DVB: TDA10023 %s: xtal:%d pll_m:%d pll_p:%d pll_n:%d\n",
 525                 __func__, state->xtal, state->pll_m, state->pll_p,
 526                 state->pll_n);
 527
 528         state->frontend.demodulator_priv = state;
 529         return &state->frontend;
 530
 531 error:
 532         kfree(state);
 533         return NULL;
 534 }
 535
 536 static struct dvb_frontend_ops tda10023_ops = {
 537
 538         .info = {
 539                 .name = "Philips TDA10023 DVB-C",
 540                 .type = FE_QAM,
 541                 .frequency_stepsize = 62500,
 542                 .frequency_min =  47000000,
 543                 .frequency_max = 862000000,
 544                 .symbol_rate_min = 0,  /* set in tda10023_attach */
 545                 .symbol_rate_max = 0,  /* set in tda10023_attach */
 546                 .caps = 0x400 | //FE_CAN_QAM_4
 547                         FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
 548                         FE_CAN_QAM_128 | FE_CAN_QAM_256 |
 549                         FE_CAN_FEC_AUTO
 550         },
 551
 552         .release = tda10023_release,
 553
 554         .init = tda10023_init,
 555         .sleep = tda10023_sleep,
 556         .i2c_gate_ctrl = tda10023_i2c_gate_ctrl,
 557
 558         .set_frontend = tda10023_set_parameters,
 559         .get_frontend = tda10023_get_frontend,
 560
 561         .read_status = tda10023_read_status,
 562         .read_ber = tda10023_read_ber,
 563         .read_signal_strength = tda10023_read_signal_strength,
 564         .read_snr = tda10023_read_snr,
 565         .read_ucblocks = tda10023_read_ucblocks,
 566 };
 567
 568
 569 MODULE_DESCRIPTION("Philips TDA10023 DVB-C demodulator driver");
 570 MODULE_AUTHOR("Georg Acher, Hartmut Birr");
 571 MODULE_LICENSE("GPL");
 572
 573 EXPORT_SYMBOL(tda10023_attach);