[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / gpu / drm / radeon / r420d.h
| blob | fc78d31a0b4afe727d0e8bc987ba803e10fede02 |
1 /*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28 #ifndef R420D_H
29 #define R420D_H
31 #define R_0001F8_MC_IND_INDEX 0x0001F8
32 #define S_0001F8_MC_IND_ADDR(x) (((x) & 0x7F) << 0)
33 #define G_0001F8_MC_IND_ADDR(x) (((x) >> 0) & 0x7F)
34 #define C_0001F8_MC_IND_ADDR 0xFFFFFF80
35 #define S_0001F8_MC_IND_WR_EN(x) (((x) & 0x1) << 8)
36 #define G_0001F8_MC_IND_WR_EN(x) (((x) >> 8) & 0x1)
37 #define C_0001F8_MC_IND_WR_EN 0xFFFFFEFF
38 #define R_0001FC_MC_IND_DATA 0x0001FC
39 #define S_0001FC_MC_IND_DATA(x) (((x) & 0xFFFFFFFF) << 0)
40 #define G_0001FC_MC_IND_DATA(x) (((x) >> 0) & 0xFFFFFFFF)
41 #define C_0001FC_MC_IND_DATA 0x00000000
42 #define R_0007C0_CP_STAT 0x0007C0
43 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0)
44 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1)
45 #define C_0007C0_MRU_BUSY 0xFFFFFFFE
46 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1)
47 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1)
48 #define C_0007C0_MWU_BUSY 0xFFFFFFFD
49 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2)
50 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1)
51 #define C_0007C0_RSIU_BUSY 0xFFFFFFFB
52 #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3)
53 #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1)
54 #define C_0007C0_RCIU_BUSY 0xFFFFFFF7
55 #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9)
56 #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1)
57 #define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF
58 #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10)
59 #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1)
60 #define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF
61 #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11)
62 #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1)
63 #define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF
64 #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12)
65 #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1)
66 #define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF
67 #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13)
68 #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1)
69 #define C_0007C0_CSI_BUSY 0xFFFFDFFF
70 #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14)
71 #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1)
72 #define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF
73 #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15)
74 #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1)
75 #define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF
76 #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28)
77 #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1)
78 #define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF
79 #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29)
80 #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1)
81 #define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF
82 #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30)
83 #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1)
84 #define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF
85 #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31)
86 #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1)
87 #define C_0007C0_CP_BUSY 0x7FFFFFFF
88 #define R_000E40_RBBM_STATUS 0x000E40
89 #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0)
90 #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F)
91 #define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80
92 #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8)
93 #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1)
94 #define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF
95 #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9)
96 #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1)
97 #define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF
98 #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10)
99 #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1)
100 #define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF
101 #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11)
102 #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1)
103 #define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF
104 #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12)
105 #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1)
106 #define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF
107 #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13)
108 #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1)
109 #define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF
110 #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14)
111 #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1)
112 #define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF
113 #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15)
114 #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1)
115 #define C_000E40_ENG_EV_BUSY 0xFFFF7FFF
116 #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16)
117 #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1)
118 #define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF
119 #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17)
120 #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1)
121 #define C_000E40_E2_BUSY 0xFFFDFFFF
122 #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18)
123 #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1)
124 #define C_000E40_RB2D_BUSY 0xFFFBFFFF
125 #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19)
126 #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1)
127 #define C_000E40_RB3D_BUSY 0xFFF7FFFF
128 #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20)
129 #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1)
130 #define C_000E40_VAP_BUSY 0xFFEFFFFF
131 #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21)
132 #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1)
133 #define C_000E40_RE_BUSY 0xFFDFFFFF
134 #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22)
135 #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1)
136 #define C_000E40_TAM_BUSY 0xFFBFFFFF
137 #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23)
138 #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1)
139 #define C_000E40_TDM_BUSY 0xFF7FFFFF
140 #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24)
141 #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1)
142 #define C_000E40_PB_BUSY 0xFEFFFFFF
143 #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25)
144 #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1)
145 #define C_000E40_TIM_BUSY 0xFDFFFFFF
146 #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26)
147 #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1)
148 #define C_000E40_GA_BUSY 0xFBFFFFFF
149 #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27)
150 #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1)
151 #define C_000E40_CBA2D_BUSY 0xF7FFFFFF
152 #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31)
153 #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1)
154 #define C_000E40_GUI_ACTIVE 0x7FFFFFFF
156 /* CLK registers */
157 #define R_00000D_SCLK_CNTL 0x00000D
158 #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0)
159 #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7)
160 #define C_00000D_SCLK_SRC_SEL 0xFFFFFFF8
161 #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3)
162 #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1)
163 #define C_00000D_CP_MAX_DYN_STOP_LAT 0xFFFFFFF7
164 #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4)
165 #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1)
166 #define C_00000D_HDP_MAX_DYN_STOP_LAT 0xFFFFFFEF
167 #define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5)
168 #define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1)
169 #define C_00000D_TV_MAX_DYN_STOP_LAT 0xFFFFFFDF
170 #define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6)
171 #define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1)
172 #define C_00000D_E2_MAX_DYN_STOP_LAT 0xFFFFFFBF
173 #define S_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 7)
174 #define G_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) >> 7) & 0x1)
175 #define C_00000D_SE_MAX_DYN_STOP_LAT 0xFFFFFF7F
176 #define S_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 8)
177 #define G_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 8) & 0x1)
178 #define C_00000D_IDCT_MAX_DYN_STOP_LAT 0xFFFFFEFF
179 #define S_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 9)
180 #define G_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) >> 9) & 0x1)
181 #define C_00000D_VIP_MAX_DYN_STOP_LAT 0xFFFFFDFF
182 #define S_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 10)
183 #define G_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) >> 10) & 0x1)
184 #define C_00000D_RE_MAX_DYN_STOP_LAT 0xFFFFFBFF
185 #define S_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 11)
186 #define G_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) >> 11) & 0x1)
187 #define C_00000D_PB_MAX_DYN_STOP_LAT 0xFFFFF7FF
188 #define S_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 12)
189 #define G_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) >> 12) & 0x1)
190 #define C_00000D_TAM_MAX_DYN_STOP_LAT 0xFFFFEFFF
191 #define S_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 13)
192 #define G_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) >> 13) & 0x1)
193 #define C_00000D_TDM_MAX_DYN_STOP_LAT 0xFFFFDFFF
194 #define S_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 14)
195 #define G_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) >> 14) & 0x1)
196 #define C_00000D_RB_MAX_DYN_STOP_LAT 0xFFFFBFFF
197 #define S_00000D_FORCE_DISP2(x) (((x) & 0x1) << 15)
198 #define G_00000D_FORCE_DISP2(x) (((x) >> 15) & 0x1)
199 #define C_00000D_FORCE_DISP2 0xFFFF7FFF
200 #define S_00000D_FORCE_CP(x) (((x) & 0x1) << 16)
201 #define G_00000D_FORCE_CP(x) (((x) >> 16) & 0x1)
202 #define C_00000D_FORCE_CP 0xFFFEFFFF
203 #define S_00000D_FORCE_HDP(x) (((x) & 0x1) << 17)
204 #define G_00000D_FORCE_HDP(x) (((x) >> 17) & 0x1)
205 #define C_00000D_FORCE_HDP 0xFFFDFFFF
206 #define S_00000D_FORCE_DISP1(x) (((x) & 0x1) << 18)
207 #define G_00000D_FORCE_DISP1(x) (((x) >> 18) & 0x1)
208 #define C_00000D_FORCE_DISP1 0xFFFBFFFF
209 #define S_00000D_FORCE_TOP(x) (((x) & 0x1) << 19)
210 #define G_00000D_FORCE_TOP(x) (((x) >> 19) & 0x1)
211 #define C_00000D_FORCE_TOP 0xFFF7FFFF
212 #define S_00000D_FORCE_E2(x) (((x) & 0x1) << 20)
213 #define G_00000D_FORCE_E2(x) (((x) >> 20) & 0x1)
214 #define C_00000D_FORCE_E2 0xFFEFFFFF
215 #define S_00000D_FORCE_VAP(x) (((x) & 0x1) << 21)
216 #define G_00000D_FORCE_VAP(x) (((x) >> 21) & 0x1)
217 #define C_00000D_FORCE_VAP 0xFFDFFFFF
218 #define S_00000D_FORCE_IDCT(x) (((x) & 0x1) << 22)
219 #define G_00000D_FORCE_IDCT(x) (((x) >> 22) & 0x1)
220 #define C_00000D_FORCE_IDCT 0xFFBFFFFF
221 #define S_00000D_FORCE_VIP(x) (((x) & 0x1) << 23)
222 #define G_00000D_FORCE_VIP(x) (((x) >> 23) & 0x1)
223 #define C_00000D_FORCE_VIP 0xFF7FFFFF
224 #define S_00000D_FORCE_RE(x) (((x) & 0x1) << 24)
225 #define G_00000D_FORCE_RE(x) (((x) >> 24) & 0x1)
226 #define C_00000D_FORCE_RE 0xFEFFFFFF
227 #define S_00000D_FORCE_SR(x) (((x) & 0x1) << 25)
228 #define G_00000D_FORCE_SR(x) (((x) >> 25) & 0x1)
229 #define C_00000D_FORCE_SR 0xFDFFFFFF
230 #define S_00000D_FORCE_PX(x) (((x) & 0x1) << 26)
231 #define G_00000D_FORCE_PX(x) (((x) >> 26) & 0x1)
232 #define C_00000D_FORCE_PX 0xFBFFFFFF
233 #define S_00000D_FORCE_TX(x) (((x) & 0x1) << 27)
234 #define G_00000D_FORCE_TX(x) (((x) >> 27) & 0x1)
235 #define C_00000D_FORCE_TX 0xF7FFFFFF
236 #define S_00000D_FORCE_US(x) (((x) & 0x1) << 28)
237 #define G_00000D_FORCE_US(x) (((x) >> 28) & 0x1)
238 #define C_00000D_FORCE_US 0xEFFFFFFF
239 #define S_00000D_FORCE_TV_SCLK(x) (((x) & 0x1) << 29)
240 #define G_00000D_FORCE_TV_SCLK(x) (((x) >> 29) & 0x1)
241 #define C_00000D_FORCE_TV_SCLK 0xDFFFFFFF
242 #define S_00000D_FORCE_SU(x) (((x) & 0x1) << 30)
243 #define G_00000D_FORCE_SU(x) (((x) >> 30) & 0x1)
244 #define C_00000D_FORCE_SU 0xBFFFFFFF
245 #define S_00000D_FORCE_OV0(x) (((x) & 0x1) << 31)
246 #define G_00000D_FORCE_OV0(x) (((x) >> 31) & 0x1)
247 #define C_00000D_FORCE_OV0 0x7FFFFFFF
249 #endif