2 * RocketPort device driver for Linux
4 * Written by Theodore Ts'o, 1995, 1996, 1997, 1998, 1999, 2000.
6 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2003 by Comtrol, Inc.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * Kernel Synchronization:
26 * This driver has 2 kernel control paths - exception handlers (calls into the driver
27 * from user mode) and the timer bottom half (tasklet). This is a polled driver, interrupts
31 * - rp_table[], accessed through passed "info" pointers, is a global (static) array of
32 * serial port state information and the xmit_buf circular buffer. Protected by
33 * a per port spinlock.
34 * - xmit_flags[], an array of ints indexed by line (port) number, indicating that there
35 * is data to be transmitted. Protected by atomic bit operations.
36 * - rp_num_ports, int indicating number of open ports, protected by atomic operations.
38 * rp_write() and rp_write_char() functions use a per port semaphore to protect against
39 * simultaneous access to the same port by more than one process.
42 /****** Defines ******/
43 #define ROCKET_PARANOIA_CHECK
44 #define ROCKET_DISABLE_SIMUSAGE
46 #undef ROCKET_SOFT_FLOW
47 #undef ROCKET_DEBUG_OPEN
48 #undef ROCKET_DEBUG_INTR
49 #undef ROCKET_DEBUG_WRITE
50 #undef ROCKET_DEBUG_FLOW
51 #undef ROCKET_DEBUG_THROTTLE
52 #undef ROCKET_DEBUG_WAIT_UNTIL_SENT
53 #undef ROCKET_DEBUG_RECEIVE
54 #undef ROCKET_DEBUG_HANGUP
56 #undef ROCKET_DEBUG_IO
58 #define POLL_PERIOD HZ/100 /* Polling period .01 seconds (10ms) */
60 /****** Kernel includes ******/
62 #include <linux/module.h>
63 #include <linux/errno.h>
64 #include <linux/major.h>
65 #include <linux/kernel.h>
66 #include <linux/signal.h>
67 #include <linux/slab.h>
69 #include <linux/sched.h>
70 #include <linux/timer.h>
71 #include <linux/interrupt.h>
72 #include <linux/tty.h>
73 #include <linux/tty_driver.h>
74 #include <linux/tty_flip.h>
75 #include <linux/serial.h>
76 #include <linux/string.h>
77 #include <linux/fcntl.h>
78 #include <linux/ptrace.h>
79 #include <linux/mutex.h>
80 #include <linux/ioport.h>
81 #include <linux/delay.h>
82 #include <linux/completion.h>
83 #include <linux/wait.h>
84 #include <linux/pci.h>
85 #include <linux/uaccess.h>
86 #include <asm/atomic.h>
87 #include <asm/unaligned.h>
88 #include <linux/bitops.h>
89 #include <linux/spinlock.h>
90 #include <linux/init.h>
92 /****** RocketPort includes ******/
94 #include "rocket_int.h"
97 #define ROCKET_VERSION "2.09"
98 #define ROCKET_DATE "12-June-2003"
100 /****** RocketPort Local Variables ******/
102 static void rp_do_poll(unsigned long dummy
);
104 static struct tty_driver
*rocket_driver
;
106 static struct rocket_version driver_version
= {
107 ROCKET_VERSION
, ROCKET_DATE
110 static struct r_port
*rp_table
[MAX_RP_PORTS
]; /* The main repository of serial port state information. */
111 static unsigned int xmit_flags
[NUM_BOARDS
]; /* Bit significant, indicates port had data to transmit. */
112 /* eg. Bit 0 indicates port 0 has xmit data, ... */
113 static atomic_t rp_num_ports_open
; /* Number of serial ports open */
114 static DEFINE_TIMER(rocket_timer
, rp_do_poll
, 0, 0);
116 static unsigned long board1
; /* ISA addresses, retrieved from rocketport.conf */
117 static unsigned long board2
;
118 static unsigned long board3
;
119 static unsigned long board4
;
120 static unsigned long controller
;
121 static int support_low_speed
;
122 static unsigned long modem1
;
123 static unsigned long modem2
;
124 static unsigned long modem3
;
125 static unsigned long modem4
;
126 static unsigned long pc104_1
[8];
127 static unsigned long pc104_2
[8];
128 static unsigned long pc104_3
[8];
129 static unsigned long pc104_4
[8];
130 static unsigned long *pc104
[4] = { pc104_1
, pc104_2
, pc104_3
, pc104_4
};
132 static int rp_baud_base
[NUM_BOARDS
]; /* Board config info (Someday make a per-board structure) */
133 static unsigned long rcktpt_io_addr
[NUM_BOARDS
];
134 static int rcktpt_type
[NUM_BOARDS
];
135 static int is_PCI
[NUM_BOARDS
];
136 static rocketModel_t rocketModel
[NUM_BOARDS
];
137 static int max_board
;
138 static const struct tty_port_operations rocket_port_ops
;
141 * The following arrays define the interrupt bits corresponding to each AIOP.
142 * These bits are different between the ISA and regular PCI boards and the
143 * Universal PCI boards.
146 static Word_t aiop_intr_bits
[AIOP_CTL_SIZE
] = {
153 static Word_t upci_aiop_intr_bits
[AIOP_CTL_SIZE
] = {
154 UPCI_AIOP_INTR_BIT_0
,
155 UPCI_AIOP_INTR_BIT_1
,
156 UPCI_AIOP_INTR_BIT_2
,
160 static Byte_t RData
[RDATASIZE
] = {
161 0x00, 0x09, 0xf6, 0x82,
162 0x02, 0x09, 0x86, 0xfb,
163 0x04, 0x09, 0x00, 0x0a,
164 0x06, 0x09, 0x01, 0x0a,
165 0x08, 0x09, 0x8a, 0x13,
166 0x0a, 0x09, 0xc5, 0x11,
167 0x0c, 0x09, 0x86, 0x85,
168 0x0e, 0x09, 0x20, 0x0a,
169 0x10, 0x09, 0x21, 0x0a,
170 0x12, 0x09, 0x41, 0xff,
171 0x14, 0x09, 0x82, 0x00,
172 0x16, 0x09, 0x82, 0x7b,
173 0x18, 0x09, 0x8a, 0x7d,
174 0x1a, 0x09, 0x88, 0x81,
175 0x1c, 0x09, 0x86, 0x7a,
176 0x1e, 0x09, 0x84, 0x81,
177 0x20, 0x09, 0x82, 0x7c,
178 0x22, 0x09, 0x0a, 0x0a
181 static Byte_t RRegData
[RREGDATASIZE
] = {
182 0x00, 0x09, 0xf6, 0x82, /* 00: Stop Rx processor */
183 0x08, 0x09, 0x8a, 0x13, /* 04: Tx software flow control */
184 0x0a, 0x09, 0xc5, 0x11, /* 08: XON char */
185 0x0c, 0x09, 0x86, 0x85, /* 0c: XANY */
186 0x12, 0x09, 0x41, 0xff, /* 10: Rx mask char */
187 0x14, 0x09, 0x82, 0x00, /* 14: Compare/Ignore #0 */
188 0x16, 0x09, 0x82, 0x7b, /* 18: Compare #1 */
189 0x18, 0x09, 0x8a, 0x7d, /* 1c: Compare #2 */
190 0x1a, 0x09, 0x88, 0x81, /* 20: Interrupt #1 */
191 0x1c, 0x09, 0x86, 0x7a, /* 24: Ignore/Replace #1 */
192 0x1e, 0x09, 0x84, 0x81, /* 28: Interrupt #2 */
193 0x20, 0x09, 0x82, 0x7c, /* 2c: Ignore/Replace #2 */
194 0x22, 0x09, 0x0a, 0x0a /* 30: Rx FIFO Enable */
197 static CONTROLLER_T sController
[CTL_SIZE
] = {
198 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
199 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
200 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
201 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
202 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
203 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
204 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
205 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}}
208 static Byte_t sBitMapClrTbl
[8] = {
209 0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f
212 static Byte_t sBitMapSetTbl
[8] = {
213 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80
216 static int sClockPrescale
= 0x14;
219 * Line number is the ttySIx number (x), the Minor number. We
220 * assign them sequentially, starting at zero. The following
221 * array keeps track of the line number assigned to a given board/aiop/channel.
223 static unsigned char lineNumbers
[MAX_RP_PORTS
];
224 static unsigned long nextLineNumber
;
226 /***** RocketPort Static Prototypes *********/
227 static int __init
init_ISA(int i
);
228 static void rp_wait_until_sent(struct tty_struct
*tty
, int timeout
);
229 static void rp_flush_buffer(struct tty_struct
*tty
);
230 static void rmSpeakerReset(CONTROLLER_T
* CtlP
, unsigned long model
);
231 static unsigned char GetLineNumber(int ctrl
, int aiop
, int ch
);
232 static unsigned char SetLineNumber(int ctrl
, int aiop
, int ch
);
233 static void rp_start(struct tty_struct
*tty
);
234 static int sInitChan(CONTROLLER_T
* CtlP
, CHANNEL_T
* ChP
, int AiopNum
,
236 static void sSetInterfaceMode(CHANNEL_T
* ChP
, Byte_t mode
);
237 static void sFlushRxFIFO(CHANNEL_T
* ChP
);
238 static void sFlushTxFIFO(CHANNEL_T
* ChP
);
239 static void sEnInterrupts(CHANNEL_T
* ChP
, Word_t Flags
);
240 static void sDisInterrupts(CHANNEL_T
* ChP
, Word_t Flags
);
241 static void sModemReset(CONTROLLER_T
* CtlP
, int chan
, int on
);
242 static void sPCIModemReset(CONTROLLER_T
* CtlP
, int chan
, int on
);
243 static int sWriteTxPrioByte(CHANNEL_T
* ChP
, Byte_t Data
);
244 static int sPCIInitController(CONTROLLER_T
* CtlP
, int CtlNum
,
245 ByteIO_t
* AiopIOList
, int AiopIOListSize
,
246 WordIO_t ConfigIO
, int IRQNum
, Byte_t Frequency
,
247 int PeriodicOnly
, int altChanRingIndicator
,
249 static int sInitController(CONTROLLER_T
* CtlP
, int CtlNum
, ByteIO_t MudbacIO
,
250 ByteIO_t
* AiopIOList
, int AiopIOListSize
,
251 int IRQNum
, Byte_t Frequency
, int PeriodicOnly
);
252 static int sReadAiopID(ByteIO_t io
);
253 static int sReadAiopNumChan(WordIO_t io
);
255 MODULE_AUTHOR("Theodore Ts'o");
256 MODULE_DESCRIPTION("Comtrol RocketPort driver");
257 module_param(board1
, ulong
, 0);
258 MODULE_PARM_DESC(board1
, "I/O port for (ISA) board #1");
259 module_param(board2
, ulong
, 0);
260 MODULE_PARM_DESC(board2
, "I/O port for (ISA) board #2");
261 module_param(board3
, ulong
, 0);
262 MODULE_PARM_DESC(board3
, "I/O port for (ISA) board #3");
263 module_param(board4
, ulong
, 0);
264 MODULE_PARM_DESC(board4
, "I/O port for (ISA) board #4");
265 module_param(controller
, ulong
, 0);
266 MODULE_PARM_DESC(controller
, "I/O port for (ISA) rocketport controller");
267 module_param(support_low_speed
, bool, 0);
268 MODULE_PARM_DESC(support_low_speed
, "1 means support 50 baud, 0 means support 460400 baud");
269 module_param(modem1
, ulong
, 0);
270 MODULE_PARM_DESC(modem1
, "1 means (ISA) board #1 is a RocketModem");
271 module_param(modem2
, ulong
, 0);
272 MODULE_PARM_DESC(modem2
, "1 means (ISA) board #2 is a RocketModem");
273 module_param(modem3
, ulong
, 0);
274 MODULE_PARM_DESC(modem3
, "1 means (ISA) board #3 is a RocketModem");
275 module_param(modem4
, ulong
, 0);
276 MODULE_PARM_DESC(modem4
, "1 means (ISA) board #4 is a RocketModem");
277 module_param_array(pc104_1
, ulong
, NULL
, 0);
278 MODULE_PARM_DESC(pc104_1
, "set interface types for ISA(PC104) board #1 (e.g. pc104_1=232,232,485,485,...");
279 module_param_array(pc104_2
, ulong
, NULL
, 0);
280 MODULE_PARM_DESC(pc104_2
, "set interface types for ISA(PC104) board #2 (e.g. pc104_2=232,232,485,485,...");
281 module_param_array(pc104_3
, ulong
, NULL
, 0);
282 MODULE_PARM_DESC(pc104_3
, "set interface types for ISA(PC104) board #3 (e.g. pc104_3=232,232,485,485,...");
283 module_param_array(pc104_4
, ulong
, NULL
, 0);
284 MODULE_PARM_DESC(pc104_4
, "set interface types for ISA(PC104) board #4 (e.g. pc104_4=232,232,485,485,...");
286 static int rp_init(void);
287 static void rp_cleanup_module(void);
289 module_init(rp_init
);
290 module_exit(rp_cleanup_module
);
293 MODULE_LICENSE("Dual BSD/GPL");
295 /*************************************************************************/
296 /* Module code starts here */
298 static inline int rocket_paranoia_check(struct r_port
*info
,
301 #ifdef ROCKET_PARANOIA_CHECK
304 if (info
->magic
!= RPORT_MAGIC
) {
305 printk(KERN_WARNING
"Warning: bad magic number for rocketport "
306 "struct in %s\n", routine
);
314 /* Serial port receive data function. Called (from timer poll) when an AIOPIC signals
315 * that receive data is present on a serial port. Pulls data from FIFO, moves it into the
318 static void rp_do_receive(struct r_port
*info
,
319 struct tty_struct
*tty
,
320 CHANNEL_t
* cp
, unsigned int ChanStatus
)
322 unsigned int CharNStat
;
323 int ToRecv
, wRecv
, space
;
326 ToRecv
= sGetRxCnt(cp
);
327 #ifdef ROCKET_DEBUG_INTR
328 printk(KERN_INFO
"rp_do_receive(%d)...\n", ToRecv
);
334 * if status indicates there are errored characters in the
335 * FIFO, then enter status mode (a word in FIFO holds
336 * character and status).
338 if (ChanStatus
& (RXFOVERFL
| RXBREAK
| RXFRAME
| RXPARITY
)) {
339 if (!(ChanStatus
& STATMODE
)) {
340 #ifdef ROCKET_DEBUG_RECEIVE
341 printk(KERN_INFO
"Entering STATMODE...\n");
343 ChanStatus
|= STATMODE
;
349 * if we previously entered status mode, then read down the
350 * FIFO one word at a time, pulling apart the character and
351 * the status. Update error counters depending on status
353 if (ChanStatus
& STATMODE
) {
354 #ifdef ROCKET_DEBUG_RECEIVE
355 printk(KERN_INFO
"Ignore %x, read %x...\n",
356 info
->ignore_status_mask
, info
->read_status_mask
);
361 CharNStat
= sInW(sGetTxRxDataIO(cp
));
362 #ifdef ROCKET_DEBUG_RECEIVE
363 printk(KERN_INFO
"%x...\n", CharNStat
);
365 if (CharNStat
& STMBREAKH
)
366 CharNStat
&= ~(STMFRAMEH
| STMPARITYH
);
367 if (CharNStat
& info
->ignore_status_mask
) {
371 CharNStat
&= info
->read_status_mask
;
372 if (CharNStat
& STMBREAKH
)
374 else if (CharNStat
& STMPARITYH
)
376 else if (CharNStat
& STMFRAMEH
)
378 else if (CharNStat
& STMRCVROVRH
)
382 tty_insert_flip_char(tty
, CharNStat
& 0xff, flag
);
387 * after we've emptied the FIFO in status mode, turn
388 * status mode back off
390 if (sGetRxCnt(cp
) == 0) {
391 #ifdef ROCKET_DEBUG_RECEIVE
392 printk(KERN_INFO
"Status mode off.\n");
394 sDisRxStatusMode(cp
);
398 * we aren't in status mode, so read down the FIFO two
399 * characters at time by doing repeated word IO
402 space
= tty_prepare_flip_string(tty
, &cbuf
, ToRecv
);
403 if (space
< ToRecv
) {
404 #ifdef ROCKET_DEBUG_RECEIVE
405 printk(KERN_INFO
"rp_do_receive:insufficient space ToRecv=%d space=%d\n", ToRecv
, space
);
413 sInStrW(sGetTxRxDataIO(cp
), (unsigned short *) cbuf
, wRecv
);
415 cbuf
[ToRecv
- 1] = sInB(sGetTxRxDataIO(cp
));
417 /* Push the data up to the tty layer */
418 tty_flip_buffer_push(tty
);
422 * Serial port transmit data function. Called from the timer polling loop as a
423 * result of a bit set in xmit_flags[], indicating data (from the tty layer) is ready
424 * to be sent out the serial port. Data is buffered in rp_table[line].xmit_buf, it is
425 * moved to the port's xmit FIFO. *info is critical data, protected by spinlocks.
427 static void rp_do_transmit(struct r_port
*info
)
430 CHANNEL_t
*cp
= &info
->channel
;
431 struct tty_struct
*tty
;
434 #ifdef ROCKET_DEBUG_INTR
435 printk(KERN_DEBUG
"%s\n", __func__
);
439 tty
= tty_port_tty_get(&info
->port
);
442 printk(KERN_WARNING
"rp: WARNING %s called with tty==NULL\n", __func__
);
443 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
447 spin_lock_irqsave(&info
->slock
, flags
);
448 info
->xmit_fifo_room
= TXFIFO_SIZE
- sGetTxCnt(cp
);
450 /* Loop sending data to FIFO until done or FIFO full */
452 if (tty
->stopped
|| tty
->hw_stopped
)
454 c
= min(info
->xmit_fifo_room
, info
->xmit_cnt
);
455 c
= min(c
, XMIT_BUF_SIZE
- info
->xmit_tail
);
456 if (c
<= 0 || info
->xmit_fifo_room
<= 0)
458 sOutStrW(sGetTxRxDataIO(cp
), (unsigned short *) (info
->xmit_buf
+ info
->xmit_tail
), c
/ 2);
460 sOutB(sGetTxRxDataIO(cp
), info
->xmit_buf
[info
->xmit_tail
+ c
- 1]);
461 info
->xmit_tail
+= c
;
462 info
->xmit_tail
&= XMIT_BUF_SIZE
- 1;
464 info
->xmit_fifo_room
-= c
;
465 #ifdef ROCKET_DEBUG_INTR
466 printk(KERN_INFO
"tx %d chars...\n", c
);
470 if (info
->xmit_cnt
== 0)
471 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
473 if (info
->xmit_cnt
< WAKEUP_CHARS
) {
475 #ifdef ROCKETPORT_HAVE_POLL_WAIT
476 wake_up_interruptible(&tty
->poll_wait
);
480 spin_unlock_irqrestore(&info
->slock
, flags
);
483 #ifdef ROCKET_DEBUG_INTR
484 printk(KERN_DEBUG
"(%d,%d,%d,%d)...\n", info
->xmit_cnt
, info
->xmit_head
,
485 info
->xmit_tail
, info
->xmit_fifo_room
);
490 * Called when a serial port signals it has read data in it's RX FIFO.
491 * It checks what interrupts are pending and services them, including
492 * receiving serial data.
494 static void rp_handle_port(struct r_port
*info
)
497 struct tty_struct
*tty
;
498 unsigned int IntMask
, ChanStatus
;
503 if ((info
->port
.flags
& ASYNC_INITIALIZED
) == 0) {
504 printk(KERN_WARNING
"rp: WARNING: rp_handle_port called with "
505 "info->flags & NOT_INIT\n");
508 tty
= tty_port_tty_get(&info
->port
);
510 printk(KERN_WARNING
"rp: WARNING: rp_handle_port called with "
516 IntMask
= sGetChanIntID(cp
) & info
->intmask
;
517 #ifdef ROCKET_DEBUG_INTR
518 printk(KERN_INFO
"rp_interrupt %02x...\n", IntMask
);
520 ChanStatus
= sGetChanStatus(cp
);
521 if (IntMask
& RXF_TRIG
) { /* Rx FIFO trigger level */
522 rp_do_receive(info
, tty
, cp
, ChanStatus
);
524 if (IntMask
& DELTA_CD
) { /* CD change */
525 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_INTR) || \
526 defined(ROCKET_DEBUG_HANGUP))
527 printk(KERN_INFO
"ttyR%d CD now %s...\n", info
->line
,
528 (ChanStatus
& CD_ACT
) ? "on" : "off");
530 if (!(ChanStatus
& CD_ACT
) && info
->cd_status
) {
531 #ifdef ROCKET_DEBUG_HANGUP
532 printk(KERN_INFO
"CD drop, calling hangup.\n");
536 info
->cd_status
= (ChanStatus
& CD_ACT
) ? 1 : 0;
537 wake_up_interruptible(&info
->port
.open_wait
);
539 #ifdef ROCKET_DEBUG_INTR
540 if (IntMask
& DELTA_CTS
) { /* CTS change */
541 printk(KERN_INFO
"CTS change...\n");
543 if (IntMask
& DELTA_DSR
) { /* DSR change */
544 printk(KERN_INFO
"DSR change...\n");
551 * The top level polling routine. Repeats every 1/100 HZ (10ms).
553 static void rp_do_poll(unsigned long dummy
)
556 int ctrl
, aiop
, ch
, line
;
557 unsigned int xmitmask
, i
;
558 unsigned int CtlMask
;
559 unsigned char AiopMask
;
562 /* Walk through all the boards (ctrl's) */
563 for (ctrl
= 0; ctrl
< max_board
; ctrl
++) {
564 if (rcktpt_io_addr
[ctrl
] <= 0)
567 /* Get a ptr to the board's control struct */
568 ctlp
= sCtlNumToCtlPtr(ctrl
);
570 /* Get the interrupt status from the board */
572 if (ctlp
->BusType
== isPCI
)
573 CtlMask
= sPCIGetControllerIntStatus(ctlp
);
576 CtlMask
= sGetControllerIntStatus(ctlp
);
578 /* Check if any AIOP read bits are set */
579 for (aiop
= 0; CtlMask
; aiop
++) {
580 bit
= ctlp
->AiopIntrBits
[aiop
];
583 AiopMask
= sGetAiopIntStatus(ctlp
, aiop
);
585 /* Check if any port read bits are set */
586 for (ch
= 0; AiopMask
; AiopMask
>>= 1, ch
++) {
589 /* Get the line number (/dev/ttyRx number). */
590 /* Read the data from the port. */
591 line
= GetLineNumber(ctrl
, aiop
, ch
);
592 rp_handle_port(rp_table
[line
]);
598 xmitmask
= xmit_flags
[ctrl
];
601 * xmit_flags contains bit-significant flags, indicating there is data
602 * to xmit on the port. Bit 0 is port 0 on this board, bit 1 is port
603 * 1, ... (32 total possible). The variable i has the aiop and ch
604 * numbers encoded in it (port 0-7 are aiop0, 8-15 are aiop1, etc).
607 for (i
= 0; i
< rocketModel
[ctrl
].numPorts
; i
++) {
608 if (xmitmask
& (1 << i
)) {
609 aiop
= (i
& 0x18) >> 3;
611 line
= GetLineNumber(ctrl
, aiop
, ch
);
612 rp_do_transmit(rp_table
[line
]);
619 * Reset the timer so we get called at the next clock tick (10ms).
621 if (atomic_read(&rp_num_ports_open
))
622 mod_timer(&rocket_timer
, jiffies
+ POLL_PERIOD
);
626 * Initializes the r_port structure for a port, as well as enabling the port on
628 * Inputs: board, aiop, chan numbers
630 static void init_r_port(int board
, int aiop
, int chan
, struct pci_dev
*pci_dev
)
637 /* Get the next available line number */
638 line
= SetLineNumber(board
, aiop
, chan
);
640 ctlp
= sCtlNumToCtlPtr(board
);
642 /* Get a r_port struct for the port, fill it in and save it globally, indexed by line number */
643 info
= kzalloc(sizeof (struct r_port
), GFP_KERNEL
);
645 printk(KERN_ERR
"Couldn't allocate info struct for line #%d\n",
650 info
->magic
= RPORT_MAGIC
;
656 tty_port_init(&info
->port
);
657 info
->port
.ops
= &rocket_port_ops
;
658 init_completion(&info
->close_wait
);
659 info
->flags
&= ~ROCKET_MODE_MASK
;
660 switch (pc104
[board
][line
]) {
662 info
->flags
|= ROCKET_MODE_RS422
;
665 info
->flags
|= ROCKET_MODE_RS485
;
669 info
->flags
|= ROCKET_MODE_RS232
;
673 info
->intmask
= RXF_TRIG
| TXFIFO_MT
| SRC_INT
| DELTA_CD
| DELTA_CTS
| DELTA_DSR
;
674 if (sInitChan(ctlp
, &info
->channel
, aiop
, chan
) == 0) {
675 printk(KERN_ERR
"RocketPort sInitChan(%d, %d, %d) failed!\n",
681 rocketMode
= info
->flags
& ROCKET_MODE_MASK
;
683 if ((info
->flags
& ROCKET_RTS_TOGGLE
) || (rocketMode
== ROCKET_MODE_RS485
))
684 sEnRTSToggle(&info
->channel
);
686 sDisRTSToggle(&info
->channel
);
688 if (ctlp
->boardType
== ROCKET_TYPE_PC104
) {
689 switch (rocketMode
) {
690 case ROCKET_MODE_RS485
:
691 sSetInterfaceMode(&info
->channel
, InterfaceModeRS485
);
693 case ROCKET_MODE_RS422
:
694 sSetInterfaceMode(&info
->channel
, InterfaceModeRS422
);
696 case ROCKET_MODE_RS232
:
698 if (info
->flags
& ROCKET_RTS_TOGGLE
)
699 sSetInterfaceMode(&info
->channel
, InterfaceModeRS232T
);
701 sSetInterfaceMode(&info
->channel
, InterfaceModeRS232
);
705 spin_lock_init(&info
->slock
);
706 mutex_init(&info
->write_mtx
);
707 rp_table
[line
] = info
;
708 tty_register_device(rocket_driver
, line
, pci_dev
? &pci_dev
->dev
:
713 * Configures a rocketport port according to its termio settings. Called from
714 * user mode into the driver (exception handler). *info CD manipulation is spinlock protected.
716 static void configure_r_port(struct tty_struct
*tty
, struct r_port
*info
,
717 struct ktermios
*old_termios
)
722 int bits
, baud
, divisor
;
724 struct ktermios
*t
= tty
->termios
;
729 /* Byte size and parity */
730 if ((cflag
& CSIZE
) == CS8
) {
737 if (cflag
& CSTOPB
) {
744 if (cflag
& PARENB
) {
747 if (cflag
& PARODD
) {
757 baud
= tty_get_baud_rate(tty
);
760 divisor
= ((rp_baud_base
[info
->board
] + (baud
>> 1)) / baud
) - 1;
761 if ((divisor
>= 8192 || divisor
< 0) && old_termios
) {
762 baud
= tty_termios_baud_rate(old_termios
);
765 divisor
= (rp_baud_base
[info
->board
] / baud
) - 1;
767 if (divisor
>= 8192 || divisor
< 0) {
769 divisor
= (rp_baud_base
[info
->board
] / baud
) - 1;
771 info
->cps
= baud
/ bits
;
772 sSetBaud(cp
, divisor
);
774 tty_encode_baud_rate(tty
, baud
, baud
);
776 if (cflag
& CRTSCTS
) {
777 info
->intmask
|= DELTA_CTS
;
780 info
->intmask
&= ~DELTA_CTS
;
783 if (cflag
& CLOCAL
) {
784 info
->intmask
&= ~DELTA_CD
;
786 spin_lock_irqsave(&info
->slock
, flags
);
787 if (sGetChanStatus(cp
) & CD_ACT
)
791 info
->intmask
|= DELTA_CD
;
792 spin_unlock_irqrestore(&info
->slock
, flags
);
796 * Handle software flow control in the board
798 #ifdef ROCKET_SOFT_FLOW
800 sEnTxSoftFlowCtl(cp
);
806 sSetTxXONChar(cp
, START_CHAR(tty
));
807 sSetTxXOFFChar(cp
, STOP_CHAR(tty
));
809 sDisTxSoftFlowCtl(cp
);
816 * Set up ignore/read mask words
818 info
->read_status_mask
= STMRCVROVRH
| 0xFF;
820 info
->read_status_mask
|= STMFRAMEH
| STMPARITYH
;
821 if (I_BRKINT(tty
) || I_PARMRK(tty
))
822 info
->read_status_mask
|= STMBREAKH
;
825 * Characters to ignore
827 info
->ignore_status_mask
= 0;
829 info
->ignore_status_mask
|= STMFRAMEH
| STMPARITYH
;
831 info
->ignore_status_mask
|= STMBREAKH
;
833 * If we're ignoring parity and break indicators,
834 * ignore overruns too. (For real raw support).
837 info
->ignore_status_mask
|= STMRCVROVRH
;
840 rocketMode
= info
->flags
& ROCKET_MODE_MASK
;
842 if ((info
->flags
& ROCKET_RTS_TOGGLE
)
843 || (rocketMode
== ROCKET_MODE_RS485
))
848 sSetRTS(&info
->channel
);
850 if (cp
->CtlP
->boardType
== ROCKET_TYPE_PC104
) {
851 switch (rocketMode
) {
852 case ROCKET_MODE_RS485
:
853 sSetInterfaceMode(cp
, InterfaceModeRS485
);
855 case ROCKET_MODE_RS422
:
856 sSetInterfaceMode(cp
, InterfaceModeRS422
);
858 case ROCKET_MODE_RS232
:
860 if (info
->flags
& ROCKET_RTS_TOGGLE
)
861 sSetInterfaceMode(cp
, InterfaceModeRS232T
);
863 sSetInterfaceMode(cp
, InterfaceModeRS232
);
869 static int carrier_raised(struct tty_port
*port
)
871 struct r_port
*info
= container_of(port
, struct r_port
, port
);
872 return (sGetChanStatusLo(&info
->channel
) & CD_ACT
) ? 1 : 0;
875 static void dtr_rts(struct tty_port
*port
, int on
)
877 struct r_port
*info
= container_of(port
, struct r_port
, port
);
879 sSetDTR(&info
->channel
);
880 sSetRTS(&info
->channel
);
882 sClrDTR(&info
->channel
);
883 sClrRTS(&info
->channel
);
888 * Exception handler that opens a serial port. Creates xmit_buf storage, fills in
889 * port's r_port struct. Initializes the port hardware.
891 static int rp_open(struct tty_struct
*tty
, struct file
*filp
)
894 struct tty_port
*port
;
895 int line
= 0, retval
;
900 if (line
< 0 || line
>= MAX_RP_PORTS
|| ((info
= rp_table
[line
]) == NULL
))
904 page
= __get_free_page(GFP_KERNEL
);
908 if (port
->flags
& ASYNC_CLOSING
) {
909 retval
= wait_for_completion_interruptible(&info
->close_wait
);
913 return ((port
->flags
& ASYNC_HUP_NOTIFY
) ? -EAGAIN
: -ERESTARTSYS
);
917 * We must not sleep from here until the port is marked fully in use.
922 info
->xmit_buf
= (unsigned char *) page
;
924 tty
->driver_data
= info
;
925 tty_port_tty_set(port
, tty
);
927 if (port
->count
++ == 0) {
928 atomic_inc(&rp_num_ports_open
);
930 #ifdef ROCKET_DEBUG_OPEN
931 printk(KERN_INFO
"rocket mod++ = %d...\n",
932 atomic_read(&rp_num_ports_open
));
935 #ifdef ROCKET_DEBUG_OPEN
936 printk(KERN_INFO
"rp_open ttyR%d, count=%d\n", info
->line
, info
->port
.count
);
940 * Info->count is now 1; so it's safe to sleep now.
942 if (!test_bit(ASYNCB_INITIALIZED
, &port
->flags
)) {
944 sSetRxTrigger(cp
, TRIG_1
);
945 if (sGetChanStatus(cp
) & CD_ACT
)
949 sDisRxStatusMode(cp
);
953 sEnInterrupts(cp
, (TXINT_EN
| MCINT_EN
| RXINT_EN
| SRCINT_EN
| CHANINT_EN
));
954 sSetRxTrigger(cp
, TRIG_1
);
957 sDisRxStatusMode(cp
);
961 sDisTxSoftFlowCtl(cp
);
966 set_bit(ASYNCB_INITIALIZED
, &info
->port
.flags
);
969 * Set up the tty->alt_speed kludge
971 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_HI
)
972 tty
->alt_speed
= 57600;
973 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_VHI
)
974 tty
->alt_speed
= 115200;
975 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_SHI
)
976 tty
->alt_speed
= 230400;
977 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_WARP
)
978 tty
->alt_speed
= 460800;
980 configure_r_port(tty
, info
, NULL
);
981 if (tty
->termios
->c_cflag
& CBAUD
) {
986 /* Starts (or resets) the maint polling loop */
987 mod_timer(&rocket_timer
, jiffies
+ POLL_PERIOD
);
989 retval
= tty_port_block_til_ready(port
, tty
, filp
);
991 #ifdef ROCKET_DEBUG_OPEN
992 printk(KERN_INFO
"rp_open returning after block_til_ready with %d\n", retval
);
1000 * Exception handler that closes a serial port. info->port.count is considered critical.
1002 static void rp_close(struct tty_struct
*tty
, struct file
*filp
)
1004 struct r_port
*info
= tty
->driver_data
;
1005 struct tty_port
*port
= &info
->port
;
1009 if (rocket_paranoia_check(info
, "rp_close"))
1012 #ifdef ROCKET_DEBUG_OPEN
1013 printk(KERN_INFO
"rp_close ttyR%d, count = %d\n", info
->line
, info
->port
.count
);
1016 if (tty_port_close_start(port
, tty
, filp
) == 0)
1019 mutex_lock(&port
->mutex
);
1020 cp
= &info
->channel
;
1022 * Before we drop DTR, make sure the UART transmitter
1023 * has completely drained; this is especially
1024 * important if there is a transmit FIFO!
1026 timeout
= (sGetTxCnt(cp
) + 1) * HZ
/ info
->cps
;
1029 rp_wait_until_sent(tty
, timeout
);
1030 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1033 sDisInterrupts(cp
, (TXINT_EN
| MCINT_EN
| RXINT_EN
| SRCINT_EN
| CHANINT_EN
));
1035 sDisTxSoftFlowCtl(cp
);
1043 rp_flush_buffer(tty
);
1045 tty_ldisc_flush(tty
);
1047 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1049 /* We can't yet use tty_port_close_end as the buffer handling in this
1050 driver is a bit different to the usual */
1052 if (port
->blocked_open
) {
1053 if (port
->close_delay
) {
1054 msleep_interruptible(jiffies_to_msecs(port
->close_delay
));
1056 wake_up_interruptible(&port
->open_wait
);
1058 if (info
->xmit_buf
) {
1059 free_page((unsigned long) info
->xmit_buf
);
1060 info
->xmit_buf
= NULL
;
1063 spin_lock_irq(&port
->lock
);
1064 info
->port
.flags
&= ~(ASYNC_INITIALIZED
| ASYNC_CLOSING
| ASYNC_NORMAL_ACTIVE
);
1066 spin_unlock_irq(&port
->lock
);
1067 mutex_unlock(&port
->mutex
);
1068 tty_port_tty_set(port
, NULL
);
1070 wake_up_interruptible(&port
->close_wait
);
1071 complete_all(&info
->close_wait
);
1072 atomic_dec(&rp_num_ports_open
);
1074 #ifdef ROCKET_DEBUG_OPEN
1075 printk(KERN_INFO
"rocket mod-- = %d...\n",
1076 atomic_read(&rp_num_ports_open
));
1077 printk(KERN_INFO
"rp_close ttyR%d complete shutdown\n", info
->line
);
1082 static void rp_set_termios(struct tty_struct
*tty
,
1083 struct ktermios
*old_termios
)
1085 struct r_port
*info
= tty
->driver_data
;
1089 if (rocket_paranoia_check(info
, "rp_set_termios"))
1092 cflag
= tty
->termios
->c_cflag
;
1095 * This driver doesn't support CS5 or CS6
1097 if (((cflag
& CSIZE
) == CS5
) || ((cflag
& CSIZE
) == CS6
))
1098 tty
->termios
->c_cflag
=
1099 ((cflag
& ~CSIZE
) | (old_termios
->c_cflag
& CSIZE
));
1101 tty
->termios
->c_cflag
&= ~CMSPAR
;
1103 configure_r_port(tty
, info
, old_termios
);
1105 cp
= &info
->channel
;
1107 /* Handle transition to B0 status */
1108 if ((old_termios
->c_cflag
& CBAUD
) && !(tty
->termios
->c_cflag
& CBAUD
)) {
1113 /* Handle transition away from B0 status */
1114 if (!(old_termios
->c_cflag
& CBAUD
) && (tty
->termios
->c_cflag
& CBAUD
)) {
1115 if (!tty
->hw_stopped
|| !(tty
->termios
->c_cflag
& CRTSCTS
))
1120 if ((old_termios
->c_cflag
& CRTSCTS
) && !(tty
->termios
->c_cflag
& CRTSCTS
)) {
1121 tty
->hw_stopped
= 0;
1126 static int rp_break(struct tty_struct
*tty
, int break_state
)
1128 struct r_port
*info
= tty
->driver_data
;
1129 unsigned long flags
;
1131 if (rocket_paranoia_check(info
, "rp_break"))
1134 spin_lock_irqsave(&info
->slock
, flags
);
1135 if (break_state
== -1)
1136 sSendBreak(&info
->channel
);
1138 sClrBreak(&info
->channel
);
1139 spin_unlock_irqrestore(&info
->slock
, flags
);
1144 * sGetChanRI used to be a macro in rocket_int.h. When the functionality for
1145 * the UPCI boards was added, it was decided to make this a function because
1146 * the macro was getting too complicated. All cases except the first one
1147 * (UPCIRingInd) are taken directly from the original macro.
1149 static int sGetChanRI(CHANNEL_T
* ChP
)
1151 CONTROLLER_t
*CtlP
= ChP
->CtlP
;
1152 int ChanNum
= ChP
->ChanNum
;
1155 if (CtlP
->UPCIRingInd
)
1156 RingInd
= !(sInB(CtlP
->UPCIRingInd
) & sBitMapSetTbl
[ChanNum
]);
1157 else if (CtlP
->AltChanRingIndicator
)
1158 RingInd
= sInB((ByteIO_t
) (ChP
->ChanStat
+ 8)) & DSR_ACT
;
1159 else if (CtlP
->boardType
== ROCKET_TYPE_PC104
)
1160 RingInd
= !(sInB(CtlP
->AiopIO
[3]) & sBitMapSetTbl
[ChanNum
]);
1165 /********************************************************************************************/
1166 /* Here are the routines used by rp_ioctl. These are all called from exception handlers. */
1169 * Returns the state of the serial modem control lines. These next 2 functions
1170 * are the way kernel versions > 2.5 handle modem control lines rather than IOCTLs.
1172 static int rp_tiocmget(struct tty_struct
*tty
, struct file
*file
)
1174 struct r_port
*info
= tty
->driver_data
;
1175 unsigned int control
, result
, ChanStatus
;
1177 ChanStatus
= sGetChanStatusLo(&info
->channel
);
1178 control
= info
->channel
.TxControl
[3];
1179 result
= ((control
& SET_RTS
) ? TIOCM_RTS
: 0) |
1180 ((control
& SET_DTR
) ? TIOCM_DTR
: 0) |
1181 ((ChanStatus
& CD_ACT
) ? TIOCM_CAR
: 0) |
1182 (sGetChanRI(&info
->channel
) ? TIOCM_RNG
: 0) |
1183 ((ChanStatus
& DSR_ACT
) ? TIOCM_DSR
: 0) |
1184 ((ChanStatus
& CTS_ACT
) ? TIOCM_CTS
: 0);
1190 * Sets the modem control lines
1192 static int rp_tiocmset(struct tty_struct
*tty
, struct file
*file
,
1193 unsigned int set
, unsigned int clear
)
1195 struct r_port
*info
= tty
->driver_data
;
1197 if (set
& TIOCM_RTS
)
1198 info
->channel
.TxControl
[3] |= SET_RTS
;
1199 if (set
& TIOCM_DTR
)
1200 info
->channel
.TxControl
[3] |= SET_DTR
;
1201 if (clear
& TIOCM_RTS
)
1202 info
->channel
.TxControl
[3] &= ~SET_RTS
;
1203 if (clear
& TIOCM_DTR
)
1204 info
->channel
.TxControl
[3] &= ~SET_DTR
;
1206 out32(info
->channel
.IndexAddr
, info
->channel
.TxControl
);
1210 static int get_config(struct r_port
*info
, struct rocket_config __user
*retinfo
)
1212 struct rocket_config tmp
;
1216 memset(&tmp
, 0, sizeof (tmp
));
1217 mutex_lock(&info
->port
.mutex
);
1218 tmp
.line
= info
->line
;
1219 tmp
.flags
= info
->flags
;
1220 tmp
.close_delay
= info
->port
.close_delay
;
1221 tmp
.closing_wait
= info
->port
.closing_wait
;
1222 tmp
.port
= rcktpt_io_addr
[(info
->line
>> 5) & 3];
1223 mutex_unlock(&info
->port
.mutex
);
1225 if (copy_to_user(retinfo
, &tmp
, sizeof (*retinfo
)))
1230 static int set_config(struct tty_struct
*tty
, struct r_port
*info
,
1231 struct rocket_config __user
*new_info
)
1233 struct rocket_config new_serial
;
1235 if (copy_from_user(&new_serial
, new_info
, sizeof (new_serial
)))
1238 mutex_lock(&info
->port
.mutex
);
1239 if (!capable(CAP_SYS_ADMIN
))
1241 if ((new_serial
.flags
& ~ROCKET_USR_MASK
) != (info
->flags
& ~ROCKET_USR_MASK
)) {
1242 mutex_unlock(&info
->port
.mutex
);
1245 info
->flags
= ((info
->flags
& ~ROCKET_USR_MASK
) | (new_serial
.flags
& ROCKET_USR_MASK
));
1246 configure_r_port(tty
, info
, NULL
);
1247 mutex_unlock(&info
->port
.mutex
);
1251 info
->flags
= ((info
->flags
& ~ROCKET_FLAGS
) | (new_serial
.flags
& ROCKET_FLAGS
));
1252 info
->port
.close_delay
= new_serial
.close_delay
;
1253 info
->port
.closing_wait
= new_serial
.closing_wait
;
1255 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_HI
)
1256 tty
->alt_speed
= 57600;
1257 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_VHI
)
1258 tty
->alt_speed
= 115200;
1259 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_SHI
)
1260 tty
->alt_speed
= 230400;
1261 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_WARP
)
1262 tty
->alt_speed
= 460800;
1263 mutex_unlock(&info
->port
.mutex
);
1265 configure_r_port(tty
, info
, NULL
);
1270 * This function fills in a rocket_ports struct with information
1271 * about what boards/ports are in the system. This info is passed
1272 * to user space. See setrocket.c where the info is used to create
1273 * the /dev/ttyRx ports.
1275 static int get_ports(struct r_port
*info
, struct rocket_ports __user
*retports
)
1277 struct rocket_ports tmp
;
1282 memset(&tmp
, 0, sizeof (tmp
));
1283 tmp
.tty_major
= rocket_driver
->major
;
1285 for (board
= 0; board
< 4; board
++) {
1286 tmp
.rocketModel
[board
].model
= rocketModel
[board
].model
;
1287 strcpy(tmp
.rocketModel
[board
].modelString
, rocketModel
[board
].modelString
);
1288 tmp
.rocketModel
[board
].numPorts
= rocketModel
[board
].numPorts
;
1289 tmp
.rocketModel
[board
].loadrm2
= rocketModel
[board
].loadrm2
;
1290 tmp
.rocketModel
[board
].startingPortNumber
= rocketModel
[board
].startingPortNumber
;
1292 if (copy_to_user(retports
, &tmp
, sizeof (*retports
)))
1297 static int reset_rm2(struct r_port
*info
, void __user
*arg
)
1301 if (!capable(CAP_SYS_ADMIN
))
1304 if (copy_from_user(&reset
, arg
, sizeof (int)))
1309 if (rcktpt_type
[info
->board
] != ROCKET_TYPE_MODEMII
&&
1310 rcktpt_type
[info
->board
] != ROCKET_TYPE_MODEMIII
)
1313 if (info
->ctlp
->BusType
== isISA
)
1314 sModemReset(info
->ctlp
, info
->chan
, reset
);
1316 sPCIModemReset(info
->ctlp
, info
->chan
, reset
);
1321 static int get_version(struct r_port
*info
, struct rocket_version __user
*retvers
)
1323 if (copy_to_user(retvers
, &driver_version
, sizeof (*retvers
)))
1328 /* IOCTL call handler into the driver */
1329 static int rp_ioctl(struct tty_struct
*tty
, struct file
*file
,
1330 unsigned int cmd
, unsigned long arg
)
1332 struct r_port
*info
= tty
->driver_data
;
1333 void __user
*argp
= (void __user
*)arg
;
1336 if (cmd
!= RCKP_GET_PORTS
&& rocket_paranoia_check(info
, "rp_ioctl"))
1340 case RCKP_GET_STRUCT
:
1341 if (copy_to_user(argp
, info
, sizeof (struct r_port
)))
1344 case RCKP_GET_CONFIG
:
1345 ret
= get_config(info
, argp
);
1347 case RCKP_SET_CONFIG
:
1348 ret
= set_config(tty
, info
, argp
);
1350 case RCKP_GET_PORTS
:
1351 ret
= get_ports(info
, argp
);
1353 case RCKP_RESET_RM2
:
1354 ret
= reset_rm2(info
, argp
);
1356 case RCKP_GET_VERSION
:
1357 ret
= get_version(info
, argp
);
1365 static void rp_send_xchar(struct tty_struct
*tty
, char ch
)
1367 struct r_port
*info
= tty
->driver_data
;
1370 if (rocket_paranoia_check(info
, "rp_send_xchar"))
1373 cp
= &info
->channel
;
1375 sWriteTxPrioByte(cp
, ch
);
1377 sWriteTxByte(sGetTxRxDataIO(cp
), ch
);
1380 static void rp_throttle(struct tty_struct
*tty
)
1382 struct r_port
*info
= tty
->driver_data
;
1385 #ifdef ROCKET_DEBUG_THROTTLE
1386 printk(KERN_INFO
"throttle %s: %d....\n", tty
->name
,
1387 tty
->ldisc
.chars_in_buffer(tty
));
1390 if (rocket_paranoia_check(info
, "rp_throttle"))
1393 cp
= &info
->channel
;
1395 rp_send_xchar(tty
, STOP_CHAR(tty
));
1397 sClrRTS(&info
->channel
);
1400 static void rp_unthrottle(struct tty_struct
*tty
)
1402 struct r_port
*info
= tty
->driver_data
;
1404 #ifdef ROCKET_DEBUG_THROTTLE
1405 printk(KERN_INFO
"unthrottle %s: %d....\n", tty
->name
,
1406 tty
->ldisc
.chars_in_buffer(tty
));
1409 if (rocket_paranoia_check(info
, "rp_throttle"))
1412 cp
= &info
->channel
;
1414 rp_send_xchar(tty
, START_CHAR(tty
));
1416 sSetRTS(&info
->channel
);
1420 * ------------------------------------------------------------
1421 * rp_stop() and rp_start()
1423 * This routines are called before setting or resetting tty->stopped.
1424 * They enable or disable transmitter interrupts, as necessary.
1425 * ------------------------------------------------------------
1427 static void rp_stop(struct tty_struct
*tty
)
1429 struct r_port
*info
= tty
->driver_data
;
1431 #ifdef ROCKET_DEBUG_FLOW
1432 printk(KERN_INFO
"stop %s: %d %d....\n", tty
->name
,
1433 info
->xmit_cnt
, info
->xmit_fifo_room
);
1436 if (rocket_paranoia_check(info
, "rp_stop"))
1439 if (sGetTxCnt(&info
->channel
))
1440 sDisTransmit(&info
->channel
);
1443 static void rp_start(struct tty_struct
*tty
)
1445 struct r_port
*info
= tty
->driver_data
;
1447 #ifdef ROCKET_DEBUG_FLOW
1448 printk(KERN_INFO
"start %s: %d %d....\n", tty
->name
,
1449 info
->xmit_cnt
, info
->xmit_fifo_room
);
1452 if (rocket_paranoia_check(info
, "rp_stop"))
1455 sEnTransmit(&info
->channel
);
1456 set_bit((info
->aiop
* 8) + info
->chan
,
1457 (void *) &xmit_flags
[info
->board
]);
1461 * rp_wait_until_sent() --- wait until the transmitter is empty
1463 static void rp_wait_until_sent(struct tty_struct
*tty
, int timeout
)
1465 struct r_port
*info
= tty
->driver_data
;
1467 unsigned long orig_jiffies
;
1468 int check_time
, exit_time
;
1471 if (rocket_paranoia_check(info
, "rp_wait_until_sent"))
1474 cp
= &info
->channel
;
1476 orig_jiffies
= jiffies
;
1477 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1478 printk(KERN_INFO
"In RP_wait_until_sent(%d) (jiff=%lu)...\n", timeout
,
1480 printk(KERN_INFO
"cps=%d...\n", info
->cps
);
1483 txcnt
= sGetTxCnt(cp
);
1485 if (sGetChanStatusLo(cp
) & TXSHRMT
)
1487 check_time
= (HZ
/ info
->cps
) / 5;
1489 check_time
= HZ
* txcnt
/ info
->cps
;
1492 exit_time
= orig_jiffies
+ timeout
- jiffies
;
1495 if (exit_time
< check_time
)
1496 check_time
= exit_time
;
1498 if (check_time
== 0)
1500 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1501 printk(KERN_INFO
"txcnt = %d (jiff=%lu,check=%d)...\n", txcnt
,
1502 jiffies
, check_time
);
1504 msleep_interruptible(jiffies_to_msecs(check_time
));
1505 if (signal_pending(current
))
1508 __set_current_state(TASK_RUNNING
);
1509 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1510 printk(KERN_INFO
"txcnt = %d (jiff=%lu)...done\n", txcnt
, jiffies
);
1515 * rp_hangup() --- called by tty_hangup() when a hangup is signaled.
1517 static void rp_hangup(struct tty_struct
*tty
)
1520 struct r_port
*info
= tty
->driver_data
;
1521 unsigned long flags
;
1523 if (rocket_paranoia_check(info
, "rp_hangup"))
1526 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_HANGUP))
1527 printk(KERN_INFO
"rp_hangup of ttyR%d...\n", info
->line
);
1529 rp_flush_buffer(tty
);
1530 spin_lock_irqsave(&info
->port
.lock
, flags
);
1531 if (info
->port
.flags
& ASYNC_CLOSING
) {
1532 spin_unlock_irqrestore(&info
->port
.lock
, flags
);
1535 if (info
->port
.count
)
1536 atomic_dec(&rp_num_ports_open
);
1537 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1538 spin_unlock_irqrestore(&info
->port
.lock
, flags
);
1540 tty_port_hangup(&info
->port
);
1542 cp
= &info
->channel
;
1545 sDisInterrupts(cp
, (TXINT_EN
| MCINT_EN
| RXINT_EN
| SRCINT_EN
| CHANINT_EN
));
1547 sDisTxSoftFlowCtl(cp
);
1549 clear_bit(ASYNCB_INITIALIZED
, &info
->port
.flags
);
1551 wake_up_interruptible(&info
->port
.open_wait
);
1555 * Exception handler - write char routine. The RocketPort driver uses a
1556 * double-buffering strategy, with the twist that if the in-memory CPU
1557 * buffer is empty, and there's space in the transmit FIFO, the
1558 * writing routines will write directly to transmit FIFO.
1559 * Write buffer and counters protected by spinlocks
1561 static int rp_put_char(struct tty_struct
*tty
, unsigned char ch
)
1563 struct r_port
*info
= tty
->driver_data
;
1565 unsigned long flags
;
1567 if (rocket_paranoia_check(info
, "rp_put_char"))
1571 * Grab the port write mutex, locking out other processes that try to
1572 * write to this port
1574 mutex_lock(&info
->write_mtx
);
1576 #ifdef ROCKET_DEBUG_WRITE
1577 printk(KERN_INFO
"rp_put_char %c...\n", ch
);
1580 spin_lock_irqsave(&info
->slock
, flags
);
1581 cp
= &info
->channel
;
1583 if (!tty
->stopped
&& !tty
->hw_stopped
&& info
->xmit_fifo_room
== 0)
1584 info
->xmit_fifo_room
= TXFIFO_SIZE
- sGetTxCnt(cp
);
1586 if (tty
->stopped
|| tty
->hw_stopped
|| info
->xmit_fifo_room
== 0 || info
->xmit_cnt
!= 0) {
1587 info
->xmit_buf
[info
->xmit_head
++] = ch
;
1588 info
->xmit_head
&= XMIT_BUF_SIZE
- 1;
1590 set_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1592 sOutB(sGetTxRxDataIO(cp
), ch
);
1593 info
->xmit_fifo_room
--;
1595 spin_unlock_irqrestore(&info
->slock
, flags
);
1596 mutex_unlock(&info
->write_mtx
);
1601 * Exception handler - write routine, called when user app writes to the device.
1602 * A per port write mutex is used to protect from another process writing to
1603 * this port at the same time. This other process could be running on the other CPU
1604 * or get control of the CPU if the copy_from_user() blocks due to a page fault (swapped out).
1605 * Spinlocks protect the info xmit members.
1607 static int rp_write(struct tty_struct
*tty
,
1608 const unsigned char *buf
, int count
)
1610 struct r_port
*info
= tty
->driver_data
;
1612 const unsigned char *b
;
1614 unsigned long flags
;
1616 if (count
<= 0 || rocket_paranoia_check(info
, "rp_write"))
1619 if (mutex_lock_interruptible(&info
->write_mtx
))
1620 return -ERESTARTSYS
;
1622 #ifdef ROCKET_DEBUG_WRITE
1623 printk(KERN_INFO
"rp_write %d chars...\n", count
);
1625 cp
= &info
->channel
;
1627 if (!tty
->stopped
&& !tty
->hw_stopped
&& info
->xmit_fifo_room
< count
)
1628 info
->xmit_fifo_room
= TXFIFO_SIZE
- sGetTxCnt(cp
);
1631 * If the write queue for the port is empty, and there is FIFO space, stuff bytes
1632 * into FIFO. Use the write queue for temp storage.
1634 if (!tty
->stopped
&& !tty
->hw_stopped
&& info
->xmit_cnt
== 0 && info
->xmit_fifo_room
> 0) {
1635 c
= min(count
, info
->xmit_fifo_room
);
1638 /* Push data into FIFO, 2 bytes at a time */
1639 sOutStrW(sGetTxRxDataIO(cp
), (unsigned short *) b
, c
/ 2);
1641 /* If there is a byte remaining, write it */
1643 sOutB(sGetTxRxDataIO(cp
), b
[c
- 1]);
1649 spin_lock_irqsave(&info
->slock
, flags
);
1650 info
->xmit_fifo_room
-= c
;
1651 spin_unlock_irqrestore(&info
->slock
, flags
);
1654 /* If count is zero, we wrote it all and are done */
1658 /* Write remaining data into the port's xmit_buf */
1661 if (!test_bit(ASYNCB_NORMAL_ACTIVE
, &info
->port
.flags
))
1663 c
= min(count
, XMIT_BUF_SIZE
- info
->xmit_cnt
- 1);
1664 c
= min(c
, XMIT_BUF_SIZE
- info
->xmit_head
);
1669 memcpy(info
->xmit_buf
+ info
->xmit_head
, b
, c
);
1671 spin_lock_irqsave(&info
->slock
, flags
);
1673 (info
->xmit_head
+ c
) & (XMIT_BUF_SIZE
- 1);
1674 info
->xmit_cnt
+= c
;
1675 spin_unlock_irqrestore(&info
->slock
, flags
);
1682 if ((retval
> 0) && !tty
->stopped
&& !tty
->hw_stopped
)
1683 set_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1686 if (info
->xmit_cnt
< WAKEUP_CHARS
) {
1688 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1689 wake_up_interruptible(&tty
->poll_wait
);
1692 mutex_unlock(&info
->write_mtx
);
1697 * Return the number of characters that can be sent. We estimate
1698 * only using the in-memory transmit buffer only, and ignore the
1699 * potential space in the transmit FIFO.
1701 static int rp_write_room(struct tty_struct
*tty
)
1703 struct r_port
*info
= tty
->driver_data
;
1706 if (rocket_paranoia_check(info
, "rp_write_room"))
1709 ret
= XMIT_BUF_SIZE
- info
->xmit_cnt
- 1;
1712 #ifdef ROCKET_DEBUG_WRITE
1713 printk(KERN_INFO
"rp_write_room returns %d...\n", ret
);
1719 * Return the number of characters in the buffer. Again, this only
1720 * counts those characters in the in-memory transmit buffer.
1722 static int rp_chars_in_buffer(struct tty_struct
*tty
)
1724 struct r_port
*info
= tty
->driver_data
;
1727 if (rocket_paranoia_check(info
, "rp_chars_in_buffer"))
1730 cp
= &info
->channel
;
1732 #ifdef ROCKET_DEBUG_WRITE
1733 printk(KERN_INFO
"rp_chars_in_buffer returns %d...\n", info
->xmit_cnt
);
1735 return info
->xmit_cnt
;
1739 * Flushes the TX fifo for a port, deletes data in the xmit_buf stored in the
1740 * r_port struct for the port. Note that spinlock are used to protect info members,
1741 * do not call this function if the spinlock is already held.
1743 static void rp_flush_buffer(struct tty_struct
*tty
)
1745 struct r_port
*info
= tty
->driver_data
;
1747 unsigned long flags
;
1749 if (rocket_paranoia_check(info
, "rp_flush_buffer"))
1752 spin_lock_irqsave(&info
->slock
, flags
);
1753 info
->xmit_cnt
= info
->xmit_head
= info
->xmit_tail
= 0;
1754 spin_unlock_irqrestore(&info
->slock
, flags
);
1756 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1757 wake_up_interruptible(&tty
->poll_wait
);
1761 cp
= &info
->channel
;
1767 static struct pci_device_id __devinitdata rocket_pci_ids
[] = {
1768 { PCI_DEVICE(PCI_VENDOR_ID_RP
, PCI_ANY_ID
) },
1771 MODULE_DEVICE_TABLE(pci
, rocket_pci_ids
);
1774 * Called when a PCI card is found. Retrieves and stores model information,
1775 * init's aiopic and serial port hardware.
1776 * Inputs: i is the board number (0-n)
1778 static __init
int register_PCI(int i
, struct pci_dev
*dev
)
1780 int num_aiops
, aiop
, max_num_aiops
, num_chan
, chan
;
1781 unsigned int aiopio
[MAX_AIOPS_PER_BOARD
];
1782 char *str
, *board_type
;
1786 int altChanRingIndicator
= 0;
1787 int ports_per_aiop
= 8;
1788 WordIO_t ConfigIO
= 0;
1789 ByteIO_t UPCIRingInd
= 0;
1791 if (!dev
|| pci_enable_device(dev
))
1794 rcktpt_io_addr
[i
] = pci_resource_start(dev
, 0);
1796 rcktpt_type
[i
] = ROCKET_TYPE_NORMAL
;
1797 rocketModel
[i
].loadrm2
= 0;
1798 rocketModel
[i
].startingPortNumber
= nextLineNumber
;
1800 /* Depending on the model, set up some config variables */
1801 switch (dev
->device
) {
1802 case PCI_DEVICE_ID_RP4QUAD
:
1806 rocketModel
[i
].model
= MODEL_RP4QUAD
;
1807 strcpy(rocketModel
[i
].modelString
, "RocketPort 4 port w/quad cable");
1808 rocketModel
[i
].numPorts
= 4;
1810 case PCI_DEVICE_ID_RP8OCTA
:
1813 rocketModel
[i
].model
= MODEL_RP8OCTA
;
1814 strcpy(rocketModel
[i
].modelString
, "RocketPort 8 port w/octa cable");
1815 rocketModel
[i
].numPorts
= 8;
1817 case PCI_DEVICE_ID_URP8OCTA
:
1820 rocketModel
[i
].model
= MODEL_UPCI_RP8OCTA
;
1821 strcpy(rocketModel
[i
].modelString
, "RocketPort UPCI 8 port w/octa cable");
1822 rocketModel
[i
].numPorts
= 8;
1824 case PCI_DEVICE_ID_RP8INTF
:
1827 rocketModel
[i
].model
= MODEL_RP8INTF
;
1828 strcpy(rocketModel
[i
].modelString
, "RocketPort 8 port w/external I/F");
1829 rocketModel
[i
].numPorts
= 8;
1831 case PCI_DEVICE_ID_URP8INTF
:
1834 rocketModel
[i
].model
= MODEL_UPCI_RP8INTF
;
1835 strcpy(rocketModel
[i
].modelString
, "RocketPort UPCI 8 port w/external I/F");
1836 rocketModel
[i
].numPorts
= 8;
1838 case PCI_DEVICE_ID_RP8J
:
1841 rocketModel
[i
].model
= MODEL_RP8J
;
1842 strcpy(rocketModel
[i
].modelString
, "RocketPort 8 port w/RJ11 connectors");
1843 rocketModel
[i
].numPorts
= 8;
1845 case PCI_DEVICE_ID_RP4J
:
1849 rocketModel
[i
].model
= MODEL_RP4J
;
1850 strcpy(rocketModel
[i
].modelString
, "RocketPort 4 port w/RJ45 connectors");
1851 rocketModel
[i
].numPorts
= 4;
1853 case PCI_DEVICE_ID_RP8SNI
:
1854 str
= "8 (DB78 Custom)";
1856 rocketModel
[i
].model
= MODEL_RP8SNI
;
1857 strcpy(rocketModel
[i
].modelString
, "RocketPort 8 port w/ custom DB78");
1858 rocketModel
[i
].numPorts
= 8;
1860 case PCI_DEVICE_ID_RP16SNI
:
1861 str
= "16 (DB78 Custom)";
1863 rocketModel
[i
].model
= MODEL_RP16SNI
;
1864 strcpy(rocketModel
[i
].modelString
, "RocketPort 16 port w/ custom DB78");
1865 rocketModel
[i
].numPorts
= 16;
1867 case PCI_DEVICE_ID_RP16INTF
:
1870 rocketModel
[i
].model
= MODEL_RP16INTF
;
1871 strcpy(rocketModel
[i
].modelString
, "RocketPort 16 port w/external I/F");
1872 rocketModel
[i
].numPorts
= 16;
1874 case PCI_DEVICE_ID_URP16INTF
:
1877 rocketModel
[i
].model
= MODEL_UPCI_RP16INTF
;
1878 strcpy(rocketModel
[i
].modelString
, "RocketPort UPCI 16 port w/external I/F");
1879 rocketModel
[i
].numPorts
= 16;
1881 case PCI_DEVICE_ID_CRP16INTF
:
1884 rocketModel
[i
].model
= MODEL_CPCI_RP16INTF
;
1885 strcpy(rocketModel
[i
].modelString
, "RocketPort Compact PCI 16 port w/external I/F");
1886 rocketModel
[i
].numPorts
= 16;
1888 case PCI_DEVICE_ID_RP32INTF
:
1891 rocketModel
[i
].model
= MODEL_RP32INTF
;
1892 strcpy(rocketModel
[i
].modelString
, "RocketPort 32 port w/external I/F");
1893 rocketModel
[i
].numPorts
= 32;
1895 case PCI_DEVICE_ID_URP32INTF
:
1898 rocketModel
[i
].model
= MODEL_UPCI_RP32INTF
;
1899 strcpy(rocketModel
[i
].modelString
, "RocketPort UPCI 32 port w/external I/F");
1900 rocketModel
[i
].numPorts
= 32;
1902 case PCI_DEVICE_ID_RPP4
:
1903 str
= "Plus Quadcable";
1906 altChanRingIndicator
++;
1908 rocketModel
[i
].model
= MODEL_RPP4
;
1909 strcpy(rocketModel
[i
].modelString
, "RocketPort Plus 4 port");
1910 rocketModel
[i
].numPorts
= 4;
1912 case PCI_DEVICE_ID_RPP8
:
1913 str
= "Plus Octacable";
1916 altChanRingIndicator
++;
1918 rocketModel
[i
].model
= MODEL_RPP8
;
1919 strcpy(rocketModel
[i
].modelString
, "RocketPort Plus 8 port");
1920 rocketModel
[i
].numPorts
= 8;
1922 case PCI_DEVICE_ID_RP2_232
:
1923 str
= "Plus 2 (RS-232)";
1926 altChanRingIndicator
++;
1928 rocketModel
[i
].model
= MODEL_RP2_232
;
1929 strcpy(rocketModel
[i
].modelString
, "RocketPort Plus 2 port RS232");
1930 rocketModel
[i
].numPorts
= 2;
1932 case PCI_DEVICE_ID_RP2_422
:
1933 str
= "Plus 2 (RS-422)";
1936 altChanRingIndicator
++;
1938 rocketModel
[i
].model
= MODEL_RP2_422
;
1939 strcpy(rocketModel
[i
].modelString
, "RocketPort Plus 2 port RS422");
1940 rocketModel
[i
].numPorts
= 2;
1942 case PCI_DEVICE_ID_RP6M
:
1948 /* If revision is 1, the rocketmodem flash must be loaded.
1949 * If it is 2 it is a "socketed" version. */
1950 if (dev
->revision
== 1) {
1951 rcktpt_type
[i
] = ROCKET_TYPE_MODEMII
;
1952 rocketModel
[i
].loadrm2
= 1;
1954 rcktpt_type
[i
] = ROCKET_TYPE_MODEM
;
1957 rocketModel
[i
].model
= MODEL_RP6M
;
1958 strcpy(rocketModel
[i
].modelString
, "RocketModem 6 port");
1959 rocketModel
[i
].numPorts
= 6;
1961 case PCI_DEVICE_ID_RP4M
:
1965 if (dev
->revision
== 1) {
1966 rcktpt_type
[i
] = ROCKET_TYPE_MODEMII
;
1967 rocketModel
[i
].loadrm2
= 1;
1969 rcktpt_type
[i
] = ROCKET_TYPE_MODEM
;
1972 rocketModel
[i
].model
= MODEL_RP4M
;
1973 strcpy(rocketModel
[i
].modelString
, "RocketModem 4 port");
1974 rocketModel
[i
].numPorts
= 4;
1977 str
= "(unknown/unsupported)";
1983 * Check for UPCI boards.
1986 switch (dev
->device
) {
1987 case PCI_DEVICE_ID_URP32INTF
:
1988 case PCI_DEVICE_ID_URP8INTF
:
1989 case PCI_DEVICE_ID_URP16INTF
:
1990 case PCI_DEVICE_ID_CRP16INTF
:
1991 case PCI_DEVICE_ID_URP8OCTA
:
1992 rcktpt_io_addr
[i
] = pci_resource_start(dev
, 2);
1993 ConfigIO
= pci_resource_start(dev
, 1);
1994 if (dev
->device
== PCI_DEVICE_ID_URP8OCTA
) {
1995 UPCIRingInd
= rcktpt_io_addr
[i
] + _PCI_9030_RING_IND
;
1998 * Check for octa or quad cable.
2001 (sInW(ConfigIO
+ _PCI_9030_GPIO_CTRL
) &
2002 PCI_GPIO_CTRL_8PORT
)) {
2005 rocketModel
[i
].numPorts
= 4;
2009 case PCI_DEVICE_ID_UPCI_RM3_8PORT
:
2012 rocketModel
[i
].model
= MODEL_UPCI_RM3_8PORT
;
2013 strcpy(rocketModel
[i
].modelString
, "RocketModem III 8 port");
2014 rocketModel
[i
].numPorts
= 8;
2015 rcktpt_io_addr
[i
] = pci_resource_start(dev
, 2);
2016 UPCIRingInd
= rcktpt_io_addr
[i
] + _PCI_9030_RING_IND
;
2017 ConfigIO
= pci_resource_start(dev
, 1);
2018 rcktpt_type
[i
] = ROCKET_TYPE_MODEMIII
;
2020 case PCI_DEVICE_ID_UPCI_RM3_4PORT
:
2023 rocketModel
[i
].model
= MODEL_UPCI_RM3_4PORT
;
2024 strcpy(rocketModel
[i
].modelString
, "RocketModem III 4 port");
2025 rocketModel
[i
].numPorts
= 4;
2026 rcktpt_io_addr
[i
] = pci_resource_start(dev
, 2);
2027 UPCIRingInd
= rcktpt_io_addr
[i
] + _PCI_9030_RING_IND
;
2028 ConfigIO
= pci_resource_start(dev
, 1);
2029 rcktpt_type
[i
] = ROCKET_TYPE_MODEMIII
;
2035 switch (rcktpt_type
[i
]) {
2036 case ROCKET_TYPE_MODEM
:
2037 board_type
= "RocketModem";
2039 case ROCKET_TYPE_MODEMII
:
2040 board_type
= "RocketModem II";
2042 case ROCKET_TYPE_MODEMIII
:
2043 board_type
= "RocketModem III";
2046 board_type
= "RocketPort";
2051 sClockPrescale
= 0x12; /* mod 2 (divide by 3) */
2052 rp_baud_base
[i
] = 921600;
2055 * If support_low_speed is set, use the slow clock
2056 * prescale, which supports 50 bps
2058 if (support_low_speed
) {
2059 /* mod 9 (divide by 10) prescale */
2060 sClockPrescale
= 0x19;
2061 rp_baud_base
[i
] = 230400;
2063 /* mod 4 (devide by 5) prescale */
2064 sClockPrescale
= 0x14;
2065 rp_baud_base
[i
] = 460800;
2069 for (aiop
= 0; aiop
< max_num_aiops
; aiop
++)
2070 aiopio
[aiop
] = rcktpt_io_addr
[i
] + (aiop
* 0x40);
2071 ctlp
= sCtlNumToCtlPtr(i
);
2072 num_aiops
= sPCIInitController(ctlp
, i
, aiopio
, max_num_aiops
, ConfigIO
, 0, FREQ_DIS
, 0, altChanRingIndicator
, UPCIRingInd
);
2073 for (aiop
= 0; aiop
< max_num_aiops
; aiop
++)
2074 ctlp
->AiopNumChan
[aiop
] = ports_per_aiop
;
2076 dev_info(&dev
->dev
, "comtrol PCI controller #%d found at "
2077 "address %04lx, %d AIOP(s) (%s), creating ttyR%d - %ld\n",
2078 i
, rcktpt_io_addr
[i
], num_aiops
, rocketModel
[i
].modelString
,
2079 rocketModel
[i
].startingPortNumber
,
2080 rocketModel
[i
].startingPortNumber
+ rocketModel
[i
].numPorts
-1);
2082 if (num_aiops
<= 0) {
2083 rcktpt_io_addr
[i
] = 0;
2088 /* Reset the AIOPIC, init the serial ports */
2089 for (aiop
= 0; aiop
< num_aiops
; aiop
++) {
2090 sResetAiopByNum(ctlp
, aiop
);
2091 num_chan
= ports_per_aiop
;
2092 for (chan
= 0; chan
< num_chan
; chan
++)
2093 init_r_port(i
, aiop
, chan
, dev
);
2096 /* Rocket modems must be reset */
2097 if ((rcktpt_type
[i
] == ROCKET_TYPE_MODEM
) ||
2098 (rcktpt_type
[i
] == ROCKET_TYPE_MODEMII
) ||
2099 (rcktpt_type
[i
] == ROCKET_TYPE_MODEMIII
)) {
2100 num_chan
= ports_per_aiop
;
2101 for (chan
= 0; chan
< num_chan
; chan
++)
2102 sPCIModemReset(ctlp
, chan
, 1);
2104 for (chan
= 0; chan
< num_chan
; chan
++)
2105 sPCIModemReset(ctlp
, chan
, 0);
2107 rmSpeakerReset(ctlp
, rocketModel
[i
].model
);
2113 * Probes for PCI cards, inits them if found
2114 * Input: board_found = number of ISA boards already found, or the
2115 * starting board number
2116 * Returns: Number of PCI boards found
2118 static int __init
init_PCI(int boards_found
)
2120 struct pci_dev
*dev
= NULL
;
2123 /* Work through the PCI device list, pulling out ours */
2124 while ((dev
= pci_get_device(PCI_VENDOR_ID_RP
, PCI_ANY_ID
, dev
))) {
2125 if (register_PCI(count
+ boards_found
, dev
))
2131 #endif /* CONFIG_PCI */
2134 * Probes for ISA cards
2135 * Input: i = the board number to look for
2136 * Returns: 1 if board found, 0 else
2138 static int __init
init_ISA(int i
)
2140 int num_aiops
, num_chan
= 0, total_num_chan
= 0;
2142 unsigned int aiopio
[MAX_AIOPS_PER_BOARD
];
2146 /* If io_addr is zero, no board configured */
2147 if (rcktpt_io_addr
[i
] == 0)
2150 /* Reserve the IO region */
2151 if (!request_region(rcktpt_io_addr
[i
], 64, "Comtrol RocketPort")) {
2152 printk(KERN_ERR
"Unable to reserve IO region for configured "
2153 "ISA RocketPort at address 0x%lx, board not "
2154 "installed...\n", rcktpt_io_addr
[i
]);
2155 rcktpt_io_addr
[i
] = 0;
2159 ctlp
= sCtlNumToCtlPtr(i
);
2161 ctlp
->boardType
= rcktpt_type
[i
];
2163 switch (rcktpt_type
[i
]) {
2164 case ROCKET_TYPE_PC104
:
2165 type_string
= "(PC104)";
2167 case ROCKET_TYPE_MODEM
:
2168 type_string
= "(RocketModem)";
2170 case ROCKET_TYPE_MODEMII
:
2171 type_string
= "(RocketModem II)";
2179 * If support_low_speed is set, use the slow clock prescale,
2180 * which supports 50 bps
2182 if (support_low_speed
) {
2183 sClockPrescale
= 0x19; /* mod 9 (divide by 10) prescale */
2184 rp_baud_base
[i
] = 230400;
2186 sClockPrescale
= 0x14; /* mod 4 (devide by 5) prescale */
2187 rp_baud_base
[i
] = 460800;
2190 for (aiop
= 0; aiop
< MAX_AIOPS_PER_BOARD
; aiop
++)
2191 aiopio
[aiop
] = rcktpt_io_addr
[i
] + (aiop
* 0x400);
2193 num_aiops
= sInitController(ctlp
, i
, controller
+ (i
* 0x400), aiopio
, MAX_AIOPS_PER_BOARD
, 0, FREQ_DIS
, 0);
2195 if (ctlp
->boardType
== ROCKET_TYPE_PC104
) {
2196 sEnAiop(ctlp
, 2); /* only one AIOPIC, but these */
2197 sEnAiop(ctlp
, 3); /* CSels used for other stuff */
2200 /* If something went wrong initing the AIOP's release the ISA IO memory */
2201 if (num_aiops
<= 0) {
2202 release_region(rcktpt_io_addr
[i
], 64);
2203 rcktpt_io_addr
[i
] = 0;
2207 rocketModel
[i
].startingPortNumber
= nextLineNumber
;
2209 for (aiop
= 0; aiop
< num_aiops
; aiop
++) {
2210 sResetAiopByNum(ctlp
, aiop
);
2211 sEnAiop(ctlp
, aiop
);
2212 num_chan
= sGetAiopNumChan(ctlp
, aiop
);
2213 total_num_chan
+= num_chan
;
2214 for (chan
= 0; chan
< num_chan
; chan
++)
2215 init_r_port(i
, aiop
, chan
, NULL
);
2218 if ((rcktpt_type
[i
] == ROCKET_TYPE_MODEM
) || (rcktpt_type
[i
] == ROCKET_TYPE_MODEMII
)) {
2219 num_chan
= sGetAiopNumChan(ctlp
, 0);
2220 total_num_chan
= num_chan
;
2221 for (chan
= 0; chan
< num_chan
; chan
++)
2222 sModemReset(ctlp
, chan
, 1);
2224 for (chan
= 0; chan
< num_chan
; chan
++)
2225 sModemReset(ctlp
, chan
, 0);
2227 strcpy(rocketModel
[i
].modelString
, "RocketModem ISA");
2229 strcpy(rocketModel
[i
].modelString
, "RocketPort ISA");
2231 rocketModel
[i
].numPorts
= total_num_chan
;
2232 rocketModel
[i
].model
= MODEL_ISA
;
2234 printk(KERN_INFO
"RocketPort ISA card #%d found at 0x%lx - %d AIOPs %s\n",
2235 i
, rcktpt_io_addr
[i
], num_aiops
, type_string
);
2237 printk(KERN_INFO
"Installing %s, creating /dev/ttyR%d - %ld\n",
2238 rocketModel
[i
].modelString
,
2239 rocketModel
[i
].startingPortNumber
,
2240 rocketModel
[i
].startingPortNumber
+
2241 rocketModel
[i
].numPorts
- 1);
2246 static const struct tty_operations rocket_ops
= {
2250 .put_char
= rp_put_char
,
2251 .write_room
= rp_write_room
,
2252 .chars_in_buffer
= rp_chars_in_buffer
,
2253 .flush_buffer
= rp_flush_buffer
,
2255 .throttle
= rp_throttle
,
2256 .unthrottle
= rp_unthrottle
,
2257 .set_termios
= rp_set_termios
,
2260 .hangup
= rp_hangup
,
2261 .break_ctl
= rp_break
,
2262 .send_xchar
= rp_send_xchar
,
2263 .wait_until_sent
= rp_wait_until_sent
,
2264 .tiocmget
= rp_tiocmget
,
2265 .tiocmset
= rp_tiocmset
,
2268 static const struct tty_port_operations rocket_port_ops
= {
2269 .carrier_raised
= carrier_raised
,
2274 * The module "startup" routine; it's run when the module is loaded.
2276 static int __init
rp_init(void)
2278 int ret
= -ENOMEM
, pci_boards_found
, isa_boards_found
, i
;
2280 printk(KERN_INFO
"RocketPort device driver module, version %s, %s\n",
2281 ROCKET_VERSION
, ROCKET_DATE
);
2283 rocket_driver
= alloc_tty_driver(MAX_RP_PORTS
);
2288 * If board 1 is non-zero, there is at least one ISA configured. If controller is
2289 * zero, use the default controller IO address of board1 + 0x40.
2292 if (controller
== 0)
2293 controller
= board1
+ 0x40;
2295 controller
= 0; /* Used as a flag, meaning no ISA boards */
2298 /* If an ISA card is configured, reserve the 4 byte IO space for the Mudbac controller */
2299 if (controller
&& (!request_region(controller
, 4, "Comtrol RocketPort"))) {
2300 printk(KERN_ERR
"Unable to reserve IO region for first "
2301 "configured ISA RocketPort controller 0x%lx. "
2302 "Driver exiting\n", controller
);
2307 /* Store ISA variable retrieved from command line or .conf file. */
2308 rcktpt_io_addr
[0] = board1
;
2309 rcktpt_io_addr
[1] = board2
;
2310 rcktpt_io_addr
[2] = board3
;
2311 rcktpt_io_addr
[3] = board4
;
2313 rcktpt_type
[0] = modem1
? ROCKET_TYPE_MODEM
: ROCKET_TYPE_NORMAL
;
2314 rcktpt_type
[0] = pc104_1
[0] ? ROCKET_TYPE_PC104
: rcktpt_type
[0];
2315 rcktpt_type
[1] = modem2
? ROCKET_TYPE_MODEM
: ROCKET_TYPE_NORMAL
;
2316 rcktpt_type
[1] = pc104_2
[0] ? ROCKET_TYPE_PC104
: rcktpt_type
[1];
2317 rcktpt_type
[2] = modem3
? ROCKET_TYPE_MODEM
: ROCKET_TYPE_NORMAL
;
2318 rcktpt_type
[2] = pc104_3
[0] ? ROCKET_TYPE_PC104
: rcktpt_type
[2];
2319 rcktpt_type
[3] = modem4
? ROCKET_TYPE_MODEM
: ROCKET_TYPE_NORMAL
;
2320 rcktpt_type
[3] = pc104_4
[0] ? ROCKET_TYPE_PC104
: rcktpt_type
[3];
2323 * Set up the tty driver structure and then register this
2324 * driver with the tty layer.
2327 rocket_driver
->owner
= THIS_MODULE
;
2328 rocket_driver
->flags
= TTY_DRIVER_DYNAMIC_DEV
;
2329 rocket_driver
->name
= "ttyR";
2330 rocket_driver
->driver_name
= "Comtrol RocketPort";
2331 rocket_driver
->major
= TTY_ROCKET_MAJOR
;
2332 rocket_driver
->minor_start
= 0;
2333 rocket_driver
->type
= TTY_DRIVER_TYPE_SERIAL
;
2334 rocket_driver
->subtype
= SERIAL_TYPE_NORMAL
;
2335 rocket_driver
->init_termios
= tty_std_termios
;
2336 rocket_driver
->init_termios
.c_cflag
=
2337 B9600
| CS8
| CREAD
| HUPCL
| CLOCAL
;
2338 rocket_driver
->init_termios
.c_ispeed
= 9600;
2339 rocket_driver
->init_termios
.c_ospeed
= 9600;
2340 #ifdef ROCKET_SOFT_FLOW
2341 rocket_driver
->flags
|= TTY_DRIVER_REAL_RAW
;
2343 tty_set_operations(rocket_driver
, &rocket_ops
);
2345 ret
= tty_register_driver(rocket_driver
);
2347 printk(KERN_ERR
"Couldn't install tty RocketPort driver\n");
2351 #ifdef ROCKET_DEBUG_OPEN
2352 printk(KERN_INFO
"RocketPort driver is major %d\n", rocket_driver
.major
);
2356 * OK, let's probe each of the controllers looking for boards. Any boards found
2357 * will be initialized here.
2359 isa_boards_found
= 0;
2360 pci_boards_found
= 0;
2362 for (i
= 0; i
< NUM_BOARDS
; i
++) {
2368 if (isa_boards_found
< NUM_BOARDS
)
2369 pci_boards_found
= init_PCI(isa_boards_found
);
2372 max_board
= pci_boards_found
+ isa_boards_found
;
2374 if (max_board
== 0) {
2375 printk(KERN_ERR
"No rocketport ports found; unloading driver\n");
2382 tty_unregister_driver(rocket_driver
);
2384 put_tty_driver(rocket_driver
);
2390 static void rp_cleanup_module(void)
2395 del_timer_sync(&rocket_timer
);
2397 retval
= tty_unregister_driver(rocket_driver
);
2399 printk(KERN_ERR
"Error %d while trying to unregister "
2400 "rocketport driver\n", -retval
);
2402 for (i
= 0; i
< MAX_RP_PORTS
; i
++)
2404 tty_unregister_device(rocket_driver
, i
);
2408 put_tty_driver(rocket_driver
);
2410 for (i
= 0; i
< NUM_BOARDS
; i
++) {
2411 if (rcktpt_io_addr
[i
] <= 0 || is_PCI
[i
])
2413 release_region(rcktpt_io_addr
[i
], 64);
2416 release_region(controller
, 4);
2419 /***************************************************************************
2420 Function: sInitController
2421 Purpose: Initialization of controller global registers and controller
2423 Call: sInitController(CtlP,CtlNum,MudbacIO,AiopIOList,AiopIOListSize,
2424 IRQNum,Frequency,PeriodicOnly)
2425 CONTROLLER_T *CtlP; Ptr to controller structure
2426 int CtlNum; Controller number
2427 ByteIO_t MudbacIO; Mudbac base I/O address.
2428 ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2429 This list must be in the order the AIOPs will be found on the
2430 controller. Once an AIOP in the list is not found, it is
2431 assumed that there are no more AIOPs on the controller.
2432 int AiopIOListSize; Number of addresses in AiopIOList
2433 int IRQNum; Interrupt Request number. Can be any of the following:
2434 0: Disable global interrupts
2443 Byte_t Frequency: A flag identifying the frequency
2444 of the periodic interrupt, can be any one of the following:
2445 FREQ_DIS - periodic interrupt disabled
2446 FREQ_137HZ - 137 Hertz
2447 FREQ_69HZ - 69 Hertz
2448 FREQ_34HZ - 34 Hertz
2449 FREQ_17HZ - 17 Hertz
2452 If IRQNum is set to 0 the Frequency parameter is
2453 overidden, it is forced to a value of FREQ_DIS.
2454 int PeriodicOnly: 1 if all interrupts except the periodic
2455 interrupt are to be blocked.
2456 0 is both the periodic interrupt and
2457 other channel interrupts are allowed.
2458 If IRQNum is set to 0 the PeriodicOnly parameter is
2459 overidden, it is forced to a value of 0.
2460 Return: int: Number of AIOPs on the controller, or CTLID_NULL if controller
2461 initialization failed.
2464 If periodic interrupts are to be disabled but AIOP interrupts
2465 are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
2467 If interrupts are to be completely disabled set IRQNum to 0.
2469 Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
2470 invalid combination.
2472 This function performs initialization of global interrupt modes,
2473 but it does not actually enable global interrupts. To enable
2474 and disable global interrupts use functions sEnGlobalInt() and
2475 sDisGlobalInt(). Enabling of global interrupts is normally not
2476 done until all other initializations are complete.
2478 Even if interrupts are globally enabled, they must also be
2479 individually enabled for each channel that is to generate
2482 Warnings: No range checking on any of the parameters is done.
2484 No context switches are allowed while executing this function.
2486 After this function all AIOPs on the controller are disabled,
2487 they can be enabled with sEnAiop().
2489 static int sInitController(CONTROLLER_T
* CtlP
, int CtlNum
, ByteIO_t MudbacIO
,
2490 ByteIO_t
* AiopIOList
, int AiopIOListSize
,
2491 int IRQNum
, Byte_t Frequency
, int PeriodicOnly
)
2497 CtlP
->AiopIntrBits
= aiop_intr_bits
;
2498 CtlP
->AltChanRingIndicator
= 0;
2499 CtlP
->CtlNum
= CtlNum
;
2500 CtlP
->CtlID
= CTLID_0001
; /* controller release 1 */
2501 CtlP
->BusType
= isISA
;
2502 CtlP
->MBaseIO
= MudbacIO
;
2503 CtlP
->MReg1IO
= MudbacIO
+ 1;
2504 CtlP
->MReg2IO
= MudbacIO
+ 2;
2505 CtlP
->MReg3IO
= MudbacIO
+ 3;
2506 CtlP
->MReg2
= 0; /* interrupt disable */
2507 CtlP
->MReg3
= 0; /* no periodic interrupts */
2508 sOutB(CtlP
->MReg2IO
, CtlP
->MReg2
);
2509 sOutB(CtlP
->MReg3IO
, CtlP
->MReg3
);
2510 sControllerEOI(CtlP
); /* clear EOI if warm init */
2513 for (i
= done
= 0; i
< AiopIOListSize
; i
++) {
2515 CtlP
->AiopIO
[i
] = (WordIO_t
) io
;
2516 CtlP
->AiopIntChanIO
[i
] = io
+ _INT_CHAN
;
2517 sOutB(CtlP
->MReg2IO
, CtlP
->MReg2
| (i
& 0x03)); /* AIOP index */
2518 sOutB(MudbacIO
, (Byte_t
) (io
>> 6)); /* set up AIOP I/O in MUDBAC */
2521 sEnAiop(CtlP
, i
); /* enable the AIOP */
2522 CtlP
->AiopID
[i
] = sReadAiopID(io
); /* read AIOP ID */
2523 if (CtlP
->AiopID
[i
] == AIOPID_NULL
) /* if AIOP does not exist */
2524 done
= 1; /* done looking for AIOPs */
2526 CtlP
->AiopNumChan
[i
] = sReadAiopNumChan((WordIO_t
) io
); /* num channels in AIOP */
2527 sOutW((WordIO_t
) io
+ _INDX_ADDR
, _CLK_PRE
); /* clock prescaler */
2528 sOutB(io
+ _INDX_DATA
, sClockPrescale
);
2529 CtlP
->NumAiop
++; /* bump count of AIOPs */
2531 sDisAiop(CtlP
, i
); /* disable AIOP */
2534 if (CtlP
->NumAiop
== 0)
2537 return (CtlP
->NumAiop
);
2540 /***************************************************************************
2541 Function: sPCIInitController
2542 Purpose: Initialization of controller global registers and controller
2544 Call: sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize,
2545 IRQNum,Frequency,PeriodicOnly)
2546 CONTROLLER_T *CtlP; Ptr to controller structure
2547 int CtlNum; Controller number
2548 ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2549 This list must be in the order the AIOPs will be found on the
2550 controller. Once an AIOP in the list is not found, it is
2551 assumed that there are no more AIOPs on the controller.
2552 int AiopIOListSize; Number of addresses in AiopIOList
2553 int IRQNum; Interrupt Request number. Can be any of the following:
2554 0: Disable global interrupts
2563 Byte_t Frequency: A flag identifying the frequency
2564 of the periodic interrupt, can be any one of the following:
2565 FREQ_DIS - periodic interrupt disabled
2566 FREQ_137HZ - 137 Hertz
2567 FREQ_69HZ - 69 Hertz
2568 FREQ_34HZ - 34 Hertz
2569 FREQ_17HZ - 17 Hertz
2572 If IRQNum is set to 0 the Frequency parameter is
2573 overidden, it is forced to a value of FREQ_DIS.
2574 int PeriodicOnly: 1 if all interrupts except the periodic
2575 interrupt are to be blocked.
2576 0 is both the periodic interrupt and
2577 other channel interrupts are allowed.
2578 If IRQNum is set to 0 the PeriodicOnly parameter is
2579 overidden, it is forced to a value of 0.
2580 Return: int: Number of AIOPs on the controller, or CTLID_NULL if controller
2581 initialization failed.
2584 If periodic interrupts are to be disabled but AIOP interrupts
2585 are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
2587 If interrupts are to be completely disabled set IRQNum to 0.
2589 Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
2590 invalid combination.
2592 This function performs initialization of global interrupt modes,
2593 but it does not actually enable global interrupts. To enable
2594 and disable global interrupts use functions sEnGlobalInt() and
2595 sDisGlobalInt(). Enabling of global interrupts is normally not
2596 done until all other initializations are complete.
2598 Even if interrupts are globally enabled, they must also be
2599 individually enabled for each channel that is to generate
2602 Warnings: No range checking on any of the parameters is done.
2604 No context switches are allowed while executing this function.
2606 After this function all AIOPs on the controller are disabled,
2607 they can be enabled with sEnAiop().
2609 static int sPCIInitController(CONTROLLER_T
* CtlP
, int CtlNum
,
2610 ByteIO_t
* AiopIOList
, int AiopIOListSize
,
2611 WordIO_t ConfigIO
, int IRQNum
, Byte_t Frequency
,
2612 int PeriodicOnly
, int altChanRingIndicator
,
2618 CtlP
->AltChanRingIndicator
= altChanRingIndicator
;
2619 CtlP
->UPCIRingInd
= UPCIRingInd
;
2620 CtlP
->CtlNum
= CtlNum
;
2621 CtlP
->CtlID
= CTLID_0001
; /* controller release 1 */
2622 CtlP
->BusType
= isPCI
; /* controller release 1 */
2626 CtlP
->PCIIO
= ConfigIO
+ _PCI_9030_INT_CTRL
;
2627 CtlP
->PCIIO2
= ConfigIO
+ _PCI_9030_GPIO_CTRL
;
2628 CtlP
->AiopIntrBits
= upci_aiop_intr_bits
;
2632 (WordIO_t
) ((ByteIO_t
) AiopIOList
[0] + _PCI_INT_FUNC
);
2633 CtlP
->AiopIntrBits
= aiop_intr_bits
;
2636 sPCIControllerEOI(CtlP
); /* clear EOI if warm init */
2639 for (i
= 0; i
< AiopIOListSize
; i
++) {
2641 CtlP
->AiopIO
[i
] = (WordIO_t
) io
;
2642 CtlP
->AiopIntChanIO
[i
] = io
+ _INT_CHAN
;
2644 CtlP
->AiopID
[i
] = sReadAiopID(io
); /* read AIOP ID */
2645 if (CtlP
->AiopID
[i
] == AIOPID_NULL
) /* if AIOP does not exist */
2646 break; /* done looking for AIOPs */
2648 CtlP
->AiopNumChan
[i
] = sReadAiopNumChan((WordIO_t
) io
); /* num channels in AIOP */
2649 sOutW((WordIO_t
) io
+ _INDX_ADDR
, _CLK_PRE
); /* clock prescaler */
2650 sOutB(io
+ _INDX_DATA
, sClockPrescale
);
2651 CtlP
->NumAiop
++; /* bump count of AIOPs */
2654 if (CtlP
->NumAiop
== 0)
2657 return (CtlP
->NumAiop
);
2660 /***************************************************************************
2661 Function: sReadAiopID
2662 Purpose: Read the AIOP idenfication number directly from an AIOP.
2663 Call: sReadAiopID(io)
2664 ByteIO_t io: AIOP base I/O address
2665 Return: int: Flag AIOPID_XXXX if a valid AIOP is found, where X
2666 is replace by an identifying number.
2667 Flag AIOPID_NULL if no valid AIOP is found
2668 Warnings: No context switches are allowed while executing this function.
2671 static int sReadAiopID(ByteIO_t io
)
2673 Byte_t AiopID
; /* ID byte from AIOP */
2675 sOutB(io
+ _CMD_REG
, RESET_ALL
); /* reset AIOP */
2676 sOutB(io
+ _CMD_REG
, 0x0);
2677 AiopID
= sInW(io
+ _CHN_STAT0
) & 0x07;
2680 else /* AIOP does not exist */
2684 /***************************************************************************
2685 Function: sReadAiopNumChan
2686 Purpose: Read the number of channels available in an AIOP directly from
2688 Call: sReadAiopNumChan(io)
2689 WordIO_t io: AIOP base I/O address
2690 Return: int: The number of channels available
2691 Comments: The number of channels is determined by write/reads from identical
2692 offsets within the SRAM address spaces for channels 0 and 4.
2693 If the channel 4 space is mirrored to channel 0 it is a 4 channel
2694 AIOP, otherwise it is an 8 channel.
2695 Warnings: No context switches are allowed while executing this function.
2697 static int sReadAiopNumChan(WordIO_t io
)
2700 static Byte_t R
[4] = { 0x00, 0x00, 0x34, 0x12 };
2702 /* write to chan 0 SRAM */
2703 out32((DWordIO_t
) io
+ _INDX_ADDR
, R
);
2704 sOutW(io
+ _INDX_ADDR
, 0); /* read from SRAM, chan 0 */
2705 x
= sInW(io
+ _INDX_DATA
);
2706 sOutW(io
+ _INDX_ADDR
, 0x4000); /* read from SRAM, chan 4 */
2707 if (x
!= sInW(io
+ _INDX_DATA
)) /* if different must be 8 chan */
2713 /***************************************************************************
2715 Purpose: Initialization of a channel and channel structure
2716 Call: sInitChan(CtlP,ChP,AiopNum,ChanNum)
2717 CONTROLLER_T *CtlP; Ptr to controller structure
2718 CHANNEL_T *ChP; Ptr to channel structure
2719 int AiopNum; AIOP number within controller
2720 int ChanNum; Channel number within AIOP
2721 Return: int: 1 if initialization succeeded, 0 if it fails because channel
2722 number exceeds number of channels available in AIOP.
2723 Comments: This function must be called before a channel can be used.
2724 Warnings: No range checking on any of the parameters is done.
2726 No context switches are allowed while executing this function.
2728 static int sInitChan(CONTROLLER_T
* CtlP
, CHANNEL_T
* ChP
, int AiopNum
,
2739 if (ChanNum
>= CtlP
->AiopNumChan
[AiopNum
])
2740 return 0; /* exceeds num chans in AIOP */
2742 /* Channel, AIOP, and controller identifiers */
2744 ChP
->ChanID
= CtlP
->AiopID
[AiopNum
];
2745 ChP
->AiopNum
= AiopNum
;
2746 ChP
->ChanNum
= ChanNum
;
2748 /* Global direct addresses */
2749 AiopIO
= CtlP
->AiopIO
[AiopNum
];
2750 ChP
->Cmd
= (ByteIO_t
) AiopIO
+ _CMD_REG
;
2751 ChP
->IntChan
= (ByteIO_t
) AiopIO
+ _INT_CHAN
;
2752 ChP
->IntMask
= (ByteIO_t
) AiopIO
+ _INT_MASK
;
2753 ChP
->IndexAddr
= (DWordIO_t
) AiopIO
+ _INDX_ADDR
;
2754 ChP
->IndexData
= AiopIO
+ _INDX_DATA
;
2756 /* Channel direct addresses */
2757 ChIOOff
= AiopIO
+ ChP
->ChanNum
* 2;
2758 ChP
->TxRxData
= ChIOOff
+ _TD0
;
2759 ChP
->ChanStat
= ChIOOff
+ _CHN_STAT0
;
2760 ChP
->TxRxCount
= ChIOOff
+ _FIFO_CNT0
;
2761 ChP
->IntID
= (ByteIO_t
) AiopIO
+ ChP
->ChanNum
+ _INT_ID0
;
2763 /* Initialize the channel from the RData array */
2764 for (i
= 0; i
< RDATASIZE
; i
+= 4) {
2766 R
[1] = RData
[i
+ 1] + 0x10 * ChanNum
;
2767 R
[2] = RData
[i
+ 2];
2768 R
[3] = RData
[i
+ 3];
2769 out32(ChP
->IndexAddr
, R
);
2773 for (i
= 0; i
< RREGDATASIZE
; i
+= 4) {
2774 ChR
[i
] = RRegData
[i
];
2775 ChR
[i
+ 1] = RRegData
[i
+ 1] + 0x10 * ChanNum
;
2776 ChR
[i
+ 2] = RRegData
[i
+ 2];
2777 ChR
[i
+ 3] = RRegData
[i
+ 3];
2780 /* Indexed registers */
2781 ChOff
= (Word_t
) ChanNum
*0x1000;
2783 if (sClockPrescale
== 0x14)
2788 ChP
->BaudDiv
[0] = (Byte_t
) (ChOff
+ _BAUD
);
2789 ChP
->BaudDiv
[1] = (Byte_t
) ((ChOff
+ _BAUD
) >> 8);
2790 ChP
->BaudDiv
[2] = (Byte_t
) brd9600
;
2791 ChP
->BaudDiv
[3] = (Byte_t
) (brd9600
>> 8);
2792 out32(ChP
->IndexAddr
, ChP
->BaudDiv
);
2794 ChP
->TxControl
[0] = (Byte_t
) (ChOff
+ _TX_CTRL
);
2795 ChP
->TxControl
[1] = (Byte_t
) ((ChOff
+ _TX_CTRL
) >> 8);
2796 ChP
->TxControl
[2] = 0;
2797 ChP
->TxControl
[3] = 0;
2798 out32(ChP
->IndexAddr
, ChP
->TxControl
);
2800 ChP
->RxControl
[0] = (Byte_t
) (ChOff
+ _RX_CTRL
);
2801 ChP
->RxControl
[1] = (Byte_t
) ((ChOff
+ _RX_CTRL
) >> 8);
2802 ChP
->RxControl
[2] = 0;
2803 ChP
->RxControl
[3] = 0;
2804 out32(ChP
->IndexAddr
, ChP
->RxControl
);
2806 ChP
->TxEnables
[0] = (Byte_t
) (ChOff
+ _TX_ENBLS
);
2807 ChP
->TxEnables
[1] = (Byte_t
) ((ChOff
+ _TX_ENBLS
) >> 8);
2808 ChP
->TxEnables
[2] = 0;
2809 ChP
->TxEnables
[3] = 0;
2810 out32(ChP
->IndexAddr
, ChP
->TxEnables
);
2812 ChP
->TxCompare
[0] = (Byte_t
) (ChOff
+ _TXCMP1
);
2813 ChP
->TxCompare
[1] = (Byte_t
) ((ChOff
+ _TXCMP1
) >> 8);
2814 ChP
->TxCompare
[2] = 0;
2815 ChP
->TxCompare
[3] = 0;
2816 out32(ChP
->IndexAddr
, ChP
->TxCompare
);
2818 ChP
->TxReplace1
[0] = (Byte_t
) (ChOff
+ _TXREP1B1
);
2819 ChP
->TxReplace1
[1] = (Byte_t
) ((ChOff
+ _TXREP1B1
) >> 8);
2820 ChP
->TxReplace1
[2] = 0;
2821 ChP
->TxReplace1
[3] = 0;
2822 out32(ChP
->IndexAddr
, ChP
->TxReplace1
);
2824 ChP
->TxReplace2
[0] = (Byte_t
) (ChOff
+ _TXREP2
);
2825 ChP
->TxReplace2
[1] = (Byte_t
) ((ChOff
+ _TXREP2
) >> 8);
2826 ChP
->TxReplace2
[2] = 0;
2827 ChP
->TxReplace2
[3] = 0;
2828 out32(ChP
->IndexAddr
, ChP
->TxReplace2
);
2830 ChP
->TxFIFOPtrs
= ChOff
+ _TXF_OUTP
;
2831 ChP
->TxFIFO
= ChOff
+ _TX_FIFO
;
2833 sOutB(ChP
->Cmd
, (Byte_t
) ChanNum
| RESTXFCNT
); /* apply reset Tx FIFO count */
2834 sOutB(ChP
->Cmd
, (Byte_t
) ChanNum
); /* remove reset Tx FIFO count */
2835 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->TxFIFOPtrs
); /* clear Tx in/out ptrs */
2836 sOutW(ChP
->IndexData
, 0);
2837 ChP
->RxFIFOPtrs
= ChOff
+ _RXF_OUTP
;
2838 ChP
->RxFIFO
= ChOff
+ _RX_FIFO
;
2840 sOutB(ChP
->Cmd
, (Byte_t
) ChanNum
| RESRXFCNT
); /* apply reset Rx FIFO count */
2841 sOutB(ChP
->Cmd
, (Byte_t
) ChanNum
); /* remove reset Rx FIFO count */
2842 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->RxFIFOPtrs
); /* clear Rx out ptr */
2843 sOutW(ChP
->IndexData
, 0);
2844 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->RxFIFOPtrs
+ 2); /* clear Rx in ptr */
2845 sOutW(ChP
->IndexData
, 0);
2846 ChP
->TxPrioCnt
= ChOff
+ _TXP_CNT
;
2847 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->TxPrioCnt
);
2848 sOutB(ChP
->IndexData
, 0);
2849 ChP
->TxPrioPtr
= ChOff
+ _TXP_PNTR
;
2850 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->TxPrioPtr
);
2851 sOutB(ChP
->IndexData
, 0);
2852 ChP
->TxPrioBuf
= ChOff
+ _TXP_BUF
;
2853 sEnRxProcessor(ChP
); /* start the Rx processor */
2858 /***************************************************************************
2859 Function: sStopRxProcessor
2860 Purpose: Stop the receive processor from processing a channel.
2861 Call: sStopRxProcessor(ChP)
2862 CHANNEL_T *ChP; Ptr to channel structure
2864 Comments: The receive processor can be started again with sStartRxProcessor().
2865 This function causes the receive processor to skip over the
2866 stopped channel. It does not stop it from processing other channels.
2868 Warnings: No context switches are allowed while executing this function.
2870 Do not leave the receive processor stopped for more than one
2873 After calling this function a delay of 4 uS is required to ensure
2874 that the receive processor is no longer processing this channel.
2876 static void sStopRxProcessor(CHANNEL_T
* ChP
)
2884 out32(ChP
->IndexAddr
, R
);
2887 /***************************************************************************
2888 Function: sFlushRxFIFO
2889 Purpose: Flush the Rx FIFO
2890 Call: sFlushRxFIFO(ChP)
2891 CHANNEL_T *ChP; Ptr to channel structure
2893 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
2894 while it is being flushed the receive processor is stopped
2895 and the transmitter is disabled. After these operations a
2896 4 uS delay is done before clearing the pointers to allow
2897 the receive processor to stop. These items are handled inside
2899 Warnings: No context switches are allowed while executing this function.
2901 static void sFlushRxFIFO(CHANNEL_T
* ChP
)
2904 Byte_t Ch
; /* channel number within AIOP */
2905 int RxFIFOEnabled
; /* 1 if Rx FIFO enabled */
2907 if (sGetRxCnt(ChP
) == 0) /* Rx FIFO empty */
2908 return; /* don't need to flush */
2911 if (ChP
->R
[0x32] == 0x08) { /* Rx FIFO is enabled */
2913 sDisRxFIFO(ChP
); /* disable it */
2914 for (i
= 0; i
< 2000 / 200; i
++) /* delay 2 uS to allow proc to disable FIFO */
2915 sInB(ChP
->IntChan
); /* depends on bus i/o timing */
2917 sGetChanStatus(ChP
); /* clear any pending Rx errors in chan stat */
2918 Ch
= (Byte_t
) sGetChanNum(ChP
);
2919 sOutB(ChP
->Cmd
, Ch
| RESRXFCNT
); /* apply reset Rx FIFO count */
2920 sOutB(ChP
->Cmd
, Ch
); /* remove reset Rx FIFO count */
2921 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->RxFIFOPtrs
); /* clear Rx out ptr */
2922 sOutW(ChP
->IndexData
, 0);
2923 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->RxFIFOPtrs
+ 2); /* clear Rx in ptr */
2924 sOutW(ChP
->IndexData
, 0);
2926 sEnRxFIFO(ChP
); /* enable Rx FIFO */
2929 /***************************************************************************
2930 Function: sFlushTxFIFO
2931 Purpose: Flush the Tx FIFO
2932 Call: sFlushTxFIFO(ChP)
2933 CHANNEL_T *ChP; Ptr to channel structure
2935 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
2936 while it is being flushed the receive processor is stopped
2937 and the transmitter is disabled. After these operations a
2938 4 uS delay is done before clearing the pointers to allow
2939 the receive processor to stop. These items are handled inside
2941 Warnings: No context switches are allowed while executing this function.
2943 static void sFlushTxFIFO(CHANNEL_T
* ChP
)
2946 Byte_t Ch
; /* channel number within AIOP */
2947 int TxEnabled
; /* 1 if transmitter enabled */
2949 if (sGetTxCnt(ChP
) == 0) /* Tx FIFO empty */
2950 return; /* don't need to flush */
2953 if (ChP
->TxControl
[3] & TX_ENABLE
) {
2955 sDisTransmit(ChP
); /* disable transmitter */
2957 sStopRxProcessor(ChP
); /* stop Rx processor */
2958 for (i
= 0; i
< 4000 / 200; i
++) /* delay 4 uS to allow proc to stop */
2959 sInB(ChP
->IntChan
); /* depends on bus i/o timing */
2960 Ch
= (Byte_t
) sGetChanNum(ChP
);
2961 sOutB(ChP
->Cmd
, Ch
| RESTXFCNT
); /* apply reset Tx FIFO count */
2962 sOutB(ChP
->Cmd
, Ch
); /* remove reset Tx FIFO count */
2963 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->TxFIFOPtrs
); /* clear Tx in/out ptrs */
2964 sOutW(ChP
->IndexData
, 0);
2966 sEnTransmit(ChP
); /* enable transmitter */
2967 sStartRxProcessor(ChP
); /* restart Rx processor */
2970 /***************************************************************************
2971 Function: sWriteTxPrioByte
2972 Purpose: Write a byte of priority transmit data to a channel
2973 Call: sWriteTxPrioByte(ChP,Data)
2974 CHANNEL_T *ChP; Ptr to channel structure
2975 Byte_t Data; The transmit data byte
2977 Return: int: 1 if the bytes is successfully written, otherwise 0.
2979 Comments: The priority byte is transmitted before any data in the Tx FIFO.
2981 Warnings: No context switches are allowed while executing this function.
2983 static int sWriteTxPrioByte(CHANNEL_T
* ChP
, Byte_t Data
)
2985 Byte_t DWBuf
[4]; /* buffer for double word writes */
2986 Word_t
*WordPtr
; /* must be far because Win SS != DS */
2987 register DWordIO_t IndexAddr
;
2989 if (sGetTxCnt(ChP
) > 1) { /* write it to Tx priority buffer */
2990 IndexAddr
= ChP
->IndexAddr
;
2991 sOutW((WordIO_t
) IndexAddr
, ChP
->TxPrioCnt
); /* get priority buffer status */
2992 if (sInB((ByteIO_t
) ChP
->IndexData
) & PRI_PEND
) /* priority buffer busy */
2993 return (0); /* nothing sent */
2995 WordPtr
= (Word_t
*) (&DWBuf
[0]);
2996 *WordPtr
= ChP
->TxPrioBuf
; /* data byte address */
2998 DWBuf
[2] = Data
; /* data byte value */
2999 out32(IndexAddr
, DWBuf
); /* write it out */
3001 *WordPtr
= ChP
->TxPrioCnt
; /* Tx priority count address */
3003 DWBuf
[2] = PRI_PEND
+ 1; /* indicate 1 byte pending */
3004 DWBuf
[3] = 0; /* priority buffer pointer */
3005 out32(IndexAddr
, DWBuf
); /* write it out */
3006 } else { /* write it to Tx FIFO */
3008 sWriteTxByte(sGetTxRxDataIO(ChP
), Data
);
3010 return (1); /* 1 byte sent */
3013 /***************************************************************************
3014 Function: sEnInterrupts
3015 Purpose: Enable one or more interrupts for a channel
3016 Call: sEnInterrupts(ChP,Flags)
3017 CHANNEL_T *ChP; Ptr to channel structure
3018 Word_t Flags: Interrupt enable flags, can be any combination
3019 of the following flags:
3020 TXINT_EN: Interrupt on Tx FIFO empty
3021 RXINT_EN: Interrupt on Rx FIFO at trigger level (see
3023 SRCINT_EN: Interrupt on SRC (Special Rx Condition)
3024 MCINT_EN: Interrupt on modem input change
3025 CHANINT_EN: Allow channel interrupt signal to the AIOP's
3026 Interrupt Channel Register.
3028 Comments: If an interrupt enable flag is set in Flags, that interrupt will be
3029 enabled. If an interrupt enable flag is not set in Flags, that
3030 interrupt will not be changed. Interrupts can be disabled with
3031 function sDisInterrupts().
3033 This function sets the appropriate bit for the channel in the AIOP's
3034 Interrupt Mask Register if the CHANINT_EN flag is set. This allows
3035 this channel's bit to be set in the AIOP's Interrupt Channel Register.
3037 Interrupts must also be globally enabled before channel interrupts
3038 will be passed on to the host. This is done with function
3041 In some cases it may be desirable to disable interrupts globally but
3042 enable channel interrupts. This would allow the global interrupt
3043 status register to be used to determine which AIOPs need service.
3045 static void sEnInterrupts(CHANNEL_T
* ChP
, Word_t Flags
)
3047 Byte_t Mask
; /* Interrupt Mask Register */
3049 ChP
->RxControl
[2] |=
3050 ((Byte_t
) Flags
& (RXINT_EN
| SRCINT_EN
| MCINT_EN
));
3052 out32(ChP
->IndexAddr
, ChP
->RxControl
);
3054 ChP
->TxControl
[2] |= ((Byte_t
) Flags
& TXINT_EN
);
3056 out32(ChP
->IndexAddr
, ChP
->TxControl
);
3058 if (Flags
& CHANINT_EN
) {
3059 Mask
= sInB(ChP
->IntMask
) | sBitMapSetTbl
[ChP
->ChanNum
];
3060 sOutB(ChP
->IntMask
, Mask
);
3064 /***************************************************************************
3065 Function: sDisInterrupts
3066 Purpose: Disable one or more interrupts for a channel
3067 Call: sDisInterrupts(ChP,Flags)
3068 CHANNEL_T *ChP; Ptr to channel structure
3069 Word_t Flags: Interrupt flags, can be any combination
3070 of the following flags:
3071 TXINT_EN: Interrupt on Tx FIFO empty
3072 RXINT_EN: Interrupt on Rx FIFO at trigger level (see
3074 SRCINT_EN: Interrupt on SRC (Special Rx Condition)
3075 MCINT_EN: Interrupt on modem input change
3076 CHANINT_EN: Disable channel interrupt signal to the
3077 AIOP's Interrupt Channel Register.
3079 Comments: If an interrupt flag is set in Flags, that interrupt will be
3080 disabled. If an interrupt flag is not set in Flags, that
3081 interrupt will not be changed. Interrupts can be enabled with
3082 function sEnInterrupts().
3084 This function clears the appropriate bit for the channel in the AIOP's
3085 Interrupt Mask Register if the CHANINT_EN flag is set. This blocks
3086 this channel's bit from being set in the AIOP's Interrupt Channel
3089 static void sDisInterrupts(CHANNEL_T
* ChP
, Word_t Flags
)
3091 Byte_t Mask
; /* Interrupt Mask Register */
3093 ChP
->RxControl
[2] &=
3094 ~((Byte_t
) Flags
& (RXINT_EN
| SRCINT_EN
| MCINT_EN
));
3095 out32(ChP
->IndexAddr
, ChP
->RxControl
);
3096 ChP
->TxControl
[2] &= ~((Byte_t
) Flags
& TXINT_EN
);
3097 out32(ChP
->IndexAddr
, ChP
->TxControl
);
3099 if (Flags
& CHANINT_EN
) {
3100 Mask
= sInB(ChP
->IntMask
) & sBitMapClrTbl
[ChP
->ChanNum
];
3101 sOutB(ChP
->IntMask
, Mask
);
3105 static void sSetInterfaceMode(CHANNEL_T
* ChP
, Byte_t mode
)
3107 sOutB(ChP
->CtlP
->AiopIO
[2], (mode
& 0x18) | ChP
->ChanNum
);
3111 * Not an official SSCI function, but how to reset RocketModems.
3114 static void sModemReset(CONTROLLER_T
* CtlP
, int chan
, int on
)
3119 addr
= CtlP
->AiopIO
[0] + 0x400;
3120 val
= sInB(CtlP
->MReg3IO
);
3121 /* if AIOP[1] is not enabled, enable it */
3122 if ((val
& 2) == 0) {
3123 val
= sInB(CtlP
->MReg2IO
);
3124 sOutB(CtlP
->MReg2IO
, (val
& 0xfc) | (1 & 0x03));
3125 sOutB(CtlP
->MBaseIO
, (unsigned char) (addr
>> 6));
3131 sOutB(addr
+ chan
, 0); /* apply or remove reset */
3136 * Not an official SSCI function, but how to reset RocketModems.
3139 static void sPCIModemReset(CONTROLLER_T
* CtlP
, int chan
, int on
)
3143 addr
= CtlP
->AiopIO
[0] + 0x40; /* 2nd AIOP */
3146 sOutB(addr
+ chan
, 0); /* apply or remove reset */
3149 /* Resets the speaker controller on RocketModem II and III devices */
3150 static void rmSpeakerReset(CONTROLLER_T
* CtlP
, unsigned long model
)
3154 /* RocketModem II speaker control is at the 8th port location of offset 0x40 */
3155 if ((model
== MODEL_RP4M
) || (model
== MODEL_RP6M
)) {
3156 addr
= CtlP
->AiopIO
[0] + 0x4F;
3160 /* RocketModem III speaker control is at the 1st port location of offset 0x80 */
3161 if ((model
== MODEL_UPCI_RM3_8PORT
)
3162 || (model
== MODEL_UPCI_RM3_4PORT
)) {
3163 addr
= CtlP
->AiopIO
[0] + 0x88;
3168 /* Returns the line number given the controller (board), aiop and channel number */
3169 static unsigned char GetLineNumber(int ctrl
, int aiop
, int ch
)
3171 return lineNumbers
[(ctrl
<< 5) | (aiop
<< 3) | ch
];
3175 * Stores the line number associated with a given controller (board), aiop
3176 * and channel number.
3177 * Returns: The line number assigned
3179 static unsigned char SetLineNumber(int ctrl
, int aiop
, int ch
)
3181 lineNumbers
[(ctrl
<< 5) | (aiop
<< 3) | ch
] = nextLineNumber
++;
3182 return (nextLineNumber
- 1);