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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / atm / zatm.c
blob1f6b0cc12320c1f1010f41a85243e680a6e37bfd
1 /* drivers/atm/zatm.c - ZeitNet ZN122x device driver */
2
3 /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
4
5
6 #include <linux/module.h>
7 #include <linux/kernel.h>
8 #include <linux/mm.h>
9 #include <linux/pci.h>
10 #include <linux/errno.h>
11 #include <linux/atm.h>
12 #include <linux/atmdev.h>
13 #include <linux/sonet.h>
14 #include <linux/skbuff.h>
15 #include <linux/netdevice.h>
16 #include <linux/delay.h>
17 #include <linux/uio.h>
18 #include <linux/init.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/atm_zatm.h>
21 #include <linux/capability.h>
22 #include <linux/bitops.h>
23 #include <linux/wait.h>
24 #include <linux/slab.h>
25 #include <asm/byteorder.h>
26 #include <asm/system.h>
27 #include <asm/string.h>
28 #include <asm/io.h>
29 #include <asm/atomic.h>
30 #include <asm/uaccess.h>
31
32 #include "uPD98401.h"
33 #include "uPD98402.h"
34 #include "zeprom.h"
35 #include "zatm.h"
36
37
38 /*
39 * TODO:
40 *
41 * Minor features
42 * - support 64 kB SDUs (will have to use multibuffer batches then :-( )
43 * - proper use of CDV, credit = max(1,CDVT*PCR)
44 * - AAL0
45 * - better receive timestamps
46 * - OAM
47 */
48
49 #define ZATM_COPPER 1
50
51 #define DPRINTK(format,args...)
52
53 #ifndef CONFIG_ATM_ZATM_DEBUG
54
55
56 #define NULLCHECK(x)
57
58 #define EVENT(s,a,b)
59
60
61 static void event_dump(void)
62 {
63 }
64
65
66 #else
67
68
69 /*
70 * NULL pointer checking
71 */
72
73 #define NULLCHECK(x) \
74 if ((unsigned long) (x) < 0x30) printk(KERN_CRIT #x "==0x%x\n", (int) (x))
75
76 /*
77 * Very extensive activity logging. Greatly improves bug detection speed but
78 * costs a few Mbps if enabled.
79 */
80
81 #define EV 64
82
83 static const char *ev[EV];
84 static unsigned long ev_a[EV],ev_b[EV];
85 static int ec = 0;
86
87
88 static void EVENT(const char *s,unsigned long a,unsigned long b)
89 {
90 ev[ec] = s;
91 ev_a[ec] = a;
92 ev_b[ec] = b;
93 ec = (ec+1) % EV;
94 }
95
96
97 static void event_dump(void)
98 {
99 int n,i;
100
101 printk(KERN_NOTICE "----- event dump follows -----\n");
102 for (n = 0; n < EV; n++) {
103 i = (ec+n) % EV;
104 printk(KERN_NOTICE);
105 printk(ev[i] ? ev[i] : "(null)",ev_a[i],ev_b[i]);
106 }
107 printk(KERN_NOTICE "----- event dump ends here -----\n");
108 }
109
110
111 #endif /* CONFIG_ATM_ZATM_DEBUG */
112
113
114 #define RING_BUSY 1 /* indication from do_tx that PDU has to be
115 backlogged */
116
117 static struct atm_dev *zatm_boards = NULL;
118 static unsigned long dummy[2] = {0,0};
119
120
121 #define zin_n(r) inl(zatm_dev->base+r*4)
122 #define zin(r) inl(zatm_dev->base+uPD98401_##r*4)
123 #define zout(v,r) outl(v,zatm_dev->base+uPD98401_##r*4)
124 #define zwait while (zin(CMR) & uPD98401_BUSY)
125
126 /* RX0, RX1, TX0, TX1 */
127 static const int mbx_entries[NR_MBX] = { 1024,1024,1024,1024 };
128 static const int mbx_esize[NR_MBX] = { 16,16,4,4 }; /* entry size in bytes */
129
130 #define MBX_SIZE(i) (mbx_entries[i]*mbx_esize[i])
131
132
133 /*-------------------------------- utilities --------------------------------*/
134
135
136 static void zpokel(struct zatm_dev *zatm_dev,u32 value,u32 addr)
137 {
138 zwait;
139 zout(value,CER);
140 zout(uPD98401_IND_ACC | uPD98401_IA_BALL |
141 (uPD98401_IA_TGT_CM << uPD98401_IA_TGT_SHIFT) | addr,CMR);
142 }
143
144
145 static u32 zpeekl(struct zatm_dev *zatm_dev,u32 addr)
146 {
147 zwait;
148 zout(uPD98401_IND_ACC | uPD98401_IA_BALL | uPD98401_IA_RW |
149 (uPD98401_IA_TGT_CM << uPD98401_IA_TGT_SHIFT) | addr,CMR);
150 zwait;
151 return zin(CER);
152 }
153
154
155 /*------------------------------- free lists --------------------------------*/
156
157
158 /*
159 * Free buffer head structure:
160 * [0] pointer to buffer (for SAR)
161 * [1] buffer descr link pointer (for SAR)
162 * [2] back pointer to skb (for poll_rx)
163 * [3] data
164 * ...
165 */
166
167 struct rx_buffer_head {
168 u32 buffer; /* pointer to buffer (for SAR) */
169 u32 link; /* buffer descriptor link pointer (for SAR) */
170 struct sk_buff *skb; /* back pointer to skb (for poll_rx) */
171 };
172
173
174 static void refill_pool(struct atm_dev *dev,int pool)
175 {
176 struct zatm_dev *zatm_dev;
177 struct sk_buff *skb;
178 struct rx_buffer_head *first;
179 unsigned long flags;
180 int align,offset,free,count,size;
181
182 EVENT("refill_pool\n",0,0);
183 zatm_dev = ZATM_DEV(dev);
184 size = (64 << (pool <= ZATM_AAL5_POOL_BASE ? 0 :
185 pool-ZATM_AAL5_POOL_BASE))+sizeof(struct rx_buffer_head);
186 if (size < PAGE_SIZE) {
187 align = 32; /* for 32 byte alignment */
188 offset = sizeof(struct rx_buffer_head);
189 }
190 else {
191 align = 4096;
192 offset = zatm_dev->pool_info[pool].offset+
193 sizeof(struct rx_buffer_head);
194 }
195 size += align;
196 spin_lock_irqsave(&zatm_dev->lock, flags);
197 free = zpeekl(zatm_dev,zatm_dev->pool_base+2*pool) &
198 uPD98401_RXFP_REMAIN;
199 spin_unlock_irqrestore(&zatm_dev->lock, flags);
200 if (free >= zatm_dev->pool_info[pool].low_water) return;
201 EVENT("starting ... POOL: 0x%x, 0x%x\n",
202 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool),
203 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool+1));
204 EVENT("dummy: 0x%08lx, 0x%08lx\n",dummy[0],dummy[1]);
205 count = 0;
206 first = NULL;
207 while (free < zatm_dev->pool_info[pool].high_water) {
208 struct rx_buffer_head *head;
209
210 skb = alloc_skb(size,GFP_ATOMIC);
211 if (!skb) {
212 printk(KERN_WARNING DEV_LABEL "(Itf %d): got no new "
213 "skb (%d) with %d free\n",dev->number,size,free);
214 break;
215 }
216 skb_reserve(skb,(unsigned char *) ((((unsigned long) skb->data+
217 align+offset-1) & ~(unsigned long) (align-1))-offset)-
218 skb->data);
219 head = (struct rx_buffer_head *) skb->data;
220 skb_reserve(skb,sizeof(struct rx_buffer_head));
221 if (!first) first = head;
222 count++;
223 head->buffer = virt_to_bus(skb->data);
224 head->link = 0;
225 head->skb = skb;
226 EVENT("enq skb 0x%08lx/0x%08lx\n",(unsigned long) skb,
227 (unsigned long) head);
228 spin_lock_irqsave(&zatm_dev->lock, flags);
229 if (zatm_dev->last_free[pool])
230 ((struct rx_buffer_head *) (zatm_dev->last_free[pool]->
231 data))[-1].link = virt_to_bus(head);
232 zatm_dev->last_free[pool] = skb;
233 skb_queue_tail(&zatm_dev->pool[pool],skb);
234 spin_unlock_irqrestore(&zatm_dev->lock, flags);
235 free++;
236 }
237 if (first) {
238 spin_lock_irqsave(&zatm_dev->lock, flags);
239 zwait;
240 zout(virt_to_bus(first),CER);
241 zout(uPD98401_ADD_BAT | (pool << uPD98401_POOL_SHIFT) | count,
242 CMR);
243 spin_unlock_irqrestore(&zatm_dev->lock, flags);
244 EVENT ("POOL: 0x%x, 0x%x\n",
245 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool),
246 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool+1));
247 EVENT("dummy: 0x%08lx, 0x%08lx\n",dummy[0],dummy[1]);
248 }
249 }
250
251
252 static void drain_free(struct atm_dev *dev,int pool)
253 {
254 skb_queue_purge(&ZATM_DEV(dev)->pool[pool]);
255 }
256
257
258 static int pool_index(int max_pdu)
259 {
260 int i;
261
262 if (max_pdu % ATM_CELL_PAYLOAD)
263 printk(KERN_ERR DEV_LABEL ": driver error in pool_index: "
264 "max_pdu is %d\n",max_pdu);
265 if (max_pdu > 65536) return -1;
266 for (i = 0; (64 << i) < max_pdu; i++);
267 return i+ZATM_AAL5_POOL_BASE;
268 }
269
270
271 /* use_pool isn't reentrant */
272
273
274 static void use_pool(struct atm_dev *dev,int pool)
275 {
276 struct zatm_dev *zatm_dev;
277 unsigned long flags;
278 int size;
279
280 zatm_dev = ZATM_DEV(dev);
281 if (!(zatm_dev->pool_info[pool].ref_count++)) {
282 skb_queue_head_init(&zatm_dev->pool[pool]);
283 size = pool-ZATM_AAL5_POOL_BASE;
284 if (size < 0) size = 0; /* 64B... */
285 else if (size > 10) size = 10; /* ... 64kB */
286 spin_lock_irqsave(&zatm_dev->lock, flags);
287 zpokel(zatm_dev,((zatm_dev->pool_info[pool].low_water/4) <<
288 uPD98401_RXFP_ALERT_SHIFT) |
289 (1 << uPD98401_RXFP_BTSZ_SHIFT) |
290 (size << uPD98401_RXFP_BFSZ_SHIFT),
291 zatm_dev->pool_base+pool*2);
292 zpokel(zatm_dev,(unsigned long) dummy,zatm_dev->pool_base+
293 pool*2+1);
294 spin_unlock_irqrestore(&zatm_dev->lock, flags);
295 zatm_dev->last_free[pool] = NULL;
296 refill_pool(dev,pool);
297 }
298 DPRINTK("pool %d: %d\n",pool,zatm_dev->pool_info[pool].ref_count);
299 }
300
301
302 static void unuse_pool(struct atm_dev *dev,int pool)
303 {
304 if (!(--ZATM_DEV(dev)->pool_info[pool].ref_count))
305 drain_free(dev,pool);
306 }
307
308 /*----------------------------------- RX ------------------------------------*/
309
310
311
312
313 static const char *err_txt[] = {
314 "No error",
315 "RX buf underflow",
316 "RX FIFO overrun",
317 "Maximum len violation",
318 "CRC error",
319 "User abort",
320 "Length violation",
321 "T1 error",
322 "Deactivated",
323 "???",
324 "???",
325 "???",
326 "???",
327 "???",
328 "???",
329 "???"
330 };
331
332
333 static void poll_rx(struct atm_dev *dev,int mbx)
334 {
335 struct zatm_dev *zatm_dev;
336 unsigned long pos;
337 u32 x;
338 int error;
339
340 EVENT("poll_rx\n",0,0);
341 zatm_dev = ZATM_DEV(dev);
342 pos = (zatm_dev->mbx_start[mbx] & ~0xffffUL) | zin(MTA(mbx));
343 while (x = zin(MWA(mbx)), (pos & 0xffff) != x) {
344 u32 *here;
345 struct sk_buff *skb;
346 struct atm_vcc *vcc;
347 int cells,size,chan;
348
349 EVENT("MBX: host 0x%lx, nic 0x%x\n",pos,x);
350 here = (u32 *) pos;
351 if (((pos += 16) & 0xffff) == zatm_dev->mbx_end[mbx])
352 pos = zatm_dev->mbx_start[mbx];
353 cells = here[0] & uPD98401_AAL5_SIZE;
354 error = 0;
355 if (here[3] & uPD98401_AAL5_ERR) {
356 error = (here[3] & uPD98401_AAL5_ES) >>
357 uPD98401_AAL5_ES_SHIFT;
358 if (error == uPD98401_AAL5_ES_DEACT ||
359 error == uPD98401_AAL5_ES_FREE) continue;
360 }
361 EVENT("error code 0x%x/0x%x\n",(here[3] & uPD98401_AAL5_ES) >>
362 uPD98401_AAL5_ES_SHIFT,error);
363 skb = ((struct rx_buffer_head *) bus_to_virt(here[2]))->skb;
364 __net_timestamp(skb);
365 EVENT("skb 0x%lx, here 0x%lx\n",(unsigned long) skb,
366 (unsigned long) here);
367 size = error ? 0 : ntohs(((__be16 *) skb->data)[cells*
368 ATM_CELL_PAYLOAD/sizeof(u16)-3]);
369 EVENT("got skb 0x%lx, size %d\n",(unsigned long) skb,size);
370 chan = (here[3] & uPD98401_AAL5_CHAN) >>
371 uPD98401_AAL5_CHAN_SHIFT;
372 if (chan < zatm_dev->chans && zatm_dev->rx_map[chan]) {
373 int pos;
374 vcc = zatm_dev->rx_map[chan];
375 pos = ZATM_VCC(vcc)->pool;
376 if (skb == zatm_dev->last_free[pos])
377 zatm_dev->last_free[pos] = NULL;
378 skb_unlink(skb, zatm_dev->pool + pos);
379 }
380 else {
381 printk(KERN_ERR DEV_LABEL "(itf %d): RX indication "
382 "for non-existing channel\n",dev->number);
383 size = 0;
384 vcc = NULL;
385 event_dump();
386 }
387 if (error) {
388 static unsigned long silence = 0;
389 static int last_error = 0;
390
391 if (error != last_error ||
392 time_after(jiffies, silence) || silence == 0){
393 printk(KERN_WARNING DEV_LABEL "(itf %d): "
394 "chan %d error %s\n",dev->number,chan,
395 err_txt[error]);
396 last_error = error;
397 silence = (jiffies+2*HZ)|1;
398 }
399 size = 0;
400 }
401 if (size && (size > cells*ATM_CELL_PAYLOAD-ATM_AAL5_TRAILER ||
402 size <= (cells-1)*ATM_CELL_PAYLOAD-ATM_AAL5_TRAILER)) {
403 printk(KERN_ERR DEV_LABEL "(itf %d): size %d with %d "
404 "cells\n",dev->number,size,cells);
405 size = 0;
406 event_dump();
407 }
408 if (size > ATM_MAX_AAL5_PDU) {
409 printk(KERN_ERR DEV_LABEL "(itf %d): size too big "
410 "(%d)\n",dev->number,size);
411 size = 0;
412 event_dump();
413 }
414 if (!size) {
415 dev_kfree_skb_irq(skb);
416 if (vcc) atomic_inc(&vcc->stats->rx_err);
417 continue;
418 }
419 if (!atm_charge(vcc,skb->truesize)) {
420 dev_kfree_skb_irq(skb);
421 continue;
422 }
423 skb->len = size;
424 ATM_SKB(skb)->vcc = vcc;
425 vcc->push(vcc,skb);
426 atomic_inc(&vcc->stats->rx);
427 }
428 zout(pos & 0xffff,MTA(mbx));
429 }
430
431
432 static int open_rx_first(struct atm_vcc *vcc)
433 {
434 struct zatm_dev *zatm_dev;
435 struct zatm_vcc *zatm_vcc;
436 unsigned long flags;
437 unsigned short chan;
438 int cells;
439
440 DPRINTK("open_rx_first (0x%x)\n",inb_p(0xc053));
441 zatm_dev = ZATM_DEV(vcc->dev);
442 zatm_vcc = ZATM_VCC(vcc);
443 zatm_vcc->rx_chan = 0;
444 if (vcc->qos.rxtp.traffic_class == ATM_NONE) return 0;
445 if (vcc->qos.aal == ATM_AAL5) {
446 if (vcc->qos.rxtp.max_sdu > 65464)
447 vcc->qos.rxtp.max_sdu = 65464;
448 /* fix this - we may want to receive 64kB SDUs
449 later */
450 cells = DIV_ROUND_UP(vcc->qos.rxtp.max_sdu + ATM_AAL5_TRAILER,
451 ATM_CELL_PAYLOAD);
452 zatm_vcc->pool = pool_index(cells*ATM_CELL_PAYLOAD);
453 }
454 else {
455 cells = 1;
456 zatm_vcc->pool = ZATM_AAL0_POOL;
457 }
458 if (zatm_vcc->pool < 0) return -EMSGSIZE;
459 spin_lock_irqsave(&zatm_dev->lock, flags);
460 zwait;
461 zout(uPD98401_OPEN_CHAN,CMR);
462 zwait;
463 DPRINTK("0x%x 0x%x\n",zin(CMR),zin(CER));
464 chan = (zin(CMR) & uPD98401_CHAN_ADDR) >> uPD98401_CHAN_ADDR_SHIFT;
465 spin_unlock_irqrestore(&zatm_dev->lock, flags);
466 DPRINTK("chan is %d\n",chan);
467 if (!chan) return -EAGAIN;
468 use_pool(vcc->dev,zatm_vcc->pool);
469 DPRINTK("pool %d\n",zatm_vcc->pool);
470 /* set up VC descriptor */
471 spin_lock_irqsave(&zatm_dev->lock, flags);
472 zpokel(zatm_dev,zatm_vcc->pool << uPD98401_RXVC_POOL_SHIFT,
473 chan*VC_SIZE/4);
474 zpokel(zatm_dev,uPD98401_RXVC_OD | (vcc->qos.aal == ATM_AAL5 ?
475 uPD98401_RXVC_AR : 0) | cells,chan*VC_SIZE/4+1);
476 zpokel(zatm_dev,0,chan*VC_SIZE/4+2);
477 zatm_vcc->rx_chan = chan;
478 zatm_dev->rx_map[chan] = vcc;
479 spin_unlock_irqrestore(&zatm_dev->lock, flags);
480 return 0;
481 }
482
483
484 static int open_rx_second(struct atm_vcc *vcc)
485 {
486 struct zatm_dev *zatm_dev;
487 struct zatm_vcc *zatm_vcc;
488 unsigned long flags;
489 int pos,shift;
490
491 DPRINTK("open_rx_second (0x%x)\n",inb_p(0xc053));
492 zatm_dev = ZATM_DEV(vcc->dev);
493 zatm_vcc = ZATM_VCC(vcc);
494 if (!zatm_vcc->rx_chan) return 0;
495 spin_lock_irqsave(&zatm_dev->lock, flags);
496 /* should also handle VPI @@@ */
497 pos = vcc->vci >> 1;
498 shift = (1-(vcc->vci & 1)) << 4;
499 zpokel(zatm_dev,(zpeekl(zatm_dev,pos) & ~(0xffff << shift)) |
500 ((zatm_vcc->rx_chan | uPD98401_RXLT_ENBL) << shift),pos);
501 spin_unlock_irqrestore(&zatm_dev->lock, flags);
502 return 0;
503 }
504
505
506 static void close_rx(struct atm_vcc *vcc)
507 {
508 struct zatm_dev *zatm_dev;
509 struct zatm_vcc *zatm_vcc;
510 unsigned long flags;
511 int pos,shift;
512
513 zatm_vcc = ZATM_VCC(vcc);
514 zatm_dev = ZATM_DEV(vcc->dev);
515 if (!zatm_vcc->rx_chan) return;
516 DPRINTK("close_rx\n");
517 /* disable receiver */
518 if (vcc->vpi != ATM_VPI_UNSPEC && vcc->vci != ATM_VCI_UNSPEC) {
519 spin_lock_irqsave(&zatm_dev->lock, flags);
520 pos = vcc->vci >> 1;
521 shift = (1-(vcc->vci & 1)) << 4;
522 zpokel(zatm_dev,zpeekl(zatm_dev,pos) & ~(0xffff << shift),pos);
523 zwait;
524 zout(uPD98401_NOP,CMR);
525 zwait;
526 zout(uPD98401_NOP,CMR);
527 spin_unlock_irqrestore(&zatm_dev->lock, flags);
528 }
529 spin_lock_irqsave(&zatm_dev->lock, flags);
530 zwait;
531 zout(uPD98401_DEACT_CHAN | uPD98401_CHAN_RT | (zatm_vcc->rx_chan <<
532 uPD98401_CHAN_ADDR_SHIFT),CMR);
533 zwait;
534 udelay(10); /* why oh why ... ? */
535 zout(uPD98401_CLOSE_CHAN | uPD98401_CHAN_RT | (zatm_vcc->rx_chan <<
536 uPD98401_CHAN_ADDR_SHIFT),CMR);
537 zwait;
538 if (!(zin(CMR) & uPD98401_CHAN_ADDR))
539 printk(KERN_CRIT DEV_LABEL "(itf %d): can't close RX channel "
540 "%d\n",vcc->dev->number,zatm_vcc->rx_chan);
541 spin_unlock_irqrestore(&zatm_dev->lock, flags);
542 zatm_dev->rx_map[zatm_vcc->rx_chan] = NULL;
543 zatm_vcc->rx_chan = 0;
544 unuse_pool(vcc->dev,zatm_vcc->pool);
545 }
546
547
548 static int start_rx(struct atm_dev *dev)
549 {
550 struct zatm_dev *zatm_dev;
551 int size,i;
552
553 DPRINTK("start_rx\n");
554 zatm_dev = ZATM_DEV(dev);
555 size = sizeof(struct atm_vcc *)*zatm_dev->chans;
556 zatm_dev->rx_map = kzalloc(size,GFP_KERNEL);
557 if (!zatm_dev->rx_map) return -ENOMEM;
558 /* set VPI/VCI split (use all VCIs and give what's left to VPIs) */
559 zpokel(zatm_dev,(1 << dev->ci_range.vci_bits)-1,uPD98401_VRR);
560 /* prepare free buffer pools */
561 for (i = 0; i <= ZATM_LAST_POOL; i++) {
562 zatm_dev->pool_info[i].ref_count = 0;
563 zatm_dev->pool_info[i].rqa_count = 0;
564 zatm_dev->pool_info[i].rqu_count = 0;
565 zatm_dev->pool_info[i].low_water = LOW_MARK;
566 zatm_dev->pool_info[i].high_water = HIGH_MARK;
567 zatm_dev->pool_info[i].offset = 0;
568 zatm_dev->pool_info[i].next_off = 0;
569 zatm_dev->pool_info[i].next_cnt = 0;
570 zatm_dev->pool_info[i].next_thres = OFF_CNG_THRES;
571 }
572 return 0;
573 }
574
575
576 /*----------------------------------- TX ------------------------------------*/
577
578
579 static int do_tx(struct sk_buff *skb)
580 {
581 struct atm_vcc *vcc;
582 struct zatm_dev *zatm_dev;
583 struct zatm_vcc *zatm_vcc;
584 u32 *dsc;
585 unsigned long flags;
586
587 EVENT("do_tx\n",0,0);
588 DPRINTK("sending skb %p\n",skb);
589 vcc = ATM_SKB(skb)->vcc;
590 zatm_dev = ZATM_DEV(vcc->dev);
591 zatm_vcc = ZATM_VCC(vcc);
592 EVENT("iovcnt=%d\n",skb_shinfo(skb)->nr_frags,0);
593 spin_lock_irqsave(&zatm_dev->lock, flags);
594 if (!skb_shinfo(skb)->nr_frags) {
595 if (zatm_vcc->txing == RING_ENTRIES-1) {
596 spin_unlock_irqrestore(&zatm_dev->lock, flags);
597 return RING_BUSY;
598 }
599 zatm_vcc->txing++;
600 dsc = zatm_vcc->ring+zatm_vcc->ring_curr;
601 zatm_vcc->ring_curr = (zatm_vcc->ring_curr+RING_WORDS) &
602 (RING_ENTRIES*RING_WORDS-1);
603 dsc[1] = 0;
604 dsc[2] = skb->len;
605 dsc[3] = virt_to_bus(skb->data);
606 mb();
607 dsc[0] = uPD98401_TXPD_V | uPD98401_TXPD_DP | uPD98401_TXPD_SM
608 | (vcc->qos.aal == ATM_AAL5 ? uPD98401_TXPD_AAL5 : 0 |
609 (ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ?
610 uPD98401_CLPM_1 : uPD98401_CLPM_0));
611 EVENT("dsc (0x%lx)\n",(unsigned long) dsc,0);
612 }
613 else {
614 printk("NONONONOO!!!!\n");
615 dsc = NULL;
616 }
617 ZATM_PRV_DSC(skb) = dsc;
618 skb_queue_tail(&zatm_vcc->tx_queue,skb);
619 DPRINTK("QRP=0x%08lx\n",zpeekl(zatm_dev,zatm_vcc->tx_chan*VC_SIZE/4+
620 uPD98401_TXVC_QRP));
621 zwait;
622 zout(uPD98401_TX_READY | (zatm_vcc->tx_chan <<
623 uPD98401_CHAN_ADDR_SHIFT),CMR);
624 spin_unlock_irqrestore(&zatm_dev->lock, flags);
625 EVENT("done\n",0,0);
626 return 0;
627 }
628
629
630 static inline void dequeue_tx(struct atm_vcc *vcc)
631 {
632 struct zatm_vcc *zatm_vcc;
633 struct sk_buff *skb;
634
635 EVENT("dequeue_tx\n",0,0);
636 zatm_vcc = ZATM_VCC(vcc);
637 skb = skb_dequeue(&zatm_vcc->tx_queue);
638 if (!skb) {
639 printk(KERN_CRIT DEV_LABEL "(itf %d): dequeue_tx but not "
640 "txing\n",vcc->dev->number);
641 return;
642 }
643 *ZATM_PRV_DSC(skb) = 0; /* mark as invalid */
644 zatm_vcc->txing--;
645 if (vcc->pop) vcc->pop(vcc,skb);
646 else dev_kfree_skb_irq(skb);
647 while ((skb = skb_dequeue(&zatm_vcc->backlog)))
648 if (do_tx(skb) == RING_BUSY) {
649 skb_queue_head(&zatm_vcc->backlog,skb);
650 break;
651 }
652 atomic_inc(&vcc->stats->tx);
653 wake_up(&zatm_vcc->tx_wait);
654 }
655
656
657 static void poll_tx(struct atm_dev *dev,int mbx)
658 {
659 struct zatm_dev *zatm_dev;
660 unsigned long pos;
661 u32 x;
662
663 EVENT("poll_tx\n",0,0);
664 zatm_dev = ZATM_DEV(dev);
665 pos = (zatm_dev->mbx_start[mbx] & ~0xffffUL) | zin(MTA(mbx));
666 while (x = zin(MWA(mbx)), (pos & 0xffff) != x) {
667 int chan;
668
669 u32 data,*addr;
670
671 EVENT("MBX: host 0x%lx, nic 0x%x\n",pos,x);
672 addr = (u32 *) pos;
673 data = *addr;
674 chan = (data & uPD98401_TXI_CONN) >> uPD98401_TXI_CONN_SHIFT;
675 EVENT("addr = 0x%lx, data = 0x%08x,",(unsigned long) addr,
676 data);
677 EVENT("chan = %d\n",chan,0);
678 if (chan < zatm_dev->chans && zatm_dev->tx_map[chan])
679 dequeue_tx(zatm_dev->tx_map[chan]);
680 else {
681 printk(KERN_CRIT DEV_LABEL "(itf %d): TX indication "
682 "for non-existing channel %d\n",dev->number,chan);
683 event_dump();
684 }
685 if (((pos += 4) & 0xffff) == zatm_dev->mbx_end[mbx])
686 pos = zatm_dev->mbx_start[mbx];
687 }
688 zout(pos & 0xffff,MTA(mbx));
689 }
690
691
692 /*
693 * BUG BUG BUG: Doesn't handle "new-style" rate specification yet.
694 */
695
696 static int alloc_shaper(struct atm_dev *dev,int *pcr,int min,int max,int ubr)
697 {
698 struct zatm_dev *zatm_dev;
699 unsigned long flags;
700 unsigned long i,m,c;
701 int shaper;
702
703 DPRINTK("alloc_shaper (min = %d, max = %d)\n",min,max);
704 zatm_dev = ZATM_DEV(dev);
705 if (!zatm_dev->free_shapers) return -EAGAIN;
706 for (shaper = 0; !((zatm_dev->free_shapers >> shaper) & 1); shaper++);
707 zatm_dev->free_shapers &= ~1 << shaper;
708 if (ubr) {
709 c = 5;
710 i = m = 1;
711 zatm_dev->ubr_ref_cnt++;
712 zatm_dev->ubr = shaper;
713 *pcr = 0;
714 }
715 else {
716 if (min) {
717 if (min <= 255) {
718 i = min;
719 m = ATM_OC3_PCR;
720 }
721 else {
722 i = 255;
723 m = ATM_OC3_PCR*255/min;
724 }
725 }
726 else {
727 if (max > zatm_dev->tx_bw) max = zatm_dev->tx_bw;
728 if (max <= 255) {
729 i = max;
730 m = ATM_OC3_PCR;
731 }
732 else {
733 i = 255;
734 m = DIV_ROUND_UP(ATM_OC3_PCR*255, max);
735 }
736 }
737 if (i > m) {
738 printk(KERN_CRIT DEV_LABEL "shaper algorithm botched "
739 "[%d,%d] -> i=%ld,m=%ld\n",min,max,i,m);
740 m = i;
741 }
742 *pcr = i*ATM_OC3_PCR/m;
743 c = 20; /* @@@ should use max_cdv ! */
744 if ((min && *pcr < min) || (max && *pcr > max)) return -EINVAL;
745 if (zatm_dev->tx_bw < *pcr) return -EAGAIN;
746 zatm_dev->tx_bw -= *pcr;
747 }
748 spin_lock_irqsave(&zatm_dev->lock, flags);
749 DPRINTK("i = %d, m = %d, PCR = %d\n",i,m,*pcr);
750 zpokel(zatm_dev,(i << uPD98401_IM_I_SHIFT) | m,uPD98401_IM(shaper));
751 zpokel(zatm_dev,c << uPD98401_PC_C_SHIFT,uPD98401_PC(shaper));
752 zpokel(zatm_dev,0,uPD98401_X(shaper));
753 zpokel(zatm_dev,0,uPD98401_Y(shaper));
754 zpokel(zatm_dev,uPD98401_PS_E,uPD98401_PS(shaper));
755 spin_unlock_irqrestore(&zatm_dev->lock, flags);
756 return shaper;
757 }
758
759
760 static void dealloc_shaper(struct atm_dev *dev,int shaper)
761 {
762 struct zatm_dev *zatm_dev;
763 unsigned long flags;
764
765 zatm_dev = ZATM_DEV(dev);
766 if (shaper == zatm_dev->ubr) {
767 if (--zatm_dev->ubr_ref_cnt) return;
768 zatm_dev->ubr = -1;
769 }
770 spin_lock_irqsave(&zatm_dev->lock, flags);
771 zpokel(zatm_dev,zpeekl(zatm_dev,uPD98401_PS(shaper)) & ~uPD98401_PS_E,
772 uPD98401_PS(shaper));
773 spin_unlock_irqrestore(&zatm_dev->lock, flags);
774 zatm_dev->free_shapers |= 1 << shaper;
775 }
776
777
778 static void close_tx(struct atm_vcc *vcc)
779 {
780 struct zatm_dev *zatm_dev;
781 struct zatm_vcc *zatm_vcc;
782 unsigned long flags;
783 int chan;
784
785 zatm_vcc = ZATM_VCC(vcc);
786 zatm_dev = ZATM_DEV(vcc->dev);
787 chan = zatm_vcc->tx_chan;
788 if (!chan) return;
789 DPRINTK("close_tx\n");
790 if (skb_peek(&zatm_vcc->backlog)) {
791 printk("waiting for backlog to drain ...\n");
792 event_dump();
793 wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->backlog));
794 }
795 if (skb_peek(&zatm_vcc->tx_queue)) {
796 printk("waiting for TX queue to drain ...\n");
797 event_dump();
798 wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->tx_queue));
799 }
800 spin_lock_irqsave(&zatm_dev->lock, flags);
801 zwait;
802 zout(uPD98401_CLOSE_CHAN | (chan << uPD98401_CHAN_ADDR_SHIFT),CMR);
803 zwait;
804 if (!(zin(CMR) & uPD98401_CHAN_ADDR))
805 printk(KERN_CRIT DEV_LABEL "(itf %d): can't close TX channel "
806 "%d\n",vcc->dev->number,chan);
807 spin_unlock_irqrestore(&zatm_dev->lock, flags);
808 zatm_vcc->tx_chan = 0;
809 zatm_dev->tx_map[chan] = NULL;
810 if (zatm_vcc->shaper != zatm_dev->ubr) {
811 zatm_dev->tx_bw += vcc->qos.txtp.min_pcr;
812 dealloc_shaper(vcc->dev,zatm_vcc->shaper);
813 }
814 kfree(zatm_vcc->ring);
815 }
816
817
818 static int open_tx_first(struct atm_vcc *vcc)
819 {
820 struct zatm_dev *zatm_dev;
821 struct zatm_vcc *zatm_vcc;
822 unsigned long flags;
823 u32 *loop;
824 unsigned short chan;
825 int unlimited;
826
827 DPRINTK("open_tx_first\n");
828 zatm_dev = ZATM_DEV(vcc->dev);
829 zatm_vcc = ZATM_VCC(vcc);
830 zatm_vcc->tx_chan = 0;
831 if (vcc->qos.txtp.traffic_class == ATM_NONE) return 0;
832 spin_lock_irqsave(&zatm_dev->lock, flags);
833 zwait;
834 zout(uPD98401_OPEN_CHAN,CMR);
835 zwait;
836 DPRINTK("0x%x 0x%x\n",zin(CMR),zin(CER));
837 chan = (zin(CMR) & uPD98401_CHAN_ADDR) >> uPD98401_CHAN_ADDR_SHIFT;
838 spin_unlock_irqrestore(&zatm_dev->lock, flags);
839 DPRINTK("chan is %d\n",chan);
840 if (!chan) return -EAGAIN;
841 unlimited = vcc->qos.txtp.traffic_class == ATM_UBR &&
842 (!vcc->qos.txtp.max_pcr || vcc->qos.txtp.max_pcr == ATM_MAX_PCR ||
843 vcc->qos.txtp.max_pcr >= ATM_OC3_PCR);
844 if (unlimited && zatm_dev->ubr != -1) zatm_vcc->shaper = zatm_dev->ubr;
845 else {
846 int uninitialized_var(pcr);
847
848 if (unlimited) vcc->qos.txtp.max_sdu = ATM_MAX_AAL5_PDU;
849 if ((zatm_vcc->shaper = alloc_shaper(vcc->dev,&pcr,
850 vcc->qos.txtp.min_pcr,vcc->qos.txtp.max_pcr,unlimited))
851 < 0) {
852 close_tx(vcc);
853 return zatm_vcc->shaper;
854 }
855 if (pcr > ATM_OC3_PCR) pcr = ATM_OC3_PCR;
856 vcc->qos.txtp.min_pcr = vcc->qos.txtp.max_pcr = pcr;
857 }
858 zatm_vcc->tx_chan = chan;
859 skb_queue_head_init(&zatm_vcc->tx_queue);
860 init_waitqueue_head(&zatm_vcc->tx_wait);
861 /* initialize ring */
862 zatm_vcc->ring = kzalloc(RING_SIZE,GFP_KERNEL);
863 if (!zatm_vcc->ring) return -ENOMEM;
864 loop = zatm_vcc->ring+RING_ENTRIES*RING_WORDS;
865 loop[0] = uPD98401_TXPD_V;
866 loop[1] = loop[2] = 0;
867 loop[3] = virt_to_bus(zatm_vcc->ring);
868 zatm_vcc->ring_curr = 0;
869 zatm_vcc->txing = 0;
870 skb_queue_head_init(&zatm_vcc->backlog);
871 zpokel(zatm_dev,virt_to_bus(zatm_vcc->ring),
872 chan*VC_SIZE/4+uPD98401_TXVC_QRP);
873 return 0;
874 }
875
876
877 static int open_tx_second(struct atm_vcc *vcc)
878 {
879 struct zatm_dev *zatm_dev;
880 struct zatm_vcc *zatm_vcc;
881 unsigned long flags;
882
883 DPRINTK("open_tx_second\n");
884 zatm_dev = ZATM_DEV(vcc->dev);
885 zatm_vcc = ZATM_VCC(vcc);
886 if (!zatm_vcc->tx_chan) return 0;
887 /* set up VC descriptor */
888 spin_lock_irqsave(&zatm_dev->lock, flags);
889 zpokel(zatm_dev,0,zatm_vcc->tx_chan*VC_SIZE/4);
890 zpokel(zatm_dev,uPD98401_TXVC_L | (zatm_vcc->shaper <<
891 uPD98401_TXVC_SHP_SHIFT) | (vcc->vpi << uPD98401_TXVC_VPI_SHIFT) |
892 vcc->vci,zatm_vcc->tx_chan*VC_SIZE/4+1);
893 zpokel(zatm_dev,0,zatm_vcc->tx_chan*VC_SIZE/4+2);
894 spin_unlock_irqrestore(&zatm_dev->lock, flags);
895 zatm_dev->tx_map[zatm_vcc->tx_chan] = vcc;
896 return 0;
897 }
898
899
900 static int start_tx(struct atm_dev *dev)
901 {
902 struct zatm_dev *zatm_dev;
903 int i;
904
905 DPRINTK("start_tx\n");
906 zatm_dev = ZATM_DEV(dev);
907 zatm_dev->tx_map = kmalloc(sizeof(struct atm_vcc *)*
908 zatm_dev->chans,GFP_KERNEL);
909 if (!zatm_dev->tx_map) return -ENOMEM;
910 zatm_dev->tx_bw = ATM_OC3_PCR;
911 zatm_dev->free_shapers = (1 << NR_SHAPERS)-1;
912 zatm_dev->ubr = -1;
913 zatm_dev->ubr_ref_cnt = 0;
914 /* initialize shapers */
915 for (i = 0; i < NR_SHAPERS; i++) zpokel(zatm_dev,0,uPD98401_PS(i));
916 return 0;
917 }
918
919
920 /*------------------------------- interrupts --------------------------------*/
921
922
923 static irqreturn_t zatm_int(int irq,void *dev_id)
924 {
925 struct atm_dev *dev;
926 struct zatm_dev *zatm_dev;
927 u32 reason;
928 int handled = 0;
929
930 dev = dev_id;
931 zatm_dev = ZATM_DEV(dev);
932 while ((reason = zin(GSR))) {
933 handled = 1;
934 EVENT("reason 0x%x\n",reason,0);
935 if (reason & uPD98401_INT_PI) {
936 EVENT("PHY int\n",0,0);
937 dev->phy->interrupt(dev);
938 }
939 if (reason & uPD98401_INT_RQA) {
940 unsigned long pools;
941 int i;
942
943 pools = zin(RQA);
944 EVENT("RQA (0x%08x)\n",pools,0);
945 for (i = 0; pools; i++) {
946 if (pools & 1) {
947 refill_pool(dev,i);
948 zatm_dev->pool_info[i].rqa_count++;
949 }
950 pools >>= 1;
951 }
952 }
953 if (reason & uPD98401_INT_RQU) {
954 unsigned long pools;
955 int i;
956 pools = zin(RQU);
957 printk(KERN_WARNING DEV_LABEL "(itf %d): RQU 0x%08lx\n",
958 dev->number,pools);
959 event_dump();
960 for (i = 0; pools; i++) {
961 if (pools & 1) {
962 refill_pool(dev,i);
963 zatm_dev->pool_info[i].rqu_count++;
964 }
965 pools >>= 1;
966 }
967 }
968 /* don't handle RD */
969 if (reason & uPD98401_INT_SPE)
970 printk(KERN_ALERT DEV_LABEL "(itf %d): system parity "
971 "error at 0x%08x\n",dev->number,zin(ADDR));
972 if (reason & uPD98401_INT_CPE)
973 printk(KERN_ALERT DEV_LABEL "(itf %d): control memory "
974 "parity error at 0x%08x\n",dev->number,zin(ADDR));
975 if (reason & uPD98401_INT_SBE) {
976 printk(KERN_ALERT DEV_LABEL "(itf %d): system bus "
977 "error at 0x%08x\n",dev->number,zin(ADDR));
978 event_dump();
979 }
980 /* don't handle IND */
981 if (reason & uPD98401_INT_MF) {
982 printk(KERN_CRIT DEV_LABEL "(itf %d): mailbox full "
983 "(0x%x)\n",dev->number,(reason & uPD98401_INT_MF)
984 >> uPD98401_INT_MF_SHIFT);
985 event_dump();
986 /* @@@ should try to recover */
987 }
988 if (reason & uPD98401_INT_MM) {
989 if (reason & 1) poll_rx(dev,0);
990 if (reason & 2) poll_rx(dev,1);
991 if (reason & 4) poll_tx(dev,2);
992 if (reason & 8) poll_tx(dev,3);
993 }
994 /* @@@ handle RCRn */
995 }
996 return IRQ_RETVAL(handled);
997 }
998
999
1000 /*----------------------------- (E)EPROM access -----------------------------*/
1001
1002
1003 static void __devinit eprom_set(struct zatm_dev *zatm_dev,unsigned long value,
1004 unsigned short cmd)
1005 {
1006 int error;
1007
1008 if ((error = pci_write_config_dword(zatm_dev->pci_dev,cmd,value)))
1009 printk(KERN_ERR DEV_LABEL ": PCI write failed (0x%02x)\n",
1010 error);
1011 }
1012
1013
1014 static unsigned long __devinit eprom_get(struct zatm_dev *zatm_dev,
1015 unsigned short cmd)
1016 {
1017 unsigned int value;
1018 int error;
1019
1020 if ((error = pci_read_config_dword(zatm_dev->pci_dev,cmd,&value)))
1021 printk(KERN_ERR DEV_LABEL ": PCI read failed (0x%02x)\n",
1022 error);
1023 return value;
1024 }
1025
1026
1027 static void __devinit eprom_put_bits(struct zatm_dev *zatm_dev,
1028 unsigned long data,int bits,unsigned short cmd)
1029 {
1030 unsigned long value;
1031 int i;
1032
1033 for (i = bits-1; i >= 0; i--) {
1034 value = ZEPROM_CS | (((data >> i) & 1) ? ZEPROM_DI : 0);
1035 eprom_set(zatm_dev,value,cmd);
1036 eprom_set(zatm_dev,value | ZEPROM_SK,cmd);
1037 eprom_set(zatm_dev,value,cmd);
1038 }
1039 }
1040
1041
1042 static void __devinit eprom_get_byte(struct zatm_dev *zatm_dev,
1043 unsigned char *byte,unsigned short cmd)
1044 {
1045 int i;
1046
1047 *byte = 0;
1048 for (i = 8; i; i--) {
1049 eprom_set(zatm_dev,ZEPROM_CS,cmd);
1050 eprom_set(zatm_dev,ZEPROM_CS | ZEPROM_SK,cmd);
1051 *byte <<= 1;
1052 if (eprom_get(zatm_dev,cmd) & ZEPROM_DO) *byte |= 1;
1053 eprom_set(zatm_dev,ZEPROM_CS,cmd);
1054 }
1055 }
1056
1057
1058 static unsigned char __devinit eprom_try_esi(struct atm_dev *dev,
1059 unsigned short cmd,int offset,int swap)
1060 {
1061 unsigned char buf[ZEPROM_SIZE];
1062 struct zatm_dev *zatm_dev;
1063 int i;
1064
1065 zatm_dev = ZATM_DEV(dev);
1066 for (i = 0; i < ZEPROM_SIZE; i += 2) {
1067 eprom_set(zatm_dev,ZEPROM_CS,cmd); /* select EPROM */
1068 eprom_put_bits(zatm_dev,ZEPROM_CMD_READ,ZEPROM_CMD_LEN,cmd);
1069 eprom_put_bits(zatm_dev,i >> 1,ZEPROM_ADDR_LEN,cmd);
1070 eprom_get_byte(zatm_dev,buf+i+swap,cmd);
1071 eprom_get_byte(zatm_dev,buf+i+1-swap,cmd);
1072 eprom_set(zatm_dev,0,cmd); /* deselect EPROM */
1073 }
1074 memcpy(dev->esi,buf+offset,ESI_LEN);
1075 return memcmp(dev->esi,"\0\0\0\0\0",ESI_LEN); /* assumes ESI_LEN == 6 */
1076 }
1077
1078
1079 static void __devinit eprom_get_esi(struct atm_dev *dev)
1080 {
1081 if (eprom_try_esi(dev,ZEPROM_V1_REG,ZEPROM_V1_ESI_OFF,1)) return;
1082 (void) eprom_try_esi(dev,ZEPROM_V2_REG,ZEPROM_V2_ESI_OFF,0);
1083 }
1084
1085
1086 /*--------------------------------- entries ---------------------------------*/
1087
1088
1089 static int __devinit zatm_init(struct atm_dev *dev)
1090 {
1091 struct zatm_dev *zatm_dev;
1092 struct pci_dev *pci_dev;
1093 unsigned short command;
1094 int error,i,last;
1095 unsigned long t0,t1,t2;
1096
1097 DPRINTK(">zatm_init\n");
1098 zatm_dev = ZATM_DEV(dev);
1099 spin_lock_init(&zatm_dev->lock);
1100 pci_dev = zatm_dev->pci_dev;
1101 zatm_dev->base = pci_resource_start(pci_dev, 0);
1102 zatm_dev->irq = pci_dev->irq;
1103 if ((error = pci_read_config_word(pci_dev,PCI_COMMAND,&command))) {
1104 printk(KERN_ERR DEV_LABEL "(itf %d): init error 0x%02x\n",
1105 dev->number,error);
1106 return -EINVAL;
1107 }
1108 if ((error = pci_write_config_word(pci_dev,PCI_COMMAND,
1109 command | PCI_COMMAND_IO | PCI_COMMAND_MASTER))) {
1110 printk(KERN_ERR DEV_LABEL "(itf %d): can't enable IO (0x%02x)"
1111 "\n",dev->number,error);
1112 return -EIO;
1113 }
1114 eprom_get_esi(dev);
1115 printk(KERN_NOTICE DEV_LABEL "(itf %d): rev.%d,base=0x%x,irq=%d,",
1116 dev->number,pci_dev->revision,zatm_dev->base,zatm_dev->irq);
1117 /* reset uPD98401 */
1118 zout(0,SWR);
1119 while (!(zin(GSR) & uPD98401_INT_IND));
1120 zout(uPD98401_GMR_ONE /*uPD98401_BURST4*/,GMR);
1121 last = MAX_CRAM_SIZE;
1122 for (i = last-RAM_INCREMENT; i >= 0; i -= RAM_INCREMENT) {
1123 zpokel(zatm_dev,0x55555555,i);
1124 if (zpeekl(zatm_dev,i) != 0x55555555) last = i;
1125 else {
1126 zpokel(zatm_dev,0xAAAAAAAA,i);
1127 if (zpeekl(zatm_dev,i) != 0xAAAAAAAA) last = i;
1128 else zpokel(zatm_dev,i,i);
1129 }
1130 }
1131 for (i = 0; i < last; i += RAM_INCREMENT)
1132 if (zpeekl(zatm_dev,i) != i) break;
1133 zatm_dev->mem = i << 2;
1134 while (i) zpokel(zatm_dev,0,--i);
1135 /* reset again to rebuild memory pointers */
1136 zout(0,SWR);
1137 while (!(zin(GSR) & uPD98401_INT_IND));
1138 zout(uPD98401_GMR_ONE | uPD98401_BURST8 | uPD98401_BURST4 |
1139 uPD98401_BURST2 | uPD98401_GMR_PM | uPD98401_GMR_DR,GMR);
1140 /* TODO: should shrink allocation now */
1141 printk("mem=%dkB,%s (",zatm_dev->mem >> 10,zatm_dev->copper ? "UTP" :
1142 "MMF");
1143 for (i = 0; i < ESI_LEN; i++)
1144 printk("%02X%s",dev->esi[i],i == ESI_LEN-1 ? ")\n" : "-");
1145 do {
1146 unsigned long flags;
1147
1148 spin_lock_irqsave(&zatm_dev->lock, flags);
1149 t0 = zpeekl(zatm_dev,uPD98401_TSR);
1150 udelay(10);
1151 t1 = zpeekl(zatm_dev,uPD98401_TSR);
1152 udelay(1010);
1153 t2 = zpeekl(zatm_dev,uPD98401_TSR);
1154 spin_unlock_irqrestore(&zatm_dev->lock, flags);
1155 }
1156 while (t0 > t1 || t1 > t2); /* loop if wrapping ... */
1157 zatm_dev->khz = t2-2*t1+t0;
1158 printk(KERN_NOTICE DEV_LABEL "(itf %d): uPD98401 %d.%d at %d.%03d "
1159 "MHz\n",dev->number,
1160 (zin(VER) & uPD98401_MAJOR) >> uPD98401_MAJOR_SHIFT,
1161 zin(VER) & uPD98401_MINOR,zatm_dev->khz/1000,zatm_dev->khz % 1000);
1162 return uPD98402_init(dev);
1163 }
1164
1165
1166 static int __devinit zatm_start(struct atm_dev *dev)
1167 {
1168 struct zatm_dev *zatm_dev = ZATM_DEV(dev);
1169 struct pci_dev *pdev = zatm_dev->pci_dev;
1170 unsigned long curr;
1171 int pools,vccs,rx;
1172 int error, i, ld;
1173
1174 DPRINTK("zatm_start\n");
1175 zatm_dev->rx_map = zatm_dev->tx_map = NULL;
1176 for (i = 0; i < NR_MBX; i++)
1177 zatm_dev->mbx_start[i] = 0;
1178 error = request_irq(zatm_dev->irq, zatm_int, IRQF_SHARED, DEV_LABEL, dev);
1179 if (error < 0) {
1180 printk(KERN_ERR DEV_LABEL "(itf %d): IRQ%d is already in use\n",
1181 dev->number,zatm_dev->irq);
1182 goto done;
1183 }
1184 /* define memory regions */
1185 pools = NR_POOLS;
1186 if (NR_SHAPERS*SHAPER_SIZE > pools*POOL_SIZE)
1187 pools = NR_SHAPERS*SHAPER_SIZE/POOL_SIZE;
1188 vccs = (zatm_dev->mem-NR_SHAPERS*SHAPER_SIZE-pools*POOL_SIZE)/
1189 (2*VC_SIZE+RX_SIZE);
1190 ld = -1;
1191 for (rx = 1; rx < vccs; rx <<= 1) ld++;
1192 dev->ci_range.vpi_bits = 0; /* @@@ no VPI for now */
1193 dev->ci_range.vci_bits = ld;
1194 dev->link_rate = ATM_OC3_PCR;
1195 zatm_dev->chans = vccs; /* ??? */
1196 curr = rx*RX_SIZE/4;
1197 DPRINTK("RX pool 0x%08lx\n",curr);
1198 zpokel(zatm_dev,curr,uPD98401_PMA); /* receive pool */
1199 zatm_dev->pool_base = curr;
1200 curr += pools*POOL_SIZE/4;
1201 DPRINTK("Shapers 0x%08lx\n",curr);
1202 zpokel(zatm_dev,curr,uPD98401_SMA); /* shapers */
1203 curr += NR_SHAPERS*SHAPER_SIZE/4;
1204 DPRINTK("Free 0x%08lx\n",curr);
1205 zpokel(zatm_dev,curr,uPD98401_TOS); /* free pool */
1206 printk(KERN_INFO DEV_LABEL "(itf %d): %d shapers, %d pools, %d RX, "
1207 "%ld VCs\n",dev->number,NR_SHAPERS,pools,rx,
1208 (zatm_dev->mem-curr*4)/VC_SIZE);
1209 /* create mailboxes */
1210 for (i = 0; i < NR_MBX; i++) {
1211 void *mbx;
1212 dma_addr_t mbx_dma;
1213
1214 if (!mbx_entries[i])
1215 continue;
1216 mbx = pci_alloc_consistent(pdev, 2*MBX_SIZE(i), &mbx_dma);
1217 if (!mbx) {
1218 error = -ENOMEM;
1219 goto out;
1220 }
1221 /*
1222 * Alignment provided by pci_alloc_consistent() isn't enough
1223 * for this device.
1224 */
1225 if (((unsigned long)mbx ^ mbx_dma) & 0xffff) {
1226 printk(KERN_ERR DEV_LABEL "(itf %d): system "
1227 "bus incompatible with driver\n", dev->number);
1228 pci_free_consistent(pdev, 2*MBX_SIZE(i), mbx, mbx_dma);
1229 error = -ENODEV;
1230 goto out;
1231 }
1232 DPRINTK("mbx@0x%08lx-0x%08lx\n", mbx, mbx + MBX_SIZE(i));
1233 zatm_dev->mbx_start[i] = (unsigned long)mbx;
1234 zatm_dev->mbx_dma[i] = mbx_dma;
1235 zatm_dev->mbx_end[i] = (zatm_dev->mbx_start[i] + MBX_SIZE(i)) &
1236 0xffff;
1237 zout(mbx_dma >> 16, MSH(i));
1238 zout(mbx_dma, MSL(i));
1239 zout(zatm_dev->mbx_end[i], MBA(i));
1240 zout((unsigned long)mbx & 0xffff, MTA(i));
1241 zout((unsigned long)mbx & 0xffff, MWA(i));
1242 }
1243 error = start_tx(dev);
1244 if (error)
1245 goto out;
1246 error = start_rx(dev);
1247 if (error)
1248 goto out_tx;
1249 error = dev->phy->start(dev);
1250 if (error)
1251 goto out_rx;
1252 zout(0xffffffff,IMR); /* enable interrupts */
1253 /* enable TX & RX */
1254 zout(zin(GMR) | uPD98401_GMR_SE | uPD98401_GMR_RE,GMR);
1255 done:
1256 return error;
1257
1258 out_rx:
1259 kfree(zatm_dev->rx_map);
1260 out_tx:
1261 kfree(zatm_dev->tx_map);
1262 out:
1263 while (i-- > 0) {
1264 pci_free_consistent(pdev, 2*MBX_SIZE(i),
1265 (void *)zatm_dev->mbx_start[i],
1266 zatm_dev->mbx_dma[i]);
1267 }
1268 free_irq(zatm_dev->irq, dev);
1269 goto done;
1270 }
1271
1272
1273 static void zatm_close(struct atm_vcc *vcc)
1274 {
1275 DPRINTK(">zatm_close\n");
1276 if (!ZATM_VCC(vcc)) return;
1277 clear_bit(ATM_VF_READY,&vcc->flags);
1278 close_rx(vcc);
1279 EVENT("close_tx\n",0,0);
1280 close_tx(vcc);
1281 DPRINTK("zatm_close: done waiting\n");
1282 /* deallocate memory */
1283 kfree(ZATM_VCC(vcc));
1284 vcc->dev_data = NULL;
1285 clear_bit(ATM_VF_ADDR,&vcc->flags);
1286 }
1287
1288
1289 static int zatm_open(struct atm_vcc *vcc)
1290 {
1291 struct zatm_dev *zatm_dev;
1292 struct zatm_vcc *zatm_vcc;
1293 short vpi = vcc->vpi;
1294 int vci = vcc->vci;
1295 int error;
1296
1297 DPRINTK(">zatm_open\n");
1298 zatm_dev = ZATM_DEV(vcc->dev);
1299 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
1300 vcc->dev_data = NULL;
1301 if (vci != ATM_VPI_UNSPEC && vpi != ATM_VCI_UNSPEC)
1302 set_bit(ATM_VF_ADDR,&vcc->flags);
1303 if (vcc->qos.aal != ATM_AAL5) return -EINVAL; /* @@@ AAL0 */
1304 DPRINTK(DEV_LABEL "(itf %d): open %d.%d\n",vcc->dev->number,vcc->vpi,
1305 vcc->vci);
1306 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags)) {
1307 zatm_vcc = kmalloc(sizeof(struct zatm_vcc),GFP_KERNEL);
1308 if (!zatm_vcc) {
1309 clear_bit(ATM_VF_ADDR,&vcc->flags);
1310 return -ENOMEM;
1311 }
1312 vcc->dev_data = zatm_vcc;
1313 ZATM_VCC(vcc)->tx_chan = 0; /* for zatm_close after open_rx */
1314 if ((error = open_rx_first(vcc))) {
1315 zatm_close(vcc);
1316 return error;
1317 }
1318 if ((error = open_tx_first(vcc))) {
1319 zatm_close(vcc);
1320 return error;
1321 }
1322 }
1323 if (vci == ATM_VPI_UNSPEC || vpi == ATM_VCI_UNSPEC) return 0;
1324 if ((error = open_rx_second(vcc))) {
1325 zatm_close(vcc);
1326 return error;
1327 }
1328 if ((error = open_tx_second(vcc))) {
1329 zatm_close(vcc);
1330 return error;
1331 }
1332 set_bit(ATM_VF_READY,&vcc->flags);
1333 return 0;
1334 }
1335
1336
1337 static int zatm_change_qos(struct atm_vcc *vcc,struct atm_qos *qos,int flags)
1338 {
1339 printk("Not yet implemented\n");
1340 return -ENOSYS;
1341 /* @@@ */
1342 }
1343
1344
1345 static int zatm_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
1346 {
1347 struct zatm_dev *zatm_dev;
1348 unsigned long flags;
1349
1350 zatm_dev = ZATM_DEV(dev);
1351 switch (cmd) {
1352 case ZATM_GETPOOLZ:
1353 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1354 /* fall through */
1355 case ZATM_GETPOOL:
1356 {
1357 struct zatm_pool_info info;
1358 int pool;
1359
1360 if (get_user(pool,
1361 &((struct zatm_pool_req __user *) arg)->pool_num))
1362 return -EFAULT;
1363 if (pool < 0 || pool > ZATM_LAST_POOL)
1364 return -EINVAL;
1365 spin_lock_irqsave(&zatm_dev->lock, flags);
1366 info = zatm_dev->pool_info[pool];
1367 if (cmd == ZATM_GETPOOLZ) {
1368 zatm_dev->pool_info[pool].rqa_count = 0;
1369 zatm_dev->pool_info[pool].rqu_count = 0;
1370 }
1371 spin_unlock_irqrestore(&zatm_dev->lock, flags);
1372 return copy_to_user(
1373 &((struct zatm_pool_req __user *) arg)->info,
1374 &info,sizeof(info)) ? -EFAULT : 0;
1375 }
1376 case ZATM_SETPOOL:
1377 {
1378 struct zatm_pool_info info;
1379 int pool;
1380
1381 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1382 if (get_user(pool,
1383 &((struct zatm_pool_req __user *) arg)->pool_num))
1384 return -EFAULT;
1385 if (pool < 0 || pool > ZATM_LAST_POOL)
1386 return -EINVAL;
1387 if (copy_from_user(&info,
1388 &((struct zatm_pool_req __user *) arg)->info,
1389 sizeof(info))) return -EFAULT;
1390 if (!info.low_water)
1391 info.low_water = zatm_dev->
1392 pool_info[pool].low_water;
1393 if (!info.high_water)
1394 info.high_water = zatm_dev->
1395 pool_info[pool].high_water;
1396 if (!info.next_thres)
1397 info.next_thres = zatm_dev->
1398 pool_info[pool].next_thres;
1399 if (info.low_water >= info.high_water ||
1400 info.low_water < 0)
1401 return -EINVAL;
1402 spin_lock_irqsave(&zatm_dev->lock, flags);
1403 zatm_dev->pool_info[pool].low_water =
1404 info.low_water;
1405 zatm_dev->pool_info[pool].high_water =
1406 info.high_water;
1407 zatm_dev->pool_info[pool].next_thres =
1408 info.next_thres;
1409 spin_unlock_irqrestore(&zatm_dev->lock, flags);
1410 return 0;
1411 }
1412 default:
1413 if (!dev->phy->ioctl) return -ENOIOCTLCMD;
1414 return dev->phy->ioctl(dev,cmd,arg);
1415 }
1416 }
1417
1418
1419 static int zatm_getsockopt(struct atm_vcc *vcc,int level,int optname,
1420 void __user *optval,int optlen)
1421 {
1422 return -EINVAL;
1423 }
1424
1425
1426 static int zatm_setsockopt(struct atm_vcc *vcc,int level,int optname,
1427 void __user *optval,unsigned int optlen)
1428 {
1429 return -EINVAL;
1430 }
1431
1432 static int zatm_send(struct atm_vcc *vcc,struct sk_buff *skb)
1433 {
1434 int error;
1435
1436 EVENT(">zatm_send 0x%lx\n",(unsigned long) skb,0);
1437 if (!ZATM_VCC(vcc)->tx_chan || !test_bit(ATM_VF_READY,&vcc->flags)) {
1438 if (vcc->pop) vcc->pop(vcc,skb);
1439 else dev_kfree_skb(skb);
1440 return -EINVAL;
1441 }
1442 if (!skb) {
1443 printk(KERN_CRIT "!skb in zatm_send ?\n");
1444 if (vcc->pop) vcc->pop(vcc,skb);
1445 return -EINVAL;
1446 }
1447 ATM_SKB(skb)->vcc = vcc;
1448 error = do_tx(skb);
1449 if (error != RING_BUSY) return error;
1450 skb_queue_tail(&ZATM_VCC(vcc)->backlog,skb);
1451 return 0;
1452 }
1453
1454
1455 static void zatm_phy_put(struct atm_dev *dev,unsigned char value,
1456 unsigned long addr)
1457 {
1458 struct zatm_dev *zatm_dev;
1459
1460 zatm_dev = ZATM_DEV(dev);
1461 zwait;
1462 zout(value,CER);
1463 zout(uPD98401_IND_ACC | uPD98401_IA_B0 |
1464 (uPD98401_IA_TGT_PHY << uPD98401_IA_TGT_SHIFT) | addr,CMR);
1465 }
1466
1467
1468 static unsigned char zatm_phy_get(struct atm_dev *dev,unsigned long addr)
1469 {
1470 struct zatm_dev *zatm_dev;
1471
1472 zatm_dev = ZATM_DEV(dev);
1473 zwait;
1474 zout(uPD98401_IND_ACC | uPD98401_IA_B0 | uPD98401_IA_RW |
1475 (uPD98401_IA_TGT_PHY << uPD98401_IA_TGT_SHIFT) | addr,CMR);
1476 zwait;
1477 return zin(CER) & 0xff;
1478 }
1479
1480
1481 static const struct atmdev_ops ops = {
1482 .open = zatm_open,
1483 .close = zatm_close,
1484 .ioctl = zatm_ioctl,
1485 .getsockopt = zatm_getsockopt,
1486 .setsockopt = zatm_setsockopt,
1487 .send = zatm_send,
1488 .phy_put = zatm_phy_put,
1489 .phy_get = zatm_phy_get,
1490 .change_qos = zatm_change_qos,
1491 };
1492
1493 static int __devinit zatm_init_one(struct pci_dev *pci_dev,
1494 const struct pci_device_id *ent)
1495 {
1496 struct atm_dev *dev;
1497 struct zatm_dev *zatm_dev;
1498 int ret = -ENOMEM;
1499
1500 zatm_dev = kmalloc(sizeof(*zatm_dev), GFP_KERNEL);
1501 if (!zatm_dev) {
1502 printk(KERN_EMERG "%s: memory shortage\n", DEV_LABEL);
1503 goto out;
1504 }
1505
1506 dev = atm_dev_register(DEV_LABEL, &ops, -1, NULL);
1507 if (!dev)
1508 goto out_free;
1509
1510 ret = pci_enable_device(pci_dev);
1511 if (ret < 0)
1512 goto out_deregister;
1513
1514 ret = pci_request_regions(pci_dev, DEV_LABEL);
1515 if (ret < 0)
1516 goto out_disable;
1517
1518 zatm_dev->pci_dev = pci_dev;
1519 dev->dev_data = zatm_dev;
1520 zatm_dev->copper = (int)ent->driver_data;
1521 if ((ret = zatm_init(dev)) || (ret = zatm_start(dev)))
1522 goto out_release;
1523
1524 pci_set_drvdata(pci_dev, dev);
1525 zatm_dev->more = zatm_boards;
1526 zatm_boards = dev;
1527 ret = 0;
1528 out:
1529 return ret;
1530
1531 out_release:
1532 pci_release_regions(pci_dev);
1533 out_disable:
1534 pci_disable_device(pci_dev);
1535 out_deregister:
1536 atm_dev_deregister(dev);
1537 out_free:
1538 kfree(zatm_dev);
1539 goto out;
1540 }
1541
1542
1543 MODULE_LICENSE("GPL");
1544
1545 static struct pci_device_id zatm_pci_tbl[] __devinitdata = {
1546 { PCI_VDEVICE(ZEITNET, PCI_DEVICE_ID_ZEITNET_1221), ZATM_COPPER },
1547 { PCI_VDEVICE(ZEITNET, PCI_DEVICE_ID_ZEITNET_1225), 0 },
1548 { 0, }
1549 };
1550 MODULE_DEVICE_TABLE(pci, zatm_pci_tbl);
1551
1552 static struct pci_driver zatm_driver = {
1553 .name = DEV_LABEL,
1554 .id_table = zatm_pci_tbl,
1555 .probe = zatm_init_one,
1556 };
1557
1558 static int __init zatm_init_module(void)
1559 {
1560 return pci_register_driver(&zatm_driver);
1561 }
1562
1563 module_init(zatm_init_module);
1564 /* module_exit not defined so not unloadable */
Tomato firmware and modifications.