?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / atm / fore200e.c
blob76b7469324875e0dc6246cb2f9f8888ecda75eeb
1 /*
2 A FORE Systems 200E-series driver for ATM on Linux.
3 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003.
4
5 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
6
7 This driver simultaneously supports PCA-200E and SBA-200E adapters
8 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */
24
25
26 #include <linux/kernel.h>
27 #include <linux/slab.h>
28 #include <linux/init.h>
29 #include <linux/capability.h>
30 #include <linux/interrupt.h>
31 #include <linux/bitops.h>
32 #include <linux/pci.h>
33 #include <linux/module.h>
34 #include <linux/atmdev.h>
35 #include <linux/sonet.h>
36 #include <linux/atm_suni.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/delay.h>
39 #include <linux/firmware.h>
40 #include <asm/io.h>
41 #include <asm/string.h>
42 #include <asm/page.h>
43 #include <asm/irq.h>
44 #include <asm/dma.h>
45 #include <asm/byteorder.h>
46 #include <asm/uaccess.h>
47 #include <asm/atomic.h>
48
49 #ifdef CONFIG_SBUS
50 #include <linux/of.h>
51 #include <linux/of_device.h>
52 #include <asm/idprom.h>
53 #include <asm/openprom.h>
54 #include <asm/oplib.h>
55 #include <asm/pgtable.h>
56 #endif
57
58 #if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet \
59 */
60 #define FORE200E_USE_TASKLET
61 #endif
62
63
64 #define FORE200E_52BYTE_AAL0_SDU
65
66 #include "fore200e.h"
67 #include "suni.h"
68
69 #define FORE200E_VERSION "0.3e"
70
71 #define FORE200E "fore200e: "
72
73 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
74 #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
75 printk(FORE200E format, ##args); } while (0)
76 #else
77 #define DPRINTK(level, format, args...) do {} while (0)
78 #endif
79
80
81 #define FORE200E_ALIGN(addr, alignment) \
82 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
83
84 #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
85
86 #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
87
88 #define FORE200E_NEXT_ENTRY(index, modulo) (index = ++(index) % (modulo))
89
90 #define ASSERT(expr) if (!(expr)) { \
91 printk(FORE200E "assertion failed! %s[%d]: %s\n", \
92 __func__, __LINE__, #expr); \
93 panic(FORE200E "%s", __func__); \
94 }
95
96
97 static const struct atmdev_ops fore200e_ops;
98 static const struct fore200e_bus fore200e_bus[];
99
100 static LIST_HEAD(fore200e_boards);
101
102
103 MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
104 MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
105 MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
106
107
108 static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
109 { BUFFER_S1_NBR, BUFFER_L1_NBR },
110 { BUFFER_S2_NBR, BUFFER_L2_NBR }
111 };
112
113 static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
114 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
115 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
116 };
117
118
119 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
120 static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
121 #endif
122
123
124
125
126 static enum fore200e_aal
127 fore200e_atm2fore_aal(int aal)
128 {
129 switch(aal) {
130 case ATM_AAL0: return FORE200E_AAL0;
131 case ATM_AAL34: return FORE200E_AAL34;
132 case ATM_AAL1:
133 case ATM_AAL2:
134 case ATM_AAL5: return FORE200E_AAL5;
135 }
136
137 return -EINVAL;
138 }
139
140
141 static char*
142 fore200e_irq_itoa(int irq)
143 {
144 static char str[8];
145 sprintf(str, "%d", irq);
146 return str;
147 }
148
149
150 /* allocate and align a chunk of memory intended to hold the data behing exchanged
151 between the driver and the adapter (using streaming DVMA) */
152
153 static int
154 fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
155 {
156 unsigned long offset = 0;
157
158 if (alignment <= sizeof(int))
159 alignment = 0;
160
161 chunk->alloc_size = size + alignment;
162 chunk->align_size = size;
163 chunk->direction = direction;
164
165 chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
166 if (chunk->alloc_addr == NULL)
167 return -ENOMEM;
168
169 if (alignment > 0)
170 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
171
172 chunk->align_addr = chunk->alloc_addr + offset;
173
174 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
175
176 return 0;
177 }
178
179
180 /* free a chunk of memory */
181
182 static void
183 fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
184 {
185 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
186
187 kfree(chunk->alloc_addr);
188 }
189
190
191 static void
192 fore200e_spin(int msecs)
193 {
194 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
195 while (time_before(jiffies, timeout));
196 }
197
198
199 static int
200 fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
201 {
202 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
203 int ok;
204
205 mb();
206 do {
207 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
208 break;
209
210 } while (time_before(jiffies, timeout));
211
212 if (!ok) {
213 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
214 *addr, val);
215 }
216
217 return ok;
218 }
219
220
221 static int
222 fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs)
223 {
224 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
225 int ok;
226
227 do {
228 if ((ok = (fore200e->bus->read(addr) == val)))
229 break;
230
231 } while (time_before(jiffies, timeout));
232
233 if (!ok) {
234 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
235 fore200e->bus->read(addr), val);
236 }
237
238 return ok;
239 }
240
241
242 static void
243 fore200e_free_rx_buf(struct fore200e* fore200e)
244 {
245 int scheme, magn, nbr;
246 struct buffer* buffer;
247
248 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
249 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
250
251 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
252
253 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
254
255 struct chunk* data = &buffer[ nbr ].data;
256
257 if (data->alloc_addr != NULL)
258 fore200e_chunk_free(fore200e, data);
259 }
260 }
261 }
262 }
263 }
264
265
266 static void
267 fore200e_uninit_bs_queue(struct fore200e* fore200e)
268 {
269 int scheme, magn;
270
271 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
272 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
273
274 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
275 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
276
277 if (status->alloc_addr)
278 fore200e->bus->dma_chunk_free(fore200e, status);
279
280 if (rbd_block->alloc_addr)
281 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
282 }
283 }
284 }
285
286
287 static int
288 fore200e_reset(struct fore200e* fore200e, int diag)
289 {
290 int ok;
291
292 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET;
293
294 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
295
296 fore200e->bus->reset(fore200e);
297
298 if (diag) {
299 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
300 if (ok == 0) {
301
302 printk(FORE200E "device %s self-test failed\n", fore200e->name);
303 return -ENODEV;
304 }
305
306 printk(FORE200E "device %s self-test passed\n", fore200e->name);
307
308 fore200e->state = FORE200E_STATE_RESET;
309 }
310
311 return 0;
312 }
313
314
315 static void
316 fore200e_shutdown(struct fore200e* fore200e)
317 {
318 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
319 fore200e->name, fore200e->phys_base,
320 fore200e_irq_itoa(fore200e->irq));
321
322 if (fore200e->state > FORE200E_STATE_RESET) {
323 /* first, reset the board to prevent further interrupts or data transfers */
324 fore200e_reset(fore200e, 0);
325 }
326
327 /* then, release all allocated resources */
328 switch(fore200e->state) {
329
330 case FORE200E_STATE_COMPLETE:
331 kfree(fore200e->stats);
332
333 case FORE200E_STATE_IRQ:
334 free_irq(fore200e->irq, fore200e->atm_dev);
335
336 case FORE200E_STATE_ALLOC_BUF:
337 fore200e_free_rx_buf(fore200e);
338
339 case FORE200E_STATE_INIT_BSQ:
340 fore200e_uninit_bs_queue(fore200e);
341
342 case FORE200E_STATE_INIT_RXQ:
343 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
344 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
345
346 case FORE200E_STATE_INIT_TXQ:
347 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
348 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
349
350 case FORE200E_STATE_INIT_CMDQ:
351 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
352
353 case FORE200E_STATE_INITIALIZE:
354 /* nothing to do for that state */
355
356 case FORE200E_STATE_START_FW:
357 /* nothing to do for that state */
358
359 case FORE200E_STATE_RESET:
360 /* nothing to do for that state */
361
362 case FORE200E_STATE_MAP:
363 fore200e->bus->unmap(fore200e);
364
365 case FORE200E_STATE_CONFIGURE:
366 /* nothing to do for that state */
367
368 case FORE200E_STATE_REGISTER:
369 atm_dev_deregister(fore200e->atm_dev);
370
371 case FORE200E_STATE_BLANK:
372 /* nothing to do for that state */
373 break;
374 }
375 }
376
377
378 #ifdef CONFIG_PCI
379
380 static u32 fore200e_pca_read(volatile u32 __iomem *addr)
381 {
382 /* on big-endian hosts, the board is configured to convert
383 the endianess of slave RAM accesses */
384 return le32_to_cpu(readl(addr));
385 }
386
387
388 static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr)
389 {
390 /* on big-endian hosts, the board is configured to convert
391 the endianess of slave RAM accesses */
392 writel(cpu_to_le32(val), addr);
393 }
394
395
396 static u32
397 fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
398 {
399 u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction);
400
401 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
402 virt_addr, size, direction, dma_addr);
403
404 return dma_addr;
405 }
406
407
408 static void
409 fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
410 {
411 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
412 dma_addr, size, direction);
413
414 pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
415 }
416
417
418 static void
419 fore200e_pca_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
420 {
421 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
422
423 pci_dma_sync_single_for_cpu((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
424 }
425
426 static void
427 fore200e_pca_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
428 {
429 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
430
431 pci_dma_sync_single_for_device((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
432 }
433
434
435 /* allocate a DMA consistent chunk of memory intended to act as a communication mechanism
436 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
437
438 static int
439 fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
440 int size, int nbr, int alignment)
441 {
442 /* returned chunks are page-aligned */
443 chunk->alloc_size = size * nbr;
444 chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev,
445 chunk->alloc_size,
446 &chunk->dma_addr);
447
448 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
449 return -ENOMEM;
450
451 chunk->align_addr = chunk->alloc_addr;
452
453 return 0;
454 }
455
456
457 /* free a DMA consistent chunk of memory */
458
459 static void
460 fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
461 {
462 pci_free_consistent((struct pci_dev*)fore200e->bus_dev,
463 chunk->alloc_size,
464 chunk->alloc_addr,
465 chunk->dma_addr);
466 }
467
468
469 static int
470 fore200e_pca_irq_check(struct fore200e* fore200e)
471 {
472 /* this is a 1 bit register */
473 int irq_posted = readl(fore200e->regs.pca.psr);
474
475 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
476 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
477 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
478 }
479 #endif
480
481 return irq_posted;
482 }
483
484
485 static void
486 fore200e_pca_irq_ack(struct fore200e* fore200e)
487 {
488 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
489 }
490
491
492 static void
493 fore200e_pca_reset(struct fore200e* fore200e)
494 {
495 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
496 fore200e_spin(10);
497 writel(0, fore200e->regs.pca.hcr);
498 }
499
500
501 static int __devinit
502 fore200e_pca_map(struct fore200e* fore200e)
503 {
504 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
505
506 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
507
508 if (fore200e->virt_base == NULL) {
509 printk(FORE200E "can't map device %s\n", fore200e->name);
510 return -EFAULT;
511 }
512
513 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
514
515 /* gain access to the PCA specific registers */
516 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
517 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;
518 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
519
520 fore200e->state = FORE200E_STATE_MAP;
521 return 0;
522 }
523
524
525 static void
526 fore200e_pca_unmap(struct fore200e* fore200e)
527 {
528 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
529
530 if (fore200e->virt_base != NULL)
531 iounmap(fore200e->virt_base);
532 }
533
534
535 static int __devinit
536 fore200e_pca_configure(struct fore200e* fore200e)
537 {
538 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
539 u8 master_ctrl, latency;
540
541 DPRINTK(2, "device %s being configured\n", fore200e->name);
542
543 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
544 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
545 return -EIO;
546 }
547
548 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
549
550 master_ctrl = master_ctrl
551 #if defined(__BIG_ENDIAN)
552 /* request the PCA board to convert the endianess of slave RAM accesses */
553 | PCA200E_CTRL_CONVERT_ENDIAN
554 #endif
555 | PCA200E_CTRL_LARGE_PCI_BURSTS;
556
557 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
558
559 /* raise latency from 32 (default) to 192, as this seems to prevent NIC
560 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition.
561 this may impact the performances of other PCI devices on the same bus, though */
562 latency = 192;
563 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
564
565 fore200e->state = FORE200E_STATE_CONFIGURE;
566 return 0;
567 }
568
569
570 static int __init
571 fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
572 {
573 struct host_cmdq* cmdq = &fore200e->host_cmdq;
574 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
575 struct prom_opcode opcode;
576 int ok;
577 u32 prom_dma;
578
579 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
580
581 opcode.opcode = OPCODE_GET_PROM;
582 opcode.pad = 0;
583
584 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), DMA_FROM_DEVICE);
585
586 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
587
588 *entry->status = STATUS_PENDING;
589
590 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode);
591
592 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
593
594 *entry->status = STATUS_FREE;
595
596 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE);
597
598 if (ok == 0) {
599 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
600 return -EIO;
601 }
602
603 #if defined(__BIG_ENDIAN)
604
605 #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
606
607 /* MAC address is stored as little-endian */
608 swap_here(&prom->mac_addr[0]);
609 swap_here(&prom->mac_addr[4]);
610 #endif
611
612 return 0;
613 }
614
615
616 static int
617 fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
618 {
619 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
620
621 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
622 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
623 }
624
625 #endif /* CONFIG_PCI */
626
627
628 #ifdef CONFIG_SBUS
629
630 static u32 fore200e_sba_read(volatile u32 __iomem *addr)
631 {
632 return sbus_readl(addr);
633 }
634
635 static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr)
636 {
637 sbus_writel(val, addr);
638 }
639
640 static u32 fore200e_sba_dma_map(struct fore200e *fore200e, void* virt_addr, int size, int direction)
641 {
642 struct platform_device *op = fore200e->bus_dev;
643 u32 dma_addr;
644
645 dma_addr = dma_map_single(&op->dev, virt_addr, size, direction);
646
647 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
648 virt_addr, size, direction, dma_addr);
649
650 return dma_addr;
651 }
652
653 static void fore200e_sba_dma_unmap(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
654 {
655 struct platform_device *op = fore200e->bus_dev;
656
657 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
658 dma_addr, size, direction);
659
660 dma_unmap_single(&op->dev, dma_addr, size, direction);
661 }
662
663 static void fore200e_sba_dma_sync_for_cpu(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
664 {
665 struct platform_device *op = fore200e->bus_dev;
666
667 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
668
669 dma_sync_single_for_cpu(&op->dev, dma_addr, size, direction);
670 }
671
672 static void fore200e_sba_dma_sync_for_device(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
673 {
674 struct platform_device *op = fore200e->bus_dev;
675
676 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
677
678 dma_sync_single_for_device(&op->dev, dma_addr, size, direction);
679 }
680
681 /* Allocate a DVMA consistent chunk of memory intended to act as a communication mechanism
682 * (to hold descriptors, status, queues, etc.) shared by the driver and the adapter.
683 */
684 static int fore200e_sba_dma_chunk_alloc(struct fore200e *fore200e, struct chunk *chunk,
685 int size, int nbr, int alignment)
686 {
687 struct platform_device *op = fore200e->bus_dev;
688
689 chunk->alloc_size = chunk->align_size = size * nbr;
690
691 /* returned chunks are page-aligned */
692 chunk->alloc_addr = dma_alloc_coherent(&op->dev, chunk->alloc_size,
693 &chunk->dma_addr, GFP_ATOMIC);
694
695 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
696 return -ENOMEM;
697
698 chunk->align_addr = chunk->alloc_addr;
699
700 return 0;
701 }
702
703 /* free a DVMA consistent chunk of memory */
704 static void fore200e_sba_dma_chunk_free(struct fore200e *fore200e, struct chunk *chunk)
705 {
706 struct platform_device *op = fore200e->bus_dev;
707
708 dma_free_coherent(&op->dev, chunk->alloc_size,
709 chunk->alloc_addr, chunk->dma_addr);
710 }
711
712 static void fore200e_sba_irq_enable(struct fore200e *fore200e)
713 {
714 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
715 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
716 }
717
718 static int fore200e_sba_irq_check(struct fore200e *fore200e)
719 {
720 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
721 }
722
723 static void fore200e_sba_irq_ack(struct fore200e *fore200e)
724 {
725 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
726 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
727 }
728
729 static void fore200e_sba_reset(struct fore200e *fore200e)
730 {
731 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
732 fore200e_spin(10);
733 fore200e->bus->write(0, fore200e->regs.sba.hcr);
734 }
735
736 static int __init fore200e_sba_map(struct fore200e *fore200e)
737 {
738 struct platform_device *op = fore200e->bus_dev;
739 unsigned int bursts;
740
741 /* gain access to the SBA specific registers */
742 fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
743 fore200e->regs.sba.bsr = of_ioremap(&op->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
744 fore200e->regs.sba.isr = of_ioremap(&op->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
745 fore200e->virt_base = of_ioremap(&op->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
746
747 if (!fore200e->virt_base) {
748 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
749 return -EFAULT;
750 }
751
752 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
753
754 fore200e->bus->write(0x02, fore200e->regs.sba.isr);
755
756 /* get the supported DVMA burst sizes */
757 bursts = of_getintprop_default(op->dev.of_node->parent, "burst-sizes", 0x00);
758
759 if (sbus_can_dma_64bit())
760 sbus_set_sbus64(&op->dev, bursts);
761
762 fore200e->state = FORE200E_STATE_MAP;
763 return 0;
764 }
765
766 static void fore200e_sba_unmap(struct fore200e *fore200e)
767 {
768 struct platform_device *op = fore200e->bus_dev;
769
770 of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
771 of_iounmap(&op->resource[1], fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
772 of_iounmap(&op->resource[2], fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
773 of_iounmap(&op->resource[3], fore200e->virt_base, SBA200E_RAM_LENGTH);
774 }
775
776 static int __init fore200e_sba_configure(struct fore200e *fore200e)
777 {
778 fore200e->state = FORE200E_STATE_CONFIGURE;
779 return 0;
780 }
781
782 static int __init fore200e_sba_prom_read(struct fore200e *fore200e, struct prom_data *prom)
783 {
784 struct platform_device *op = fore200e->bus_dev;
785 const u8 *prop;
786 int len;
787
788 prop = of_get_property(op->dev.of_node, "madaddrlo2", &len);
789 if (!prop)
790 return -ENODEV;
791 memcpy(&prom->mac_addr[4], prop, 4);
792
793 prop = of_get_property(op->dev.of_node, "madaddrhi4", &len);
794 if (!prop)
795 return -ENODEV;
796 memcpy(&prom->mac_addr[2], prop, 4);
797
798 prom->serial_number = of_getintprop_default(op->dev.of_node,
799 "serialnumber", 0);
800 prom->hw_revision = of_getintprop_default(op->dev.of_node,
801 "promversion", 0);
802
803 return 0;
804 }
805
806 static int fore200e_sba_proc_read(struct fore200e *fore200e, char *page)
807 {
808 struct platform_device *op = fore200e->bus_dev;
809 const struct linux_prom_registers *regs;
810
811 regs = of_get_property(op->dev.of_node, "reg", NULL);
812
813 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n",
814 (regs ? regs->which_io : 0), op->dev.of_node->name);
815 }
816 #endif /* CONFIG_SBUS */
817
818
819 static void
820 fore200e_tx_irq(struct fore200e* fore200e)
821 {
822 struct host_txq* txq = &fore200e->host_txq;
823 struct host_txq_entry* entry;
824 struct atm_vcc* vcc;
825 struct fore200e_vc_map* vc_map;
826
827 if (fore200e->host_txq.txing == 0)
828 return;
829
830 for (;;) {
831
832 entry = &txq->host_entry[ txq->tail ];
833
834 if ((*entry->status & STATUS_COMPLETE) == 0) {
835 break;
836 }
837
838 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
839 entry, txq->tail, entry->vc_map, entry->skb);
840
841 /* free copy of misaligned data */
842 kfree(entry->data);
843
844 /* remove DMA mapping */
845 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
846 DMA_TO_DEVICE);
847
848 vc_map = entry->vc_map;
849
850 /* vcc closed since the time the entry was submitted for tx? */
851 if ((vc_map->vcc == NULL) ||
852 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
853
854 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
855 fore200e->atm_dev->number);
856
857 dev_kfree_skb_any(entry->skb);
858 }
859 else {
860 ASSERT(vc_map->vcc);
861
862 /* vcc closed then immediately re-opened? */
863 if (vc_map->incarn != entry->incarn) {
864
865 /* when a vcc is closed, some PDUs may be still pending in the tx queue.
866 if the same vcc is immediately re-opened, those pending PDUs must
867 not be popped after the completion of their emission, as they refer
868 to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc
869 would be decremented by the size of the (unrelated) skb, possibly
870 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc.
871 we thus bind the tx entry to the current incarnation of the vcc
872 when the entry is submitted for tx. When the tx later completes,
873 if the incarnation number of the tx entry does not match the one
874 of the vcc, then this implies that the vcc has been closed then re-opened.
875 we thus just drop the skb here. */
876
877 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
878 fore200e->atm_dev->number);
879
880 dev_kfree_skb_any(entry->skb);
881 }
882 else {
883 vcc = vc_map->vcc;
884 ASSERT(vcc);
885
886 /* notify tx completion */
887 if (vcc->pop) {
888 vcc->pop(vcc, entry->skb);
889 }
890 else {
891 dev_kfree_skb_any(entry->skb);
892 }
893 /* race fixed by the above incarnation mechanism, but... */
894 if (atomic_read(&sk_atm(vcc)->sk_wmem_alloc) < 0) {
895 atomic_set(&sk_atm(vcc)->sk_wmem_alloc, 0);
896 }
897 /* check error condition */
898 if (*entry->status & STATUS_ERROR)
899 atomic_inc(&vcc->stats->tx_err);
900 else
901 atomic_inc(&vcc->stats->tx);
902 }
903 }
904
905 *entry->status = STATUS_FREE;
906
907 fore200e->host_txq.txing--;
908
909 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
910 }
911 }
912
913
914 #ifdef FORE200E_BSQ_DEBUG
915 int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
916 {
917 struct buffer* buffer;
918 int count = 0;
919
920 buffer = bsq->freebuf;
921 while (buffer) {
922
923 if (buffer->supplied) {
924 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
925 where, scheme, magn, buffer->index);
926 }
927
928 if (buffer->magn != magn) {
929 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
930 where, scheme, magn, buffer->index, buffer->magn);
931 }
932
933 if (buffer->scheme != scheme) {
934 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
935 where, scheme, magn, buffer->index, buffer->scheme);
936 }
937
938 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
939 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
940 where, scheme, magn, buffer->index);
941 }
942
943 count++;
944 buffer = buffer->next;
945 }
946
947 if (count != bsq->freebuf_count) {
948 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
949 where, scheme, magn, count, bsq->freebuf_count);
950 }
951 return 0;
952 }
953 #endif
954
955
956 static void
957 fore200e_supply(struct fore200e* fore200e)
958 {
959 int scheme, magn, i;
960
961 struct host_bsq* bsq;
962 struct host_bsq_entry* entry;
963 struct buffer* buffer;
964
965 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
966 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
967
968 bsq = &fore200e->host_bsq[ scheme ][ magn ];
969
970 #ifdef FORE200E_BSQ_DEBUG
971 bsq_audit(1, bsq, scheme, magn);
972 #endif
973 while (bsq->freebuf_count >= RBD_BLK_SIZE) {
974
975 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
976 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
977
978 entry = &bsq->host_entry[ bsq->head ];
979
980 for (i = 0; i < RBD_BLK_SIZE; i++) {
981
982 /* take the first buffer in the free buffer list */
983 buffer = bsq->freebuf;
984 if (!buffer) {
985 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
986 scheme, magn, bsq->freebuf_count);
987 return;
988 }
989 bsq->freebuf = buffer->next;
990
991 #ifdef FORE200E_BSQ_DEBUG
992 if (buffer->supplied)
993 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
994 scheme, magn, buffer->index);
995 buffer->supplied = 1;
996 #endif
997 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
998 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
999 }
1000
1001 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1002
1003 /* decrease accordingly the number of free rx buffers */
1004 bsq->freebuf_count -= RBD_BLK_SIZE;
1005
1006 *entry->status = STATUS_PENDING;
1007 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1008 }
1009 }
1010 }
1011 }
1012
1013
1014 static int
1015 fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
1016 {
1017 struct sk_buff* skb;
1018 struct buffer* buffer;
1019 struct fore200e_vcc* fore200e_vcc;
1020 int i, pdu_len = 0;
1021 #ifdef FORE200E_52BYTE_AAL0_SDU
1022 u32 cell_header = 0;
1023 #endif
1024
1025 ASSERT(vcc);
1026
1027 fore200e_vcc = FORE200E_VCC(vcc);
1028 ASSERT(fore200e_vcc);
1029
1030 #ifdef FORE200E_52BYTE_AAL0_SDU
1031 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1032
1033 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1034 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1035 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1036 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1037 rpd->atm_header.clp;
1038 pdu_len = 4;
1039 }
1040 #endif
1041
1042 /* compute total PDU length */
1043 for (i = 0; i < rpd->nseg; i++)
1044 pdu_len += rpd->rsd[ i ].length;
1045
1046 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1047 if (skb == NULL) {
1048 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1049
1050 atomic_inc(&vcc->stats->rx_drop);
1051 return -ENOMEM;
1052 }
1053
1054 __net_timestamp(skb);
1055
1056 #ifdef FORE200E_52BYTE_AAL0_SDU
1057 if (cell_header) {
1058 *((u32*)skb_put(skb, 4)) = cell_header;
1059 }
1060 #endif
1061
1062 /* reassemble segments */
1063 for (i = 0; i < rpd->nseg; i++) {
1064
1065 /* rebuild rx buffer address from rsd handle */
1066 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1067
1068 /* Make device DMA transfer visible to CPU. */
1069 fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1070
1071 memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
1072
1073 /* Now let the device get at it again. */
1074 fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1075 }
1076
1077 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1078
1079 if (pdu_len < fore200e_vcc->rx_min_pdu)
1080 fore200e_vcc->rx_min_pdu = pdu_len;
1081 if (pdu_len > fore200e_vcc->rx_max_pdu)
1082 fore200e_vcc->rx_max_pdu = pdu_len;
1083 fore200e_vcc->rx_pdu++;
1084
1085 /* push PDU */
1086 if (atm_charge(vcc, skb->truesize) == 0) {
1087
1088 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1089 vcc->itf, vcc->vpi, vcc->vci);
1090
1091 dev_kfree_skb_any(skb);
1092
1093 atomic_inc(&vcc->stats->rx_drop);
1094 return -ENOMEM;
1095 }
1096
1097 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1098
1099 vcc->push(vcc, skb);
1100 atomic_inc(&vcc->stats->rx);
1101
1102 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1103
1104 return 0;
1105 }
1106
1107
1108 static void
1109 fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1110 {
1111 struct host_bsq* bsq;
1112 struct buffer* buffer;
1113 int i;
1114
1115 for (i = 0; i < rpd->nseg; i++) {
1116
1117 /* rebuild rx buffer address from rsd handle */
1118 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1119
1120 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
1121
1122 #ifdef FORE200E_BSQ_DEBUG
1123 bsq_audit(2, bsq, buffer->scheme, buffer->magn);
1124
1125 if (buffer->supplied == 0)
1126 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
1127 buffer->scheme, buffer->magn, buffer->index);
1128 buffer->supplied = 0;
1129 #endif
1130
1131 /* re-insert the buffer into the free buffer list */
1132 buffer->next = bsq->freebuf;
1133 bsq->freebuf = buffer;
1134
1135 /* then increment the number of free rx buffers */
1136 bsq->freebuf_count++;
1137 }
1138 }
1139
1140
1141 static void
1142 fore200e_rx_irq(struct fore200e* fore200e)
1143 {
1144 struct host_rxq* rxq = &fore200e->host_rxq;
1145 struct host_rxq_entry* entry;
1146 struct atm_vcc* vcc;
1147 struct fore200e_vc_map* vc_map;
1148
1149 for (;;) {
1150
1151 entry = &rxq->host_entry[ rxq->head ];
1152
1153 /* no more received PDUs */
1154 if ((*entry->status & STATUS_COMPLETE) == 0)
1155 break;
1156
1157 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1158
1159 if ((vc_map->vcc == NULL) ||
1160 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1161
1162 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
1163 fore200e->atm_dev->number,
1164 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1165 }
1166 else {
1167 vcc = vc_map->vcc;
1168 ASSERT(vcc);
1169
1170 if ((*entry->status & STATUS_ERROR) == 0) {
1171
1172 fore200e_push_rpd(fore200e, vcc, entry->rpd);
1173 }
1174 else {
1175 DPRINTK(2, "damaged PDU on %d.%d.%d\n",
1176 fore200e->atm_dev->number,
1177 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1178 atomic_inc(&vcc->stats->rx_err);
1179 }
1180 }
1181
1182 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1183
1184 fore200e_collect_rpd(fore200e, entry->rpd);
1185
1186 /* rewrite the rpd address to ack the received PDU */
1187 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1188 *entry->status = STATUS_FREE;
1189
1190 fore200e_supply(fore200e);
1191 }
1192 }
1193
1194
1195 #ifndef FORE200E_USE_TASKLET
1196 static void
1197 fore200e_irq(struct fore200e* fore200e)
1198 {
1199 unsigned long flags;
1200
1201 spin_lock_irqsave(&fore200e->q_lock, flags);
1202 fore200e_rx_irq(fore200e);
1203 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1204
1205 spin_lock_irqsave(&fore200e->q_lock, flags);
1206 fore200e_tx_irq(fore200e);
1207 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1208 }
1209 #endif
1210
1211
1212 static irqreturn_t
1213 fore200e_interrupt(int irq, void* dev)
1214 {
1215 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1216
1217 if (fore200e->bus->irq_check(fore200e) == 0) {
1218
1219 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
1220 return IRQ_NONE;
1221 }
1222 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
1223
1224 #ifdef FORE200E_USE_TASKLET
1225 tasklet_schedule(&fore200e->tx_tasklet);
1226 tasklet_schedule(&fore200e->rx_tasklet);
1227 #else
1228 fore200e_irq(fore200e);
1229 #endif
1230
1231 fore200e->bus->irq_ack(fore200e);
1232 return IRQ_HANDLED;
1233 }
1234
1235
1236 #ifdef FORE200E_USE_TASKLET
1237 static void
1238 fore200e_tx_tasklet(unsigned long data)
1239 {
1240 struct fore200e* fore200e = (struct fore200e*) data;
1241 unsigned long flags;
1242
1243 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1244
1245 spin_lock_irqsave(&fore200e->q_lock, flags);
1246 fore200e_tx_irq(fore200e);
1247 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1248 }
1249
1250
1251 static void
1252 fore200e_rx_tasklet(unsigned long data)
1253 {
1254 struct fore200e* fore200e = (struct fore200e*) data;
1255 unsigned long flags;
1256
1257 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1258
1259 spin_lock_irqsave(&fore200e->q_lock, flags);
1260 fore200e_rx_irq((struct fore200e*) data);
1261 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1262 }
1263 #endif
1264
1265
1266 static int
1267 fore200e_select_scheme(struct atm_vcc* vcc)
1268 {
1269 /* fairly balance the VCs over (identical) buffer schemes */
1270 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1271
1272 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
1273 vcc->itf, vcc->vpi, vcc->vci, scheme);
1274
1275 return scheme;
1276 }
1277
1278
1279 static int
1280 fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1281 {
1282 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1283 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1284 struct activate_opcode activ_opcode;
1285 struct deactivate_opcode deactiv_opcode;
1286 struct vpvc vpvc;
1287 int ok;
1288 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1289
1290 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1291
1292 if (activate) {
1293 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1294
1295 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1296 activ_opcode.aal = aal;
1297 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1298 activ_opcode.pad = 0;
1299 }
1300 else {
1301 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1302 deactiv_opcode.pad = 0;
1303 }
1304
1305 vpvc.vci = vcc->vci;
1306 vpvc.vpi = vcc->vpi;
1307
1308 *entry->status = STATUS_PENDING;
1309
1310 if (activate) {
1311
1312 #ifdef FORE200E_52BYTE_AAL0_SDU
1313 mtu = 48;
1314 #endif
1315 /* the MTU is not used by the cp, except in the case of AAL0 */
1316 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1317 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc);
1318 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode);
1319 }
1320 else {
1321 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc);
1322 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode);
1323 }
1324
1325 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1326
1327 *entry->status = STATUS_FREE;
1328
1329 if (ok == 0) {
1330 printk(FORE200E "unable to %s VC %d.%d.%d\n",
1331 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
1332 return -EIO;
1333 }
1334
1335 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
1336 activate ? "open" : "clos");
1337
1338 return 0;
1339 }
1340
1341
1342 #define FORE200E_MAX_BACK2BACK_CELLS 255
1343
1344 static void
1345 fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1346 {
1347 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1348
1349 /* compute the data cells to idle cells ratio from the tx PCR */
1350 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1351 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1352 }
1353 else {
1354 /* disable rate control */
1355 rate->data_cells = rate->idle_cells = 0;
1356 }
1357 }
1358
1359
1360 static int
1361 fore200e_open(struct atm_vcc *vcc)
1362 {
1363 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1364 struct fore200e_vcc* fore200e_vcc;
1365 struct fore200e_vc_map* vc_map;
1366 unsigned long flags;
1367 int vci = vcc->vci;
1368 short vpi = vcc->vpi;
1369
1370 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
1371 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
1372
1373 spin_lock_irqsave(&fore200e->q_lock, flags);
1374
1375 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
1376 if (vc_map->vcc) {
1377
1378 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1379
1380 printk(FORE200E "VC %d.%d.%d already in use\n",
1381 fore200e->atm_dev->number, vpi, vci);
1382
1383 return -EINVAL;
1384 }
1385
1386 vc_map->vcc = vcc;
1387
1388 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1389
1390 fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
1391 if (fore200e_vcc == NULL) {
1392 vc_map->vcc = NULL;
1393 return -ENOMEM;
1394 }
1395
1396 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1397 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1398 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1399 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1400 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1401 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1402 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1403
1404 /* pseudo-CBR bandwidth requested? */
1405 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1406
1407 mutex_lock(&fore200e->rate_mtx);
1408 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1409 mutex_unlock(&fore200e->rate_mtx);
1410
1411 kfree(fore200e_vcc);
1412 vc_map->vcc = NULL;
1413 return -EAGAIN;
1414 }
1415
1416 /* reserve bandwidth */
1417 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1418 mutex_unlock(&fore200e->rate_mtx);
1419 }
1420
1421 vcc->itf = vcc->dev->number;
1422
1423 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1424 set_bit(ATM_VF_ADDR, &vcc->flags);
1425
1426 vcc->dev_data = fore200e_vcc;
1427
1428 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1429
1430 vc_map->vcc = NULL;
1431
1432 clear_bit(ATM_VF_ADDR, &vcc->flags);
1433 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1434
1435 vcc->dev_data = NULL;
1436
1437 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1438
1439 kfree(fore200e_vcc);
1440 return -EINVAL;
1441 }
1442
1443 /* compute rate control parameters */
1444 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1445
1446 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1447 set_bit(ATM_VF_HASQOS, &vcc->flags);
1448
1449 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1450 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1451 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1452 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1453 }
1454
1455 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
1456 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1457 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
1458
1459 /* new incarnation of the vcc */
1460 vc_map->incarn = ++fore200e->incarn_count;
1461
1462 /* VC unusable before this flag is set */
1463 set_bit(ATM_VF_READY, &vcc->flags);
1464
1465 return 0;
1466 }
1467
1468
1469 static void
1470 fore200e_close(struct atm_vcc* vcc)
1471 {
1472 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1473 struct fore200e_vcc* fore200e_vcc;
1474 struct fore200e_vc_map* vc_map;
1475 unsigned long flags;
1476
1477 ASSERT(vcc);
1478 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
1479 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
1480
1481 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1482
1483 clear_bit(ATM_VF_READY, &vcc->flags);
1484
1485 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1486
1487 spin_lock_irqsave(&fore200e->q_lock, flags);
1488
1489 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1490
1491 /* the vc is no longer considered as "in use" by fore200e_open() */
1492 vc_map->vcc = NULL;
1493
1494 vcc->itf = vcc->vci = vcc->vpi = 0;
1495
1496 fore200e_vcc = FORE200E_VCC(vcc);
1497 vcc->dev_data = NULL;
1498
1499 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1500
1501 /* release reserved bandwidth, if any */
1502 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1503
1504 mutex_lock(&fore200e->rate_mtx);
1505 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1506 mutex_unlock(&fore200e->rate_mtx);
1507
1508 clear_bit(ATM_VF_HASQOS, &vcc->flags);
1509 }
1510
1511 clear_bit(ATM_VF_ADDR, &vcc->flags);
1512 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1513
1514 ASSERT(fore200e_vcc);
1515 kfree(fore200e_vcc);
1516 }
1517
1518
1519 static int
1520 fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1521 {
1522 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1523 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1524 struct fore200e_vc_map* vc_map;
1525 struct host_txq* txq = &fore200e->host_txq;
1526 struct host_txq_entry* entry;
1527 struct tpd* tpd;
1528 struct tpd_haddr tpd_haddr;
1529 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1530 int tx_copy = 0;
1531 int tx_len = skb->len;
1532 u32* cell_header = NULL;
1533 unsigned char* skb_data;
1534 int skb_len;
1535 unsigned char* data;
1536 unsigned long flags;
1537
1538 ASSERT(vcc);
1539 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1540 ASSERT(fore200e);
1541 ASSERT(fore200e_vcc);
1542
1543 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1544 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
1545 dev_kfree_skb_any(skb);
1546 return -EINVAL;
1547 }
1548
1549 #ifdef FORE200E_52BYTE_AAL0_SDU
1550 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1551 cell_header = (u32*) skb->data;
1552 skb_data = skb->data + 4; /* skip 4-byte cell header */
1553 skb_len = tx_len = skb->len - 4;
1554
1555 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
1556 }
1557 else
1558 #endif
1559 {
1560 skb_data = skb->data;
1561 skb_len = skb->len;
1562 }
1563
1564 if (((unsigned long)skb_data) & 0x3) {
1565
1566 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1567 tx_copy = 1;
1568 tx_len = skb_len;
1569 }
1570
1571 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1572
1573 /* this simply NUKES the PCA board */
1574 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1575 tx_copy = 1;
1576 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1577 }
1578
1579 if (tx_copy) {
1580 data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1581 if (data == NULL) {
1582 if (vcc->pop) {
1583 vcc->pop(vcc, skb);
1584 }
1585 else {
1586 dev_kfree_skb_any(skb);
1587 }
1588 return -ENOMEM;
1589 }
1590
1591 memcpy(data, skb_data, skb_len);
1592 if (skb_len < tx_len)
1593 memset(data + skb_len, 0x00, tx_len - skb_len);
1594 }
1595 else {
1596 data = skb_data;
1597 }
1598
1599 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1600 ASSERT(vc_map->vcc == vcc);
1601
1602 retry_here:
1603
1604 spin_lock_irqsave(&fore200e->q_lock, flags);
1605
1606 entry = &txq->host_entry[ txq->head ];
1607
1608 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
1609
1610 /* try to free completed tx queue entries */
1611 fore200e_tx_irq(fore200e);
1612
1613 if (*entry->status != STATUS_FREE) {
1614
1615 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1616
1617 /* retry once again? */
1618 if (--retry > 0) {
1619 udelay(50);
1620 goto retry_here;
1621 }
1622
1623 atomic_inc(&vcc->stats->tx_err);
1624
1625 fore200e->tx_sat++;
1626 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1627 fore200e->name, fore200e->cp_queues->heartbeat);
1628 if (vcc->pop) {
1629 vcc->pop(vcc, skb);
1630 }
1631 else {
1632 dev_kfree_skb_any(skb);
1633 }
1634
1635 if (tx_copy)
1636 kfree(data);
1637
1638 return -ENOBUFS;
1639 }
1640 }
1641
1642 entry->incarn = vc_map->incarn;
1643 entry->vc_map = vc_map;
1644 entry->skb = skb;
1645 entry->data = tx_copy ? data : NULL;
1646
1647 tpd = entry->tpd;
1648 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, DMA_TO_DEVICE);
1649 tpd->tsd[ 0 ].length = tx_len;
1650
1651 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1652 txq->txing++;
1653
1654 /* The dma_map call above implies a dma_sync so the device can use it,
1655 * thus no explicit dma_sync call is necessary here.
1656 */
1657
1658 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1659 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1660 tpd->tsd[0].length, skb_len);
1661
1662 if (skb_len < fore200e_vcc->tx_min_pdu)
1663 fore200e_vcc->tx_min_pdu = skb_len;
1664 if (skb_len > fore200e_vcc->tx_max_pdu)
1665 fore200e_vcc->tx_max_pdu = skb_len;
1666 fore200e_vcc->tx_pdu++;
1667
1668 /* set tx rate control information */
1669 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1670 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1671
1672 if (cell_header) {
1673 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1674 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1675 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1676 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1677 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1678 }
1679 else {
1680 /* set the ATM header, common to all cells conveying the PDU */
1681 tpd->atm_header.clp = 0;
1682 tpd->atm_header.plt = 0;
1683 tpd->atm_header.vci = vcc->vci;
1684 tpd->atm_header.vpi = vcc->vpi;
1685 tpd->atm_header.gfc = 0;
1686 }
1687
1688 tpd->spec.length = tx_len;
1689 tpd->spec.nseg = 1;
1690 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1691 tpd->spec.intr = 1;
1692
1693 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */
1694 tpd_haddr.pad = 0;
1695 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */
1696
1697 *entry->status = STATUS_PENDING;
1698 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr);
1699
1700 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1701
1702 return 0;
1703 }
1704
1705
1706 static int
1707 fore200e_getstats(struct fore200e* fore200e)
1708 {
1709 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1710 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1711 struct stats_opcode opcode;
1712 int ok;
1713 u32 stats_dma_addr;
1714
1715 if (fore200e->stats == NULL) {
1716 fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1717 if (fore200e->stats == NULL)
1718 return -ENOMEM;
1719 }
1720
1721 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats,
1722 sizeof(struct stats), DMA_FROM_DEVICE);
1723
1724 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1725
1726 opcode.opcode = OPCODE_GET_STATS;
1727 opcode.pad = 0;
1728
1729 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1730
1731 *entry->status = STATUS_PENDING;
1732
1733 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode);
1734
1735 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1736
1737 *entry->status = STATUS_FREE;
1738
1739 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE);
1740
1741 if (ok == 0) {
1742 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1743 return -EIO;
1744 }
1745
1746 return 0;
1747 }
1748
1749
1750 static int
1751 fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen)
1752 {
1753 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1754
1755 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1756 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1757
1758 return -EINVAL;
1759 }
1760
1761
1762 static int
1763 fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, unsigned int optlen)
1764 {
1765 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1766
1767 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1768 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1769
1770 return -EINVAL;
1771 }
1772
1773
1774
1775
1776 static int
1777 fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1778 {
1779 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1780 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1781 struct oc3_opcode opcode;
1782 int ok;
1783
1784 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
1785
1786 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1787
1788 opcode.opcode = OPCODE_SET_OC3;
1789 opcode.reg = reg;
1790 opcode.value = value;
1791 opcode.mask = mask;
1792
1793 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1794
1795 *entry->status = STATUS_PENDING;
1796
1797 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode);
1798
1799 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1800
1801 *entry->status = STATUS_FREE;
1802
1803 if (ok == 0) {
1804 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1805 return -EIO;
1806 }
1807
1808 return 0;
1809 }
1810
1811
1812 static int
1813 fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1814 {
1815 u32 mct_value, mct_mask;
1816 int error;
1817
1818 if (!capable(CAP_NET_ADMIN))
1819 return -EPERM;
1820
1821 switch (loop_mode) {
1822
1823 case ATM_LM_NONE:
1824 mct_value = 0;
1825 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1826 break;
1827
1828 case ATM_LM_LOC_PHY:
1829 mct_value = mct_mask = SUNI_MCT_DLE;
1830 break;
1831
1832 case ATM_LM_RMT_PHY:
1833 mct_value = mct_mask = SUNI_MCT_LLE;
1834 break;
1835
1836 default:
1837 return -EINVAL;
1838 }
1839
1840 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1841 if (error == 0)
1842 fore200e->loop_mode = loop_mode;
1843
1844 return error;
1845 }
1846
1847
1848 static int
1849 fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg)
1850 {
1851 struct sonet_stats tmp;
1852
1853 if (fore200e_getstats(fore200e) < 0)
1854 return -EIO;
1855
1856 tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors);
1857 tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors);
1858 tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors);
1859 tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors);
1860 tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors);
1861 tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors);
1862 tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors);
1863 tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) +
1864 be32_to_cpu(fore200e->stats->aal34.cells_transmitted) +
1865 be32_to_cpu(fore200e->stats->aal5.cells_transmitted);
1866 tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) +
1867 be32_to_cpu(fore200e->stats->aal34.cells_received) +
1868 be32_to_cpu(fore200e->stats->aal5.cells_received);
1869
1870 if (arg)
1871 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1872
1873 return 0;
1874 }
1875
1876
1877 static int
1878 fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg)
1879 {
1880 struct fore200e* fore200e = FORE200E_DEV(dev);
1881
1882 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1883
1884 switch (cmd) {
1885
1886 case SONET_GETSTAT:
1887 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg);
1888
1889 case SONET_GETDIAG:
1890 return put_user(0, (int __user *)arg) ? -EFAULT : 0;
1891
1892 case ATM_SETLOOP:
1893 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1894
1895 case ATM_GETLOOP:
1896 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0;
1897
1898 case ATM_QUERYLOOP:
1899 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0;
1900 }
1901
1902 return -ENOSYS; /* not implemented */
1903 }
1904
1905
1906 static int
1907 fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1908 {
1909 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1910 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1911
1912 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1913 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
1914 return -EINVAL;
1915 }
1916
1917 DPRINTK(2, "change_qos %d.%d.%d, "
1918 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1919 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
1920 "available_cell_rate = %u",
1921 vcc->itf, vcc->vpi, vcc->vci,
1922 fore200e_traffic_class[ qos->txtp.traffic_class ],
1923 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
1924 fore200e_traffic_class[ qos->rxtp.traffic_class ],
1925 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
1926 flags, fore200e->available_cell_rate);
1927
1928 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
1929
1930 mutex_lock(&fore200e->rate_mtx);
1931 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
1932 mutex_unlock(&fore200e->rate_mtx);
1933 return -EAGAIN;
1934 }
1935
1936 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1937 fore200e->available_cell_rate -= qos->txtp.max_pcr;
1938
1939 mutex_unlock(&fore200e->rate_mtx);
1940
1941 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
1942
1943 /* update rate control parameters */
1944 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
1945
1946 set_bit(ATM_VF_HASQOS, &vcc->flags);
1947
1948 return 0;
1949 }
1950
1951 return -EINVAL;
1952 }
1953
1954
1955 static int __devinit
1956 fore200e_irq_request(struct fore200e* fore200e)
1957 {
1958 if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) {
1959
1960 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
1961 fore200e_irq_itoa(fore200e->irq), fore200e->name);
1962 return -EBUSY;
1963 }
1964
1965 printk(FORE200E "IRQ %s reserved for device %s\n",
1966 fore200e_irq_itoa(fore200e->irq), fore200e->name);
1967
1968 #ifdef FORE200E_USE_TASKLET
1969 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
1970 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
1971 #endif
1972
1973 fore200e->state = FORE200E_STATE_IRQ;
1974 return 0;
1975 }
1976
1977
1978 static int __devinit
1979 fore200e_get_esi(struct fore200e* fore200e)
1980 {
1981 struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
1982 int ok, i;
1983
1984 if (!prom)
1985 return -ENOMEM;
1986
1987 ok = fore200e->bus->prom_read(fore200e, prom);
1988 if (ok < 0) {
1989 kfree(prom);
1990 return -EBUSY;
1991 }
1992
1993 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %pM\n",
1994 fore200e->name,
1995 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
1996 prom->serial_number & 0xFFFF, &prom->mac_addr[2]);
1997
1998 for (i = 0; i < ESI_LEN; i++) {
1999 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2000 }
2001
2002 kfree(prom);
2003
2004 return 0;
2005 }
2006
2007
2008 static int __devinit
2009 fore200e_alloc_rx_buf(struct fore200e* fore200e)
2010 {
2011 int scheme, magn, nbr, size, i;
2012
2013 struct host_bsq* bsq;
2014 struct buffer* buffer;
2015
2016 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2017 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2018
2019 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2020
2021 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2022 size = fore200e_rx_buf_size[ scheme ][ magn ];
2023
2024 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2025
2026 /* allocate the array of receive buffers */
2027 buffer = bsq->buffer = kzalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
2028
2029 if (buffer == NULL)
2030 return -ENOMEM;
2031
2032 bsq->freebuf = NULL;
2033
2034 for (i = 0; i < nbr; i++) {
2035
2036 buffer[ i ].scheme = scheme;
2037 buffer[ i ].magn = magn;
2038 #ifdef FORE200E_BSQ_DEBUG
2039 buffer[ i ].index = i;
2040 buffer[ i ].supplied = 0;
2041 #endif
2042
2043 /* allocate the receive buffer body */
2044 if (fore200e_chunk_alloc(fore200e,
2045 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2046 DMA_FROM_DEVICE) < 0) {
2047
2048 while (i > 0)
2049 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2050 kfree(buffer);
2051
2052 return -ENOMEM;
2053 }
2054
2055 /* insert the buffer into the free buffer list */
2056 buffer[ i ].next = bsq->freebuf;
2057 bsq->freebuf = &buffer[ i ];
2058 }
2059 /* all the buffers are free, initially */
2060 bsq->freebuf_count = nbr;
2061
2062 #ifdef FORE200E_BSQ_DEBUG
2063 bsq_audit(3, bsq, scheme, magn);
2064 #endif
2065 }
2066 }
2067
2068 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2069 return 0;
2070 }
2071
2072
2073 static int __devinit
2074 fore200e_init_bs_queue(struct fore200e* fore200e)
2075 {
2076 int scheme, magn, i;
2077
2078 struct host_bsq* bsq;
2079 struct cp_bsq_entry __iomem * cp_entry;
2080
2081 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2082 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2083
2084 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2085
2086 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2087
2088 /* allocate and align the array of status words */
2089 if (fore200e->bus->dma_chunk_alloc(fore200e,
2090 &bsq->status,
2091 sizeof(enum status),
2092 QUEUE_SIZE_BS,
2093 fore200e->bus->status_alignment) < 0) {
2094 return -ENOMEM;
2095 }
2096
2097 /* allocate and align the array of receive buffer descriptors */
2098 if (fore200e->bus->dma_chunk_alloc(fore200e,
2099 &bsq->rbd_block,
2100 sizeof(struct rbd_block),
2101 QUEUE_SIZE_BS,
2102 fore200e->bus->descr_alignment) < 0) {
2103
2104 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2105 return -ENOMEM;
2106 }
2107
2108 /* get the base address of the cp resident buffer supply queue entries */
2109 cp_entry = fore200e->virt_base +
2110 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]);
2111
2112 /* fill the host resident and cp resident buffer supply queue entries */
2113 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2114
2115 bsq->host_entry[ i ].status =
2116 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2117 bsq->host_entry[ i ].rbd_block =
2118 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2119 bsq->host_entry[ i ].rbd_block_dma =
2120 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2121 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2122
2123 *bsq->host_entry[ i ].status = STATUS_FREE;
2124
2125 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2126 &cp_entry[ i ].status_haddr);
2127 }
2128 }
2129 }
2130
2131 fore200e->state = FORE200E_STATE_INIT_BSQ;
2132 return 0;
2133 }
2134
2135
2136 static int __devinit
2137 fore200e_init_rx_queue(struct fore200e* fore200e)
2138 {
2139 struct host_rxq* rxq = &fore200e->host_rxq;
2140 struct cp_rxq_entry __iomem * cp_entry;
2141 int i;
2142
2143 DPRINTK(2, "receive queue is being initialized\n");
2144
2145 /* allocate and align the array of status words */
2146 if (fore200e->bus->dma_chunk_alloc(fore200e,
2147 &rxq->status,
2148 sizeof(enum status),
2149 QUEUE_SIZE_RX,
2150 fore200e->bus->status_alignment) < 0) {
2151 return -ENOMEM;
2152 }
2153
2154 /* allocate and align the array of receive PDU descriptors */
2155 if (fore200e->bus->dma_chunk_alloc(fore200e,
2156 &rxq->rpd,
2157 sizeof(struct rpd),
2158 QUEUE_SIZE_RX,
2159 fore200e->bus->descr_alignment) < 0) {
2160
2161 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2162 return -ENOMEM;
2163 }
2164
2165 /* get the base address of the cp resident rx queue entries */
2166 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq);
2167
2168 /* fill the host resident and cp resident rx entries */
2169 for (i=0; i < QUEUE_SIZE_RX; i++) {
2170
2171 rxq->host_entry[ i ].status =
2172 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2173 rxq->host_entry[ i ].rpd =
2174 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2175 rxq->host_entry[ i ].rpd_dma =
2176 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2177 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2178
2179 *rxq->host_entry[ i ].status = STATUS_FREE;
2180
2181 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2182 &cp_entry[ i ].status_haddr);
2183
2184 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2185 &cp_entry[ i ].rpd_haddr);
2186 }
2187
2188 /* set the head entry of the queue */
2189 rxq->head = 0;
2190
2191 fore200e->state = FORE200E_STATE_INIT_RXQ;
2192 return 0;
2193 }
2194
2195
2196 static int __devinit
2197 fore200e_init_tx_queue(struct fore200e* fore200e)
2198 {
2199 struct host_txq* txq = &fore200e->host_txq;
2200 struct cp_txq_entry __iomem * cp_entry;
2201 int i;
2202
2203 DPRINTK(2, "transmit queue is being initialized\n");
2204
2205 /* allocate and align the array of status words */
2206 if (fore200e->bus->dma_chunk_alloc(fore200e,
2207 &txq->status,
2208 sizeof(enum status),
2209 QUEUE_SIZE_TX,
2210 fore200e->bus->status_alignment) < 0) {
2211 return -ENOMEM;
2212 }
2213
2214 /* allocate and align the array of transmit PDU descriptors */
2215 if (fore200e->bus->dma_chunk_alloc(fore200e,
2216 &txq->tpd,
2217 sizeof(struct tpd),
2218 QUEUE_SIZE_TX,
2219 fore200e->bus->descr_alignment) < 0) {
2220
2221 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2222 return -ENOMEM;
2223 }
2224
2225 /* get the base address of the cp resident tx queue entries */
2226 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq);
2227
2228 /* fill the host resident and cp resident tx entries */
2229 for (i=0; i < QUEUE_SIZE_TX; i++) {
2230
2231 txq->host_entry[ i ].status =
2232 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2233 txq->host_entry[ i ].tpd =
2234 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2235 txq->host_entry[ i ].tpd_dma =
2236 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2237 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2238
2239 *txq->host_entry[ i ].status = STATUS_FREE;
2240
2241 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2242 &cp_entry[ i ].status_haddr);
2243
2244 /* although there is a one-to-one mapping of tx queue entries and tpds,
2245 we do not write here the DMA (physical) base address of each tpd into
2246 the related cp resident entry, because the cp relies on this write
2247 operation to detect that a new pdu has been submitted for tx */
2248 }
2249
2250 /* set the head and tail entries of the queue */
2251 txq->head = 0;
2252 txq->tail = 0;
2253
2254 fore200e->state = FORE200E_STATE_INIT_TXQ;
2255 return 0;
2256 }
2257
2258
2259 static int __devinit
2260 fore200e_init_cmd_queue(struct fore200e* fore200e)
2261 {
2262 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2263 struct cp_cmdq_entry __iomem * cp_entry;
2264 int i;
2265
2266 DPRINTK(2, "command queue is being initialized\n");
2267
2268 /* allocate and align the array of status words */
2269 if (fore200e->bus->dma_chunk_alloc(fore200e,
2270 &cmdq->status,
2271 sizeof(enum status),
2272 QUEUE_SIZE_CMD,
2273 fore200e->bus->status_alignment) < 0) {
2274 return -ENOMEM;
2275 }
2276
2277 /* get the base address of the cp resident cmd queue entries */
2278 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq);
2279
2280 /* fill the host resident and cp resident cmd entries */
2281 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2282
2283 cmdq->host_entry[ i ].status =
2284 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2285 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2286
2287 *cmdq->host_entry[ i ].status = STATUS_FREE;
2288
2289 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2290 &cp_entry[ i ].status_haddr);
2291 }
2292
2293 /* set the head entry of the queue */
2294 cmdq->head = 0;
2295
2296 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2297 return 0;
2298 }
2299
2300
2301 static void __devinit
2302 fore200e_param_bs_queue(struct fore200e* fore200e,
2303 enum buffer_scheme scheme, enum buffer_magn magn,
2304 int queue_length, int pool_size, int supply_blksize)
2305 {
2306 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2307
2308 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2309 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2310 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2311 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2312 }
2313
2314
2315 static int __devinit
2316 fore200e_initialize(struct fore200e* fore200e)
2317 {
2318 struct cp_queues __iomem * cpq;
2319 int ok, scheme, magn;
2320
2321 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2322
2323 mutex_init(&fore200e->rate_mtx);
2324 spin_lock_init(&fore200e->q_lock);
2325
2326 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET;
2327
2328 /* enable cp to host interrupts */
2329 fore200e->bus->write(1, &cpq->imask);
2330
2331 if (fore200e->bus->irq_enable)
2332 fore200e->bus->irq_enable(fore200e);
2333
2334 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2335
2336 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2337 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2338 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2339
2340 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2341 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2342
2343 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2344 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2345 fore200e_param_bs_queue(fore200e, scheme, magn,
2346 QUEUE_SIZE_BS,
2347 fore200e_rx_buf_nbr[ scheme ][ magn ],
2348 RBD_BLK_SIZE);
2349
2350 /* issue the initialize command */
2351 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2352 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2353
2354 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2355 if (ok == 0) {
2356 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2357 return -ENODEV;
2358 }
2359
2360 printk(FORE200E "device %s initialized\n", fore200e->name);
2361
2362 fore200e->state = FORE200E_STATE_INITIALIZE;
2363 return 0;
2364 }
2365
2366
2367 static void __devinit
2368 fore200e_monitor_putc(struct fore200e* fore200e, char c)
2369 {
2370 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2371
2372 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2373 }
2374
2375
2376 static int __devinit
2377 fore200e_monitor_getc(struct fore200e* fore200e)
2378 {
2379 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2380 unsigned long timeout = jiffies + msecs_to_jiffies(50);
2381 int c;
2382
2383 while (time_before(jiffies, timeout)) {
2384
2385 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2386
2387 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2388
2389 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2390 return c & 0xFF;
2391 }
2392 }
2393
2394 return -1;
2395 }
2396
2397
2398 static void __devinit
2399 fore200e_monitor_puts(struct fore200e* fore200e, char* str)
2400 {
2401 while (*str) {
2402
2403 /* the i960 monitor doesn't accept any new character if it has something to say */
2404 while (fore200e_monitor_getc(fore200e) >= 0);
2405
2406 fore200e_monitor_putc(fore200e, *str++);
2407 }
2408
2409 while (fore200e_monitor_getc(fore200e) >= 0);
2410 }
2411
2412 #ifdef __LITTLE_ENDIAN
2413 #define FW_EXT ".bin"
2414 #else
2415 #define FW_EXT "_ecd.bin2"
2416 #endif
2417
2418 static int __devinit
2419 fore200e_load_and_start_fw(struct fore200e* fore200e)
2420 {
2421 const struct firmware *firmware;
2422 struct device *device;
2423 struct fw_header *fw_header;
2424 const __le32 *fw_data;
2425 u32 fw_size;
2426 u32 __iomem *load_addr;
2427 char buf[48];
2428 int err = -ENODEV;
2429
2430 if (strcmp(fore200e->bus->model_name, "PCA-200E") == 0)
2431 device = &((struct pci_dev *) fore200e->bus_dev)->dev;
2432 #ifdef CONFIG_SBUS
2433 else if (strcmp(fore200e->bus->model_name, "SBA-200E") == 0)
2434 device = &((struct platform_device *) fore200e->bus_dev)->dev;
2435 #endif
2436 else
2437 return err;
2438
2439 sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT);
2440 if ((err = request_firmware(&firmware, buf, device)) < 0) {
2441 printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name);
2442 return err;
2443 }
2444
2445 fw_data = (__le32 *) firmware->data;
2446 fw_size = firmware->size / sizeof(u32);
2447 fw_header = (struct fw_header *) firmware->data;
2448 load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2449
2450 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2451 fore200e->name, load_addr, fw_size);
2452
2453 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2454 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2455 goto release;
2456 }
2457
2458 for (; fw_size--; fw_data++, load_addr++)
2459 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2460
2461 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2462
2463 #if defined(__sparc_v9__)
2464 /* reported to be required by SBA cards on some sparc64 hosts */
2465 fore200e_spin(100);
2466 #endif
2467
2468 sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2469 fore200e_monitor_puts(fore200e, buf);
2470
2471 if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) {
2472 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2473 goto release;
2474 }
2475
2476 printk(FORE200E "device %s firmware started\n", fore200e->name);
2477
2478 fore200e->state = FORE200E_STATE_START_FW;
2479 err = 0;
2480
2481 release:
2482 release_firmware(firmware);
2483 return err;
2484 }
2485
2486
2487 static int __devinit
2488 fore200e_register(struct fore200e* fore200e)
2489 {
2490 struct atm_dev* atm_dev;
2491
2492 DPRINTK(2, "device %s being registered\n", fore200e->name);
2493
2494 atm_dev = atm_dev_register(fore200e->bus->proc_name, &fore200e_ops, -1,
2495 NULL);
2496 if (atm_dev == NULL) {
2497 printk(FORE200E "unable to register device %s\n", fore200e->name);
2498 return -ENODEV;
2499 }
2500
2501 atm_dev->dev_data = fore200e;
2502 fore200e->atm_dev = atm_dev;
2503
2504 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
2505 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
2506
2507 fore200e->available_cell_rate = ATM_OC3_PCR;
2508
2509 fore200e->state = FORE200E_STATE_REGISTER;
2510 return 0;
2511 }
2512
2513
2514 static int __devinit
2515 fore200e_init(struct fore200e* fore200e)
2516 {
2517 if (fore200e_register(fore200e) < 0)
2518 return -ENODEV;
2519
2520 if (fore200e->bus->configure(fore200e) < 0)
2521 return -ENODEV;
2522
2523 if (fore200e->bus->map(fore200e) < 0)
2524 return -ENODEV;
2525
2526 if (fore200e_reset(fore200e, 1) < 0)
2527 return -ENODEV;
2528
2529 if (fore200e_load_and_start_fw(fore200e) < 0)
2530 return -ENODEV;
2531
2532 if (fore200e_initialize(fore200e) < 0)
2533 return -ENODEV;
2534
2535 if (fore200e_init_cmd_queue(fore200e) < 0)
2536 return -ENOMEM;
2537
2538 if (fore200e_init_tx_queue(fore200e) < 0)
2539 return -ENOMEM;
2540
2541 if (fore200e_init_rx_queue(fore200e) < 0)
2542 return -ENOMEM;
2543
2544 if (fore200e_init_bs_queue(fore200e) < 0)
2545 return -ENOMEM;
2546
2547 if (fore200e_alloc_rx_buf(fore200e) < 0)
2548 return -ENOMEM;
2549
2550 if (fore200e_get_esi(fore200e) < 0)
2551 return -EIO;
2552
2553 if (fore200e_irq_request(fore200e) < 0)
2554 return -EBUSY;
2555
2556 fore200e_supply(fore200e);
2557
2558 /* all done, board initialization is now complete */
2559 fore200e->state = FORE200E_STATE_COMPLETE;
2560 return 0;
2561 }
2562
2563 #ifdef CONFIG_SBUS
2564 static int __devinit fore200e_sba_probe(struct platform_device *op,
2565 const struct of_device_id *match)
2566 {
2567 const struct fore200e_bus *bus = match->data;
2568 struct fore200e *fore200e;
2569 static int index = 0;
2570 int err;
2571
2572 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2573 if (!fore200e)
2574 return -ENOMEM;
2575
2576 fore200e->bus = bus;
2577 fore200e->bus_dev = op;
2578 fore200e->irq = op->archdata.irqs[0];
2579 fore200e->phys_base = op->resource[0].start;
2580
2581 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2582
2583 err = fore200e_init(fore200e);
2584 if (err < 0) {
2585 fore200e_shutdown(fore200e);
2586 kfree(fore200e);
2587 return err;
2588 }
2589
2590 index++;
2591 dev_set_drvdata(&op->dev, fore200e);
2592
2593 return 0;
2594 }
2595
2596 static int __devexit fore200e_sba_remove(struct platform_device *op)
2597 {
2598 struct fore200e *fore200e = dev_get_drvdata(&op->dev);
2599
2600 fore200e_shutdown(fore200e);
2601 kfree(fore200e);
2602
2603 return 0;
2604 }
2605
2606 static const struct of_device_id fore200e_sba_match[] = {
2607 {
2608 .name = SBA200E_PROM_NAME,
2609 .data = (void *) &fore200e_bus[1],
2610 },
2611 {},
2612 };
2613 MODULE_DEVICE_TABLE(of, fore200e_sba_match);
2614
2615 static struct of_platform_driver fore200e_sba_driver = {
2616 .driver = {
2617 .name = "fore_200e",
2618 .owner = THIS_MODULE,
2619 .of_match_table = fore200e_sba_match,
2620 },
2621 .probe = fore200e_sba_probe,
2622 .remove = __devexit_p(fore200e_sba_remove),
2623 };
2624 #endif
2625
2626 #ifdef CONFIG_PCI
2627 static int __devinit
2628 fore200e_pca_detect(struct pci_dev *pci_dev, const struct pci_device_id *pci_ent)
2629 {
2630 const struct fore200e_bus* bus = (struct fore200e_bus*) pci_ent->driver_data;
2631 struct fore200e* fore200e;
2632 int err = 0;
2633 static int index = 0;
2634
2635 if (pci_enable_device(pci_dev)) {
2636 err = -EINVAL;
2637 goto out;
2638 }
2639
2640 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2641 if (fore200e == NULL) {
2642 err = -ENOMEM;
2643 goto out_disable;
2644 }
2645
2646 fore200e->bus = bus;
2647 fore200e->bus_dev = pci_dev;
2648 fore200e->irq = pci_dev->irq;
2649 fore200e->phys_base = pci_resource_start(pci_dev, 0);
2650
2651 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
2652
2653 pci_set_master(pci_dev);
2654
2655 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2656 fore200e->bus->model_name,
2657 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2658
2659 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2660
2661 err = fore200e_init(fore200e);
2662 if (err < 0) {
2663 fore200e_shutdown(fore200e);
2664 goto out_free;
2665 }
2666
2667 ++index;
2668 pci_set_drvdata(pci_dev, fore200e);
2669
2670 out:
2671 return err;
2672
2673 out_free:
2674 kfree(fore200e);
2675 out_disable:
2676 pci_disable_device(pci_dev);
2677 goto out;
2678 }
2679
2680
2681 static void __devexit fore200e_pca_remove_one(struct pci_dev *pci_dev)
2682 {
2683 struct fore200e *fore200e;
2684
2685 fore200e = pci_get_drvdata(pci_dev);
2686
2687 fore200e_shutdown(fore200e);
2688 kfree(fore200e);
2689 pci_disable_device(pci_dev);
2690 }
2691
2692
2693 static struct pci_device_id fore200e_pca_tbl[] = {
2694 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID,
2695 0, 0, (unsigned long) &fore200e_bus[0] },
2696 { 0, }
2697 };
2698
2699 MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl);
2700
2701 static struct pci_driver fore200e_pca_driver = {
2702 .name = "fore_200e",
2703 .probe = fore200e_pca_detect,
2704 .remove = __devexit_p(fore200e_pca_remove_one),
2705 .id_table = fore200e_pca_tbl,
2706 };
2707 #endif
2708
2709 static int __init fore200e_module_init(void)
2710 {
2711 int err;
2712
2713 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2714
2715 #ifdef CONFIG_SBUS
2716 err = of_register_platform_driver(&fore200e_sba_driver);
2717 if (err)
2718 return err;
2719 #endif
2720
2721 #ifdef CONFIG_PCI
2722 err = pci_register_driver(&fore200e_pca_driver);
2723 #endif
2724
2725 #ifdef CONFIG_SBUS
2726 if (err)
2727 of_unregister_platform_driver(&fore200e_sba_driver);
2728 #endif
2729
2730 return err;
2731 }
2732
2733 static void __exit fore200e_module_cleanup(void)
2734 {
2735 #ifdef CONFIG_PCI
2736 pci_unregister_driver(&fore200e_pca_driver);
2737 #endif
2738 #ifdef CONFIG_SBUS
2739 of_unregister_platform_driver(&fore200e_sba_driver);
2740 #endif
2741 }
2742
2743 static int
2744 fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
2745 {
2746 struct fore200e* fore200e = FORE200E_DEV(dev);
2747 struct fore200e_vcc* fore200e_vcc;
2748 struct atm_vcc* vcc;
2749 int i, len, left = *pos;
2750 unsigned long flags;
2751
2752 if (!left--) {
2753
2754 if (fore200e_getstats(fore200e) < 0)
2755 return -EIO;
2756
2757 len = sprintf(page,"\n"
2758 " device:\n"
2759 " internal name:\t\t%s\n", fore200e->name);
2760
2761 /* print bus-specific information */
2762 if (fore200e->bus->proc_read)
2763 len += fore200e->bus->proc_read(fore200e, page + len);
2764
2765 len += sprintf(page + len,
2766 " interrupt line:\t\t%s\n"
2767 " physical base address:\t0x%p\n"
2768 " virtual base address:\t0x%p\n"
2769 " factory address (ESI):\t%pM\n"
2770 " board serial number:\t\t%d\n\n",
2771 fore200e_irq_itoa(fore200e->irq),
2772 (void*)fore200e->phys_base,
2773 fore200e->virt_base,
2774 fore200e->esi,
2775 fore200e->esi[4] * 256 + fore200e->esi[5]);
2776
2777 return len;
2778 }
2779
2780 if (!left--)
2781 return sprintf(page,
2782 " free small bufs, scheme 1:\t%d\n"
2783 " free large bufs, scheme 1:\t%d\n"
2784 " free small bufs, scheme 2:\t%d\n"
2785 " free large bufs, scheme 2:\t%d\n",
2786 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
2787 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
2788 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
2789 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
2790
2791 if (!left--) {
2792 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2793
2794 len = sprintf(page,"\n\n"
2795 " cell processor:\n"
2796 " heartbeat state:\t\t");
2797
2798 if (hb >> 16 != 0xDEAD)
2799 len += sprintf(page + len, "0x%08x\n", hb);
2800 else
2801 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2802
2803 return len;
2804 }
2805
2806 if (!left--) {
2807 static const char* media_name[] = {
2808 "unshielded twisted pair",
2809 "multimode optical fiber ST",
2810 "multimode optical fiber SC",
2811 "single-mode optical fiber ST",
2812 "single-mode optical fiber SC",
2813 "unknown"
2814 };
2815
2816 static const char* oc3_mode[] = {
2817 "normal operation",
2818 "diagnostic loopback",
2819 "line loopback",
2820 "unknown"
2821 };
2822
2823 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2824 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2825 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2826 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2827 u32 oc3_index;
2828
2829 if (media_index > 4)
2830 media_index = 5;
2831
2832 switch (fore200e->loop_mode) {
2833 case ATM_LM_NONE: oc3_index = 0;
2834 break;
2835 case ATM_LM_LOC_PHY: oc3_index = 1;
2836 break;
2837 case ATM_LM_RMT_PHY: oc3_index = 2;
2838 break;
2839 default: oc3_index = 3;
2840 }
2841
2842 return sprintf(page,
2843 " firmware release:\t\t%d.%d.%d\n"
2844 " monitor release:\t\t%d.%d\n"
2845 " media type:\t\t\t%s\n"
2846 " OC-3 revision:\t\t0x%x\n"
2847 " OC-3 mode:\t\t\t%s",
2848 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2849 mon960_release >> 16, mon960_release << 16 >> 16,
2850 media_name[ media_index ],
2851 oc3_revision,
2852 oc3_mode[ oc3_index ]);
2853 }
2854
2855 if (!left--) {
2856 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor;
2857
2858 return sprintf(page,
2859 "\n\n"
2860 " monitor:\n"
2861 " version number:\t\t%d\n"
2862 " boot status word:\t\t0x%08x\n",
2863 fore200e->bus->read(&cp_monitor->mon_version),
2864 fore200e->bus->read(&cp_monitor->bstat));
2865 }
2866
2867 if (!left--)
2868 return sprintf(page,
2869 "\n"
2870 " device statistics:\n"
2871 " 4b5b:\n"
2872 " crc_header_errors:\t\t%10u\n"
2873 " framing_errors:\t\t%10u\n",
2874 be32_to_cpu(fore200e->stats->phy.crc_header_errors),
2875 be32_to_cpu(fore200e->stats->phy.framing_errors));
2876
2877 if (!left--)
2878 return sprintf(page, "\n"
2879 " OC-3:\n"
2880 " section_bip8_errors:\t%10u\n"
2881 " path_bip8_errors:\t\t%10u\n"
2882 " line_bip24_errors:\t\t%10u\n"
2883 " line_febe_errors:\t\t%10u\n"
2884 " path_febe_errors:\t\t%10u\n"
2885 " corr_hcs_errors:\t\t%10u\n"
2886 " ucorr_hcs_errors:\t\t%10u\n",
2887 be32_to_cpu(fore200e->stats->oc3.section_bip8_errors),
2888 be32_to_cpu(fore200e->stats->oc3.path_bip8_errors),
2889 be32_to_cpu(fore200e->stats->oc3.line_bip24_errors),
2890 be32_to_cpu(fore200e->stats->oc3.line_febe_errors),
2891 be32_to_cpu(fore200e->stats->oc3.path_febe_errors),
2892 be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors),
2893 be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors));
2894
2895 if (!left--)
2896 return sprintf(page,"\n"
2897 " ATM:\t\t\t\t cells\n"
2898 " TX:\t\t\t%10u\n"
2899 " RX:\t\t\t%10u\n"
2900 " vpi out of range:\t\t%10u\n"
2901 " vpi no conn:\t\t%10u\n"
2902 " vci out of range:\t\t%10u\n"
2903 " vci no conn:\t\t%10u\n",
2904 be32_to_cpu(fore200e->stats->atm.cells_transmitted),
2905 be32_to_cpu(fore200e->stats->atm.cells_received),
2906 be32_to_cpu(fore200e->stats->atm.vpi_bad_range),
2907 be32_to_cpu(fore200e->stats->atm.vpi_no_conn),
2908 be32_to_cpu(fore200e->stats->atm.vci_bad_range),
2909 be32_to_cpu(fore200e->stats->atm.vci_no_conn));
2910
2911 if (!left--)
2912 return sprintf(page,"\n"
2913 " AAL0:\t\t\t cells\n"
2914 " TX:\t\t\t%10u\n"
2915 " RX:\t\t\t%10u\n"
2916 " dropped:\t\t\t%10u\n",
2917 be32_to_cpu(fore200e->stats->aal0.cells_transmitted),
2918 be32_to_cpu(fore200e->stats->aal0.cells_received),
2919 be32_to_cpu(fore200e->stats->aal0.cells_dropped));
2920
2921 if (!left--)
2922 return sprintf(page,"\n"
2923 " AAL3/4:\n"
2924 " SAR sublayer:\t\t cells\n"
2925 " TX:\t\t\t%10u\n"
2926 " RX:\t\t\t%10u\n"
2927 " dropped:\t\t\t%10u\n"
2928 " CRC errors:\t\t%10u\n"
2929 " protocol errors:\t\t%10u\n\n"
2930 " CS sublayer:\t\t PDUs\n"
2931 " TX:\t\t\t%10u\n"
2932 " RX:\t\t\t%10u\n"
2933 " dropped:\t\t\t%10u\n"
2934 " protocol errors:\t\t%10u\n",
2935 be32_to_cpu(fore200e->stats->aal34.cells_transmitted),
2936 be32_to_cpu(fore200e->stats->aal34.cells_received),
2937 be32_to_cpu(fore200e->stats->aal34.cells_dropped),
2938 be32_to_cpu(fore200e->stats->aal34.cells_crc_errors),
2939 be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors),
2940 be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted),
2941 be32_to_cpu(fore200e->stats->aal34.cspdus_received),
2942 be32_to_cpu(fore200e->stats->aal34.cspdus_dropped),
2943 be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors));
2944
2945 if (!left--)
2946 return sprintf(page,"\n"
2947 " AAL5:\n"
2948 " SAR sublayer:\t\t cells\n"
2949 " TX:\t\t\t%10u\n"
2950 " RX:\t\t\t%10u\n"
2951 " dropped:\t\t\t%10u\n"
2952 " congestions:\t\t%10u\n\n"
2953 " CS sublayer:\t\t PDUs\n"
2954 " TX:\t\t\t%10u\n"
2955 " RX:\t\t\t%10u\n"
2956 " dropped:\t\t\t%10u\n"
2957 " CRC errors:\t\t%10u\n"
2958 " protocol errors:\t\t%10u\n",
2959 be32_to_cpu(fore200e->stats->aal5.cells_transmitted),
2960 be32_to_cpu(fore200e->stats->aal5.cells_received),
2961 be32_to_cpu(fore200e->stats->aal5.cells_dropped),
2962 be32_to_cpu(fore200e->stats->aal5.congestion_experienced),
2963 be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted),
2964 be32_to_cpu(fore200e->stats->aal5.cspdus_received),
2965 be32_to_cpu(fore200e->stats->aal5.cspdus_dropped),
2966 be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors),
2967 be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors));
2968
2969 if (!left--)
2970 return sprintf(page,"\n"
2971 " AUX:\t\t allocation failures\n"
2972 " small b1:\t\t\t%10u\n"
2973 " large b1:\t\t\t%10u\n"
2974 " small b2:\t\t\t%10u\n"
2975 " large b2:\t\t\t%10u\n"
2976 " RX PDUs:\t\t\t%10u\n"
2977 " TX PDUs:\t\t\t%10lu\n",
2978 be32_to_cpu(fore200e->stats->aux.small_b1_failed),
2979 be32_to_cpu(fore200e->stats->aux.large_b1_failed),
2980 be32_to_cpu(fore200e->stats->aux.small_b2_failed),
2981 be32_to_cpu(fore200e->stats->aux.large_b2_failed),
2982 be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed),
2983 fore200e->tx_sat);
2984
2985 if (!left--)
2986 return sprintf(page,"\n"
2987 " receive carrier:\t\t\t%s\n",
2988 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
2989
2990 if (!left--) {
2991 return sprintf(page,"\n"
2992 " VCCs:\n address VPI VCI AAL "
2993 "TX PDUs TX min/max size RX PDUs RX min/max size\n");
2994 }
2995
2996 for (i = 0; i < NBR_CONNECT; i++) {
2997
2998 vcc = fore200e->vc_map[i].vcc;
2999
3000 if (vcc == NULL)
3001 continue;
3002
3003 spin_lock_irqsave(&fore200e->q_lock, flags);
3004
3005 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
3006
3007 fore200e_vcc = FORE200E_VCC(vcc);
3008 ASSERT(fore200e_vcc);
3009
3010 len = sprintf(page,
3011 " %08x %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
3012 (u32)(unsigned long)vcc,
3013 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
3014 fore200e_vcc->tx_pdu,
3015 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
3016 fore200e_vcc->tx_max_pdu,
3017 fore200e_vcc->rx_pdu,
3018 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
3019 fore200e_vcc->rx_max_pdu);
3020
3021 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3022 return len;
3023 }
3024
3025 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3026 }
3027
3028 return 0;
3029 }
3030
3031 module_init(fore200e_module_init);
3032 module_exit(fore200e_module_cleanup);
3033
3034
3035 static const struct atmdev_ops fore200e_ops =
3036 {
3037 .open = fore200e_open,
3038 .close = fore200e_close,
3039 .ioctl = fore200e_ioctl,
3040 .getsockopt = fore200e_getsockopt,
3041 .setsockopt = fore200e_setsockopt,
3042 .send = fore200e_send,
3043 .change_qos = fore200e_change_qos,
3044 .proc_read = fore200e_proc_read,
3045 .owner = THIS_MODULE
3046 };
3047
3048
3049 static const struct fore200e_bus fore200e_bus[] = {
3050 #ifdef CONFIG_PCI
3051 { "PCA-200E", "pca200e", 32, 4, 32,
3052 fore200e_pca_read,
3053 fore200e_pca_write,
3054 fore200e_pca_dma_map,
3055 fore200e_pca_dma_unmap,
3056 fore200e_pca_dma_sync_for_cpu,
3057 fore200e_pca_dma_sync_for_device,
3058 fore200e_pca_dma_chunk_alloc,
3059 fore200e_pca_dma_chunk_free,
3060 fore200e_pca_configure,
3061 fore200e_pca_map,
3062 fore200e_pca_reset,
3063 fore200e_pca_prom_read,
3064 fore200e_pca_unmap,
3065 NULL,
3066 fore200e_pca_irq_check,
3067 fore200e_pca_irq_ack,
3068 fore200e_pca_proc_read,
3069 },
3070 #endif
3071 #ifdef CONFIG_SBUS
3072 { "SBA-200E", "sba200e", 32, 64, 32,
3073 fore200e_sba_read,
3074 fore200e_sba_write,
3075 fore200e_sba_dma_map,
3076 fore200e_sba_dma_unmap,
3077 fore200e_sba_dma_sync_for_cpu,
3078 fore200e_sba_dma_sync_for_device,
3079 fore200e_sba_dma_chunk_alloc,
3080 fore200e_sba_dma_chunk_free,
3081 fore200e_sba_configure,
3082 fore200e_sba_map,
3083 fore200e_sba_reset,
3084 fore200e_sba_prom_read,
3085 fore200e_sba_unmap,
3086 fore200e_sba_irq_enable,
3087 fore200e_sba_irq_check,
3088 fore200e_sba_irq_ack,
3089 fore200e_sba_proc_read,
3090 },
3091 #endif
3092 {}
3093 };
3094
3095 MODULE_LICENSE("GPL");
3096 #ifdef CONFIG_PCI
3097 #ifdef __LITTLE_ENDIAN__
3098 MODULE_FIRMWARE("pca200e.bin");
3099 #else
3100 MODULE_FIRMWARE("pca200e_ecd.bin2");
3101 #endif
3102 #endif /* CONFIG_PCI */
3103 #ifdef CONFIG_SBUS
3104 MODULE_FIRMWARE("sba200e_ecd.bin2");
3105 #endif
Tomato firmware and modifications.