2 * Low-Level PCI Support for PC -- Routing of Interrupts
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/types.h>
8 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/dmi.h>
14 #include <linux/smp.h>
15 #include <asm/io_apic.h>
16 #include <linux/irq.h>
17 #include <linux/acpi.h>
18 #include <asm/pci_x86.h>
20 #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
21 #define PIRQ_VERSION 0x0100
23 static int broken_hp_bios_irq9
;
24 static int acer_tm360_irqrouting
;
26 static struct irq_routing_table
*pirq_table
;
28 static int pirq_enable_irq(struct pci_dev
*dev
);
31 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
32 * Avoid using: 13, 14 and 15 (FP error and IDE).
33 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
35 unsigned int pcibios_irq_mask
= 0xfff8;
37 static int pirq_penalty
[16] = {
38 1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
39 0, 0, 0, 0, 1000, 100000, 100000, 100000
45 int (*get
)(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
);
46 int (*set
)(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
,
50 struct irq_router_handler
{
52 int (*probe
)(struct irq_router
*r
, struct pci_dev
*router
, u16 device
);
55 int (*pcibios_enable_irq
)(struct pci_dev
*dev
) = pirq_enable_irq
;
56 void (*pcibios_disable_irq
)(struct pci_dev
*dev
) = NULL
;
59 * Check passed address for the PCI IRQ Routing Table signature
60 * and perform checksum verification.
63 static inline struct irq_routing_table
*pirq_check_routing_table(u8
*addr
)
65 struct irq_routing_table
*rt
;
69 rt
= (struct irq_routing_table
*) addr
;
70 if (rt
->signature
!= PIRQ_SIGNATURE
||
71 rt
->version
!= PIRQ_VERSION
||
73 rt
->size
< sizeof(struct irq_routing_table
))
76 for (i
= 0; i
< rt
->size
; i
++)
79 DBG(KERN_DEBUG
"PCI: Interrupt Routing Table found at 0x%p\n",
89 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
92 static struct irq_routing_table
* __init
pirq_find_routing_table(void)
95 struct irq_routing_table
*rt
;
97 if (pirq_table_addr
) {
98 rt
= pirq_check_routing_table((u8
*) __va(pirq_table_addr
));
101 printk(KERN_WARNING
"PCI: PIRQ table NOT found at pirqaddr\n");
103 for (addr
= (u8
*) __va(0xf0000); addr
< (u8
*) __va(0x100000); addr
+= 16) {
104 rt
= pirq_check_routing_table(addr
);
112 * If we have a IRQ routing table, use it to search for peer host
113 * bridges. It's a gross hack, but since there are no other known
114 * ways how to get a list of buses, we have to go this way.
117 static void __init
pirq_peer_trick(void)
119 struct irq_routing_table
*rt
= pirq_table
;
124 memset(busmap
, 0, sizeof(busmap
));
125 for (i
= 0; i
< (rt
->size
- sizeof(struct irq_routing_table
)) / sizeof(struct irq_info
); i
++) {
130 DBG(KERN_DEBUG
"%02x:%02x slot=%02x", e
->bus
, e
->devfn
/8, e
->slot
);
131 for (j
= 0; j
< 4; j
++)
132 DBG(" %d:%02x/%04x", j
, e
->irq
[j
].link
, e
->irq
[j
].bitmap
);
138 for (i
= 1; i
< 256; i
++) {
140 if (!busmap
[i
] || pci_find_bus(0, i
))
142 node
= get_mp_bus_to_node(i
);
143 if (pci_scan_bus_on_node(i
, &pci_root_ops
, node
))
144 printk(KERN_INFO
"PCI: Discovered primary peer "
145 "bus %02x [IRQ]\n", i
);
147 pcibios_last_bus
= -1;
151 * Code for querying and setting of IRQ routes on various interrupt routers.
154 void eisa_set_level_irq(unsigned int irq
)
156 unsigned char mask
= 1 << (irq
& 7);
157 unsigned int port
= 0x4d0 + (irq
>> 3);
159 static u16 eisa_irq_mask
;
161 if (irq
>= 16 || (1 << irq
) & eisa_irq_mask
)
164 eisa_irq_mask
|= (1 << irq
);
165 printk(KERN_DEBUG
"PCI: setting IRQ %u as level-triggered\n", irq
);
168 DBG(KERN_DEBUG
" -> edge");
169 outb(val
| mask
, port
);
174 * Common IRQ routing practice: nibbles in config space,
175 * offset by some magic constant.
177 static unsigned int read_config_nybble(struct pci_dev
*router
, unsigned offset
, unsigned nr
)
180 unsigned reg
= offset
+ (nr
>> 1);
182 pci_read_config_byte(router
, reg
, &x
);
183 return (nr
& 1) ? (x
>> 4) : (x
& 0xf);
186 static void write_config_nybble(struct pci_dev
*router
, unsigned offset
,
187 unsigned nr
, unsigned int val
)
190 unsigned reg
= offset
+ (nr
>> 1);
192 pci_read_config_byte(router
, reg
, &x
);
193 x
= (nr
& 1) ? ((x
& 0x0f) | (val
<< 4)) : ((x
& 0xf0) | val
);
194 pci_write_config_byte(router
, reg
, x
);
198 * ALI pirq entries are damn ugly, and completely undocumented.
199 * This has been figured out from pirq tables, and it's not a pretty
202 static int pirq_ali_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
204 static const unsigned char irqmap
[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
206 WARN_ON_ONCE(pirq
> 16);
207 return irqmap
[read_config_nybble(router
, 0x48, pirq
-1)];
210 static int pirq_ali_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
212 static const unsigned char irqmap
[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
213 unsigned int val
= irqmap
[irq
];
215 WARN_ON_ONCE(pirq
> 16);
217 write_config_nybble(router
, 0x48, pirq
-1, val
);
224 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
225 * just a pointer to the config space.
227 static int pirq_piix_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
231 pci_read_config_byte(router
, pirq
, &x
);
232 return (x
< 16) ? x
: 0;
235 static int pirq_piix_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
237 pci_write_config_byte(router
, pirq
, irq
);
242 * The VIA pirq rules are nibble-based, like ALI,
243 * but without the ugly irq number munging.
244 * However, PIRQD is in the upper instead of lower 4 bits.
246 static int pirq_via_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
248 return read_config_nybble(router
, 0x55, pirq
== 4 ? 5 : pirq
);
251 static int pirq_via_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
253 write_config_nybble(router
, 0x55, pirq
== 4 ? 5 : pirq
, irq
);
258 * The VIA pirq rules are nibble-based, like ALI,
259 * but without the ugly irq number munging.
260 * However, for 82C586, nibble map is different .
262 static int pirq_via586_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
264 static const unsigned int pirqmap
[5] = { 3, 2, 5, 1, 1 };
266 WARN_ON_ONCE(pirq
> 5);
267 return read_config_nybble(router
, 0x55, pirqmap
[pirq
-1]);
270 static int pirq_via586_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
272 static const unsigned int pirqmap
[5] = { 3, 2, 5, 1, 1 };
274 WARN_ON_ONCE(pirq
> 5);
275 write_config_nybble(router
, 0x55, pirqmap
[pirq
-1], irq
);
279 static int pirq_ite_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
281 static const unsigned char pirqmap
[4] = { 1, 0, 2, 3 };
283 WARN_ON_ONCE(pirq
> 4);
284 return read_config_nybble(router
, 0x43, pirqmap
[pirq
-1]);
287 static int pirq_ite_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
289 static const unsigned char pirqmap
[4] = { 1, 0, 2, 3 };
291 WARN_ON_ONCE(pirq
> 4);
292 write_config_nybble(router
, 0x43, pirqmap
[pirq
-1], irq
);
297 * OPTI: high four bits are nibble pointer..
298 * I wonder what the low bits do?
300 static int pirq_opti_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
302 return read_config_nybble(router
, 0xb8, pirq
>> 4);
305 static int pirq_opti_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
307 write_config_nybble(router
, 0xb8, pirq
>> 4, irq
);
312 * Cyrix: nibble offset 0x5C
313 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
314 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
316 static int pirq_cyrix_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
318 return read_config_nybble(router
, 0x5C, (pirq
-1)^1);
321 static int pirq_cyrix_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
323 write_config_nybble(router
, 0x5C, (pirq
-1)^1, irq
);
328 * PIRQ routing for SiS 85C503 router used in several SiS chipsets.
329 * We have to deal with the following issues here:
330 * - vendors have different ideas about the meaning of link values
331 * - some onboard devices (integrated in the chipset) have special
332 * links and are thus routed differently (i.e. not via PCI INTA-INTD)
333 * - different revision of the router have a different layout for
334 * the routing registers, particularly for the onchip devices
336 * For all routing registers the common thing is we have one byte
337 * per routeable link which is defined as:
338 * bit 7 IRQ mapping enabled (0) or disabled (1)
339 * bits [6:4] reserved (sometimes used for onchip devices)
340 * bits [3:0] IRQ to map to
341 * allowed: 3-7, 9-12, 14-15
342 * reserved: 0, 1, 2, 8, 13
344 * The config-space registers located at 0x41/0x42/0x43/0x44 are
345 * always used to route the normal PCI INT A/B/C/D respectively.
346 * Apparently there are systems implementing PCI routing table using
347 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
348 * We try our best to handle both link mappings.
350 * Currently (2003-05-21) it appears most SiS chipsets follow the
351 * definition of routing registers from the SiS-5595 southbridge.
352 * According to the SiS 5595 datasheets the revision id's of the
353 * router (ISA-bridge) should be 0x01 or 0xb0.
355 * Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
356 * Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
357 * They seem to work with the current routing code. However there is
358 * some concern because of the two USB-OHCI HCs (original SiS 5595
359 * had only one). YMMV.
361 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
364 * bits [6:5] must be written 01
365 * bit 4 channel-select primary (0), secondary (1)
368 * bit 6 OHCI function disabled (0), enabled (1)
370 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
372 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
374 * We support USBIRQ (in addition to INTA-INTD) and keep the
375 * IDE, ACPI and DAQ routing untouched as set by the BIOS.
377 * Currently the only reported exception is the new SiS 65x chipset
378 * which includes the SiS 69x southbridge. Here we have the 85C503
379 * router revision 0x04 and there are changes in the register layout
380 * mostly related to the different USB HCs with USB 2.0 support.
382 * Onchip routing for router rev-id 0x04 (try-and-error observation)
384 * 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
385 * bit 6-4 are probably unused, not like 5595
388 #define PIRQ_SIS_IRQ_MASK 0x0f
389 #define PIRQ_SIS_IRQ_DISABLE 0x80
390 #define PIRQ_SIS_USB_ENABLE 0x40
392 static int pirq_sis_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
398 if (reg
>= 0x01 && reg
<= 0x04)
400 pci_read_config_byte(router
, reg
, &x
);
401 return (x
& PIRQ_SIS_IRQ_DISABLE
) ? 0 : (x
& PIRQ_SIS_IRQ_MASK
);
404 static int pirq_sis_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
410 if (reg
>= 0x01 && reg
<= 0x04)
412 pci_read_config_byte(router
, reg
, &x
);
413 x
&= ~(PIRQ_SIS_IRQ_MASK
| PIRQ_SIS_IRQ_DISABLE
);
414 x
|= irq
? irq
: PIRQ_SIS_IRQ_DISABLE
;
415 pci_write_config_byte(router
, reg
, x
);
421 * VLSI: nibble offset 0x74 - educated guess due to routing table and
422 * config space of VLSI 82C534 PCI-bridge/router (1004:0102)
423 * Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
424 * devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
425 * for the busbridge to the docking station.
428 static int pirq_vlsi_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
430 WARN_ON_ONCE(pirq
>= 9);
432 dev_info(&dev
->dev
, "VLSI router PIRQ escape (%d)\n", pirq
);
435 return read_config_nybble(router
, 0x74, pirq
-1);
438 static int pirq_vlsi_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
440 WARN_ON_ONCE(pirq
>= 9);
442 dev_info(&dev
->dev
, "VLSI router PIRQ escape (%d)\n", pirq
);
445 write_config_nybble(router
, 0x74, pirq
-1, irq
);
450 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
451 * and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
452 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
453 * register is a straight binary coding of desired PIC IRQ (low nibble).
455 * The 'link' value in the PIRQ table is already in the correct format
456 * for the Index register. There are some special index values:
457 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
458 * and 0x03 for SMBus.
460 static int pirq_serverworks_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
463 return inb(0xc01) & 0xf;
466 static int pirq_serverworks_set(struct pci_dev
*router
, struct pci_dev
*dev
,
474 /* Support for AMD756 PCI IRQ Routing
475 * Jhon H. Caicedo <jhcaiced@osso.org.co>
476 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
477 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
478 * The AMD756 pirq rules are nibble-based
479 * offset 0x56 0-3 PIRQA 4-7 PIRQB
480 * offset 0x57 0-3 PIRQC 4-7 PIRQD
482 static int pirq_amd756_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
487 irq
= read_config_nybble(router
, 0x56, pirq
- 1);
489 "AMD756: dev [%04x:%04x], router PIRQ %d get IRQ %d\n",
490 dev
->vendor
, dev
->device
, pirq
, irq
);
494 static int pirq_amd756_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
497 "AMD756: dev [%04x:%04x], router PIRQ %d set IRQ %d\n",
498 dev
->vendor
, dev
->device
, pirq
, irq
);
500 write_config_nybble(router
, 0x56, pirq
- 1, irq
);
507 static int pirq_pico_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
509 outb(0x10 + ((pirq
- 1) >> 1), 0x24);
510 return ((pirq
- 1) & 1) ? (inb(0x26) >> 4) : (inb(0x26) & 0xf);
513 static int pirq_pico_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
,
517 outb(0x10 + ((pirq
- 1) >> 1), 0x24);
519 x
= ((pirq
- 1) & 1) ? ((x
& 0x0f) | (irq
<< 4)) : ((x
& 0xf0) | (irq
));
524 #ifdef CONFIG_PCI_BIOS
526 static int pirq_bios_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
528 struct pci_dev
*bridge
;
529 int pin
= pci_get_interrupt_pin(dev
, &bridge
);
530 return pcibios_set_irq_routing(bridge
, pin
- 1, irq
);
535 static __init
int intel_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
537 static struct pci_device_id __initdata pirq_440gx
[] = {
538 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82443GX_0
) },
539 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82443GX_2
) },
543 /* 440GX has a proprietary PIRQ router -- don't use it */
544 if (pci_dev_present(pirq_440gx
))
548 case PCI_DEVICE_ID_INTEL_82371FB_0
:
549 case PCI_DEVICE_ID_INTEL_82371SB_0
:
550 case PCI_DEVICE_ID_INTEL_82371AB_0
:
551 case PCI_DEVICE_ID_INTEL_82371MX
:
552 case PCI_DEVICE_ID_INTEL_82443MX_0
:
553 case PCI_DEVICE_ID_INTEL_82801AA_0
:
554 case PCI_DEVICE_ID_INTEL_82801AB_0
:
555 case PCI_DEVICE_ID_INTEL_82801BA_0
:
556 case PCI_DEVICE_ID_INTEL_82801BA_10
:
557 case PCI_DEVICE_ID_INTEL_82801CA_0
:
558 case PCI_DEVICE_ID_INTEL_82801CA_12
:
559 case PCI_DEVICE_ID_INTEL_82801DB_0
:
560 case PCI_DEVICE_ID_INTEL_82801E_0
:
561 case PCI_DEVICE_ID_INTEL_82801EB_0
:
562 case PCI_DEVICE_ID_INTEL_ESB_1
:
563 case PCI_DEVICE_ID_INTEL_ICH6_0
:
564 case PCI_DEVICE_ID_INTEL_ICH6_1
:
565 case PCI_DEVICE_ID_INTEL_ICH7_0
:
566 case PCI_DEVICE_ID_INTEL_ICH7_1
:
567 case PCI_DEVICE_ID_INTEL_ICH7_30
:
568 case PCI_DEVICE_ID_INTEL_ICH7_31
:
569 case PCI_DEVICE_ID_INTEL_TGP_LPC
:
570 case PCI_DEVICE_ID_INTEL_ESB2_0
:
571 case PCI_DEVICE_ID_INTEL_ICH8_0
:
572 case PCI_DEVICE_ID_INTEL_ICH8_1
:
573 case PCI_DEVICE_ID_INTEL_ICH8_2
:
574 case PCI_DEVICE_ID_INTEL_ICH8_3
:
575 case PCI_DEVICE_ID_INTEL_ICH8_4
:
576 case PCI_DEVICE_ID_INTEL_ICH9_0
:
577 case PCI_DEVICE_ID_INTEL_ICH9_1
:
578 case PCI_DEVICE_ID_INTEL_ICH9_2
:
579 case PCI_DEVICE_ID_INTEL_ICH9_3
:
580 case PCI_DEVICE_ID_INTEL_ICH9_4
:
581 case PCI_DEVICE_ID_INTEL_ICH9_5
:
582 case PCI_DEVICE_ID_INTEL_TOLAPAI_0
:
583 case PCI_DEVICE_ID_INTEL_ICH10_0
:
584 case PCI_DEVICE_ID_INTEL_ICH10_1
:
585 case PCI_DEVICE_ID_INTEL_ICH10_2
:
586 case PCI_DEVICE_ID_INTEL_ICH10_3
:
587 r
->name
= "PIIX/ICH";
588 r
->get
= pirq_piix_get
;
589 r
->set
= pirq_piix_set
;
593 if ((device
>= PCI_DEVICE_ID_INTEL_PCH_LPC_MIN
) &&
594 (device
<= PCI_DEVICE_ID_INTEL_PCH_LPC_MAX
)) {
595 r
->name
= "PIIX/ICH";
596 r
->get
= pirq_piix_get
;
597 r
->set
= pirq_piix_set
;
601 if ((device
>= PCI_DEVICE_ID_INTEL_CPT_LPC_MIN
) &&
602 (device
<= PCI_DEVICE_ID_INTEL_CPT_LPC_MAX
)) {
603 r
->name
= "PIIX/ICH";
604 r
->get
= pirq_piix_get
;
605 r
->set
= pirq_piix_set
;
611 static __init
int via_router_probe(struct irq_router
*r
,
612 struct pci_dev
*router
, u16 device
)
616 * workarounds for some buggy BIOSes
618 if (device
== PCI_DEVICE_ID_VIA_82C586_0
) {
619 switch (router
->device
) {
620 case PCI_DEVICE_ID_VIA_82C686
:
622 * Asus k7m bios wrongly reports 82C686A
625 device
= PCI_DEVICE_ID_VIA_82C686
;
627 case PCI_DEVICE_ID_VIA_8235
:
629 * Asus a7v-x bios wrongly reports 8235
632 device
= PCI_DEVICE_ID_VIA_8235
;
634 case PCI_DEVICE_ID_VIA_8237
:
636 * Asus a7v600 bios wrongly reports 8237
639 device
= PCI_DEVICE_ID_VIA_8237
;
645 case PCI_DEVICE_ID_VIA_82C586_0
:
647 r
->get
= pirq_via586_get
;
648 r
->set
= pirq_via586_set
;
650 case PCI_DEVICE_ID_VIA_82C596
:
651 case PCI_DEVICE_ID_VIA_82C686
:
652 case PCI_DEVICE_ID_VIA_8231
:
653 case PCI_DEVICE_ID_VIA_8233A
:
654 case PCI_DEVICE_ID_VIA_8235
:
655 case PCI_DEVICE_ID_VIA_8237
:
657 r
->get
= pirq_via_get
;
658 r
->set
= pirq_via_set
;
664 static __init
int vlsi_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
667 case PCI_DEVICE_ID_VLSI_82C534
:
668 r
->name
= "VLSI 82C534";
669 r
->get
= pirq_vlsi_get
;
670 r
->set
= pirq_vlsi_set
;
677 static __init
int serverworks_router_probe(struct irq_router
*r
,
678 struct pci_dev
*router
, u16 device
)
681 case PCI_DEVICE_ID_SERVERWORKS_OSB4
:
682 case PCI_DEVICE_ID_SERVERWORKS_CSB5
:
683 r
->name
= "ServerWorks";
684 r
->get
= pirq_serverworks_get
;
685 r
->set
= pirq_serverworks_set
;
691 static __init
int sis_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
693 if (device
!= PCI_DEVICE_ID_SI_503
)
697 r
->get
= pirq_sis_get
;
698 r
->set
= pirq_sis_set
;
702 static __init
int cyrix_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
705 case PCI_DEVICE_ID_CYRIX_5520
:
707 r
->get
= pirq_cyrix_get
;
708 r
->set
= pirq_cyrix_set
;
714 static __init
int opti_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
717 case PCI_DEVICE_ID_OPTI_82C700
:
719 r
->get
= pirq_opti_get
;
720 r
->set
= pirq_opti_set
;
726 static __init
int ite_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
729 case PCI_DEVICE_ID_ITE_IT8330G_0
:
731 r
->get
= pirq_ite_get
;
732 r
->set
= pirq_ite_set
;
738 static __init
int ali_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
741 case PCI_DEVICE_ID_AL_M1533
:
742 case PCI_DEVICE_ID_AL_M1563
:
744 r
->get
= pirq_ali_get
;
745 r
->set
= pirq_ali_set
;
751 static __init
int amd_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
754 case PCI_DEVICE_ID_AMD_VIPER_740B
:
757 case PCI_DEVICE_ID_AMD_VIPER_7413
:
760 case PCI_DEVICE_ID_AMD_VIPER_7443
:
766 r
->get
= pirq_amd756_get
;
767 r
->set
= pirq_amd756_set
;
771 static __init
int pico_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
774 case PCI_DEVICE_ID_PICOPOWER_PT86C523
:
775 r
->name
= "PicoPower PT86C523";
776 r
->get
= pirq_pico_get
;
777 r
->set
= pirq_pico_set
;
780 case PCI_DEVICE_ID_PICOPOWER_PT86C523BBP
:
781 r
->name
= "PicoPower PT86C523 rev. BB+";
782 r
->get
= pirq_pico_get
;
783 r
->set
= pirq_pico_set
;
789 static __initdata
struct irq_router_handler pirq_routers
[] = {
790 { PCI_VENDOR_ID_INTEL
, intel_router_probe
},
791 { PCI_VENDOR_ID_AL
, ali_router_probe
},
792 { PCI_VENDOR_ID_ITE
, ite_router_probe
},
793 { PCI_VENDOR_ID_VIA
, via_router_probe
},
794 { PCI_VENDOR_ID_OPTI
, opti_router_probe
},
795 { PCI_VENDOR_ID_SI
, sis_router_probe
},
796 { PCI_VENDOR_ID_CYRIX
, cyrix_router_probe
},
797 { PCI_VENDOR_ID_VLSI
, vlsi_router_probe
},
798 { PCI_VENDOR_ID_SERVERWORKS
, serverworks_router_probe
},
799 { PCI_VENDOR_ID_AMD
, amd_router_probe
},
800 { PCI_VENDOR_ID_PICOPOWER
, pico_router_probe
},
801 /* Someone with docs needs to add the ATI Radeon IGP */
804 static struct irq_router pirq_router
;
805 static struct pci_dev
*pirq_router_dev
;
809 static void __init
pirq_find_router(struct irq_router
*r
)
811 struct irq_routing_table
*rt
= pirq_table
;
812 struct irq_router_handler
*h
;
814 #ifdef CONFIG_PCI_BIOS
815 if (!rt
->signature
) {
816 printk(KERN_INFO
"PCI: Using BIOS for IRQ routing\n");
817 r
->set
= pirq_bios_set
;
823 /* Default unless a driver reloads it */
828 DBG(KERN_DEBUG
"PCI: Attempting to find IRQ router for [%04x:%04x]\n",
829 rt
->rtr_vendor
, rt
->rtr_device
);
831 pirq_router_dev
= pci_get_bus_and_slot(rt
->rtr_bus
, rt
->rtr_devfn
);
832 if (!pirq_router_dev
) {
833 DBG(KERN_DEBUG
"PCI: Interrupt router not found at "
834 "%02x:%02x\n", rt
->rtr_bus
, rt
->rtr_devfn
);
838 for (h
= pirq_routers
; h
->vendor
; h
++) {
839 /* First look for a router match */
840 if (rt
->rtr_vendor
== h
->vendor
&&
841 h
->probe(r
, pirq_router_dev
, rt
->rtr_device
))
843 /* Fall back to a device match */
844 if (pirq_router_dev
->vendor
== h
->vendor
&&
845 h
->probe(r
, pirq_router_dev
, pirq_router_dev
->device
))
848 dev_info(&pirq_router_dev
->dev
, "%s IRQ router [%04x:%04x]\n",
850 pirq_router_dev
->vendor
, pirq_router_dev
->device
);
852 /* The device remains referenced for the kernel lifetime */
855 static struct irq_info
*pirq_get_info(struct pci_dev
*dev
)
857 struct irq_routing_table
*rt
= pirq_table
;
858 int entries
= (rt
->size
- sizeof(struct irq_routing_table
)) /
859 sizeof(struct irq_info
);
860 struct irq_info
*info
;
862 for (info
= rt
->slots
; entries
--; info
++)
863 if (info
->bus
== dev
->bus
->number
&&
864 PCI_SLOT(info
->devfn
) == PCI_SLOT(dev
->devfn
))
869 static int pcibios_lookup_irq(struct pci_dev
*dev
, int assign
)
872 struct irq_info
*info
;
876 struct irq_router
*r
= &pirq_router
;
877 struct pci_dev
*dev2
= NULL
;
881 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
883 dev_dbg(&dev
->dev
, "no interrupt pin\n");
887 if (io_apic_assign_pci_irqs
)
890 /* Find IRQ routing entry */
895 info
= pirq_get_info(dev
);
897 dev_dbg(&dev
->dev
, "PCI INT %c not found in routing table\n",
901 pirq
= info
->irq
[pin
- 1].link
;
902 mask
= info
->irq
[pin
- 1].bitmap
;
904 dev_dbg(&dev
->dev
, "PCI INT %c not routed\n", 'A' + pin
- 1);
907 dev_dbg(&dev
->dev
, "PCI INT %c -> PIRQ %02x, mask %04x, excl %04x",
908 'A' + pin
- 1, pirq
, mask
, pirq_table
->exclusive_irqs
);
909 mask
&= pcibios_irq_mask
;
912 if (broken_hp_bios_irq9
&& pirq
== 0x59 && dev
->irq
== 9) {
914 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, 11);
915 r
->set(pirq_router_dev
, dev
, pirq
, 11);
918 /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
919 if (acer_tm360_irqrouting
&& dev
->irq
== 11 &&
920 dev
->vendor
== PCI_VENDOR_ID_O2
) {
923 dev
->irq
= r
->get(pirq_router_dev
, dev
, pirq
);
924 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, dev
->irq
);
928 * Find the best IRQ to assign: use the one
929 * reported by the device if possible.
932 if (newirq
&& !((1 << newirq
) & mask
)) {
933 if (pci_probe
& PCI_USE_PIRQ_MASK
)
936 dev_warn(&dev
->dev
, "IRQ %d doesn't match PIRQ mask "
937 "%#x; try pci=usepirqmask\n", newirq
, mask
);
939 if (!newirq
&& assign
) {
940 for (i
= 0; i
< 16; i
++) {
941 if (!(mask
& (1 << i
)))
943 if (pirq_penalty
[i
] < pirq_penalty
[newirq
] &&
944 can_request_irq(i
, IRQF_SHARED
))
948 dev_dbg(&dev
->dev
, "PCI INT %c -> newirq %d", 'A' + pin
- 1, newirq
);
950 /* Check if it is hardcoded */
951 if ((pirq
& 0xf0) == 0xf0) {
954 } else if (r
->get
&& (irq
= r
->get(pirq_router_dev
, dev
, pirq
)) && \
955 ((!(pci_probe
& PCI_USE_PIRQ_MASK
)) || ((1 << irq
) & mask
))) {
957 eisa_set_level_irq(irq
);
958 } else if (newirq
&& r
->set
&&
959 (dev
->class >> 8) != PCI_CLASS_DISPLAY_VGA
) {
960 if (r
->set(pirq_router_dev
, dev
, pirq
, newirq
)) {
961 eisa_set_level_irq(newirq
);
968 if (newirq
&& mask
== (1 << newirq
)) {
972 dev_dbg(&dev
->dev
, "can't route interrupt\n");
976 dev_info(&dev
->dev
, "%s PCI INT %c -> IRQ %d\n", msg
, 'A' + pin
- 1, irq
);
978 /* Update IRQ for all devices with the same pirq value */
979 for_each_pci_dev(dev2
) {
980 pci_read_config_byte(dev2
, PCI_INTERRUPT_PIN
, &pin
);
984 info
= pirq_get_info(dev2
);
987 if (info
->irq
[pin
- 1].link
== pirq
) {
989 * We refuse to override the dev->irq
990 * information. Give a warning!
992 if (dev2
->irq
&& dev2
->irq
!= irq
&& \
993 (!(pci_probe
& PCI_USE_PIRQ_MASK
) || \
994 ((1 << dev2
->irq
) & mask
))) {
995 #ifndef CONFIG_PCI_MSI
996 dev_info(&dev2
->dev
, "IRQ routing conflict: "
997 "have IRQ %d, want IRQ %d\n",
1003 pirq_penalty
[irq
]++;
1005 dev_info(&dev
->dev
, "sharing IRQ %d with %s\n",
1006 irq
, pci_name(dev2
));
1012 void __init
pcibios_fixup_irqs(void)
1014 struct pci_dev
*dev
= NULL
;
1017 DBG(KERN_DEBUG
"PCI: IRQ fixup\n");
1018 for_each_pci_dev(dev
) {
1020 * If the BIOS has set an out of range IRQ number, just
1021 * ignore it. Also keep track of which IRQ's are
1024 if (dev
->irq
>= 16) {
1025 dev_dbg(&dev
->dev
, "ignoring bogus IRQ %d\n", dev
->irq
);
1029 * If the IRQ is already assigned to a PCI device,
1030 * ignore its ISA use penalty
1032 if (pirq_penalty
[dev
->irq
] >= 100 &&
1033 pirq_penalty
[dev
->irq
] < 100000)
1034 pirq_penalty
[dev
->irq
] = 0;
1035 pirq_penalty
[dev
->irq
]++;
1038 if (io_apic_assign_pci_irqs
)
1042 for_each_pci_dev(dev
) {
1043 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
1048 * Still no IRQ? Try to lookup one...
1051 pcibios_lookup_irq(dev
, 0);
1055 static int __init
fix_broken_hp_bios_irq9(const struct dmi_system_id
*d
)
1057 if (!broken_hp_bios_irq9
) {
1058 broken_hp_bios_irq9
= 1;
1059 printk(KERN_INFO
"%s detected - fixing broken IRQ routing\n",
1065 static int __init
fix_acer_tm360_irqrouting(const struct dmi_system_id
*d
)
1067 if (!acer_tm360_irqrouting
) {
1068 acer_tm360_irqrouting
= 1;
1069 printk(KERN_INFO
"%s detected - fixing broken IRQ routing\n",
1075 static struct dmi_system_id __initdata pciirq_dmi_table
[] = {
1077 .callback
= fix_broken_hp_bios_irq9
,
1078 .ident
= "HP Pavilion N5400 Series Laptop",
1080 DMI_MATCH(DMI_SYS_VENDOR
, "Hewlett-Packard"),
1081 DMI_MATCH(DMI_BIOS_VERSION
, "GE.M1.03"),
1082 DMI_MATCH(DMI_PRODUCT_VERSION
,
1083 "HP Pavilion Notebook Model GE"),
1084 DMI_MATCH(DMI_BOARD_VERSION
, "OmniBook N32N-736"),
1088 .callback
= fix_acer_tm360_irqrouting
,
1089 .ident
= "Acer TravelMate 36x Laptop",
1091 DMI_MATCH(DMI_SYS_VENDOR
, "Acer"),
1092 DMI_MATCH(DMI_PRODUCT_NAME
, "TravelMate 360"),
1098 void __init
pcibios_irq_init(void)
1100 DBG(KERN_DEBUG
"PCI: IRQ init\n");
1102 if (raw_pci_ops
== NULL
)
1105 dmi_check_system(pciirq_dmi_table
);
1107 pirq_table
= pirq_find_routing_table();
1109 #ifdef CONFIG_PCI_BIOS
1110 if (!pirq_table
&& (pci_probe
& PCI_BIOS_IRQ_SCAN
))
1111 pirq_table
= pcibios_get_irq_routing_table();
1115 pirq_find_router(&pirq_router
);
1116 if (pirq_table
->exclusive_irqs
) {
1118 for (i
= 0; i
< 16; i
++)
1119 if (!(pirq_table
->exclusive_irqs
& (1 << i
)))
1120 pirq_penalty
[i
] += 100;
1123 * If we're using the I/O APIC, avoid using the PCI IRQ
1126 if (io_apic_assign_pci_irqs
)
1130 x86_init
.pci
.fixup_irqs();
1132 if (io_apic_assign_pci_irqs
&& pci_routeirq
) {
1133 struct pci_dev
*dev
= NULL
;
1135 * PCI IRQ routing is set up by pci_enable_device(), but we
1136 * also do it here in case there are still broken drivers that
1137 * don't use pci_enable_device().
1139 printk(KERN_INFO
"PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
1140 for_each_pci_dev(dev
)
1141 pirq_enable_irq(dev
);
1145 static void pirq_penalize_isa_irq(int irq
, int active
)
1148 * If any ISAPnP device reports an IRQ in its list of possible
1149 * IRQ's, we try to avoid assigning it to PCI devices.
1153 pirq_penalty
[irq
] += 1000;
1155 pirq_penalty
[irq
] += 100;
1159 void pcibios_penalize_isa_irq(int irq
, int active
)
1163 acpi_penalize_isa_irq(irq
, active
);
1166 pirq_penalize_isa_irq(irq
, active
);
1169 static int pirq_enable_irq(struct pci_dev
*dev
)
1173 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
1174 if (pin
&& !pcibios_lookup_irq(dev
, 1)) {
1177 if (!io_apic_assign_pci_irqs
&& dev
->irq
)
1180 if (io_apic_assign_pci_irqs
) {
1181 #ifdef CONFIG_X86_IO_APIC
1182 struct pci_dev
*temp_dev
;
1184 struct io_apic_irq_attr irq_attr
;
1186 irq
= IO_APIC_get_PCI_irq_vector(dev
->bus
->number
,
1187 PCI_SLOT(dev
->devfn
),
1188 pin
- 1, &irq_attr
);
1190 * Busses behind bridges are typically not listed in the MP-table.
1191 * In this case we have to look up the IRQ based on the parent bus,
1192 * parent slot, and pin number. The SMP code detects such bridged
1193 * busses itself so we should get into this branch reliably.
1196 while (irq
< 0 && dev
->bus
->parent
) { /* go back to the bridge */
1197 struct pci_dev
*bridge
= dev
->bus
->self
;
1199 pin
= pci_swizzle_interrupt_pin(dev
, pin
);
1200 irq
= IO_APIC_get_PCI_irq_vector(bridge
->bus
->number
,
1201 PCI_SLOT(bridge
->devfn
),
1202 pin
- 1, &irq_attr
);
1204 dev_warn(&dev
->dev
, "using bridge %s "
1205 "INT %c to get IRQ %d\n",
1206 pci_name(bridge
), 'A' + pin
- 1,
1212 io_apic_set_pci_routing(&dev
->dev
, irq
,
1215 dev_info(&dev
->dev
, "PCI->APIC IRQ transform: "
1216 "INT %c -> IRQ %d\n", 'A' + pin
- 1, irq
);
1219 msg
= "; probably buggy MP table";
1221 } else if (pci_probe
& PCI_BIOS_IRQ_SCAN
)
1224 msg
= "; please try using pci=biosirq";
1227 * With IDE legacy devices the IRQ lookup failure is not
1230 if (dev
->class >> 8 == PCI_CLASS_STORAGE_IDE
&&
1231 !(dev
->class & 0x5))
1234 dev_warn(&dev
->dev
, "can't find IRQ for PCI INT %c%s\n",
1235 'A' + pin
- 1, msg
);