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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / arch / x86 / kvm / x86.c
blobbde434bbae94ffe9674b72d0a52a03cf02fdc2c4
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affilates.
10 *
11 * Authors:
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
16 *
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
19 *
20 */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
47
48 #define CREATE_TRACE_POINTS
49 #include "trace.h"
50
51 #include <asm/debugreg.h>
52 #include <asm/msr.h>
53 #include <asm/desc.h>
54 #include <asm/mtrr.h>
55 #include <asm/mce.h>
56 #include <asm/i387.h>
57 #include <asm/xcr.h>
58
59 #define MAX_IO_MSRS 256
60 #define CR0_RESERVED_BITS \
61 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
62 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
63 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
64 #define CR4_RESERVED_BITS \
65 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
66 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
67 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
68 | X86_CR4_OSXSAVE \
69 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
70
71 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
72
73 #define KVM_MAX_MCE_BANKS 32
74 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
75
76 /* EFER defaults:
77 * - enable syscall per default because its emulated by KVM
78 * - enable LME and LMA per default on 64 bit KVM
79 */
80 #ifdef CONFIG_X86_64
81 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
82 #else
83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
84 #endif
85
86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88
89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
90 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
91 struct kvm_cpuid_entry2 __user *entries);
92
93 struct kvm_x86_ops *kvm_x86_ops;
94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
95
96 int ignore_msrs = 0;
97 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
98
99 #define KVM_NR_SHARED_MSRS 16
100
101 struct kvm_shared_msrs_global {
102 int nr;
103 u32 msrs[KVM_NR_SHARED_MSRS];
104 };
105
106 struct kvm_shared_msrs {
107 struct user_return_notifier urn;
108 bool registered;
109 struct kvm_shared_msr_values {
110 u64 host;
111 u64 curr;
112 } values[KVM_NR_SHARED_MSRS];
113 };
114
115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
117
118 struct kvm_stats_debugfs_item debugfs_entries[] = {
119 { "pf_fixed", VCPU_STAT(pf_fixed) },
120 { "pf_guest", VCPU_STAT(pf_guest) },
121 { "tlb_flush", VCPU_STAT(tlb_flush) },
122 { "invlpg", VCPU_STAT(invlpg) },
123 { "exits", VCPU_STAT(exits) },
124 { "io_exits", VCPU_STAT(io_exits) },
125 { "mmio_exits", VCPU_STAT(mmio_exits) },
126 { "signal_exits", VCPU_STAT(signal_exits) },
127 { "irq_window", VCPU_STAT(irq_window_exits) },
128 { "nmi_window", VCPU_STAT(nmi_window_exits) },
129 { "halt_exits", VCPU_STAT(halt_exits) },
130 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
131 { "hypercalls", VCPU_STAT(hypercalls) },
132 { "request_irq", VCPU_STAT(request_irq_exits) },
133 { "irq_exits", VCPU_STAT(irq_exits) },
134 { "host_state_reload", VCPU_STAT(host_state_reload) },
135 { "efer_reload", VCPU_STAT(efer_reload) },
136 { "fpu_reload", VCPU_STAT(fpu_reload) },
137 { "insn_emulation", VCPU_STAT(insn_emulation) },
138 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
139 { "irq_injections", VCPU_STAT(irq_injections) },
140 { "nmi_injections", VCPU_STAT(nmi_injections) },
141 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
142 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
143 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
144 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
145 { "mmu_flooded", VM_STAT(mmu_flooded) },
146 { "mmu_recycled", VM_STAT(mmu_recycled) },
147 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
148 { "mmu_unsync", VM_STAT(mmu_unsync) },
149 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
150 { "largepages", VM_STAT(lpages) },
151 { NULL }
152 };
153
154 u64 __read_mostly host_xcr0;
155
156 static void kvm_on_user_return(struct user_return_notifier *urn)
157 {
158 unsigned slot;
159 struct kvm_shared_msrs *locals
160 = container_of(urn, struct kvm_shared_msrs, urn);
161 struct kvm_shared_msr_values *values;
162
163 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
164 values = &locals->values[slot];
165 if (values->host != values->curr) {
166 wrmsrl(shared_msrs_global.msrs[slot], values->host);
167 values->curr = values->host;
168 }
169 }
170 locals->registered = false;
171 user_return_notifier_unregister(urn);
172 }
173
174 static void shared_msr_update(unsigned slot, u32 msr)
175 {
176 struct kvm_shared_msrs *smsr;
177 u64 value;
178
179 smsr = &__get_cpu_var(shared_msrs);
180 /* only read, and nobody should modify it at this time,
181 * so don't need lock */
182 if (slot >= shared_msrs_global.nr) {
183 printk(KERN_ERR "kvm: invalid MSR slot!");
184 return;
185 }
186 rdmsrl_safe(msr, &value);
187 smsr->values[slot].host = value;
188 smsr->values[slot].curr = value;
189 }
190
191 void kvm_define_shared_msr(unsigned slot, u32 msr)
192 {
193 if (slot >= shared_msrs_global.nr)
194 shared_msrs_global.nr = slot + 1;
195 shared_msrs_global.msrs[slot] = msr;
196 /* we need ensured the shared_msr_global have been updated */
197 smp_wmb();
198 }
199 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
200
201 static void kvm_shared_msr_cpu_online(void)
202 {
203 unsigned i;
204
205 for (i = 0; i < shared_msrs_global.nr; ++i)
206 shared_msr_update(i, shared_msrs_global.msrs[i]);
207 }
208
209 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
210 {
211 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
212
213 if (((value ^ smsr->values[slot].curr) & mask) == 0)
214 return;
215 smsr->values[slot].curr = value;
216 wrmsrl(shared_msrs_global.msrs[slot], value);
217 if (!smsr->registered) {
218 smsr->urn.on_user_return = kvm_on_user_return;
219 user_return_notifier_register(&smsr->urn);
220 smsr->registered = true;
221 }
222 }
223 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
224
225 static void drop_user_return_notifiers(void *ignore)
226 {
227 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
228
229 if (smsr->registered)
230 kvm_on_user_return(&smsr->urn);
231 }
232
233 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
234 {
235 if (irqchip_in_kernel(vcpu->kvm))
236 return vcpu->arch.apic_base;
237 else
238 return vcpu->arch.apic_base;
239 }
240 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
241
242 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
243 {
244 /* TODO: reserve bits check */
245 if (irqchip_in_kernel(vcpu->kvm))
246 kvm_lapic_set_base(vcpu, data);
247 else
248 vcpu->arch.apic_base = data;
249 }
250 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
251
252 #define EXCPT_BENIGN 0
253 #define EXCPT_CONTRIBUTORY 1
254 #define EXCPT_PF 2
255
256 static int exception_class(int vector)
257 {
258 switch (vector) {
259 case PF_VECTOR:
260 return EXCPT_PF;
261 case DE_VECTOR:
262 case TS_VECTOR:
263 case NP_VECTOR:
264 case SS_VECTOR:
265 case GP_VECTOR:
266 return EXCPT_CONTRIBUTORY;
267 default:
268 break;
269 }
270 return EXCPT_BENIGN;
271 }
272
273 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
274 unsigned nr, bool has_error, u32 error_code,
275 bool reinject)
276 {
277 u32 prev_nr;
278 int class1, class2;
279
280 if (!vcpu->arch.exception.pending) {
281 queue:
282 vcpu->arch.exception.pending = true;
283 vcpu->arch.exception.has_error_code = has_error;
284 vcpu->arch.exception.nr = nr;
285 vcpu->arch.exception.error_code = error_code;
286 vcpu->arch.exception.reinject = reinject;
287 return;
288 }
289
290 /* to check exception */
291 prev_nr = vcpu->arch.exception.nr;
292 if (prev_nr == DF_VECTOR) {
293 /* triple fault -> shutdown */
294 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
295 return;
296 }
297 class1 = exception_class(prev_nr);
298 class2 = exception_class(nr);
299 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
300 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
301 /* generate double fault per SDM Table 5-5 */
302 vcpu->arch.exception.pending = true;
303 vcpu->arch.exception.has_error_code = true;
304 vcpu->arch.exception.nr = DF_VECTOR;
305 vcpu->arch.exception.error_code = 0;
306 } else
307 /* replace previous exception with a new one in a hope
308 that instruction re-execution will regenerate lost
309 exception */
310 goto queue;
311 }
312
313 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
314 {
315 kvm_multiple_exception(vcpu, nr, false, 0, false);
316 }
317 EXPORT_SYMBOL_GPL(kvm_queue_exception);
318
319 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
320 {
321 kvm_multiple_exception(vcpu, nr, false, 0, true);
322 }
323 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
324
325 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
326 u32 error_code)
327 {
328 ++vcpu->stat.pf_guest;
329 vcpu->arch.cr2 = addr;
330 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
331 }
332
333 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
334 {
335 vcpu->arch.nmi_pending = 1;
336 }
337 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
338
339 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
340 {
341 kvm_multiple_exception(vcpu, nr, true, error_code, false);
342 }
343 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
344
345 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
346 {
347 kvm_multiple_exception(vcpu, nr, true, error_code, true);
348 }
349 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
350
351 /*
352 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
353 * a #GP and return false.
354 */
355 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
356 {
357 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
358 return true;
359 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
360 return false;
361 }
362 EXPORT_SYMBOL_GPL(kvm_require_cpl);
363
364 /*
365 * Load the pae pdptrs. Return true is they are all valid.
366 */
367 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
368 {
369 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
370 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
371 int i;
372 int ret;
373 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
374
375 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
376 offset * sizeof(u64), sizeof(pdpte));
377 if (ret < 0) {
378 ret = 0;
379 goto out;
380 }
381 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
382 if (is_present_gpte(pdpte[i]) &&
383 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
384 ret = 0;
385 goto out;
386 }
387 }
388 ret = 1;
389
390 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
391 __set_bit(VCPU_EXREG_PDPTR,
392 (unsigned long *)&vcpu->arch.regs_avail);
393 __set_bit(VCPU_EXREG_PDPTR,
394 (unsigned long *)&vcpu->arch.regs_dirty);
395 out:
396
397 return ret;
398 }
399 EXPORT_SYMBOL_GPL(load_pdptrs);
400
401 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
402 {
403 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
404 bool changed = true;
405 int r;
406
407 if (is_long_mode(vcpu) || !is_pae(vcpu))
408 return false;
409
410 if (!test_bit(VCPU_EXREG_PDPTR,
411 (unsigned long *)&vcpu->arch.regs_avail))
412 return true;
413
414 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
415 if (r < 0)
416 goto out;
417 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
418 out:
419
420 return changed;
421 }
422
423 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
424 {
425 unsigned long old_cr0 = kvm_read_cr0(vcpu);
426 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
427 X86_CR0_CD | X86_CR0_NW;
428
429 cr0 |= X86_CR0_ET;
430
431 #ifdef CONFIG_X86_64
432 if (cr0 & 0xffffffff00000000UL)
433 return 1;
434 #endif
435
436 cr0 &= ~CR0_RESERVED_BITS;
437
438 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
439 return 1;
440
441 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
442 return 1;
443
444 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
445 #ifdef CONFIG_X86_64
446 if ((vcpu->arch.efer & EFER_LME)) {
447 int cs_db, cs_l;
448
449 if (!is_pae(vcpu))
450 return 1;
451 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
452 if (cs_l)
453 return 1;
454 } else
455 #endif
456 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
457 return 1;
458 }
459
460 kvm_x86_ops->set_cr0(vcpu, cr0);
461
462 if ((cr0 ^ old_cr0) & update_bits)
463 kvm_mmu_reset_context(vcpu);
464 return 0;
465 }
466 EXPORT_SYMBOL_GPL(kvm_set_cr0);
467
468 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
469 {
470 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
471 }
472 EXPORT_SYMBOL_GPL(kvm_lmsw);
473
474 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
475 {
476 u64 xcr0;
477
478 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
479 if (index != XCR_XFEATURE_ENABLED_MASK)
480 return 1;
481 xcr0 = xcr;
482 if (kvm_x86_ops->get_cpl(vcpu) != 0)
483 return 1;
484 if (!(xcr0 & XSTATE_FP))
485 return 1;
486 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
487 return 1;
488 if (xcr0 & ~host_xcr0)
489 return 1;
490 vcpu->arch.xcr0 = xcr0;
491 vcpu->guest_xcr0_loaded = 0;
492 return 0;
493 }
494
495 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
496 {
497 if (__kvm_set_xcr(vcpu, index, xcr)) {
498 kvm_inject_gp(vcpu, 0);
499 return 1;
500 }
501 return 0;
502 }
503 EXPORT_SYMBOL_GPL(kvm_set_xcr);
504
505 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
506 {
507 struct kvm_cpuid_entry2 *best;
508
509 best = kvm_find_cpuid_entry(vcpu, 1, 0);
510 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
511 }
512
513 static void update_cpuid(struct kvm_vcpu *vcpu)
514 {
515 struct kvm_cpuid_entry2 *best;
516
517 best = kvm_find_cpuid_entry(vcpu, 1, 0);
518 if (!best)
519 return;
520
521 /* Update OSXSAVE bit */
522 if (cpu_has_xsave && best->function == 0x1) {
523 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
524 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
525 best->ecx |= bit(X86_FEATURE_OSXSAVE);
526 }
527 }
528
529 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
530 {
531 unsigned long old_cr4 = kvm_read_cr4(vcpu);
532 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
533
534 if (cr4 & CR4_RESERVED_BITS)
535 return 1;
536
537 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
538 return 1;
539
540 if (is_long_mode(vcpu)) {
541 if (!(cr4 & X86_CR4_PAE))
542 return 1;
543 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
544 && ((cr4 ^ old_cr4) & pdptr_bits)
545 && !load_pdptrs(vcpu, vcpu->arch.cr3))
546 return 1;
547
548 if (cr4 & X86_CR4_VMXE)
549 return 1;
550
551 kvm_x86_ops->set_cr4(vcpu, cr4);
552
553 if ((cr4 ^ old_cr4) & pdptr_bits)
554 kvm_mmu_reset_context(vcpu);
555
556 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
557 update_cpuid(vcpu);
558
559 return 0;
560 }
561 EXPORT_SYMBOL_GPL(kvm_set_cr4);
562
563 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
564 {
565 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
566 kvm_mmu_sync_roots(vcpu);
567 kvm_mmu_flush_tlb(vcpu);
568 return 0;
569 }
570
571 if (is_long_mode(vcpu)) {
572 if (cr3 & CR3_L_MODE_RESERVED_BITS)
573 return 1;
574 } else {
575 if (is_pae(vcpu)) {
576 if (cr3 & CR3_PAE_RESERVED_BITS)
577 return 1;
578 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
579 return 1;
580 }
581 /*
582 * We don't check reserved bits in nonpae mode, because
583 * this isn't enforced, and VMware depends on this.
584 */
585 }
586
587 /*
588 * Does the new cr3 value map to physical memory? (Note, we
589 * catch an invalid cr3 even in real-mode, because it would
590 * cause trouble later on when we turn on paging anyway.)
591 *
592 * A real CPU would silently accept an invalid cr3 and would
593 * attempt to use it - with largely undefined (and often hard
594 * to debug) behavior on the guest side.
595 */
596 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
597 return 1;
598 vcpu->arch.cr3 = cr3;
599 vcpu->arch.mmu.new_cr3(vcpu);
600 return 0;
601 }
602 EXPORT_SYMBOL_GPL(kvm_set_cr3);
603
604 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
605 {
606 if (cr8 & CR8_RESERVED_BITS)
607 return 1;
608 if (irqchip_in_kernel(vcpu->kvm))
609 kvm_lapic_set_tpr(vcpu, cr8);
610 else
611 vcpu->arch.cr8 = cr8;
612 return 0;
613 }
614
615 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
616 {
617 if (__kvm_set_cr8(vcpu, cr8))
618 kvm_inject_gp(vcpu, 0);
619 }
620 EXPORT_SYMBOL_GPL(kvm_set_cr8);
621
622 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
623 {
624 if (irqchip_in_kernel(vcpu->kvm))
625 return kvm_lapic_get_cr8(vcpu);
626 else
627 return vcpu->arch.cr8;
628 }
629 EXPORT_SYMBOL_GPL(kvm_get_cr8);
630
631 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
632 {
633 switch (dr) {
634 case 0 ... 3:
635 vcpu->arch.db[dr] = val;
636 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
637 vcpu->arch.eff_db[dr] = val;
638 break;
639 case 4:
640 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
641 return 1; /* #UD */
642 /* fall through */
643 case 6:
644 if (val & 0xffffffff00000000ULL)
645 return -1; /* #GP */
646 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
647 break;
648 case 5:
649 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
650 return 1; /* #UD */
651 /* fall through */
652 default: /* 7 */
653 if (val & 0xffffffff00000000ULL)
654 return -1; /* #GP */
655 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
656 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
657 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
658 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
659 }
660 break;
661 }
662
663 return 0;
664 }
665
666 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
667 {
668 int res;
669
670 res = __kvm_set_dr(vcpu, dr, val);
671 if (res > 0)
672 kvm_queue_exception(vcpu, UD_VECTOR);
673 else if (res < 0)
674 kvm_inject_gp(vcpu, 0);
675
676 return res;
677 }
678 EXPORT_SYMBOL_GPL(kvm_set_dr);
679
680 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
681 {
682 switch (dr) {
683 case 0 ... 3:
684 *val = vcpu->arch.db[dr];
685 break;
686 case 4:
687 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
688 return 1;
689 /* fall through */
690 case 6:
691 *val = vcpu->arch.dr6;
692 break;
693 case 5:
694 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
695 return 1;
696 /* fall through */
697 default: /* 7 */
698 *val = vcpu->arch.dr7;
699 break;
700 }
701
702 return 0;
703 }
704
705 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
706 {
707 if (_kvm_get_dr(vcpu, dr, val)) {
708 kvm_queue_exception(vcpu, UD_VECTOR);
709 return 1;
710 }
711 return 0;
712 }
713 EXPORT_SYMBOL_GPL(kvm_get_dr);
714
715 /*
716 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
717 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
718 *
719 * This list is modified at module load time to reflect the
720 * capabilities of the host cpu. This capabilities test skips MSRs that are
721 * kvm-specific. Those are put in the beginning of the list.
722 */
723
724 #define KVM_SAVE_MSRS_BEGIN 7
725 static u32 msrs_to_save[] = {
726 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
727 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
728 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
729 HV_X64_MSR_APIC_ASSIST_PAGE,
730 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
731 MSR_STAR,
732 #ifdef CONFIG_X86_64
733 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
734 #endif
735 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
736 };
737
738 static unsigned num_msrs_to_save;
739
740 static u32 emulated_msrs[] = {
741 MSR_IA32_MISC_ENABLE,
742 MSR_IA32_MCG_STATUS,
743 MSR_IA32_MCG_CTL,
744 };
745
746 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
747 {
748 u64 old_efer = vcpu->arch.efer;
749
750 if (efer & efer_reserved_bits)
751 return 1;
752
753 if (is_paging(vcpu)
754 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
755 return 1;
756
757 if (efer & EFER_FFXSR) {
758 struct kvm_cpuid_entry2 *feat;
759
760 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
761 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
762 return 1;
763 }
764
765 if (efer & EFER_SVME) {
766 struct kvm_cpuid_entry2 *feat;
767
768 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
769 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
770 return 1;
771 }
772
773 efer &= ~EFER_LMA;
774 efer |= vcpu->arch.efer & EFER_LMA;
775
776 kvm_x86_ops->set_efer(vcpu, efer);
777
778 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
779 kvm_mmu_reset_context(vcpu);
780
781 /* Update reserved bits */
782 if ((efer ^ old_efer) & EFER_NX)
783 kvm_mmu_reset_context(vcpu);
784
785 return 0;
786 }
787
788 void kvm_enable_efer_bits(u64 mask)
789 {
790 efer_reserved_bits &= ~mask;
791 }
792 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
793
794
795 /*
796 * Writes msr value into into the appropriate "register".
797 * Returns 0 on success, non-0 otherwise.
798 * Assumes vcpu_load() was already called.
799 */
800 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
801 {
802 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
803 }
804
805 /*
806 * Adapt set_msr() to msr_io()'s calling convention
807 */
808 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
809 {
810 return kvm_set_msr(vcpu, index, *data);
811 }
812
813 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
814 {
815 int version;
816 int r;
817 struct pvclock_wall_clock wc;
818 struct timespec boot;
819
820 if (!wall_clock)
821 return;
822
823 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
824 if (r)
825 return;
826
827 if (version & 1)
828 ++version; /* first time write, random junk */
829
830 ++version;
831
832 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
833
834 /*
835 * The guest calculates current wall clock time by adding
836 * system time (updated by kvm_write_guest_time below) to the
837 * wall clock specified here. guest system time equals host
838 * system time for us, thus we must fill in host boot time here.
839 */
840 getboottime(&boot);
841
842 wc.sec = boot.tv_sec;
843 wc.nsec = boot.tv_nsec;
844 wc.version = version;
845
846 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
847
848 version++;
849 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
850 }
851
852 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
853 {
854 uint32_t quotient, remainder;
855
856 /* Don't try to replace with do_div(), this one calculates
857 * "(dividend << 32) / divisor" */
858 __asm__ ( "divl %4"
859 : "=a" (quotient), "=d" (remainder)
860 : "0" (0), "1" (dividend), "r" (divisor) );
861 return quotient;
862 }
863
864 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
865 {
866 uint64_t nsecs = 1000000000LL;
867 int32_t shift = 0;
868 uint64_t tps64;
869 uint32_t tps32;
870
871 tps64 = tsc_khz * 1000LL;
872 while (tps64 > nsecs*2) {
873 tps64 >>= 1;
874 shift--;
875 }
876
877 tps32 = (uint32_t)tps64;
878 while (tps32 <= (uint32_t)nsecs) {
879 tps32 <<= 1;
880 shift++;
881 }
882
883 hv_clock->tsc_shift = shift;
884 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
885
886 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
887 __func__, tsc_khz, hv_clock->tsc_shift,
888 hv_clock->tsc_to_system_mul);
889 }
890
891 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
892
893 static void kvm_write_guest_time(struct kvm_vcpu *v)
894 {
895 struct timespec ts;
896 unsigned long flags;
897 struct kvm_vcpu_arch *vcpu = &v->arch;
898 void *shared_kaddr;
899 unsigned long this_tsc_khz;
900
901 if ((!vcpu->time_page))
902 return;
903
904 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
905 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
906 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
907 vcpu->hv_clock_tsc_khz = this_tsc_khz;
908 }
909 put_cpu_var(cpu_tsc_khz);
910
911 /* Keep irq disabled to prevent changes to the clock */
912 local_irq_save(flags);
913 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
914 ktime_get_ts(&ts);
915 monotonic_to_bootbased(&ts);
916 local_irq_restore(flags);
917
918 /* With all the info we got, fill in the values */
919
920 vcpu->hv_clock.system_time = ts.tv_nsec +
921 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
922
923 vcpu->hv_clock.flags = 0;
924
925 /*
926 * The interface expects us to write an even number signaling that the
927 * update is finished. Since the guest won't see the intermediate
928 * state, we just increase by 2 at the end.
929 */
930 vcpu->hv_clock.version += 2;
931
932 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
933
934 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
935 sizeof(vcpu->hv_clock));
936
937 kunmap_atomic(shared_kaddr, KM_USER0);
938
939 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
940 }
941
942 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
943 {
944 struct kvm_vcpu_arch *vcpu = &v->arch;
945
946 if (!vcpu->time_page)
947 return 0;
948 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
949 return 1;
950 }
951
952 static bool msr_mtrr_valid(unsigned msr)
953 {
954 switch (msr) {
955 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
956 case MSR_MTRRfix64K_00000:
957 case MSR_MTRRfix16K_80000:
958 case MSR_MTRRfix16K_A0000:
959 case MSR_MTRRfix4K_C0000:
960 case MSR_MTRRfix4K_C8000:
961 case MSR_MTRRfix4K_D0000:
962 case MSR_MTRRfix4K_D8000:
963 case MSR_MTRRfix4K_E0000:
964 case MSR_MTRRfix4K_E8000:
965 case MSR_MTRRfix4K_F0000:
966 case MSR_MTRRfix4K_F8000:
967 case MSR_MTRRdefType:
968 case MSR_IA32_CR_PAT:
969 return true;
970 case 0x2f8:
971 return true;
972 }
973 return false;
974 }
975
976 static bool valid_pat_type(unsigned t)
977 {
978 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
979 }
980
981 static bool valid_mtrr_type(unsigned t)
982 {
983 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
984 }
985
986 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
987 {
988 int i;
989
990 if (!msr_mtrr_valid(msr))
991 return false;
992
993 if (msr == MSR_IA32_CR_PAT) {
994 for (i = 0; i < 8; i++)
995 if (!valid_pat_type((data >> (i * 8)) & 0xff))
996 return false;
997 return true;
998 } else if (msr == MSR_MTRRdefType) {
999 if (data & ~0xcff)
1000 return false;
1001 return valid_mtrr_type(data & 0xff);
1002 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1003 for (i = 0; i < 8 ; i++)
1004 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1005 return false;
1006 return true;
1007 }
1008
1009 /* variable MTRRs */
1010 return valid_mtrr_type(data & 0xff);
1011 }
1012
1013 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1014 {
1015 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1016
1017 if (!mtrr_valid(vcpu, msr, data))
1018 return 1;
1019
1020 if (msr == MSR_MTRRdefType) {
1021 vcpu->arch.mtrr_state.def_type = data;
1022 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1023 } else if (msr == MSR_MTRRfix64K_00000)
1024 p[0] = data;
1025 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1026 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1027 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1028 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1029 else if (msr == MSR_IA32_CR_PAT)
1030 vcpu->arch.pat = data;
1031 else { /* Variable MTRRs */
1032 int idx, is_mtrr_mask;
1033 u64 *pt;
1034
1035 idx = (msr - 0x200) / 2;
1036 is_mtrr_mask = msr - 0x200 - 2 * idx;
1037 if (!is_mtrr_mask)
1038 pt =
1039 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1040 else
1041 pt =
1042 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1043 *pt = data;
1044 }
1045
1046 kvm_mmu_reset_context(vcpu);
1047 return 0;
1048 }
1049
1050 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1051 {
1052 u64 mcg_cap = vcpu->arch.mcg_cap;
1053 unsigned bank_num = mcg_cap & 0xff;
1054
1055 switch (msr) {
1056 case MSR_IA32_MCG_STATUS:
1057 vcpu->arch.mcg_status = data;
1058 break;
1059 case MSR_IA32_MCG_CTL:
1060 if (!(mcg_cap & MCG_CTL_P))
1061 return 1;
1062 if (data != 0 && data != ~(u64)0)
1063 return -1;
1064 vcpu->arch.mcg_ctl = data;
1065 break;
1066 default:
1067 if (msr >= MSR_IA32_MC0_CTL &&
1068 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1069 u32 offset = msr - MSR_IA32_MC0_CTL;
1070 if ((offset & 0x3) == 0 &&
1071 data != 0 && (data | (1 << 10)) != ~(u64)0)
1072 return -1;
1073 vcpu->arch.mce_banks[offset] = data;
1074 break;
1075 }
1076 return 1;
1077 }
1078 return 0;
1079 }
1080
1081 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1082 {
1083 struct kvm *kvm = vcpu->kvm;
1084 int lm = is_long_mode(vcpu);
1085 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1086 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1087 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1088 : kvm->arch.xen_hvm_config.blob_size_32;
1089 u32 page_num = data & ~PAGE_MASK;
1090 u64 page_addr = data & PAGE_MASK;
1091 u8 *page;
1092 int r;
1093
1094 r = -E2BIG;
1095 if (page_num >= blob_size)
1096 goto out;
1097 r = -ENOMEM;
1098 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1099 if (!page)
1100 goto out;
1101 r = -EFAULT;
1102 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1103 goto out_free;
1104 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1105 goto out_free;
1106 r = 0;
1107 out_free:
1108 kfree(page);
1109 out:
1110 return r;
1111 }
1112
1113 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1114 {
1115 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1116 }
1117
1118 static bool kvm_hv_msr_partition_wide(u32 msr)
1119 {
1120 bool r = false;
1121 switch (msr) {
1122 case HV_X64_MSR_GUEST_OS_ID:
1123 case HV_X64_MSR_HYPERCALL:
1124 r = true;
1125 break;
1126 }
1127
1128 return r;
1129 }
1130
1131 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1132 {
1133 struct kvm *kvm = vcpu->kvm;
1134
1135 switch (msr) {
1136 case HV_X64_MSR_GUEST_OS_ID:
1137 kvm->arch.hv_guest_os_id = data;
1138 /* setting guest os id to zero disables hypercall page */
1139 if (!kvm->arch.hv_guest_os_id)
1140 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1141 break;
1142 case HV_X64_MSR_HYPERCALL: {
1143 u64 gfn;
1144 unsigned long addr;
1145 u8 instructions[4];
1146
1147 /* if guest os id is not set hypercall should remain disabled */
1148 if (!kvm->arch.hv_guest_os_id)
1149 break;
1150 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1151 kvm->arch.hv_hypercall = data;
1152 break;
1153 }
1154 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1155 addr = gfn_to_hva(kvm, gfn);
1156 if (kvm_is_error_hva(addr))
1157 return 1;
1158 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1159 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1160 if (copy_to_user((void __user *)addr, instructions, 4))
1161 return 1;
1162 kvm->arch.hv_hypercall = data;
1163 break;
1164 }
1165 default:
1166 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1167 "data 0x%llx\n", msr, data);
1168 return 1;
1169 }
1170 return 0;
1171 }
1172
1173 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1174 {
1175 switch (msr) {
1176 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1177 unsigned long addr;
1178
1179 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1180 vcpu->arch.hv_vapic = data;
1181 break;
1182 }
1183 addr = gfn_to_hva(vcpu->kvm, data >>
1184 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1185 if (kvm_is_error_hva(addr))
1186 return 1;
1187 if (clear_user((void __user *)addr, PAGE_SIZE))
1188 return 1;
1189 vcpu->arch.hv_vapic = data;
1190 break;
1191 }
1192 case HV_X64_MSR_EOI:
1193 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1194 case HV_X64_MSR_ICR:
1195 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1196 case HV_X64_MSR_TPR:
1197 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1198 default:
1199 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1200 "data 0x%llx\n", msr, data);
1201 return 1;
1202 }
1203
1204 return 0;
1205 }
1206
1207 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1208 {
1209 switch (msr) {
1210 case MSR_EFER:
1211 return set_efer(vcpu, data);
1212 case MSR_K7_HWCR:
1213 data &= ~(u64)0x40; /* ignore flush filter disable */
1214 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1215 if (data != 0) {
1216 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1217 data);
1218 return 1;
1219 }
1220 break;
1221 case MSR_FAM10H_MMIO_CONF_BASE:
1222 if (data != 0) {
1223 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1224 "0x%llx\n", data);
1225 return 1;
1226 }
1227 break;
1228 case MSR_AMD64_NB_CFG:
1229 break;
1230 case MSR_IA32_DEBUGCTLMSR:
1231 if (!data) {
1232 /* We support the non-activated case already */
1233 break;
1234 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1235 /* Values other than LBR and BTF are vendor-specific,
1236 thus reserved and should throw a #GP */
1237 return 1;
1238 }
1239 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1240 __func__, data);
1241 break;
1242 case MSR_IA32_UCODE_REV:
1243 case MSR_IA32_UCODE_WRITE:
1244 case MSR_VM_HSAVE_PA:
1245 case MSR_AMD64_PATCH_LOADER:
1246 break;
1247 case 0x200 ... 0x2ff:
1248 return set_msr_mtrr(vcpu, msr, data);
1249 case MSR_IA32_APICBASE:
1250 kvm_set_apic_base(vcpu, data);
1251 break;
1252 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1253 return kvm_x2apic_msr_write(vcpu, msr, data);
1254 case MSR_IA32_MISC_ENABLE:
1255 vcpu->arch.ia32_misc_enable_msr = data;
1256 break;
1257 case MSR_KVM_WALL_CLOCK_NEW:
1258 case MSR_KVM_WALL_CLOCK:
1259 vcpu->kvm->arch.wall_clock = data;
1260 kvm_write_wall_clock(vcpu->kvm, data);
1261 break;
1262 case MSR_KVM_SYSTEM_TIME_NEW:
1263 case MSR_KVM_SYSTEM_TIME: {
1264 if (vcpu->arch.time_page) {
1265 kvm_release_page_dirty(vcpu->arch.time_page);
1266 vcpu->arch.time_page = NULL;
1267 }
1268
1269 vcpu->arch.time = data;
1270
1271 /* we verify if the enable bit is set... */
1272 if (!(data & 1))
1273 break;
1274
1275 /* ...but clean it before doing the actual write */
1276 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1277
1278 vcpu->arch.time_page =
1279 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1280
1281 if (is_error_page(vcpu->arch.time_page)) {
1282 kvm_release_page_clean(vcpu->arch.time_page);
1283 vcpu->arch.time_page = NULL;
1284 }
1285
1286 kvm_request_guest_time_update(vcpu);
1287 break;
1288 }
1289 case MSR_IA32_MCG_CTL:
1290 case MSR_IA32_MCG_STATUS:
1291 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1292 return set_msr_mce(vcpu, msr, data);
1293
1294 /* Performance counters are not protected by a CPUID bit,
1295 * so we should check all of them in the generic path for the sake of
1296 * cross vendor migration.
1297 * Writing a zero into the event select MSRs disables them,
1298 * which we perfectly emulate ;-). Any other value should be at least
1299 * reported, some guests depend on them.
1300 */
1301 case MSR_P6_EVNTSEL0:
1302 case MSR_P6_EVNTSEL1:
1303 case MSR_K7_EVNTSEL0:
1304 case MSR_K7_EVNTSEL1:
1305 case MSR_K7_EVNTSEL2:
1306 case MSR_K7_EVNTSEL3:
1307 if (data != 0)
1308 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1309 "0x%x data 0x%llx\n", msr, data);
1310 break;
1311 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1312 * so we ignore writes to make it happy.
1313 */
1314 case MSR_P6_PERFCTR0:
1315 case MSR_P6_PERFCTR1:
1316 case MSR_K7_PERFCTR0:
1317 case MSR_K7_PERFCTR1:
1318 case MSR_K7_PERFCTR2:
1319 case MSR_K7_PERFCTR3:
1320 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1321 "0x%x data 0x%llx\n", msr, data);
1322 break;
1323 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1324 if (kvm_hv_msr_partition_wide(msr)) {
1325 int r;
1326 mutex_lock(&vcpu->kvm->lock);
1327 r = set_msr_hyperv_pw(vcpu, msr, data);
1328 mutex_unlock(&vcpu->kvm->lock);
1329 return r;
1330 } else
1331 return set_msr_hyperv(vcpu, msr, data);
1332 break;
1333 default:
1334 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1335 return xen_hvm_config(vcpu, data);
1336 if (!ignore_msrs) {
1337 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1338 msr, data);
1339 return 1;
1340 } else {
1341 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1342 msr, data);
1343 break;
1344 }
1345 }
1346 return 0;
1347 }
1348 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1349
1350
1351 /*
1352 * Reads an msr value (of 'msr_index') into 'pdata'.
1353 * Returns 0 on success, non-0 otherwise.
1354 * Assumes vcpu_load() was already called.
1355 */
1356 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1357 {
1358 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1359 }
1360
1361 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1362 {
1363 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1364
1365 if (!msr_mtrr_valid(msr))
1366 return 1;
1367
1368 if (msr == MSR_MTRRdefType)
1369 *pdata = vcpu->arch.mtrr_state.def_type +
1370 (vcpu->arch.mtrr_state.enabled << 10);
1371 else if (msr == MSR_MTRRfix64K_00000)
1372 *pdata = p[0];
1373 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1374 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1375 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1376 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1377 else if (msr == MSR_IA32_CR_PAT)
1378 *pdata = vcpu->arch.pat;
1379 else { /* Variable MTRRs */
1380 int idx, is_mtrr_mask;
1381 u64 *pt;
1382
1383 idx = (msr - 0x200) / 2;
1384 is_mtrr_mask = msr - 0x200 - 2 * idx;
1385 if (!is_mtrr_mask)
1386 pt =
1387 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1388 else
1389 pt =
1390 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1391 *pdata = *pt;
1392 }
1393
1394 return 0;
1395 }
1396
1397 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1398 {
1399 u64 data;
1400 u64 mcg_cap = vcpu->arch.mcg_cap;
1401 unsigned bank_num = mcg_cap & 0xff;
1402
1403 switch (msr) {
1404 case MSR_IA32_P5_MC_ADDR:
1405 case MSR_IA32_P5_MC_TYPE:
1406 data = 0;
1407 break;
1408 case MSR_IA32_MCG_CAP:
1409 data = vcpu->arch.mcg_cap;
1410 break;
1411 case MSR_IA32_MCG_CTL:
1412 if (!(mcg_cap & MCG_CTL_P))
1413 return 1;
1414 data = vcpu->arch.mcg_ctl;
1415 break;
1416 case MSR_IA32_MCG_STATUS:
1417 data = vcpu->arch.mcg_status;
1418 break;
1419 default:
1420 if (msr >= MSR_IA32_MC0_CTL &&
1421 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1422 u32 offset = msr - MSR_IA32_MC0_CTL;
1423 data = vcpu->arch.mce_banks[offset];
1424 break;
1425 }
1426 return 1;
1427 }
1428 *pdata = data;
1429 return 0;
1430 }
1431
1432 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1433 {
1434 u64 data = 0;
1435 struct kvm *kvm = vcpu->kvm;
1436
1437 switch (msr) {
1438 case HV_X64_MSR_GUEST_OS_ID:
1439 data = kvm->arch.hv_guest_os_id;
1440 break;
1441 case HV_X64_MSR_HYPERCALL:
1442 data = kvm->arch.hv_hypercall;
1443 break;
1444 default:
1445 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1446 return 1;
1447 }
1448
1449 *pdata = data;
1450 return 0;
1451 }
1452
1453 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1454 {
1455 u64 data = 0;
1456
1457 switch (msr) {
1458 case HV_X64_MSR_VP_INDEX: {
1459 int r;
1460 struct kvm_vcpu *v;
1461 kvm_for_each_vcpu(r, v, vcpu->kvm)
1462 if (v == vcpu)
1463 data = r;
1464 break;
1465 }
1466 case HV_X64_MSR_EOI:
1467 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1468 case HV_X64_MSR_ICR:
1469 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1470 case HV_X64_MSR_TPR:
1471 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1472 default:
1473 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1474 return 1;
1475 }
1476 *pdata = data;
1477 return 0;
1478 }
1479
1480 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1481 {
1482 u64 data;
1483
1484 switch (msr) {
1485 case MSR_IA32_PLATFORM_ID:
1486 case MSR_IA32_UCODE_REV:
1487 case MSR_IA32_EBL_CR_POWERON:
1488 case MSR_IA32_DEBUGCTLMSR:
1489 case MSR_IA32_LASTBRANCHFROMIP:
1490 case MSR_IA32_LASTBRANCHTOIP:
1491 case MSR_IA32_LASTINTFROMIP:
1492 case MSR_IA32_LASTINTTOIP:
1493 case MSR_K8_SYSCFG:
1494 case MSR_K7_HWCR:
1495 case MSR_VM_HSAVE_PA:
1496 case MSR_P6_PERFCTR0:
1497 case MSR_P6_PERFCTR1:
1498 case MSR_P6_EVNTSEL0:
1499 case MSR_P6_EVNTSEL1:
1500 case MSR_K7_EVNTSEL0:
1501 case MSR_K7_PERFCTR0:
1502 case MSR_K8_INT_PENDING_MSG:
1503 case MSR_AMD64_NB_CFG:
1504 case MSR_FAM10H_MMIO_CONF_BASE:
1505 data = 0;
1506 break;
1507 case MSR_MTRRcap:
1508 data = 0x500 | KVM_NR_VAR_MTRR;
1509 break;
1510 case 0x200 ... 0x2ff:
1511 return get_msr_mtrr(vcpu, msr, pdata);
1512 case 0xcd: /* fsb frequency */
1513 data = 3;
1514 break;
1515 case MSR_IA32_APICBASE:
1516 data = kvm_get_apic_base(vcpu);
1517 break;
1518 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1519 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1520 break;
1521 case MSR_IA32_MISC_ENABLE:
1522 data = vcpu->arch.ia32_misc_enable_msr;
1523 break;
1524 case MSR_IA32_PERF_STATUS:
1525 /* TSC increment by tick */
1526 data = 1000ULL;
1527 /* CPU multiplier */
1528 data |= (((uint64_t)4ULL) << 40);
1529 break;
1530 case MSR_EFER:
1531 data = vcpu->arch.efer;
1532 break;
1533 case MSR_KVM_WALL_CLOCK:
1534 case MSR_KVM_WALL_CLOCK_NEW:
1535 data = vcpu->kvm->arch.wall_clock;
1536 break;
1537 case MSR_KVM_SYSTEM_TIME:
1538 case MSR_KVM_SYSTEM_TIME_NEW:
1539 data = vcpu->arch.time;
1540 break;
1541 case MSR_IA32_P5_MC_ADDR:
1542 case MSR_IA32_P5_MC_TYPE:
1543 case MSR_IA32_MCG_CAP:
1544 case MSR_IA32_MCG_CTL:
1545 case MSR_IA32_MCG_STATUS:
1546 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1547 return get_msr_mce(vcpu, msr, pdata);
1548 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1549 if (kvm_hv_msr_partition_wide(msr)) {
1550 int r;
1551 mutex_lock(&vcpu->kvm->lock);
1552 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1553 mutex_unlock(&vcpu->kvm->lock);
1554 return r;
1555 } else
1556 return get_msr_hyperv(vcpu, msr, pdata);
1557 break;
1558 default:
1559 if (!ignore_msrs) {
1560 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1561 return 1;
1562 } else {
1563 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1564 data = 0;
1565 }
1566 break;
1567 }
1568 *pdata = data;
1569 return 0;
1570 }
1571 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1572
1573 /*
1574 * Read or write a bunch of msrs. All parameters are kernel addresses.
1575 *
1576 * @return number of msrs set successfully.
1577 */
1578 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1579 struct kvm_msr_entry *entries,
1580 int (*do_msr)(struct kvm_vcpu *vcpu,
1581 unsigned index, u64 *data))
1582 {
1583 int i, idx;
1584
1585 idx = srcu_read_lock(&vcpu->kvm->srcu);
1586 for (i = 0; i < msrs->nmsrs; ++i)
1587 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1588 break;
1589 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1590
1591 return i;
1592 }
1593
1594 /*
1595 * Read or write a bunch of msrs. Parameters are user addresses.
1596 *
1597 * @return number of msrs set successfully.
1598 */
1599 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1600 int (*do_msr)(struct kvm_vcpu *vcpu,
1601 unsigned index, u64 *data),
1602 int writeback)
1603 {
1604 struct kvm_msrs msrs;
1605 struct kvm_msr_entry *entries;
1606 int r, n;
1607 unsigned size;
1608
1609 r = -EFAULT;
1610 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1611 goto out;
1612
1613 r = -E2BIG;
1614 if (msrs.nmsrs >= MAX_IO_MSRS)
1615 goto out;
1616
1617 r = -ENOMEM;
1618 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1619 entries = kmalloc(size, GFP_KERNEL);
1620 if (!entries)
1621 goto out;
1622
1623 r = -EFAULT;
1624 if (copy_from_user(entries, user_msrs->entries, size))
1625 goto out_free;
1626
1627 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1628 if (r < 0)
1629 goto out_free;
1630
1631 r = -EFAULT;
1632 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1633 goto out_free;
1634
1635 r = n;
1636
1637 out_free:
1638 kfree(entries);
1639 out:
1640 return r;
1641 }
1642
1643 int kvm_dev_ioctl_check_extension(long ext)
1644 {
1645 int r;
1646
1647 switch (ext) {
1648 case KVM_CAP_IRQCHIP:
1649 case KVM_CAP_HLT:
1650 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1651 case KVM_CAP_SET_TSS_ADDR:
1652 case KVM_CAP_EXT_CPUID:
1653 case KVM_CAP_CLOCKSOURCE:
1654 case KVM_CAP_PIT:
1655 case KVM_CAP_NOP_IO_DELAY:
1656 case KVM_CAP_MP_STATE:
1657 case KVM_CAP_SYNC_MMU:
1658 case KVM_CAP_REINJECT_CONTROL:
1659 case KVM_CAP_IRQ_INJECT_STATUS:
1660 case KVM_CAP_ASSIGN_DEV_IRQ:
1661 case KVM_CAP_IRQFD:
1662 case KVM_CAP_IOEVENTFD:
1663 case KVM_CAP_PIT2:
1664 case KVM_CAP_PIT_STATE2:
1665 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1666 case KVM_CAP_XEN_HVM:
1667 case KVM_CAP_ADJUST_CLOCK:
1668 case KVM_CAP_VCPU_EVENTS:
1669 case KVM_CAP_HYPERV:
1670 case KVM_CAP_HYPERV_VAPIC:
1671 case KVM_CAP_HYPERV_SPIN:
1672 case KVM_CAP_PCI_SEGMENT:
1673 case KVM_CAP_DEBUGREGS:
1674 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1675 case KVM_CAP_XSAVE:
1676 r = 1;
1677 break;
1678 case KVM_CAP_COALESCED_MMIO:
1679 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1680 break;
1681 case KVM_CAP_VAPIC:
1682 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1683 break;
1684 case KVM_CAP_NR_VCPUS:
1685 r = KVM_MAX_VCPUS;
1686 break;
1687 case KVM_CAP_NR_MEMSLOTS:
1688 r = KVM_MEMORY_SLOTS;
1689 break;
1690 case KVM_CAP_PV_MMU: /* obsolete */
1691 r = 0;
1692 break;
1693 case KVM_CAP_IOMMU:
1694 r = iommu_found();
1695 break;
1696 case KVM_CAP_MCE:
1697 r = KVM_MAX_MCE_BANKS;
1698 break;
1699 case KVM_CAP_XCRS:
1700 r = cpu_has_xsave;
1701 break;
1702 default:
1703 r = 0;
1704 break;
1705 }
1706 return r;
1707
1708 }
1709
1710 long kvm_arch_dev_ioctl(struct file *filp,
1711 unsigned int ioctl, unsigned long arg)
1712 {
1713 void __user *argp = (void __user *)arg;
1714 long r;
1715
1716 switch (ioctl) {
1717 case KVM_GET_MSR_INDEX_LIST: {
1718 struct kvm_msr_list __user *user_msr_list = argp;
1719 struct kvm_msr_list msr_list;
1720 unsigned n;
1721
1722 r = -EFAULT;
1723 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1724 goto out;
1725 n = msr_list.nmsrs;
1726 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1727 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1728 goto out;
1729 r = -E2BIG;
1730 if (n < msr_list.nmsrs)
1731 goto out;
1732 r = -EFAULT;
1733 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1734 num_msrs_to_save * sizeof(u32)))
1735 goto out;
1736 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1737 &emulated_msrs,
1738 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1739 goto out;
1740 r = 0;
1741 break;
1742 }
1743 case KVM_GET_SUPPORTED_CPUID: {
1744 struct kvm_cpuid2 __user *cpuid_arg = argp;
1745 struct kvm_cpuid2 cpuid;
1746
1747 r = -EFAULT;
1748 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1749 goto out;
1750 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1751 cpuid_arg->entries);
1752 if (r)
1753 goto out;
1754
1755 r = -EFAULT;
1756 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1757 goto out;
1758 r = 0;
1759 break;
1760 }
1761 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1762 u64 mce_cap;
1763
1764 mce_cap = KVM_MCE_CAP_SUPPORTED;
1765 r = -EFAULT;
1766 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1767 goto out;
1768 r = 0;
1769 break;
1770 }
1771 default:
1772 r = -EINVAL;
1773 }
1774 out:
1775 return r;
1776 }
1777
1778 static void wbinvd_ipi(void *garbage)
1779 {
1780 wbinvd();
1781 }
1782
1783 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
1784 {
1785 return vcpu->kvm->arch.iommu_domain &&
1786 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
1787 }
1788
1789 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1790 {
1791 /* Address WBINVD may be executed by guest */
1792 if (need_emulate_wbinvd(vcpu)) {
1793 if (kvm_x86_ops->has_wbinvd_exit())
1794 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
1795 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
1796 smp_call_function_single(vcpu->cpu,
1797 wbinvd_ipi, NULL, 1);
1798 }
1799
1800 kvm_x86_ops->vcpu_load(vcpu, cpu);
1801 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1802 unsigned long khz = cpufreq_quick_get(cpu);
1803 if (!khz)
1804 khz = tsc_khz;
1805 per_cpu(cpu_tsc_khz, cpu) = khz;
1806 }
1807 kvm_request_guest_time_update(vcpu);
1808 }
1809
1810 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1811 {
1812 kvm_x86_ops->vcpu_put(vcpu);
1813 kvm_put_guest_fpu(vcpu);
1814 }
1815
1816 static int is_efer_nx(void)
1817 {
1818 unsigned long long efer = 0;
1819
1820 rdmsrl_safe(MSR_EFER, &efer);
1821 return efer & EFER_NX;
1822 }
1823
1824 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1825 {
1826 int i;
1827 struct kvm_cpuid_entry2 *e, *entry;
1828
1829 entry = NULL;
1830 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1831 e = &vcpu->arch.cpuid_entries[i];
1832 if (e->function == 0x80000001) {
1833 entry = e;
1834 break;
1835 }
1836 }
1837 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1838 entry->edx &= ~(1 << 20);
1839 printk(KERN_INFO "kvm: guest NX capability removed\n");
1840 }
1841 }
1842
1843 /* when an old userspace process fills a new kernel module */
1844 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1845 struct kvm_cpuid *cpuid,
1846 struct kvm_cpuid_entry __user *entries)
1847 {
1848 int r, i;
1849 struct kvm_cpuid_entry *cpuid_entries;
1850
1851 r = -E2BIG;
1852 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1853 goto out;
1854 r = -ENOMEM;
1855 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1856 if (!cpuid_entries)
1857 goto out;
1858 r = -EFAULT;
1859 if (copy_from_user(cpuid_entries, entries,
1860 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1861 goto out_free;
1862 for (i = 0; i < cpuid->nent; i++) {
1863 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1864 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1865 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1866 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1867 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1868 vcpu->arch.cpuid_entries[i].index = 0;
1869 vcpu->arch.cpuid_entries[i].flags = 0;
1870 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1871 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1872 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1873 }
1874 vcpu->arch.cpuid_nent = cpuid->nent;
1875 cpuid_fix_nx_cap(vcpu);
1876 r = 0;
1877 kvm_apic_set_version(vcpu);
1878 kvm_x86_ops->cpuid_update(vcpu);
1879 update_cpuid(vcpu);
1880
1881 out_free:
1882 vfree(cpuid_entries);
1883 out:
1884 return r;
1885 }
1886
1887 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1888 struct kvm_cpuid2 *cpuid,
1889 struct kvm_cpuid_entry2 __user *entries)
1890 {
1891 int r;
1892
1893 r = -E2BIG;
1894 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1895 goto out;
1896 r = -EFAULT;
1897 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1898 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1899 goto out;
1900 vcpu->arch.cpuid_nent = cpuid->nent;
1901 kvm_apic_set_version(vcpu);
1902 kvm_x86_ops->cpuid_update(vcpu);
1903 update_cpuid(vcpu);
1904 return 0;
1905
1906 out:
1907 return r;
1908 }
1909
1910 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1911 struct kvm_cpuid2 *cpuid,
1912 struct kvm_cpuid_entry2 __user *entries)
1913 {
1914 int r;
1915
1916 r = -E2BIG;
1917 if (cpuid->nent < vcpu->arch.cpuid_nent)
1918 goto out;
1919 r = -EFAULT;
1920 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1921 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1922 goto out;
1923 return 0;
1924
1925 out:
1926 cpuid->nent = vcpu->arch.cpuid_nent;
1927 return r;
1928 }
1929
1930 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1931 u32 index)
1932 {
1933 entry->function = function;
1934 entry->index = index;
1935 cpuid_count(entry->function, entry->index,
1936 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1937 entry->flags = 0;
1938 }
1939
1940 #define F(x) bit(X86_FEATURE_##x)
1941
1942 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1943 u32 index, int *nent, int maxnent)
1944 {
1945 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1946 #ifdef CONFIG_X86_64
1947 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1948 ? F(GBPAGES) : 0;
1949 unsigned f_lm = F(LM);
1950 #else
1951 unsigned f_gbpages = 0;
1952 unsigned f_lm = 0;
1953 #endif
1954 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1955
1956 /* cpuid 1.edx */
1957 const u32 kvm_supported_word0_x86_features =
1958 F(FPU) | F(VME) | F(DE) | F(PSE) |
1959 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1960 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1961 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1962 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1963 0 /* Reserved, DS, ACPI */ | F(MMX) |
1964 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1965 0 /* HTT, TM, Reserved, PBE */;
1966 /* cpuid 0x80000001.edx */
1967 const u32 kvm_supported_word1_x86_features =
1968 F(FPU) | F(VME) | F(DE) | F(PSE) |
1969 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1970 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1971 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1972 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1973 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1974 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1975 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1976 /* cpuid 1.ecx */
1977 const u32 kvm_supported_word4_x86_features =
1978 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
1979 0 /* DS-CPL, VMX, SMX, EST */ |
1980 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1981 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1982 0 /* Reserved, DCA */ | F(XMM4_1) |
1983 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1984 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);
1985 /* cpuid 0x80000001.ecx */
1986 const u32 kvm_supported_word6_x86_features =
1987 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
1988 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1989 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
1990 0 /* SKINIT */ | 0 /* WDT */;
1991
1992 /* all calls to cpuid_count() should be made on the same cpu */
1993 get_cpu();
1994 do_cpuid_1_ent(entry, function, index);
1995 ++*nent;
1996
1997 switch (function) {
1998 case 0:
1999 entry->eax = min(entry->eax, (u32)0xd);
2000 break;
2001 case 1:
2002 entry->edx &= kvm_supported_word0_x86_features;
2003 entry->ecx &= kvm_supported_word4_x86_features;
2004 /* we support x2apic emulation even if host does not support
2005 * it since we emulate x2apic in software */
2006 entry->ecx |= F(X2APIC);
2007 break;
2008 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2009 * may return different values. This forces us to get_cpu() before
2010 * issuing the first command, and also to emulate this annoying behavior
2011 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2012 case 2: {
2013 int t, times = entry->eax & 0xff;
2014
2015 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2016 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2017 for (t = 1; t < times && *nent < maxnent; ++t) {
2018 do_cpuid_1_ent(&entry[t], function, 0);
2019 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2020 ++*nent;
2021 }
2022 break;
2023 }
2024 /* function 4 and 0xb have additional index. */
2025 case 4: {
2026 int i, cache_type;
2027
2028 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2029 /* read more entries until cache_type is zero */
2030 for (i = 1; *nent < maxnent; ++i) {
2031 cache_type = entry[i - 1].eax & 0x1f;
2032 if (!cache_type)
2033 break;
2034 do_cpuid_1_ent(&entry[i], function, i);
2035 entry[i].flags |=
2036 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2037 ++*nent;
2038 }
2039 break;
2040 }
2041 case 0xb: {
2042 int i, level_type;
2043
2044 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2045 /* read more entries until level_type is zero */
2046 for (i = 1; *nent < maxnent; ++i) {
2047 level_type = entry[i - 1].ecx & 0xff00;
2048 if (!level_type)
2049 break;
2050 do_cpuid_1_ent(&entry[i], function, i);
2051 entry[i].flags |=
2052 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2053 ++*nent;
2054 }
2055 break;
2056 }
2057 case 0xd: {
2058 int i;
2059
2060 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2061 for (i = 1; *nent < maxnent; ++i) {
2062 if (entry[i - 1].eax == 0 && i != 2)
2063 break;
2064 do_cpuid_1_ent(&entry[i], function, i);
2065 entry[i].flags |=
2066 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2067 ++*nent;
2068 }
2069 break;
2070 }
2071 case KVM_CPUID_SIGNATURE: {
2072 char signature[12] = "KVMKVMKVM\0\0";
2073 u32 *sigptr = (u32 *)signature;
2074 entry->eax = 0;
2075 entry->ebx = sigptr[0];
2076 entry->ecx = sigptr[1];
2077 entry->edx = sigptr[2];
2078 break;
2079 }
2080 case KVM_CPUID_FEATURES:
2081 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2082 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2083 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2084 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2085 entry->ebx = 0;
2086 entry->ecx = 0;
2087 entry->edx = 0;
2088 break;
2089 case 0x80000000:
2090 entry->eax = min(entry->eax, 0x8000001a);
2091 break;
2092 case 0x80000001:
2093 entry->edx &= kvm_supported_word1_x86_features;
2094 entry->ecx &= kvm_supported_word6_x86_features;
2095 break;
2096 }
2097
2098 kvm_x86_ops->set_supported_cpuid(function, entry);
2099
2100 put_cpu();
2101 }
2102
2103 #undef F
2104
2105 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2106 struct kvm_cpuid_entry2 __user *entries)
2107 {
2108 struct kvm_cpuid_entry2 *cpuid_entries;
2109 int limit, nent = 0, r = -E2BIG;
2110 u32 func;
2111
2112 if (cpuid->nent < 1)
2113 goto out;
2114 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2115 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2116 r = -ENOMEM;
2117 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2118 if (!cpuid_entries)
2119 goto out;
2120
2121 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2122 limit = cpuid_entries[0].eax;
2123 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2124 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2125 &nent, cpuid->nent);
2126 r = -E2BIG;
2127 if (nent >= cpuid->nent)
2128 goto out_free;
2129
2130 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2131 limit = cpuid_entries[nent - 1].eax;
2132 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2133 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2134 &nent, cpuid->nent);
2135
2136
2137
2138 r = -E2BIG;
2139 if (nent >= cpuid->nent)
2140 goto out_free;
2141
2142 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2143 cpuid->nent);
2144
2145 r = -E2BIG;
2146 if (nent >= cpuid->nent)
2147 goto out_free;
2148
2149 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2150 cpuid->nent);
2151
2152 r = -E2BIG;
2153 if (nent >= cpuid->nent)
2154 goto out_free;
2155
2156 r = -EFAULT;
2157 if (copy_to_user(entries, cpuid_entries,
2158 nent * sizeof(struct kvm_cpuid_entry2)))
2159 goto out_free;
2160 cpuid->nent = nent;
2161 r = 0;
2162
2163 out_free:
2164 vfree(cpuid_entries);
2165 out:
2166 return r;
2167 }
2168
2169 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2170 struct kvm_lapic_state *s)
2171 {
2172 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2173
2174 return 0;
2175 }
2176
2177 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2178 struct kvm_lapic_state *s)
2179 {
2180 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2181 kvm_apic_post_state_restore(vcpu);
2182 update_cr8_intercept(vcpu);
2183
2184 return 0;
2185 }
2186
2187 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2188 struct kvm_interrupt *irq)
2189 {
2190 if (irq->irq < 0 || irq->irq >= 256)
2191 return -EINVAL;
2192 if (irqchip_in_kernel(vcpu->kvm))
2193 return -ENXIO;
2194
2195 kvm_queue_interrupt(vcpu, irq->irq, false);
2196
2197 return 0;
2198 }
2199
2200 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2201 {
2202 kvm_inject_nmi(vcpu);
2203
2204 return 0;
2205 }
2206
2207 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2208 struct kvm_tpr_access_ctl *tac)
2209 {
2210 if (tac->flags)
2211 return -EINVAL;
2212 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2213 return 0;
2214 }
2215
2216 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2217 u64 mcg_cap)
2218 {
2219 int r;
2220 unsigned bank_num = mcg_cap & 0xff, bank;
2221
2222 r = -EINVAL;
2223 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2224 goto out;
2225 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2226 goto out;
2227 r = 0;
2228 vcpu->arch.mcg_cap = mcg_cap;
2229 /* Init IA32_MCG_CTL to all 1s */
2230 if (mcg_cap & MCG_CTL_P)
2231 vcpu->arch.mcg_ctl = ~(u64)0;
2232 /* Init IA32_MCi_CTL to all 1s */
2233 for (bank = 0; bank < bank_num; bank++)
2234 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2235 out:
2236 return r;
2237 }
2238
2239 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2240 struct kvm_x86_mce *mce)
2241 {
2242 u64 mcg_cap = vcpu->arch.mcg_cap;
2243 unsigned bank_num = mcg_cap & 0xff;
2244 u64 *banks = vcpu->arch.mce_banks;
2245
2246 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2247 return -EINVAL;
2248 /*
2249 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2250 * reporting is disabled
2251 */
2252 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2253 vcpu->arch.mcg_ctl != ~(u64)0)
2254 return 0;
2255 banks += 4 * mce->bank;
2256 /*
2257 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2258 * reporting is disabled for the bank
2259 */
2260 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2261 return 0;
2262 if (mce->status & MCI_STATUS_UC) {
2263 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2264 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2265 printk(KERN_DEBUG "kvm: set_mce: "
2266 "injects mce exception while "
2267 "previous one is in progress!\n");
2268 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2269 return 0;
2270 }
2271 if (banks[1] & MCI_STATUS_VAL)
2272 mce->status |= MCI_STATUS_OVER;
2273 banks[2] = mce->addr;
2274 banks[3] = mce->misc;
2275 vcpu->arch.mcg_status = mce->mcg_status;
2276 banks[1] = mce->status;
2277 kvm_queue_exception(vcpu, MC_VECTOR);
2278 } else if (!(banks[1] & MCI_STATUS_VAL)
2279 || !(banks[1] & MCI_STATUS_UC)) {
2280 if (banks[1] & MCI_STATUS_VAL)
2281 mce->status |= MCI_STATUS_OVER;
2282 banks[2] = mce->addr;
2283 banks[3] = mce->misc;
2284 banks[1] = mce->status;
2285 } else
2286 banks[1] |= MCI_STATUS_OVER;
2287 return 0;
2288 }
2289
2290 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2291 struct kvm_vcpu_events *events)
2292 {
2293 events->exception.injected =
2294 vcpu->arch.exception.pending &&
2295 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2296 events->exception.nr = vcpu->arch.exception.nr;
2297 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2298 events->exception.pad = 0;
2299 events->exception.error_code = vcpu->arch.exception.error_code;
2300
2301 events->interrupt.injected =
2302 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2303 events->interrupt.nr = vcpu->arch.interrupt.nr;
2304 events->interrupt.soft = 0;
2305 events->interrupt.shadow =
2306 kvm_x86_ops->get_interrupt_shadow(vcpu,
2307 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2308
2309 events->nmi.injected = vcpu->arch.nmi_injected;
2310 events->nmi.pending = vcpu->arch.nmi_pending;
2311 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2312 events->nmi.pad = 0;
2313
2314 events->sipi_vector = vcpu->arch.sipi_vector;
2315
2316 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2317 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2318 | KVM_VCPUEVENT_VALID_SHADOW);
2319 memset(&events->reserved, 0, sizeof(events->reserved));
2320 }
2321
2322 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2323 struct kvm_vcpu_events *events)
2324 {
2325 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2326 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2327 | KVM_VCPUEVENT_VALID_SHADOW))
2328 return -EINVAL;
2329
2330 vcpu->arch.exception.pending = events->exception.injected;
2331 vcpu->arch.exception.nr = events->exception.nr;
2332 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2333 vcpu->arch.exception.error_code = events->exception.error_code;
2334
2335 vcpu->arch.interrupt.pending = events->interrupt.injected;
2336 vcpu->arch.interrupt.nr = events->interrupt.nr;
2337 vcpu->arch.interrupt.soft = events->interrupt.soft;
2338 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2339 kvm_pic_clear_isr_ack(vcpu->kvm);
2340 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2341 kvm_x86_ops->set_interrupt_shadow(vcpu,
2342 events->interrupt.shadow);
2343
2344 vcpu->arch.nmi_injected = events->nmi.injected;
2345 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2346 vcpu->arch.nmi_pending = events->nmi.pending;
2347 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2348
2349 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2350 vcpu->arch.sipi_vector = events->sipi_vector;
2351
2352 return 0;
2353 }
2354
2355 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2356 struct kvm_debugregs *dbgregs)
2357 {
2358 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2359 dbgregs->dr6 = vcpu->arch.dr6;
2360 dbgregs->dr7 = vcpu->arch.dr7;
2361 dbgregs->flags = 0;
2362 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2363 }
2364
2365 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2366 struct kvm_debugregs *dbgregs)
2367 {
2368 if (dbgregs->flags)
2369 return -EINVAL;
2370
2371 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2372 vcpu->arch.dr6 = dbgregs->dr6;
2373 vcpu->arch.dr7 = dbgregs->dr7;
2374
2375 return 0;
2376 }
2377
2378 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2379 struct kvm_xsave *guest_xsave)
2380 {
2381 if (cpu_has_xsave)
2382 memcpy(guest_xsave->region,
2383 &vcpu->arch.guest_fpu.state->xsave,
2384 xstate_size);
2385 else {
2386 memcpy(guest_xsave->region,
2387 &vcpu->arch.guest_fpu.state->fxsave,
2388 sizeof(struct i387_fxsave_struct));
2389 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2390 XSTATE_FPSSE;
2391 }
2392 }
2393
2394 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2395 struct kvm_xsave *guest_xsave)
2396 {
2397 u64 xstate_bv =
2398 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2399
2400 if (cpu_has_xsave)
2401 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2402 guest_xsave->region, xstate_size);
2403 else {
2404 if (xstate_bv & ~XSTATE_FPSSE)
2405 return -EINVAL;
2406 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2407 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2408 }
2409 return 0;
2410 }
2411
2412 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2413 struct kvm_xcrs *guest_xcrs)
2414 {
2415 if (!cpu_has_xsave) {
2416 guest_xcrs->nr_xcrs = 0;
2417 return;
2418 }
2419
2420 guest_xcrs->nr_xcrs = 1;
2421 guest_xcrs->flags = 0;
2422 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2423 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2424 }
2425
2426 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2427 struct kvm_xcrs *guest_xcrs)
2428 {
2429 int i, r = 0;
2430
2431 if (!cpu_has_xsave)
2432 return -EINVAL;
2433
2434 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2435 return -EINVAL;
2436
2437 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2438 /* Only support XCR0 currently */
2439 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2440 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2441 guest_xcrs->xcrs[0].value);
2442 break;
2443 }
2444 if (r)
2445 r = -EINVAL;
2446 return r;
2447 }
2448
2449 long kvm_arch_vcpu_ioctl(struct file *filp,
2450 unsigned int ioctl, unsigned long arg)
2451 {
2452 struct kvm_vcpu *vcpu = filp->private_data;
2453 void __user *argp = (void __user *)arg;
2454 int r;
2455 union {
2456 struct kvm_lapic_state *lapic;
2457 struct kvm_xsave *xsave;
2458 struct kvm_xcrs *xcrs;
2459 void *buffer;
2460 } u;
2461
2462 u.buffer = NULL;
2463 switch (ioctl) {
2464 case KVM_GET_LAPIC: {
2465 r = -EINVAL;
2466 if (!vcpu->arch.apic)
2467 goto out;
2468 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2469
2470 r = -ENOMEM;
2471 if (!u.lapic)
2472 goto out;
2473 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2474 if (r)
2475 goto out;
2476 r = -EFAULT;
2477 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2478 goto out;
2479 r = 0;
2480 break;
2481 }
2482 case KVM_SET_LAPIC: {
2483 r = -EINVAL;
2484 if (!vcpu->arch.apic)
2485 goto out;
2486 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2487 r = -ENOMEM;
2488 if (!u.lapic)
2489 goto out;
2490 r = -EFAULT;
2491 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2492 goto out;
2493 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2494 if (r)
2495 goto out;
2496 r = 0;
2497 break;
2498 }
2499 case KVM_INTERRUPT: {
2500 struct kvm_interrupt irq;
2501
2502 r = -EFAULT;
2503 if (copy_from_user(&irq, argp, sizeof irq))
2504 goto out;
2505 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2506 if (r)
2507 goto out;
2508 r = 0;
2509 break;
2510 }
2511 case KVM_NMI: {
2512 r = kvm_vcpu_ioctl_nmi(vcpu);
2513 if (r)
2514 goto out;
2515 r = 0;
2516 break;
2517 }
2518 case KVM_SET_CPUID: {
2519 struct kvm_cpuid __user *cpuid_arg = argp;
2520 struct kvm_cpuid cpuid;
2521
2522 r = -EFAULT;
2523 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2524 goto out;
2525 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2526 if (r)
2527 goto out;
2528 break;
2529 }
2530 case KVM_SET_CPUID2: {
2531 struct kvm_cpuid2 __user *cpuid_arg = argp;
2532 struct kvm_cpuid2 cpuid;
2533
2534 r = -EFAULT;
2535 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2536 goto out;
2537 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2538 cpuid_arg->entries);
2539 if (r)
2540 goto out;
2541 break;
2542 }
2543 case KVM_GET_CPUID2: {
2544 struct kvm_cpuid2 __user *cpuid_arg = argp;
2545 struct kvm_cpuid2 cpuid;
2546
2547 r = -EFAULT;
2548 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2549 goto out;
2550 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2551 cpuid_arg->entries);
2552 if (r)
2553 goto out;
2554 r = -EFAULT;
2555 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2556 goto out;
2557 r = 0;
2558 break;
2559 }
2560 case KVM_GET_MSRS:
2561 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2562 break;
2563 case KVM_SET_MSRS:
2564 r = msr_io(vcpu, argp, do_set_msr, 0);
2565 break;
2566 case KVM_TPR_ACCESS_REPORTING: {
2567 struct kvm_tpr_access_ctl tac;
2568
2569 r = -EFAULT;
2570 if (copy_from_user(&tac, argp, sizeof tac))
2571 goto out;
2572 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2573 if (r)
2574 goto out;
2575 r = -EFAULT;
2576 if (copy_to_user(argp, &tac, sizeof tac))
2577 goto out;
2578 r = 0;
2579 break;
2580 };
2581 case KVM_SET_VAPIC_ADDR: {
2582 struct kvm_vapic_addr va;
2583
2584 r = -EINVAL;
2585 if (!irqchip_in_kernel(vcpu->kvm))
2586 goto out;
2587 r = -EFAULT;
2588 if (copy_from_user(&va, argp, sizeof va))
2589 goto out;
2590 r = 0;
2591 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2592 break;
2593 }
2594 case KVM_X86_SETUP_MCE: {
2595 u64 mcg_cap;
2596
2597 r = -EFAULT;
2598 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2599 goto out;
2600 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2601 break;
2602 }
2603 case KVM_X86_SET_MCE: {
2604 struct kvm_x86_mce mce;
2605
2606 r = -EFAULT;
2607 if (copy_from_user(&mce, argp, sizeof mce))
2608 goto out;
2609 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2610 break;
2611 }
2612 case KVM_GET_VCPU_EVENTS: {
2613 struct kvm_vcpu_events events;
2614
2615 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2616
2617 r = -EFAULT;
2618 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2619 break;
2620 r = 0;
2621 break;
2622 }
2623 case KVM_SET_VCPU_EVENTS: {
2624 struct kvm_vcpu_events events;
2625
2626 r = -EFAULT;
2627 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2628 break;
2629
2630 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2631 break;
2632 }
2633 case KVM_GET_DEBUGREGS: {
2634 struct kvm_debugregs dbgregs;
2635
2636 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2637
2638 r = -EFAULT;
2639 if (copy_to_user(argp, &dbgregs,
2640 sizeof(struct kvm_debugregs)))
2641 break;
2642 r = 0;
2643 break;
2644 }
2645 case KVM_SET_DEBUGREGS: {
2646 struct kvm_debugregs dbgregs;
2647
2648 r = -EFAULT;
2649 if (copy_from_user(&dbgregs, argp,
2650 sizeof(struct kvm_debugregs)))
2651 break;
2652
2653 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2654 break;
2655 }
2656 case KVM_GET_XSAVE: {
2657 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2658 r = -ENOMEM;
2659 if (!u.xsave)
2660 break;
2661
2662 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2663
2664 r = -EFAULT;
2665 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2666 break;
2667 r = 0;
2668 break;
2669 }
2670 case KVM_SET_XSAVE: {
2671 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2672 r = -ENOMEM;
2673 if (!u.xsave)
2674 break;
2675
2676 r = -EFAULT;
2677 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2678 break;
2679
2680 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2681 break;
2682 }
2683 case KVM_GET_XCRS: {
2684 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2685 r = -ENOMEM;
2686 if (!u.xcrs)
2687 break;
2688
2689 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2690
2691 r = -EFAULT;
2692 if (copy_to_user(argp, u.xcrs,
2693 sizeof(struct kvm_xcrs)))
2694 break;
2695 r = 0;
2696 break;
2697 }
2698 case KVM_SET_XCRS: {
2699 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2700 r = -ENOMEM;
2701 if (!u.xcrs)
2702 break;
2703
2704 r = -EFAULT;
2705 if (copy_from_user(u.xcrs, argp,
2706 sizeof(struct kvm_xcrs)))
2707 break;
2708
2709 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2710 break;
2711 }
2712 default:
2713 r = -EINVAL;
2714 }
2715 out:
2716 kfree(u.buffer);
2717 return r;
2718 }
2719
2720 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2721 {
2722 int ret;
2723
2724 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2725 return -1;
2726 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2727 return ret;
2728 }
2729
2730 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2731 u64 ident_addr)
2732 {
2733 kvm->arch.ept_identity_map_addr = ident_addr;
2734 return 0;
2735 }
2736
2737 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2738 u32 kvm_nr_mmu_pages)
2739 {
2740 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2741 return -EINVAL;
2742
2743 mutex_lock(&kvm->slots_lock);
2744 spin_lock(&kvm->mmu_lock);
2745
2746 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2747 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2748
2749 spin_unlock(&kvm->mmu_lock);
2750 mutex_unlock(&kvm->slots_lock);
2751 return 0;
2752 }
2753
2754 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2755 {
2756 return kvm->arch.n_alloc_mmu_pages;
2757 }
2758
2759 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2760 {
2761 int r;
2762
2763 r = 0;
2764 switch (chip->chip_id) {
2765 case KVM_IRQCHIP_PIC_MASTER:
2766 memcpy(&chip->chip.pic,
2767 &pic_irqchip(kvm)->pics[0],
2768 sizeof(struct kvm_pic_state));
2769 break;
2770 case KVM_IRQCHIP_PIC_SLAVE:
2771 memcpy(&chip->chip.pic,
2772 &pic_irqchip(kvm)->pics[1],
2773 sizeof(struct kvm_pic_state));
2774 break;
2775 case KVM_IRQCHIP_IOAPIC:
2776 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2777 break;
2778 default:
2779 r = -EINVAL;
2780 break;
2781 }
2782 return r;
2783 }
2784
2785 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2786 {
2787 int r;
2788
2789 r = 0;
2790 switch (chip->chip_id) {
2791 case KVM_IRQCHIP_PIC_MASTER:
2792 raw_spin_lock(&pic_irqchip(kvm)->lock);
2793 memcpy(&pic_irqchip(kvm)->pics[0],
2794 &chip->chip.pic,
2795 sizeof(struct kvm_pic_state));
2796 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2797 break;
2798 case KVM_IRQCHIP_PIC_SLAVE:
2799 raw_spin_lock(&pic_irqchip(kvm)->lock);
2800 memcpy(&pic_irqchip(kvm)->pics[1],
2801 &chip->chip.pic,
2802 sizeof(struct kvm_pic_state));
2803 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2804 break;
2805 case KVM_IRQCHIP_IOAPIC:
2806 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2807 break;
2808 default:
2809 r = -EINVAL;
2810 break;
2811 }
2812 kvm_pic_update_irq(pic_irqchip(kvm));
2813 return r;
2814 }
2815
2816 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2817 {
2818 int r = 0;
2819
2820 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2821 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2822 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2823 return r;
2824 }
2825
2826 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2827 {
2828 int r = 0;
2829
2830 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2831 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2832 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2833 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2834 return r;
2835 }
2836
2837 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2838 {
2839 int r = 0;
2840
2841 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2842 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2843 sizeof(ps->channels));
2844 ps->flags = kvm->arch.vpit->pit_state.flags;
2845 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2846 memset(&ps->reserved, 0, sizeof(ps->reserved));
2847 return r;
2848 }
2849
2850 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2851 {
2852 int r = 0, start = 0;
2853 u32 prev_legacy, cur_legacy;
2854 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2855 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2856 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2857 if (!prev_legacy && cur_legacy)
2858 start = 1;
2859 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2860 sizeof(kvm->arch.vpit->pit_state.channels));
2861 kvm->arch.vpit->pit_state.flags = ps->flags;
2862 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2863 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2864 return r;
2865 }
2866
2867 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2868 struct kvm_reinject_control *control)
2869 {
2870 if (!kvm->arch.vpit)
2871 return -ENXIO;
2872 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2873 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2874 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2875 return 0;
2876 }
2877
2878 /*
2879 * Get (and clear) the dirty memory log for a memory slot.
2880 */
2881 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2882 struct kvm_dirty_log *log)
2883 {
2884 int r, i;
2885 struct kvm_memory_slot *memslot;
2886 unsigned long n;
2887 unsigned long is_dirty = 0;
2888
2889 mutex_lock(&kvm->slots_lock);
2890
2891 r = -EINVAL;
2892 if (log->slot >= KVM_MEMORY_SLOTS)
2893 goto out;
2894
2895 memslot = &kvm->memslots->memslots[log->slot];
2896 r = -ENOENT;
2897 if (!memslot->dirty_bitmap)
2898 goto out;
2899
2900 n = kvm_dirty_bitmap_bytes(memslot);
2901
2902 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2903 is_dirty = memslot->dirty_bitmap[i];
2904
2905 /* If nothing is dirty, don't bother messing with page tables. */
2906 if (is_dirty) {
2907 struct kvm_memslots *slots, *old_slots;
2908 unsigned long *dirty_bitmap;
2909
2910 r = -ENOMEM;
2911 dirty_bitmap = vmalloc(n);
2912 if (!dirty_bitmap)
2913 goto out;
2914 memset(dirty_bitmap, 0, n);
2915
2916 r = -ENOMEM;
2917 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2918 if (!slots) {
2919 vfree(dirty_bitmap);
2920 goto out;
2921 }
2922 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2923 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2924
2925 old_slots = kvm->memslots;
2926 rcu_assign_pointer(kvm->memslots, slots);
2927 synchronize_srcu_expedited(&kvm->srcu);
2928 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2929 kfree(old_slots);
2930
2931 spin_lock(&kvm->mmu_lock);
2932 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2933 spin_unlock(&kvm->mmu_lock);
2934
2935 r = -EFAULT;
2936 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
2937 vfree(dirty_bitmap);
2938 goto out;
2939 }
2940 vfree(dirty_bitmap);
2941 } else {
2942 r = -EFAULT;
2943 if (clear_user(log->dirty_bitmap, n))
2944 goto out;
2945 }
2946
2947 r = 0;
2948 out:
2949 mutex_unlock(&kvm->slots_lock);
2950 return r;
2951 }
2952
2953 long kvm_arch_vm_ioctl(struct file *filp,
2954 unsigned int ioctl, unsigned long arg)
2955 {
2956 struct kvm *kvm = filp->private_data;
2957 void __user *argp = (void __user *)arg;
2958 int r = -ENOTTY;
2959 /*
2960 * This union makes it completely explicit to gcc-3.x
2961 * that these two variables' stack usage should be
2962 * combined, not added together.
2963 */
2964 union {
2965 struct kvm_pit_state ps;
2966 struct kvm_pit_state2 ps2;
2967 struct kvm_pit_config pit_config;
2968 } u;
2969
2970 switch (ioctl) {
2971 case KVM_SET_TSS_ADDR:
2972 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2973 if (r < 0)
2974 goto out;
2975 break;
2976 case KVM_SET_IDENTITY_MAP_ADDR: {
2977 u64 ident_addr;
2978
2979 r = -EFAULT;
2980 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2981 goto out;
2982 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2983 if (r < 0)
2984 goto out;
2985 break;
2986 }
2987 case KVM_SET_NR_MMU_PAGES:
2988 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2989 if (r)
2990 goto out;
2991 break;
2992 case KVM_GET_NR_MMU_PAGES:
2993 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2994 break;
2995 case KVM_CREATE_IRQCHIP: {
2996 struct kvm_pic *vpic;
2997
2998 mutex_lock(&kvm->lock);
2999 r = -EEXIST;
3000 if (kvm->arch.vpic)
3001 goto create_irqchip_unlock;
3002 r = -ENOMEM;
3003 vpic = kvm_create_pic(kvm);
3004 if (vpic) {
3005 r = kvm_ioapic_init(kvm);
3006 if (r) {
3007 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3008 &vpic->dev);
3009 kfree(vpic);
3010 goto create_irqchip_unlock;
3011 }
3012 } else
3013 goto create_irqchip_unlock;
3014 smp_wmb();
3015 kvm->arch.vpic = vpic;
3016 smp_wmb();
3017 r = kvm_setup_default_irq_routing(kvm);
3018 if (r) {
3019 mutex_lock(&kvm->irq_lock);
3020 kvm_ioapic_destroy(kvm);
3021 kvm_destroy_pic(kvm);
3022 mutex_unlock(&kvm->irq_lock);
3023 }
3024 create_irqchip_unlock:
3025 mutex_unlock(&kvm->lock);
3026 break;
3027 }
3028 case KVM_CREATE_PIT:
3029 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3030 goto create_pit;
3031 case KVM_CREATE_PIT2:
3032 r = -EFAULT;
3033 if (copy_from_user(&u.pit_config, argp,
3034 sizeof(struct kvm_pit_config)))
3035 goto out;
3036 create_pit:
3037 mutex_lock(&kvm->slots_lock);
3038 r = -EEXIST;
3039 if (kvm->arch.vpit)
3040 goto create_pit_unlock;
3041 r = -ENOMEM;
3042 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3043 if (kvm->arch.vpit)
3044 r = 0;
3045 create_pit_unlock:
3046 mutex_unlock(&kvm->slots_lock);
3047 break;
3048 case KVM_IRQ_LINE_STATUS:
3049 case KVM_IRQ_LINE: {
3050 struct kvm_irq_level irq_event;
3051
3052 r = -EFAULT;
3053 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3054 goto out;
3055 r = -ENXIO;
3056 if (irqchip_in_kernel(kvm)) {
3057 __s32 status;
3058 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3059 irq_event.irq, irq_event.level);
3060 if (ioctl == KVM_IRQ_LINE_STATUS) {
3061 r = -EFAULT;
3062 irq_event.status = status;
3063 if (copy_to_user(argp, &irq_event,
3064 sizeof irq_event))
3065 goto out;
3066 }
3067 r = 0;
3068 }
3069 break;
3070 }
3071 case KVM_GET_IRQCHIP: {
3072 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3073 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3074
3075 r = -ENOMEM;
3076 if (!chip)
3077 goto out;
3078 r = -EFAULT;
3079 if (copy_from_user(chip, argp, sizeof *chip))
3080 goto get_irqchip_out;
3081 r = -ENXIO;
3082 if (!irqchip_in_kernel(kvm))
3083 goto get_irqchip_out;
3084 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3085 if (r)
3086 goto get_irqchip_out;
3087 r = -EFAULT;
3088 if (copy_to_user(argp, chip, sizeof *chip))
3089 goto get_irqchip_out;
3090 r = 0;
3091 get_irqchip_out:
3092 kfree(chip);
3093 if (r)
3094 goto out;
3095 break;
3096 }
3097 case KVM_SET_IRQCHIP: {
3098 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3099 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3100
3101 r = -ENOMEM;
3102 if (!chip)
3103 goto out;
3104 r = -EFAULT;
3105 if (copy_from_user(chip, argp, sizeof *chip))
3106 goto set_irqchip_out;
3107 r = -ENXIO;
3108 if (!irqchip_in_kernel(kvm))
3109 goto set_irqchip_out;
3110 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3111 if (r)
3112 goto set_irqchip_out;
3113 r = 0;
3114 set_irqchip_out:
3115 kfree(chip);
3116 if (r)
3117 goto out;
3118 break;
3119 }
3120 case KVM_GET_PIT: {
3121 r = -EFAULT;
3122 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3123 goto out;
3124 r = -ENXIO;
3125 if (!kvm->arch.vpit)
3126 goto out;
3127 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3128 if (r)
3129 goto out;
3130 r = -EFAULT;
3131 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3132 goto out;
3133 r = 0;
3134 break;
3135 }
3136 case KVM_SET_PIT: {
3137 r = -EFAULT;
3138 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3139 goto out;
3140 r = -ENXIO;
3141 if (!kvm->arch.vpit)
3142 goto out;
3143 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3144 if (r)
3145 goto out;
3146 r = 0;
3147 break;
3148 }
3149 case KVM_GET_PIT2: {
3150 r = -ENXIO;
3151 if (!kvm->arch.vpit)
3152 goto out;
3153 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3154 if (r)
3155 goto out;
3156 r = -EFAULT;
3157 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3158 goto out;
3159 r = 0;
3160 break;
3161 }
3162 case KVM_SET_PIT2: {
3163 r = -EFAULT;
3164 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3165 goto out;
3166 r = -ENXIO;
3167 if (!kvm->arch.vpit)
3168 goto out;
3169 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3170 if (r)
3171 goto out;
3172 r = 0;
3173 break;
3174 }
3175 case KVM_REINJECT_CONTROL: {
3176 struct kvm_reinject_control control;
3177 r = -EFAULT;
3178 if (copy_from_user(&control, argp, sizeof(control)))
3179 goto out;
3180 r = kvm_vm_ioctl_reinject(kvm, &control);
3181 if (r)
3182 goto out;
3183 r = 0;
3184 break;
3185 }
3186 case KVM_XEN_HVM_CONFIG: {
3187 r = -EFAULT;
3188 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3189 sizeof(struct kvm_xen_hvm_config)))
3190 goto out;
3191 r = -EINVAL;
3192 if (kvm->arch.xen_hvm_config.flags)
3193 goto out;
3194 r = 0;
3195 break;
3196 }
3197 case KVM_SET_CLOCK: {
3198 struct timespec now;
3199 struct kvm_clock_data user_ns;
3200 u64 now_ns;
3201 s64 delta;
3202
3203 r = -EFAULT;
3204 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3205 goto out;
3206
3207 r = -EINVAL;
3208 if (user_ns.flags)
3209 goto out;
3210
3211 r = 0;
3212 ktime_get_ts(&now);
3213 now_ns = timespec_to_ns(&now);
3214 delta = user_ns.clock - now_ns;
3215 kvm->arch.kvmclock_offset = delta;
3216 break;
3217 }
3218 case KVM_GET_CLOCK: {
3219 struct timespec now;
3220 struct kvm_clock_data user_ns;
3221 u64 now_ns;
3222
3223 ktime_get_ts(&now);
3224 now_ns = timespec_to_ns(&now);
3225 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3226 user_ns.flags = 0;
3227 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3228
3229 r = -EFAULT;
3230 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3231 goto out;
3232 r = 0;
3233 break;
3234 }
3235
3236 default:
3237 ;
3238 }
3239 out:
3240 return r;
3241 }
3242
3243 static void kvm_init_msr_list(void)
3244 {
3245 u32 dummy[2];
3246 unsigned i, j;
3247
3248 /* skip the first msrs in the list. KVM-specific */
3249 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3250 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3251 continue;
3252 if (j < i)
3253 msrs_to_save[j] = msrs_to_save[i];
3254 j++;
3255 }
3256 num_msrs_to_save = j;
3257 }
3258
3259 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3260 const void *v)
3261 {
3262 if (vcpu->arch.apic &&
3263 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3264 return 0;
3265
3266 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3267 }
3268
3269 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3270 {
3271 if (vcpu->arch.apic &&
3272 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3273 return 0;
3274
3275 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3276 }
3277
3278 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3279 struct kvm_segment *var, int seg)
3280 {
3281 kvm_x86_ops->set_segment(vcpu, var, seg);
3282 }
3283
3284 void kvm_get_segment(struct kvm_vcpu *vcpu,
3285 struct kvm_segment *var, int seg)
3286 {
3287 kvm_x86_ops->get_segment(vcpu, var, seg);
3288 }
3289
3290 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3291 {
3292 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3293 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3294 }
3295
3296 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3297 {
3298 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3299 access |= PFERR_FETCH_MASK;
3300 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3301 }
3302
3303 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3304 {
3305 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3306 access |= PFERR_WRITE_MASK;
3307 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3308 }
3309
3310 /* uses this to access any guest's mapped memory without checking CPL */
3311 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3312 {
3313 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3314 }
3315
3316 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3317 struct kvm_vcpu *vcpu, u32 access,
3318 u32 *error)
3319 {
3320 void *data = val;
3321 int r = X86EMUL_CONTINUE;
3322
3323 while (bytes) {
3324 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3325 unsigned offset = addr & (PAGE_SIZE-1);
3326 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3327 int ret;
3328
3329 if (gpa == UNMAPPED_GVA) {
3330 r = X86EMUL_PROPAGATE_FAULT;
3331 goto out;
3332 }
3333 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3334 if (ret < 0) {
3335 r = X86EMUL_IO_NEEDED;
3336 goto out;
3337 }
3338
3339 bytes -= toread;
3340 data += toread;
3341 addr += toread;
3342 }
3343 out:
3344 return r;
3345 }
3346
3347 /* used for instruction fetching */
3348 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3349 struct kvm_vcpu *vcpu, u32 *error)
3350 {
3351 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3352 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3353 access | PFERR_FETCH_MASK, error);
3354 }
3355
3356 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3357 struct kvm_vcpu *vcpu, u32 *error)
3358 {
3359 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3360 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3361 error);
3362 }
3363
3364 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3365 struct kvm_vcpu *vcpu, u32 *error)
3366 {
3367 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3368 }
3369
3370 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3371 unsigned int bytes,
3372 struct kvm_vcpu *vcpu,
3373 u32 *error)
3374 {
3375 void *data = val;
3376 int r = X86EMUL_CONTINUE;
3377
3378 while (bytes) {
3379 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3380 PFERR_WRITE_MASK, error);
3381 unsigned offset = addr & (PAGE_SIZE-1);
3382 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3383 int ret;
3384
3385 if (gpa == UNMAPPED_GVA) {
3386 r = X86EMUL_PROPAGATE_FAULT;
3387 goto out;
3388 }
3389 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3390 if (ret < 0) {
3391 r = X86EMUL_IO_NEEDED;
3392 goto out;
3393 }
3394
3395 bytes -= towrite;
3396 data += towrite;
3397 addr += towrite;
3398 }
3399 out:
3400 return r;
3401 }
3402
3403 static int emulator_read_emulated(unsigned long addr,
3404 void *val,
3405 unsigned int bytes,
3406 unsigned int *error_code,
3407 struct kvm_vcpu *vcpu)
3408 {
3409 gpa_t gpa;
3410
3411 if (vcpu->mmio_read_completed) {
3412 memcpy(val, vcpu->mmio_data, bytes);
3413 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3414 vcpu->mmio_phys_addr, *(u64 *)val);
3415 vcpu->mmio_read_completed = 0;
3416 return X86EMUL_CONTINUE;
3417 }
3418
3419 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3420
3421 if (gpa == UNMAPPED_GVA)
3422 return X86EMUL_PROPAGATE_FAULT;
3423
3424 /* For APIC access vmexit */
3425 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3426 goto mmio;
3427
3428 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3429 == X86EMUL_CONTINUE)
3430 return X86EMUL_CONTINUE;
3431
3432 mmio:
3433 /*
3434 * Is this MMIO handled locally?
3435 */
3436 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3437 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3438 return X86EMUL_CONTINUE;
3439 }
3440
3441 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3442
3443 vcpu->mmio_needed = 1;
3444 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3445 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3446 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3447 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3448
3449 return X86EMUL_IO_NEEDED;
3450 }
3451
3452 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3453 const void *val, int bytes)
3454 {
3455 int ret;
3456
3457 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3458 if (ret < 0)
3459 return 0;
3460 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3461 return 1;
3462 }
3463
3464 static int emulator_write_emulated_onepage(unsigned long addr,
3465 const void *val,
3466 unsigned int bytes,
3467 unsigned int *error_code,
3468 struct kvm_vcpu *vcpu)
3469 {
3470 gpa_t gpa;
3471
3472 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3473
3474 if (gpa == UNMAPPED_GVA)
3475 return X86EMUL_PROPAGATE_FAULT;
3476
3477 /* For APIC access vmexit */
3478 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3479 goto mmio;
3480
3481 if (emulator_write_phys(vcpu, gpa, val, bytes))
3482 return X86EMUL_CONTINUE;
3483
3484 mmio:
3485 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3486 /*
3487 * Is this MMIO handled locally?
3488 */
3489 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3490 return X86EMUL_CONTINUE;
3491
3492 vcpu->mmio_needed = 1;
3493 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3494 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3495 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3496 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3497 memcpy(vcpu->run->mmio.data, val, bytes);
3498
3499 return X86EMUL_CONTINUE;
3500 }
3501
3502 int emulator_write_emulated(unsigned long addr,
3503 const void *val,
3504 unsigned int bytes,
3505 unsigned int *error_code,
3506 struct kvm_vcpu *vcpu)
3507 {
3508 /* Crossing a page boundary? */
3509 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3510 int rc, now;
3511
3512 now = -addr & ~PAGE_MASK;
3513 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3514 vcpu);
3515 if (rc != X86EMUL_CONTINUE)
3516 return rc;
3517 addr += now;
3518 val += now;
3519 bytes -= now;
3520 }
3521 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3522 vcpu);
3523 }
3524
3525 #define CMPXCHG_TYPE(t, ptr, old, new) \
3526 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3527
3528 #ifdef CONFIG_X86_64
3529 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3530 #else
3531 # define CMPXCHG64(ptr, old, new) \
3532 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3533 #endif
3534
3535 static int emulator_cmpxchg_emulated(unsigned long addr,
3536 const void *old,
3537 const void *new,
3538 unsigned int bytes,
3539 unsigned int *error_code,
3540 struct kvm_vcpu *vcpu)
3541 {
3542 gpa_t gpa;
3543 struct page *page;
3544 char *kaddr;
3545 bool exchanged;
3546
3547 /* guests cmpxchg8b have to be emulated atomically */
3548 if (bytes > 8 || (bytes & (bytes - 1)))
3549 goto emul_write;
3550
3551 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3552
3553 if (gpa == UNMAPPED_GVA ||
3554 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3555 goto emul_write;
3556
3557 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3558 goto emul_write;
3559
3560 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3561 if (is_error_page(page)) {
3562 kvm_release_page_clean(page);
3563 goto emul_write;
3564 }
3565
3566 kaddr = kmap_atomic(page, KM_USER0);
3567 kaddr += offset_in_page(gpa);
3568 switch (bytes) {
3569 case 1:
3570 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3571 break;
3572 case 2:
3573 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3574 break;
3575 case 4:
3576 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3577 break;
3578 case 8:
3579 exchanged = CMPXCHG64(kaddr, old, new);
3580 break;
3581 default:
3582 BUG();
3583 }
3584 kunmap_atomic(kaddr, KM_USER0);
3585 kvm_release_page_dirty(page);
3586
3587 if (!exchanged)
3588 return X86EMUL_CMPXCHG_FAILED;
3589
3590 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3591
3592 return X86EMUL_CONTINUE;
3593
3594 emul_write:
3595 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3596
3597 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3598 }
3599
3600 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3601 {
3602 /* TODO: String I/O for in kernel device */
3603 int r;
3604
3605 if (vcpu->arch.pio.in)
3606 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3607 vcpu->arch.pio.size, pd);
3608 else
3609 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3610 vcpu->arch.pio.port, vcpu->arch.pio.size,
3611 pd);
3612 return r;
3613 }
3614
3615
3616 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3617 unsigned int count, struct kvm_vcpu *vcpu)
3618 {
3619 if (vcpu->arch.pio.count)
3620 goto data_avail;
3621
3622 trace_kvm_pio(1, port, size, 1);
3623
3624 vcpu->arch.pio.port = port;
3625 vcpu->arch.pio.in = 1;
3626 vcpu->arch.pio.count = count;
3627 vcpu->arch.pio.size = size;
3628
3629 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3630 data_avail:
3631 memcpy(val, vcpu->arch.pio_data, size * count);
3632 vcpu->arch.pio.count = 0;
3633 return 1;
3634 }
3635
3636 vcpu->run->exit_reason = KVM_EXIT_IO;
3637 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3638 vcpu->run->io.size = size;
3639 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3640 vcpu->run->io.count = count;
3641 vcpu->run->io.port = port;
3642
3643 return 0;
3644 }
3645
3646 static int emulator_pio_out_emulated(int size, unsigned short port,
3647 const void *val, unsigned int count,
3648 struct kvm_vcpu *vcpu)
3649 {
3650 trace_kvm_pio(0, port, size, 1);
3651
3652 vcpu->arch.pio.port = port;
3653 vcpu->arch.pio.in = 0;
3654 vcpu->arch.pio.count = count;
3655 vcpu->arch.pio.size = size;
3656
3657 memcpy(vcpu->arch.pio_data, val, size * count);
3658
3659 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3660 vcpu->arch.pio.count = 0;
3661 return 1;
3662 }
3663
3664 vcpu->run->exit_reason = KVM_EXIT_IO;
3665 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3666 vcpu->run->io.size = size;
3667 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3668 vcpu->run->io.count = count;
3669 vcpu->run->io.port = port;
3670
3671 return 0;
3672 }
3673
3674 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3675 {
3676 return kvm_x86_ops->get_segment_base(vcpu, seg);
3677 }
3678
3679 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3680 {
3681 kvm_mmu_invlpg(vcpu, address);
3682 return X86EMUL_CONTINUE;
3683 }
3684
3685 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3686 {
3687 if (!need_emulate_wbinvd(vcpu))
3688 return X86EMUL_CONTINUE;
3689
3690 if (kvm_x86_ops->has_wbinvd_exit()) {
3691 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3692 wbinvd_ipi, NULL, 1);
3693 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3694 }
3695 wbinvd();
3696 return X86EMUL_CONTINUE;
3697 }
3698 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3699
3700 int emulate_clts(struct kvm_vcpu *vcpu)
3701 {
3702 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3703 kvm_x86_ops->fpu_activate(vcpu);
3704 return X86EMUL_CONTINUE;
3705 }
3706
3707 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3708 {
3709 return _kvm_get_dr(vcpu, dr, dest);
3710 }
3711
3712 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3713 {
3714
3715 return __kvm_set_dr(vcpu, dr, value);
3716 }
3717
3718 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3719 {
3720 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3721 }
3722
3723 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3724 {
3725 unsigned long value;
3726
3727 switch (cr) {
3728 case 0:
3729 value = kvm_read_cr0(vcpu);
3730 break;
3731 case 2:
3732 value = vcpu->arch.cr2;
3733 break;
3734 case 3:
3735 value = vcpu->arch.cr3;
3736 break;
3737 case 4:
3738 value = kvm_read_cr4(vcpu);
3739 break;
3740 case 8:
3741 value = kvm_get_cr8(vcpu);
3742 break;
3743 default:
3744 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3745 return 0;
3746 }
3747
3748 return value;
3749 }
3750
3751 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3752 {
3753 int res = 0;
3754
3755 switch (cr) {
3756 case 0:
3757 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3758 break;
3759 case 2:
3760 vcpu->arch.cr2 = val;
3761 break;
3762 case 3:
3763 res = kvm_set_cr3(vcpu, val);
3764 break;
3765 case 4:
3766 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3767 break;
3768 case 8:
3769 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3770 break;
3771 default:
3772 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3773 res = -1;
3774 }
3775
3776 return res;
3777 }
3778
3779 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3780 {
3781 return kvm_x86_ops->get_cpl(vcpu);
3782 }
3783
3784 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3785 {
3786 kvm_x86_ops->get_gdt(vcpu, dt);
3787 }
3788
3789 static unsigned long emulator_get_cached_segment_base(int seg,
3790 struct kvm_vcpu *vcpu)
3791 {
3792 return get_segment_base(vcpu, seg);
3793 }
3794
3795 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3796 struct kvm_vcpu *vcpu)
3797 {
3798 struct kvm_segment var;
3799
3800 kvm_get_segment(vcpu, &var, seg);
3801
3802 if (var.unusable)
3803 return false;
3804
3805 if (var.g)
3806 var.limit >>= 12;
3807 set_desc_limit(desc, var.limit);
3808 set_desc_base(desc, (unsigned long)var.base);
3809 desc->type = var.type;
3810 desc->s = var.s;
3811 desc->dpl = var.dpl;
3812 desc->p = var.present;
3813 desc->avl = var.avl;
3814 desc->l = var.l;
3815 desc->d = var.db;
3816 desc->g = var.g;
3817
3818 return true;
3819 }
3820
3821 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3822 struct kvm_vcpu *vcpu)
3823 {
3824 struct kvm_segment var;
3825
3826 /* needed to preserve selector */
3827 kvm_get_segment(vcpu, &var, seg);
3828
3829 var.base = get_desc_base(desc);
3830 var.limit = get_desc_limit(desc);
3831 if (desc->g)
3832 var.limit = (var.limit << 12) | 0xfff;
3833 var.type = desc->type;
3834 var.present = desc->p;
3835 var.dpl = desc->dpl;
3836 var.db = desc->d;
3837 var.s = desc->s;
3838 var.l = desc->l;
3839 var.g = desc->g;
3840 var.avl = desc->avl;
3841 var.present = desc->p;
3842 var.unusable = !var.present;
3843 var.padding = 0;
3844
3845 kvm_set_segment(vcpu, &var, seg);
3846 return;
3847 }
3848
3849 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3850 {
3851 struct kvm_segment kvm_seg;
3852
3853 kvm_get_segment(vcpu, &kvm_seg, seg);
3854 return kvm_seg.selector;
3855 }
3856
3857 static void emulator_set_segment_selector(u16 sel, int seg,
3858 struct kvm_vcpu *vcpu)
3859 {
3860 struct kvm_segment kvm_seg;
3861
3862 kvm_get_segment(vcpu, &kvm_seg, seg);
3863 kvm_seg.selector = sel;
3864 kvm_set_segment(vcpu, &kvm_seg, seg);
3865 }
3866
3867 static struct x86_emulate_ops emulate_ops = {
3868 .read_std = kvm_read_guest_virt_system,
3869 .write_std = kvm_write_guest_virt_system,
3870 .fetch = kvm_fetch_guest_virt,
3871 .read_emulated = emulator_read_emulated,
3872 .write_emulated = emulator_write_emulated,
3873 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3874 .pio_in_emulated = emulator_pio_in_emulated,
3875 .pio_out_emulated = emulator_pio_out_emulated,
3876 .get_cached_descriptor = emulator_get_cached_descriptor,
3877 .set_cached_descriptor = emulator_set_cached_descriptor,
3878 .get_segment_selector = emulator_get_segment_selector,
3879 .set_segment_selector = emulator_set_segment_selector,
3880 .get_cached_segment_base = emulator_get_cached_segment_base,
3881 .get_gdt = emulator_get_gdt,
3882 .get_cr = emulator_get_cr,
3883 .set_cr = emulator_set_cr,
3884 .cpl = emulator_get_cpl,
3885 .get_dr = emulator_get_dr,
3886 .set_dr = emulator_set_dr,
3887 .set_msr = kvm_set_msr,
3888 .get_msr = kvm_get_msr,
3889 };
3890
3891 static void cache_all_regs(struct kvm_vcpu *vcpu)
3892 {
3893 kvm_register_read(vcpu, VCPU_REGS_RAX);
3894 kvm_register_read(vcpu, VCPU_REGS_RSP);
3895 kvm_register_read(vcpu, VCPU_REGS_RIP);
3896 vcpu->arch.regs_dirty = ~0;
3897 }
3898
3899 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
3900 {
3901 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
3902 /*
3903 * an sti; sti; sequence only disable interrupts for the first
3904 * instruction. So, if the last instruction, be it emulated or
3905 * not, left the system with the INT_STI flag enabled, it
3906 * means that the last instruction is an sti. We should not
3907 * leave the flag on in this case. The same goes for mov ss
3908 */
3909 if (!(int_shadow & mask))
3910 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
3911 }
3912
3913 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
3914 {
3915 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
3916 if (ctxt->exception == PF_VECTOR)
3917 kvm_inject_page_fault(vcpu, ctxt->cr2, ctxt->error_code);
3918 else if (ctxt->error_code_valid)
3919 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
3920 else
3921 kvm_queue_exception(vcpu, ctxt->exception);
3922 }
3923
3924 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
3925 {
3926 ++vcpu->stat.insn_emulation_fail;
3927 trace_kvm_emulate_insn_failed(vcpu);
3928 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
3929 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
3930 vcpu->run->internal.ndata = 0;
3931 kvm_queue_exception(vcpu, UD_VECTOR);
3932 return EMULATE_FAIL;
3933 }
3934
3935 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
3936 {
3937 gpa_t gpa;
3938
3939 if (tdp_enabled)
3940 return false;
3941
3942 /*
3943 * if emulation was due to access to shadowed page table
3944 * and it failed try to unshadow page and re-entetr the
3945 * guest to let CPU execute the instruction.
3946 */
3947 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
3948 return true;
3949
3950 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
3951
3952 if (gpa == UNMAPPED_GVA)
3953 return true; /* let cpu generate fault */
3954
3955 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
3956 return true;
3957
3958 return false;
3959 }
3960
3961 int emulate_instruction(struct kvm_vcpu *vcpu,
3962 unsigned long cr2,
3963 u16 error_code,
3964 int emulation_type)
3965 {
3966 int r;
3967 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
3968
3969 kvm_clear_exception_queue(vcpu);
3970 vcpu->arch.mmio_fault_cr2 = cr2;
3971 /*
3972 * TODO: fix emulate.c to use guest_read/write_register
3973 * instead of direct ->regs accesses, can save hundred cycles
3974 * on Intel for instructions that don't read/change RSP, for
3975 * for example.
3976 */
3977 cache_all_regs(vcpu);
3978
3979 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3980 int cs_db, cs_l;
3981 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3982
3983 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3984 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3985 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
3986 vcpu->arch.emulate_ctxt.mode =
3987 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3988 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3989 ? X86EMUL_MODE_VM86 : cs_l
3990 ? X86EMUL_MODE_PROT64 : cs_db
3991 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3992 memset(c, 0, sizeof(struct decode_cache));
3993 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
3994 vcpu->arch.emulate_ctxt.interruptibility = 0;
3995 vcpu->arch.emulate_ctxt.exception = -1;
3996
3997 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3998 trace_kvm_emulate_insn_start(vcpu);
3999
4000 /* Only allow emulation of specific instructions on #UD
4001 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4002 if (emulation_type & EMULTYPE_TRAP_UD) {
4003 if (!c->twobyte)
4004 return EMULATE_FAIL;
4005 switch (c->b) {
4006 case 0x01: /* VMMCALL */
4007 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4008 return EMULATE_FAIL;
4009 break;
4010 case 0x34: /* sysenter */
4011 case 0x35: /* sysexit */
4012 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4013 return EMULATE_FAIL;
4014 break;
4015 case 0x05: /* syscall */
4016 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4017 return EMULATE_FAIL;
4018 break;
4019 default:
4020 return EMULATE_FAIL;
4021 }
4022
4023 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4024 return EMULATE_FAIL;
4025 }
4026
4027 ++vcpu->stat.insn_emulation;
4028 if (r) {
4029 if (reexecute_instruction(vcpu, cr2))
4030 return EMULATE_DONE;
4031 if (emulation_type & EMULTYPE_SKIP)
4032 return EMULATE_FAIL;
4033 return handle_emulation_failure(vcpu);
4034 }
4035 }
4036
4037 if (emulation_type & EMULTYPE_SKIP) {
4038 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4039 return EMULATE_DONE;
4040 }
4041
4042 /* this is needed for vmware backdor interface to work since it
4043 changes registers values during IO operation */
4044 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4045
4046 restart:
4047 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
4048
4049 if (r) { /* emulation failed */
4050 if (reexecute_instruction(vcpu, cr2))
4051 return EMULATE_DONE;
4052
4053 return handle_emulation_failure(vcpu);
4054 }
4055
4056 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4057 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4058 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4059 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4060
4061 if (vcpu->arch.emulate_ctxt.exception >= 0) {
4062 inject_emulated_exception(vcpu);
4063 return EMULATE_DONE;
4064 }
4065
4066 if (vcpu->arch.pio.count) {
4067 if (!vcpu->arch.pio.in)
4068 vcpu->arch.pio.count = 0;
4069 return EMULATE_DO_MMIO;
4070 }
4071
4072 if (vcpu->mmio_needed) {
4073 if (vcpu->mmio_is_write)
4074 vcpu->mmio_needed = 0;
4075 return EMULATE_DO_MMIO;
4076 }
4077
4078 if (vcpu->arch.emulate_ctxt.restart)
4079 goto restart;
4080
4081 return EMULATE_DONE;
4082 }
4083 EXPORT_SYMBOL_GPL(emulate_instruction);
4084
4085 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4086 {
4087 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4088 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4089 /* do not return to emulator after return from userspace */
4090 vcpu->arch.pio.count = 0;
4091 return ret;
4092 }
4093 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4094
4095 static void bounce_off(void *info)
4096 {
4097 /* nothing */
4098 }
4099
4100 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4101 void *data)
4102 {
4103 struct cpufreq_freqs *freq = data;
4104 struct kvm *kvm;
4105 struct kvm_vcpu *vcpu;
4106 int i, send_ipi = 0;
4107
4108 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4109 return 0;
4110 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4111 return 0;
4112 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
4113
4114 spin_lock(&kvm_lock);
4115 list_for_each_entry(kvm, &vm_list, vm_list) {
4116 kvm_for_each_vcpu(i, vcpu, kvm) {
4117 if (vcpu->cpu != freq->cpu)
4118 continue;
4119 if (!kvm_request_guest_time_update(vcpu))
4120 continue;
4121 if (vcpu->cpu != smp_processor_id())
4122 send_ipi++;
4123 }
4124 }
4125 spin_unlock(&kvm_lock);
4126
4127 if (freq->old < freq->new && send_ipi) {
4128 /*
4129 * We upscale the frequency. Must make the guest
4130 * doesn't see old kvmclock values while running with
4131 * the new frequency, otherwise we risk the guest sees
4132 * time go backwards.
4133 *
4134 * In case we update the frequency for another cpu
4135 * (which might be in guest context) send an interrupt
4136 * to kick the cpu out of guest context. Next time
4137 * guest context is entered kvmclock will be updated,
4138 * so the guest will not see stale values.
4139 */
4140 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
4141 }
4142 return 0;
4143 }
4144
4145 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4146 .notifier_call = kvmclock_cpufreq_notifier
4147 };
4148
4149 static void kvm_timer_init(void)
4150 {
4151 int cpu;
4152
4153 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4154 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4155 CPUFREQ_TRANSITION_NOTIFIER);
4156 for_each_online_cpu(cpu) {
4157 unsigned long khz = cpufreq_get(cpu);
4158 if (!khz)
4159 khz = tsc_khz;
4160 per_cpu(cpu_tsc_khz, cpu) = khz;
4161 }
4162 } else {
4163 for_each_possible_cpu(cpu)
4164 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
4165 }
4166 }
4167
4168 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4169
4170 static int kvm_is_in_guest(void)
4171 {
4172 return percpu_read(current_vcpu) != NULL;
4173 }
4174
4175 static int kvm_is_user_mode(void)
4176 {
4177 int user_mode = 3;
4178
4179 if (percpu_read(current_vcpu))
4180 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4181
4182 return user_mode != 0;
4183 }
4184
4185 static unsigned long kvm_get_guest_ip(void)
4186 {
4187 unsigned long ip = 0;
4188
4189 if (percpu_read(current_vcpu))
4190 ip = kvm_rip_read(percpu_read(current_vcpu));
4191
4192 return ip;
4193 }
4194
4195 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4196 .is_in_guest = kvm_is_in_guest,
4197 .is_user_mode = kvm_is_user_mode,
4198 .get_guest_ip = kvm_get_guest_ip,
4199 };
4200
4201 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4202 {
4203 percpu_write(current_vcpu, vcpu);
4204 }
4205 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4206
4207 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4208 {
4209 percpu_write(current_vcpu, NULL);
4210 }
4211 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4212
4213 int kvm_arch_init(void *opaque)
4214 {
4215 int r;
4216 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4217
4218 if (kvm_x86_ops) {
4219 printk(KERN_ERR "kvm: already loaded the other module\n");
4220 r = -EEXIST;
4221 goto out;
4222 }
4223
4224 if (!ops->cpu_has_kvm_support()) {
4225 printk(KERN_ERR "kvm: no hardware support\n");
4226 r = -EOPNOTSUPP;
4227 goto out;
4228 }
4229 if (ops->disabled_by_bios()) {
4230 printk(KERN_ERR "kvm: disabled by bios\n");
4231 r = -EOPNOTSUPP;
4232 goto out;
4233 }
4234
4235 r = kvm_mmu_module_init();
4236 if (r)
4237 goto out;
4238
4239 kvm_init_msr_list();
4240
4241 kvm_x86_ops = ops;
4242 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4243 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4244 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4245 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4246
4247 kvm_timer_init();
4248
4249 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4250
4251 if (cpu_has_xsave)
4252 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4253
4254 return 0;
4255
4256 out:
4257 return r;
4258 }
4259
4260 void kvm_arch_exit(void)
4261 {
4262 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4263
4264 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4265 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4266 CPUFREQ_TRANSITION_NOTIFIER);
4267 kvm_x86_ops = NULL;
4268 kvm_mmu_module_exit();
4269 }
4270
4271 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4272 {
4273 ++vcpu->stat.halt_exits;
4274 if (irqchip_in_kernel(vcpu->kvm)) {
4275 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4276 return 1;
4277 } else {
4278 vcpu->run->exit_reason = KVM_EXIT_HLT;
4279 return 0;
4280 }
4281 }
4282 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4283
4284 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4285 unsigned long a1)
4286 {
4287 if (is_long_mode(vcpu))
4288 return a0;
4289 else
4290 return a0 | ((gpa_t)a1 << 32);
4291 }
4292
4293 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4294 {
4295 u64 param, ingpa, outgpa, ret;
4296 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4297 bool fast, longmode;
4298 int cs_db, cs_l;
4299
4300 /*
4301 * hypercall generates UD from non zero cpl and real mode
4302 * per HYPER-V spec
4303 */
4304 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4305 kvm_queue_exception(vcpu, UD_VECTOR);
4306 return 0;
4307 }
4308
4309 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4310 longmode = is_long_mode(vcpu) && cs_l == 1;
4311
4312 if (!longmode) {
4313 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4314 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4315 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4316 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4317 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4318 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4319 }
4320 #ifdef CONFIG_X86_64
4321 else {
4322 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4323 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4324 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4325 }
4326 #endif
4327
4328 code = param & 0xffff;
4329 fast = (param >> 16) & 0x1;
4330 rep_cnt = (param >> 32) & 0xfff;
4331 rep_idx = (param >> 48) & 0xfff;
4332
4333 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4334
4335 switch (code) {
4336 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4337 kvm_vcpu_on_spin(vcpu);
4338 break;
4339 default:
4340 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4341 break;
4342 }
4343
4344 ret = res | (((u64)rep_done & 0xfff) << 32);
4345 if (longmode) {
4346 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4347 } else {
4348 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4349 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4350 }
4351
4352 return 1;
4353 }
4354
4355 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4356 {
4357 unsigned long nr, a0, a1, a2, a3, ret;
4358 int r = 1;
4359
4360 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4361 return kvm_hv_hypercall(vcpu);
4362
4363 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4364 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4365 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4366 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4367 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4368
4369 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4370
4371 if (!is_long_mode(vcpu)) {
4372 nr &= 0xFFFFFFFF;
4373 a0 &= 0xFFFFFFFF;
4374 a1 &= 0xFFFFFFFF;
4375 a2 &= 0xFFFFFFFF;
4376 a3 &= 0xFFFFFFFF;
4377 }
4378
4379 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4380 ret = -KVM_EPERM;
4381 goto out;
4382 }
4383
4384 switch (nr) {
4385 case KVM_HC_VAPIC_POLL_IRQ:
4386 ret = 0;
4387 break;
4388 case KVM_HC_MMU_OP:
4389 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4390 break;
4391 default:
4392 ret = -KVM_ENOSYS;
4393 break;
4394 }
4395 out:
4396 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4397 ++vcpu->stat.hypercalls;
4398 return r;
4399 }
4400 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4401
4402 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4403 {
4404 char instruction[3];
4405 unsigned long rip = kvm_rip_read(vcpu);
4406
4407 /*
4408 * Blow out the MMU to ensure that no other VCPU has an active mapping
4409 * to ensure that the updated hypercall appears atomically across all
4410 * VCPUs.
4411 */
4412 kvm_mmu_zap_all(vcpu->kvm);
4413
4414 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4415
4416 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4417 }
4418
4419 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4420 {
4421 struct desc_ptr dt = { limit, base };
4422
4423 kvm_x86_ops->set_gdt(vcpu, &dt);
4424 }
4425
4426 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4427 {
4428 struct desc_ptr dt = { limit, base };
4429
4430 kvm_x86_ops->set_idt(vcpu, &dt);
4431 }
4432
4433 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4434 {
4435 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4436 int j, nent = vcpu->arch.cpuid_nent;
4437
4438 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4439 /* when no next entry is found, the current entry[i] is reselected */
4440 for (j = i + 1; ; j = (j + 1) % nent) {
4441 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4442 if (ej->function == e->function) {
4443 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4444 return j;
4445 }
4446 }
4447 return 0; /* silence gcc, even though control never reaches here */
4448 }
4449
4450 /* find an entry with matching function, matching index (if needed), and that
4451 * should be read next (if it's stateful) */
4452 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4453 u32 function, u32 index)
4454 {
4455 if (e->function != function)
4456 return 0;
4457 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4458 return 0;
4459 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4460 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4461 return 0;
4462 return 1;
4463 }
4464
4465 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4466 u32 function, u32 index)
4467 {
4468 int i;
4469 struct kvm_cpuid_entry2 *best = NULL;
4470
4471 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4472 struct kvm_cpuid_entry2 *e;
4473
4474 e = &vcpu->arch.cpuid_entries[i];
4475 if (is_matching_cpuid_entry(e, function, index)) {
4476 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4477 move_to_next_stateful_cpuid_entry(vcpu, i);
4478 best = e;
4479 break;
4480 }
4481 /*
4482 * Both basic or both extended?
4483 */
4484 if (((e->function ^ function) & 0x80000000) == 0)
4485 if (!best || e->function > best->function)
4486 best = e;
4487 }
4488 return best;
4489 }
4490 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4491
4492 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4493 {
4494 struct kvm_cpuid_entry2 *best;
4495
4496 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4497 if (!best || best->eax < 0x80000008)
4498 goto not_found;
4499 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4500 if (best)
4501 return best->eax & 0xff;
4502 not_found:
4503 return 36;
4504 }
4505
4506 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4507 {
4508 u32 function, index;
4509 struct kvm_cpuid_entry2 *best;
4510
4511 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4512 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4513 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4514 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4515 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4516 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4517 best = kvm_find_cpuid_entry(vcpu, function, index);
4518 if (best) {
4519 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4520 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4521 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4522 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4523 }
4524 kvm_x86_ops->skip_emulated_instruction(vcpu);
4525 trace_kvm_cpuid(function,
4526 kvm_register_read(vcpu, VCPU_REGS_RAX),
4527 kvm_register_read(vcpu, VCPU_REGS_RBX),
4528 kvm_register_read(vcpu, VCPU_REGS_RCX),
4529 kvm_register_read(vcpu, VCPU_REGS_RDX));
4530 }
4531 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4532
4533 /*
4534 * Check if userspace requested an interrupt window, and that the
4535 * interrupt window is open.
4536 *
4537 * No need to exit to userspace if we already have an interrupt queued.
4538 */
4539 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4540 {
4541 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4542 vcpu->run->request_interrupt_window &&
4543 kvm_arch_interrupt_allowed(vcpu));
4544 }
4545
4546 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4547 {
4548 struct kvm_run *kvm_run = vcpu->run;
4549
4550 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4551 kvm_run->cr8 = kvm_get_cr8(vcpu);
4552 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4553 if (irqchip_in_kernel(vcpu->kvm))
4554 kvm_run->ready_for_interrupt_injection = 1;
4555 else
4556 kvm_run->ready_for_interrupt_injection =
4557 kvm_arch_interrupt_allowed(vcpu) &&
4558 !kvm_cpu_has_interrupt(vcpu) &&
4559 !kvm_event_needs_reinjection(vcpu);
4560 }
4561
4562 static void vapic_enter(struct kvm_vcpu *vcpu)
4563 {
4564 struct kvm_lapic *apic = vcpu->arch.apic;
4565 struct page *page;
4566
4567 if (!apic || !apic->vapic_addr)
4568 return;
4569
4570 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4571
4572 vcpu->arch.apic->vapic_page = page;
4573 }
4574
4575 static void vapic_exit(struct kvm_vcpu *vcpu)
4576 {
4577 struct kvm_lapic *apic = vcpu->arch.apic;
4578 int idx;
4579
4580 if (!apic || !apic->vapic_addr)
4581 return;
4582
4583 idx = srcu_read_lock(&vcpu->kvm->srcu);
4584 kvm_release_page_dirty(apic->vapic_page);
4585 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4586 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4587 }
4588
4589 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4590 {
4591 int max_irr, tpr;
4592
4593 if (!kvm_x86_ops->update_cr8_intercept)
4594 return;
4595
4596 if (!vcpu->arch.apic)
4597 return;
4598
4599 if (!vcpu->arch.apic->vapic_addr)
4600 max_irr = kvm_lapic_find_highest_irr(vcpu);
4601 else
4602 max_irr = -1;
4603
4604 if (max_irr != -1)
4605 max_irr >>= 4;
4606
4607 tpr = kvm_lapic_get_cr8(vcpu);
4608
4609 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4610 }
4611
4612 static void inject_pending_event(struct kvm_vcpu *vcpu)
4613 {
4614 /* try to reinject previous events if any */
4615 if (vcpu->arch.exception.pending) {
4616 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4617 vcpu->arch.exception.has_error_code,
4618 vcpu->arch.exception.error_code);
4619 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4620 vcpu->arch.exception.has_error_code,
4621 vcpu->arch.exception.error_code,
4622 vcpu->arch.exception.reinject);
4623 return;
4624 }
4625
4626 if (vcpu->arch.nmi_injected) {
4627 kvm_x86_ops->set_nmi(vcpu);
4628 return;
4629 }
4630
4631 if (vcpu->arch.interrupt.pending) {
4632 kvm_x86_ops->set_irq(vcpu);
4633 return;
4634 }
4635
4636 /* try to inject new event if pending */
4637 if (vcpu->arch.nmi_pending) {
4638 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4639 vcpu->arch.nmi_pending = false;
4640 vcpu->arch.nmi_injected = true;
4641 kvm_x86_ops->set_nmi(vcpu);
4642 }
4643 } else if (kvm_cpu_has_interrupt(vcpu)) {
4644 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4645 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4646 false);
4647 kvm_x86_ops->set_irq(vcpu);
4648 }
4649 }
4650 }
4651
4652 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4653 {
4654 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4655 !vcpu->guest_xcr0_loaded) {
4656 /* kvm_set_xcr() also depends on this */
4657 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4658 vcpu->guest_xcr0_loaded = 1;
4659 }
4660 }
4661
4662 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4663 {
4664 if (vcpu->guest_xcr0_loaded) {
4665 if (vcpu->arch.xcr0 != host_xcr0)
4666 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4667 vcpu->guest_xcr0_loaded = 0;
4668 }
4669 }
4670
4671 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4672 {
4673 int r;
4674 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4675 vcpu->run->request_interrupt_window;
4676
4677 if (vcpu->requests) {
4678 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
4679 kvm_mmu_unload(vcpu);
4680 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
4681 __kvm_migrate_timers(vcpu);
4682 if (kvm_check_request(KVM_REQ_KVMCLOCK_UPDATE, vcpu))
4683 kvm_write_guest_time(vcpu);
4684 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
4685 kvm_mmu_sync_roots(vcpu);
4686 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
4687 kvm_x86_ops->tlb_flush(vcpu);
4688 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
4689 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4690 r = 0;
4691 goto out;
4692 }
4693 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
4694 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4695 r = 0;
4696 goto out;
4697 }
4698 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
4699 vcpu->fpu_active = 0;
4700 kvm_x86_ops->fpu_deactivate(vcpu);
4701 }
4702 }
4703
4704 r = kvm_mmu_reload(vcpu);
4705 if (unlikely(r))
4706 goto out;
4707
4708 preempt_disable();
4709
4710 kvm_x86_ops->prepare_guest_switch(vcpu);
4711 if (vcpu->fpu_active)
4712 kvm_load_guest_fpu(vcpu);
4713 kvm_load_guest_xcr0(vcpu);
4714
4715 atomic_set(&vcpu->guest_mode, 1);
4716 smp_wmb();
4717
4718 local_irq_disable();
4719
4720 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
4721 || need_resched() || signal_pending(current)) {
4722 atomic_set(&vcpu->guest_mode, 0);
4723 smp_wmb();
4724 local_irq_enable();
4725 preempt_enable();
4726 r = 1;
4727 goto out;
4728 }
4729
4730 inject_pending_event(vcpu);
4731
4732 /* enable NMI/IRQ window open exits if needed */
4733 if (vcpu->arch.nmi_pending)
4734 kvm_x86_ops->enable_nmi_window(vcpu);
4735 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4736 kvm_x86_ops->enable_irq_window(vcpu);
4737
4738 if (kvm_lapic_enabled(vcpu)) {
4739 update_cr8_intercept(vcpu);
4740 kvm_lapic_sync_to_vapic(vcpu);
4741 }
4742
4743 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4744
4745 kvm_guest_enter();
4746
4747 if (unlikely(vcpu->arch.switch_db_regs)) {
4748 set_debugreg(0, 7);
4749 set_debugreg(vcpu->arch.eff_db[0], 0);
4750 set_debugreg(vcpu->arch.eff_db[1], 1);
4751 set_debugreg(vcpu->arch.eff_db[2], 2);
4752 set_debugreg(vcpu->arch.eff_db[3], 3);
4753 }
4754
4755 trace_kvm_entry(vcpu->vcpu_id);
4756 kvm_x86_ops->run(vcpu);
4757
4758 /*
4759 * If the guest has used debug registers, at least dr7
4760 * will be disabled while returning to the host.
4761 * If we don't have active breakpoints in the host, we don't
4762 * care about the messed up debug address registers. But if
4763 * we have some of them active, restore the old state.
4764 */
4765 if (hw_breakpoint_active())
4766 hw_breakpoint_restore();
4767
4768 atomic_set(&vcpu->guest_mode, 0);
4769 smp_wmb();
4770 local_irq_enable();
4771
4772 ++vcpu->stat.exits;
4773
4774 /*
4775 * We must have an instruction between local_irq_enable() and
4776 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4777 * the interrupt shadow. The stat.exits increment will do nicely.
4778 * But we need to prevent reordering, hence this barrier():
4779 */
4780 barrier();
4781
4782 kvm_guest_exit();
4783
4784 preempt_enable();
4785
4786 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4787
4788 /*
4789 * Profile KVM exit RIPs:
4790 */
4791 if (unlikely(prof_on == KVM_PROFILING)) {
4792 unsigned long rip = kvm_rip_read(vcpu);
4793 profile_hit(KVM_PROFILING, (void *)rip);
4794 }
4795
4796
4797 kvm_lapic_sync_from_vapic(vcpu);
4798
4799 r = kvm_x86_ops->handle_exit(vcpu);
4800 out:
4801 return r;
4802 }
4803
4804
4805 static int __vcpu_run(struct kvm_vcpu *vcpu)
4806 {
4807 int r;
4808 struct kvm *kvm = vcpu->kvm;
4809
4810 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4811 pr_debug("vcpu %d received sipi with vector # %x\n",
4812 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4813 kvm_lapic_reset(vcpu);
4814 r = kvm_arch_vcpu_reset(vcpu);
4815 if (r)
4816 return r;
4817 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4818 }
4819
4820 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4821 vapic_enter(vcpu);
4822
4823 r = 1;
4824 while (r > 0) {
4825 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4826 r = vcpu_enter_guest(vcpu);
4827 else {
4828 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4829 kvm_vcpu_block(vcpu);
4830 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4831 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
4832 {
4833 switch(vcpu->arch.mp_state) {
4834 case KVM_MP_STATE_HALTED:
4835 vcpu->arch.mp_state =
4836 KVM_MP_STATE_RUNNABLE;
4837 case KVM_MP_STATE_RUNNABLE:
4838 break;
4839 case KVM_MP_STATE_SIPI_RECEIVED:
4840 default:
4841 r = -EINTR;
4842 break;
4843 }
4844 }
4845 }
4846
4847 if (r <= 0)
4848 break;
4849
4850 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4851 if (kvm_cpu_has_pending_timer(vcpu))
4852 kvm_inject_pending_timer_irqs(vcpu);
4853
4854 if (dm_request_for_irq_injection(vcpu)) {
4855 r = -EINTR;
4856 vcpu->run->exit_reason = KVM_EXIT_INTR;
4857 ++vcpu->stat.request_irq_exits;
4858 }
4859 if (signal_pending(current)) {
4860 r = -EINTR;
4861 vcpu->run->exit_reason = KVM_EXIT_INTR;
4862 ++vcpu->stat.signal_exits;
4863 }
4864 if (need_resched()) {
4865 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4866 kvm_resched(vcpu);
4867 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4868 }
4869 }
4870
4871 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4872
4873 vapic_exit(vcpu);
4874
4875 return r;
4876 }
4877
4878 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4879 {
4880 int r;
4881 sigset_t sigsaved;
4882
4883 if (vcpu->sigset_active)
4884 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4885
4886 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4887 kvm_vcpu_block(vcpu);
4888 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4889 r = -EAGAIN;
4890 goto out;
4891 }
4892
4893 /* re-sync apic's tpr */
4894 if (!irqchip_in_kernel(vcpu->kvm))
4895 kvm_set_cr8(vcpu, kvm_run->cr8);
4896
4897 if (vcpu->arch.pio.count || vcpu->mmio_needed ||
4898 vcpu->arch.emulate_ctxt.restart) {
4899 if (vcpu->mmio_needed) {
4900 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4901 vcpu->mmio_read_completed = 1;
4902 vcpu->mmio_needed = 0;
4903 }
4904 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4905 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
4906 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4907 if (r != EMULATE_DONE) {
4908 r = 0;
4909 goto out;
4910 }
4911 }
4912 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4913 kvm_register_write(vcpu, VCPU_REGS_RAX,
4914 kvm_run->hypercall.ret);
4915
4916 r = __vcpu_run(vcpu);
4917
4918 out:
4919 post_kvm_run_save(vcpu);
4920 if (vcpu->sigset_active)
4921 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4922
4923 return r;
4924 }
4925
4926 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4927 {
4928 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4929 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4930 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4931 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4932 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4933 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4934 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4935 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4936 #ifdef CONFIG_X86_64
4937 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4938 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4939 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4940 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4941 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4942 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4943 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4944 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4945 #endif
4946
4947 regs->rip = kvm_rip_read(vcpu);
4948 regs->rflags = kvm_get_rflags(vcpu);
4949
4950 return 0;
4951 }
4952
4953 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4954 {
4955 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4956 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4957 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4958 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4959 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4960 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4961 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4962 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4963 #ifdef CONFIG_X86_64
4964 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4965 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4966 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4967 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4968 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4969 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4970 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4971 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4972 #endif
4973
4974 kvm_rip_write(vcpu, regs->rip);
4975 kvm_set_rflags(vcpu, regs->rflags);
4976
4977 vcpu->arch.exception.pending = false;
4978
4979 return 0;
4980 }
4981
4982 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4983 {
4984 struct kvm_segment cs;
4985
4986 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4987 *db = cs.db;
4988 *l = cs.l;
4989 }
4990 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4991
4992 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4993 struct kvm_sregs *sregs)
4994 {
4995 struct desc_ptr dt;
4996
4997 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4998 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4999 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5000 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5001 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5002 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5003
5004 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5005 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5006
5007 kvm_x86_ops->get_idt(vcpu, &dt);
5008 sregs->idt.limit = dt.size;
5009 sregs->idt.base = dt.address;
5010 kvm_x86_ops->get_gdt(vcpu, &dt);
5011 sregs->gdt.limit = dt.size;
5012 sregs->gdt.base = dt.address;
5013
5014 sregs->cr0 = kvm_read_cr0(vcpu);
5015 sregs->cr2 = vcpu->arch.cr2;
5016 sregs->cr3 = vcpu->arch.cr3;
5017 sregs->cr4 = kvm_read_cr4(vcpu);
5018 sregs->cr8 = kvm_get_cr8(vcpu);
5019 sregs->efer = vcpu->arch.efer;
5020 sregs->apic_base = kvm_get_apic_base(vcpu);
5021
5022 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5023
5024 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5025 set_bit(vcpu->arch.interrupt.nr,
5026 (unsigned long *)sregs->interrupt_bitmap);
5027
5028 return 0;
5029 }
5030
5031 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5032 struct kvm_mp_state *mp_state)
5033 {
5034 mp_state->mp_state = vcpu->arch.mp_state;
5035 return 0;
5036 }
5037
5038 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5039 struct kvm_mp_state *mp_state)
5040 {
5041 vcpu->arch.mp_state = mp_state->mp_state;
5042 return 0;
5043 }
5044
5045 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5046 bool has_error_code, u32 error_code)
5047 {
5048 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5049 int cs_db, cs_l, ret;
5050 cache_all_regs(vcpu);
5051
5052 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5053
5054 vcpu->arch.emulate_ctxt.vcpu = vcpu;
5055 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
5056 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
5057 vcpu->arch.emulate_ctxt.mode =
5058 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
5059 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
5060 ? X86EMUL_MODE_VM86 : cs_l
5061 ? X86EMUL_MODE_PROT64 : cs_db
5062 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
5063 memset(c, 0, sizeof(struct decode_cache));
5064 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
5065
5066 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt, &emulate_ops,
5067 tss_selector, reason, has_error_code,
5068 error_code);
5069
5070 if (ret)
5071 return EMULATE_FAIL;
5072
5073 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5074 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5075 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5076 return EMULATE_DONE;
5077 }
5078 EXPORT_SYMBOL_GPL(kvm_task_switch);
5079
5080 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5081 struct kvm_sregs *sregs)
5082 {
5083 int mmu_reset_needed = 0;
5084 int pending_vec, max_bits;
5085 struct desc_ptr dt;
5086
5087 dt.size = sregs->idt.limit;
5088 dt.address = sregs->idt.base;
5089 kvm_x86_ops->set_idt(vcpu, &dt);
5090 dt.size = sregs->gdt.limit;
5091 dt.address = sregs->gdt.base;
5092 kvm_x86_ops->set_gdt(vcpu, &dt);
5093
5094 vcpu->arch.cr2 = sregs->cr2;
5095 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5096 vcpu->arch.cr3 = sregs->cr3;
5097
5098 kvm_set_cr8(vcpu, sregs->cr8);
5099
5100 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5101 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5102 kvm_set_apic_base(vcpu, sregs->apic_base);
5103
5104 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5105 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5106 vcpu->arch.cr0 = sregs->cr0;
5107
5108 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5109 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5110 if (sregs->cr4 & X86_CR4_OSXSAVE)
5111 update_cpuid(vcpu);
5112 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5113 load_pdptrs(vcpu, vcpu->arch.cr3);
5114 mmu_reset_needed = 1;
5115 }
5116
5117 if (mmu_reset_needed)
5118 kvm_mmu_reset_context(vcpu);
5119
5120 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5121 pending_vec = find_first_bit(
5122 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5123 if (pending_vec < max_bits) {
5124 kvm_queue_interrupt(vcpu, pending_vec, false);
5125 pr_debug("Set back pending irq %d\n", pending_vec);
5126 if (irqchip_in_kernel(vcpu->kvm))
5127 kvm_pic_clear_isr_ack(vcpu->kvm);
5128 }
5129
5130 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5131 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5132 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5133 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5134 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5135 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5136
5137 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5138 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5139
5140 update_cr8_intercept(vcpu);
5141
5142 /* Older userspace won't unhalt the vcpu on reset. */
5143 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5144 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5145 !is_protmode(vcpu))
5146 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5147
5148 return 0;
5149 }
5150
5151 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5152 struct kvm_guest_debug *dbg)
5153 {
5154 unsigned long rflags;
5155 int i, r;
5156
5157 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5158 r = -EBUSY;
5159 if (vcpu->arch.exception.pending)
5160 goto out;
5161 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5162 kvm_queue_exception(vcpu, DB_VECTOR);
5163 else
5164 kvm_queue_exception(vcpu, BP_VECTOR);
5165 }
5166
5167 /*
5168 * Read rflags as long as potentially injected trace flags are still
5169 * filtered out.
5170 */
5171 rflags = kvm_get_rflags(vcpu);
5172
5173 vcpu->guest_debug = dbg->control;
5174 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5175 vcpu->guest_debug = 0;
5176
5177 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5178 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5179 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5180 vcpu->arch.switch_db_regs =
5181 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5182 } else {
5183 for (i = 0; i < KVM_NR_DB_REGS; i++)
5184 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5185 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5186 }
5187
5188 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5189 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5190 get_segment_base(vcpu, VCPU_SREG_CS);
5191
5192 /*
5193 * Trigger an rflags update that will inject or remove the trace
5194 * flags.
5195 */
5196 kvm_set_rflags(vcpu, rflags);
5197
5198 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5199
5200 r = 0;
5201
5202 out:
5203
5204 return r;
5205 }
5206
5207 /*
5208 * Translate a guest virtual address to a guest physical address.
5209 */
5210 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5211 struct kvm_translation *tr)
5212 {
5213 unsigned long vaddr = tr->linear_address;
5214 gpa_t gpa;
5215 int idx;
5216
5217 idx = srcu_read_lock(&vcpu->kvm->srcu);
5218 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5219 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5220 tr->physical_address = gpa;
5221 tr->valid = gpa != UNMAPPED_GVA;
5222 tr->writeable = 1;
5223 tr->usermode = 0;
5224
5225 return 0;
5226 }
5227
5228 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5229 {
5230 struct i387_fxsave_struct *fxsave =
5231 &vcpu->arch.guest_fpu.state->fxsave;
5232
5233 memcpy(fpu->fpr, fxsave->st_space, 128);
5234 fpu->fcw = fxsave->cwd;
5235 fpu->fsw = fxsave->swd;
5236 fpu->ftwx = fxsave->twd;
5237 fpu->last_opcode = fxsave->fop;
5238 fpu->last_ip = fxsave->rip;
5239 fpu->last_dp = fxsave->rdp;
5240 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5241
5242 return 0;
5243 }
5244
5245 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5246 {
5247 struct i387_fxsave_struct *fxsave =
5248 &vcpu->arch.guest_fpu.state->fxsave;
5249
5250 memcpy(fxsave->st_space, fpu->fpr, 128);
5251 fxsave->cwd = fpu->fcw;
5252 fxsave->swd = fpu->fsw;
5253 fxsave->twd = fpu->ftwx;
5254 fxsave->fop = fpu->last_opcode;
5255 fxsave->rip = fpu->last_ip;
5256 fxsave->rdp = fpu->last_dp;
5257 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5258
5259 return 0;
5260 }
5261
5262 int fx_init(struct kvm_vcpu *vcpu)
5263 {
5264 int err;
5265
5266 err = fpu_alloc(&vcpu->arch.guest_fpu);
5267 if (err)
5268 return err;
5269
5270 fpu_finit(&vcpu->arch.guest_fpu);
5271
5272 /*
5273 * Ensure guest xcr0 is valid for loading
5274 */
5275 vcpu->arch.xcr0 = XSTATE_FP;
5276
5277 vcpu->arch.cr0 |= X86_CR0_ET;
5278
5279 return 0;
5280 }
5281 EXPORT_SYMBOL_GPL(fx_init);
5282
5283 static void fx_free(struct kvm_vcpu *vcpu)
5284 {
5285 fpu_free(&vcpu->arch.guest_fpu);
5286 }
5287
5288 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5289 {
5290 if (vcpu->guest_fpu_loaded)
5291 return;
5292
5293 /*
5294 * Restore all possible states in the guest,
5295 * and assume host would use all available bits.
5296 * Guest xcr0 would be loaded later.
5297 */
5298 kvm_put_guest_xcr0(vcpu);
5299 vcpu->guest_fpu_loaded = 1;
5300 unlazy_fpu(current);
5301 fpu_restore_checking(&vcpu->arch.guest_fpu);
5302 trace_kvm_fpu(1);
5303 }
5304
5305 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5306 {
5307 kvm_put_guest_xcr0(vcpu);
5308
5309 if (!vcpu->guest_fpu_loaded)
5310 return;
5311
5312 vcpu->guest_fpu_loaded = 0;
5313 fpu_save_init(&vcpu->arch.guest_fpu);
5314 ++vcpu->stat.fpu_reload;
5315 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5316 trace_kvm_fpu(0);
5317 }
5318
5319 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5320 {
5321 if (vcpu->arch.time_page) {
5322 kvm_release_page_dirty(vcpu->arch.time_page);
5323 vcpu->arch.time_page = NULL;
5324 }
5325
5326 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5327 fx_free(vcpu);
5328 kvm_x86_ops->vcpu_free(vcpu);
5329 }
5330
5331 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5332 unsigned int id)
5333 {
5334 return kvm_x86_ops->vcpu_create(kvm, id);
5335 }
5336
5337 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5338 {
5339 int r;
5340
5341 vcpu->arch.mtrr_state.have_fixed = 1;
5342 vcpu_load(vcpu);
5343 r = kvm_arch_vcpu_reset(vcpu);
5344 if (r == 0)
5345 r = kvm_mmu_setup(vcpu);
5346 vcpu_put(vcpu);
5347 if (r < 0)
5348 goto free_vcpu;
5349
5350 return 0;
5351 free_vcpu:
5352 kvm_x86_ops->vcpu_free(vcpu);
5353 return r;
5354 }
5355
5356 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5357 {
5358 vcpu_load(vcpu);
5359 kvm_mmu_unload(vcpu);
5360 vcpu_put(vcpu);
5361
5362 fx_free(vcpu);
5363 kvm_x86_ops->vcpu_free(vcpu);
5364 }
5365
5366 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5367 {
5368 vcpu->arch.nmi_pending = false;
5369 vcpu->arch.nmi_injected = false;
5370
5371 vcpu->arch.switch_db_regs = 0;
5372 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5373 vcpu->arch.dr6 = DR6_FIXED_1;
5374 vcpu->arch.dr7 = DR7_FIXED_1;
5375
5376 return kvm_x86_ops->vcpu_reset(vcpu);
5377 }
5378
5379 int kvm_arch_hardware_enable(void *garbage)
5380 {
5381 /*
5382 * Since this may be called from a hotplug notifcation,
5383 * we can't get the CPU frequency directly.
5384 */
5385 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5386 int cpu = raw_smp_processor_id();
5387 per_cpu(cpu_tsc_khz, cpu) = 0;
5388 }
5389
5390 kvm_shared_msr_cpu_online();
5391
5392 return kvm_x86_ops->hardware_enable(garbage);
5393 }
5394
5395 void kvm_arch_hardware_disable(void *garbage)
5396 {
5397 kvm_x86_ops->hardware_disable(garbage);
5398 drop_user_return_notifiers(garbage);
5399 }
5400
5401 int kvm_arch_hardware_setup(void)
5402 {
5403 return kvm_x86_ops->hardware_setup();
5404 }
5405
5406 void kvm_arch_hardware_unsetup(void)
5407 {
5408 kvm_x86_ops->hardware_unsetup();
5409 }
5410
5411 void kvm_arch_check_processor_compat(void *rtn)
5412 {
5413 kvm_x86_ops->check_processor_compatibility(rtn);
5414 }
5415
5416 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5417 {
5418 struct page *page;
5419 struct kvm *kvm;
5420 int r;
5421
5422 BUG_ON(vcpu->kvm == NULL);
5423 kvm = vcpu->kvm;
5424
5425 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5426 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5427 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5428 else
5429 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5430
5431 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5432 if (!page) {
5433 r = -ENOMEM;
5434 goto fail;
5435 }
5436 vcpu->arch.pio_data = page_address(page);
5437
5438 r = kvm_mmu_create(vcpu);
5439 if (r < 0)
5440 goto fail_free_pio_data;
5441
5442 if (irqchip_in_kernel(kvm)) {
5443 r = kvm_create_lapic(vcpu);
5444 if (r < 0)
5445 goto fail_mmu_destroy;
5446 }
5447
5448 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5449 GFP_KERNEL);
5450 if (!vcpu->arch.mce_banks) {
5451 r = -ENOMEM;
5452 goto fail_free_lapic;
5453 }
5454 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5455
5456 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5457 goto fail_free_mce_banks;
5458
5459 return 0;
5460 fail_free_mce_banks:
5461 kfree(vcpu->arch.mce_banks);
5462 fail_free_lapic:
5463 kvm_free_lapic(vcpu);
5464 fail_mmu_destroy:
5465 kvm_mmu_destroy(vcpu);
5466 fail_free_pio_data:
5467 free_page((unsigned long)vcpu->arch.pio_data);
5468 fail:
5469 return r;
5470 }
5471
5472 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5473 {
5474 int idx;
5475
5476 kfree(vcpu->arch.mce_banks);
5477 kvm_free_lapic(vcpu);
5478 idx = srcu_read_lock(&vcpu->kvm->srcu);
5479 kvm_mmu_destroy(vcpu);
5480 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5481 free_page((unsigned long)vcpu->arch.pio_data);
5482 }
5483
5484 struct kvm *kvm_arch_create_vm(void)
5485 {
5486 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5487
5488 if (!kvm)
5489 return ERR_PTR(-ENOMEM);
5490
5491 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5492 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5493
5494 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5495 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5496
5497 rdtscll(kvm->arch.vm_init_tsc);
5498
5499 return kvm;
5500 }
5501
5502 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5503 {
5504 vcpu_load(vcpu);
5505 kvm_mmu_unload(vcpu);
5506 vcpu_put(vcpu);
5507 }
5508
5509 static void kvm_free_vcpus(struct kvm *kvm)
5510 {
5511 unsigned int i;
5512 struct kvm_vcpu *vcpu;
5513
5514 /*
5515 * Unpin any mmu pages first.
5516 */
5517 kvm_for_each_vcpu(i, vcpu, kvm)
5518 kvm_unload_vcpu_mmu(vcpu);
5519 kvm_for_each_vcpu(i, vcpu, kvm)
5520 kvm_arch_vcpu_free(vcpu);
5521
5522 mutex_lock(&kvm->lock);
5523 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5524 kvm->vcpus[i] = NULL;
5525
5526 atomic_set(&kvm->online_vcpus, 0);
5527 mutex_unlock(&kvm->lock);
5528 }
5529
5530 void kvm_arch_sync_events(struct kvm *kvm)
5531 {
5532 kvm_free_all_assigned_devices(kvm);
5533 kvm_free_pit(kvm);
5534 }
5535
5536 void kvm_arch_destroy_vm(struct kvm *kvm)
5537 {
5538 kvm_iommu_unmap_guest(kvm);
5539 kfree(kvm->arch.vpic);
5540 kfree(kvm->arch.vioapic);
5541 kvm_free_vcpus(kvm);
5542 kvm_free_physmem(kvm);
5543 if (kvm->arch.apic_access_page)
5544 put_page(kvm->arch.apic_access_page);
5545 if (kvm->arch.ept_identity_pagetable)
5546 put_page(kvm->arch.ept_identity_pagetable);
5547 cleanup_srcu_struct(&kvm->srcu);
5548 kfree(kvm);
5549 }
5550
5551 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5552 struct kvm_memory_slot *memslot,
5553 struct kvm_memory_slot old,
5554 struct kvm_userspace_memory_region *mem,
5555 int user_alloc)
5556 {
5557 int npages = memslot->npages;
5558 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
5559
5560 /* Prevent internal slot pages from being moved by fork()/COW. */
5561 if (memslot->id >= KVM_MEMORY_SLOTS)
5562 map_flags = MAP_SHARED | MAP_ANONYMOUS;
5563
5564 /*To keep backward compatibility with older userspace,
5565 *x86 needs to hanlde !user_alloc case.
5566 */
5567 if (!user_alloc) {
5568 if (npages && !old.rmap) {
5569 unsigned long userspace_addr;
5570
5571 down_write(&current->mm->mmap_sem);
5572 userspace_addr = do_mmap(NULL, 0,
5573 npages * PAGE_SIZE,
5574 PROT_READ | PROT_WRITE,
5575 map_flags,
5576 0);
5577 up_write(&current->mm->mmap_sem);
5578
5579 if (IS_ERR((void *)userspace_addr))
5580 return PTR_ERR((void *)userspace_addr);
5581
5582 memslot->userspace_addr = userspace_addr;
5583 }
5584 }
5585
5586
5587 return 0;
5588 }
5589
5590 void kvm_arch_commit_memory_region(struct kvm *kvm,
5591 struct kvm_userspace_memory_region *mem,
5592 struct kvm_memory_slot old,
5593 int user_alloc)
5594 {
5595
5596 int npages = mem->memory_size >> PAGE_SHIFT;
5597
5598 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5599 int ret;
5600
5601 down_write(&current->mm->mmap_sem);
5602 ret = do_munmap(current->mm, old.userspace_addr,
5603 old.npages * PAGE_SIZE);
5604 up_write(&current->mm->mmap_sem);
5605 if (ret < 0)
5606 printk(KERN_WARNING
5607 "kvm_vm_ioctl_set_memory_region: "
5608 "failed to munmap memory\n");
5609 }
5610
5611 spin_lock(&kvm->mmu_lock);
5612 if (!kvm->arch.n_requested_mmu_pages) {
5613 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5614 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5615 }
5616
5617 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5618 spin_unlock(&kvm->mmu_lock);
5619 }
5620
5621 void kvm_arch_flush_shadow(struct kvm *kvm)
5622 {
5623 kvm_mmu_zap_all(kvm);
5624 kvm_reload_remote_mmus(kvm);
5625 }
5626
5627 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5628 {
5629 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5630 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5631 || vcpu->arch.nmi_pending ||
5632 (kvm_arch_interrupt_allowed(vcpu) &&
5633 kvm_cpu_has_interrupt(vcpu));
5634 }
5635
5636 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5637 {
5638 int me;
5639 int cpu = vcpu->cpu;
5640
5641 if (waitqueue_active(&vcpu->wq)) {
5642 wake_up_interruptible(&vcpu->wq);
5643 ++vcpu->stat.halt_wakeup;
5644 }
5645
5646 me = get_cpu();
5647 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5648 if (atomic_xchg(&vcpu->guest_mode, 0))
5649 smp_send_reschedule(cpu);
5650 put_cpu();
5651 }
5652
5653 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5654 {
5655 return kvm_x86_ops->interrupt_allowed(vcpu);
5656 }
5657
5658 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5659 {
5660 unsigned long current_rip = kvm_rip_read(vcpu) +
5661 get_segment_base(vcpu, VCPU_SREG_CS);
5662
5663 return current_rip == linear_rip;
5664 }
5665 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5666
5667 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5668 {
5669 unsigned long rflags;
5670
5671 rflags = kvm_x86_ops->get_rflags(vcpu);
5672 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5673 rflags &= ~X86_EFLAGS_TF;
5674 return rflags;
5675 }
5676 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5677
5678 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5679 {
5680 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5681 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5682 rflags |= X86_EFLAGS_TF;
5683 kvm_x86_ops->set_rflags(vcpu, rflags);
5684 }
5685 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5686
5687 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5688 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5689 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5690 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5691 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5692 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5693 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5694 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5695 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5696 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5697 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5698 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
Tomato firmware and modifications.