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[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / arch / x86 / include / asm / paravirt_types.h
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1 #ifndef _ASM_X86_PARAVIRT_TYPES_H
2 #define _ASM_X86_PARAVIRT_TYPES_H
4 /* Bitmask of what can be clobbered: usually at least eax. */
5 #define CLBR_NONE 0
6 #define CLBR_EAX (1 << 0)
7 #define CLBR_ECX (1 << 1)
8 #define CLBR_EDX (1 << 2)
9 #define CLBR_EDI (1 << 3)
11 #ifdef CONFIG_X86_32
12 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
13 #define CLBR_ANY ((1 << 4) - 1)
15 #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX)
16 #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX)
17 #define CLBR_SCRATCH (0)
18 #else
19 #define CLBR_RAX CLBR_EAX
20 #define CLBR_RCX CLBR_ECX
21 #define CLBR_RDX CLBR_EDX
22 #define CLBR_RDI CLBR_EDI
23 #define CLBR_RSI (1 << 4)
24 #define CLBR_R8 (1 << 5)
25 #define CLBR_R9 (1 << 6)
26 #define CLBR_R10 (1 << 7)
27 #define CLBR_R11 (1 << 8)
29 #define CLBR_ANY ((1 << 9) - 1)
31 #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
32 CLBR_RCX | CLBR_R8 | CLBR_R9)
33 #define CLBR_RET_REG (CLBR_RAX)
34 #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11)
36 #endif /* X86_64 */
38 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
40 #ifndef __ASSEMBLY__
42 #include <asm/desc_defs.h>
43 #include <asm/kmap_types.h>
45 struct page;
46 struct thread_struct;
47 struct desc_ptr;
48 struct tss_struct;
49 struct mm_struct;
50 struct desc_struct;
51 struct task_struct;
52 struct cpumask;
55 * Wrapper type for pointers to code which uses the non-standard
56 * calling convention. See PV_CALL_SAVE_REGS_THUNK below.
58 struct paravirt_callee_save {
59 void *func;
62 /* general info */
63 struct pv_info {
64 unsigned int kernel_rpl;
65 int shared_kernel_pmd;
66 int paravirt_enabled;
67 const char *name;
70 struct pv_init_ops {
72 * Patch may replace one of the defined code sequences with
73 * arbitrary code, subject to the same register constraints.
74 * This generally means the code is not free to clobber any
75 * registers other than EAX. The patch function should return
76 * the number of bytes of code generated, as we nop pad the
77 * rest in generic code.
79 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
80 unsigned long addr, unsigned len);
84 struct pv_lazy_ops {
85 /* Set deferred update mode, used for batching operations. */
86 void (*enter)(void);
87 void (*leave)(void);
90 struct pv_time_ops {
91 unsigned long long (*sched_clock)(void);
92 unsigned long (*get_tsc_khz)(void);
95 struct pv_cpu_ops {
96 /* hooks for various privileged instructions */
97 unsigned long (*get_debugreg)(int regno);
98 void (*set_debugreg)(int regno, unsigned long value);
100 void (*clts)(void);
102 unsigned long (*read_cr0)(void);
103 void (*write_cr0)(unsigned long);
105 unsigned long (*read_cr4_safe)(void);
106 unsigned long (*read_cr4)(void);
107 void (*write_cr4)(unsigned long);
109 #ifdef CONFIG_X86_64
110 unsigned long (*read_cr8)(void);
111 void (*write_cr8)(unsigned long);
112 #endif
114 /* Segment descriptor handling */
115 void (*load_tr_desc)(void);
116 void (*load_gdt)(const struct desc_ptr *);
117 void (*load_idt)(const struct desc_ptr *);
118 void (*store_gdt)(struct desc_ptr *);
119 void (*store_idt)(struct desc_ptr *);
120 void (*set_ldt)(const void *desc, unsigned entries);
121 unsigned long (*store_tr)(void);
122 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
123 #ifdef CONFIG_X86_64
124 void (*load_gs_index)(unsigned int idx);
125 #endif
126 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
127 const void *desc);
128 void (*write_gdt_entry)(struct desc_struct *,
129 int entrynum, const void *desc, int size);
130 void (*write_idt_entry)(gate_desc *,
131 int entrynum, const gate_desc *gate);
132 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
133 void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
135 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
137 void (*set_iopl_mask)(unsigned mask);
139 void (*wbinvd)(void);
140 void (*io_delay)(void);
142 /* cpuid emulation, mostly so that caps bits can be disabled */
143 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
144 unsigned int *ecx, unsigned int *edx);
146 /* MSR, PMC and TSR operations.
147 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
148 u64 (*read_msr)(unsigned int msr, int *err);
149 int (*rdmsr_regs)(u32 *regs);
150 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
151 int (*wrmsr_regs)(u32 *regs);
153 u64 (*read_tsc)(void);
154 u64 (*read_pmc)(int counter);
155 unsigned long long (*read_tscp)(unsigned int *aux);
158 * Atomically enable interrupts and return to userspace. This
159 * is only ever used to return to 32-bit processes; in a
160 * 64-bit kernel, it's used for 32-on-64 compat processes, but
161 * never native 64-bit processes. (Jump, not call.)
163 void (*irq_enable_sysexit)(void);
166 * Switch to usermode gs and return to 64-bit usermode using
167 * sysret. Only used in 64-bit kernels to return to 64-bit
168 * processes. Usermode register state, including %rsp, must
169 * already be restored.
171 void (*usergs_sysret64)(void);
174 * Switch to usermode gs and return to 32-bit usermode using
175 * sysret. Used to return to 32-on-64 compat processes.
176 * Other usermode register state, including %esp, must already
177 * be restored.
179 void (*usergs_sysret32)(void);
181 /* Normal iret. Jump to this with the standard iret stack
182 frame set up. */
183 void (*iret)(void);
185 void (*swapgs)(void);
187 void (*start_context_switch)(struct task_struct *prev);
188 void (*end_context_switch)(struct task_struct *next);
191 struct pv_irq_ops {
193 * Get/set interrupt state. save_fl and restore_fl are only
194 * expected to use X86_EFLAGS_IF; all other bits
195 * returned from save_fl are undefined, and may be ignored by
196 * restore_fl.
198 * NOTE: These functions callers expect the callee to preserve
199 * more registers than the standard C calling convention.
201 struct paravirt_callee_save save_fl;
202 struct paravirt_callee_save restore_fl;
203 struct paravirt_callee_save irq_disable;
204 struct paravirt_callee_save irq_enable;
206 void (*safe_halt)(void);
207 void (*halt)(void);
209 #ifdef CONFIG_X86_64
210 void (*adjust_exception_frame)(void);
211 #endif
214 struct pv_apic_ops {
215 #ifdef CONFIG_X86_LOCAL_APIC
216 void (*startup_ipi_hook)(int phys_apicid,
217 unsigned long start_eip,
218 unsigned long start_esp);
219 #endif
222 struct pv_mmu_ops {
223 unsigned long (*read_cr2)(void);
224 void (*write_cr2)(unsigned long);
226 unsigned long (*read_cr3)(void);
227 void (*write_cr3)(unsigned long);
230 * Hooks for intercepting the creation/use/destruction of an
231 * mm_struct.
233 void (*activate_mm)(struct mm_struct *prev,
234 struct mm_struct *next);
235 void (*dup_mmap)(struct mm_struct *oldmm,
236 struct mm_struct *mm);
237 void (*exit_mmap)(struct mm_struct *mm);
240 /* TLB operations */
241 void (*flush_tlb_user)(void);
242 void (*flush_tlb_kernel)(void);
243 void (*flush_tlb_single)(unsigned long addr);
244 void (*flush_tlb_others)(const struct cpumask *cpus,
245 struct mm_struct *mm,
246 unsigned long va);
248 /* Hooks for allocating and freeing a pagetable top-level */
249 int (*pgd_alloc)(struct mm_struct *mm);
250 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
253 * Hooks for allocating/releasing pagetable pages when they're
254 * attached to a pagetable
256 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
257 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
258 void (*alloc_pmd_clone)(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count);
259 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
260 void (*release_pte)(unsigned long pfn);
261 void (*release_pmd)(unsigned long pfn);
262 void (*release_pud)(unsigned long pfn);
264 /* Pagetable manipulation functions */
265 void (*set_pte)(pte_t *ptep, pte_t pteval);
266 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
267 pte_t *ptep, pte_t pteval);
268 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
269 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
270 pte_t *ptep);
271 void (*pte_update_defer)(struct mm_struct *mm,
272 unsigned long addr, pte_t *ptep);
274 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
275 pte_t *ptep);
276 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
277 pte_t *ptep, pte_t pte);
279 struct paravirt_callee_save pte_val;
280 struct paravirt_callee_save make_pte;
282 struct paravirt_callee_save pgd_val;
283 struct paravirt_callee_save make_pgd;
285 #if PAGETABLE_LEVELS >= 3
286 #ifdef CONFIG_X86_PAE
287 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
288 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
289 pte_t *ptep);
290 void (*pmd_clear)(pmd_t *pmdp);
292 #endif /* CONFIG_X86_PAE */
294 void (*set_pud)(pud_t *pudp, pud_t pudval);
296 struct paravirt_callee_save pmd_val;
297 struct paravirt_callee_save make_pmd;
299 #if PAGETABLE_LEVELS == 4
300 struct paravirt_callee_save pud_val;
301 struct paravirt_callee_save make_pud;
303 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
304 #endif /* PAGETABLE_LEVELS == 4 */
305 #endif /* PAGETABLE_LEVELS >= 3 */
307 struct pv_lazy_ops lazy_mode;
309 /* dom0 ops */
311 /* Sometimes the physical address is a pfn, and sometimes its
312 an mfn. We can tell which is which from the index. */
313 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
314 phys_addr_t phys, pgprot_t flags);
317 struct arch_spinlock;
318 struct pv_lock_ops {
319 int (*spin_is_locked)(struct arch_spinlock *lock);
320 int (*spin_is_contended)(struct arch_spinlock *lock);
321 void (*spin_lock)(struct arch_spinlock *lock);
322 void (*spin_lock_flags)(struct arch_spinlock *lock, unsigned long flags);
323 int (*spin_trylock)(struct arch_spinlock *lock);
324 void (*spin_unlock)(struct arch_spinlock *lock);
327 /* This contains all the paravirt structures: we get a convenient
328 * number for each function using the offset which we use to indicate
329 * what to patch. */
330 struct paravirt_patch_template {
331 struct pv_init_ops pv_init_ops;
332 struct pv_time_ops pv_time_ops;
333 struct pv_cpu_ops pv_cpu_ops;
334 struct pv_irq_ops pv_irq_ops;
335 struct pv_apic_ops pv_apic_ops;
336 struct pv_mmu_ops pv_mmu_ops;
337 struct pv_lock_ops pv_lock_ops;
340 extern struct pv_info pv_info;
341 extern struct pv_init_ops pv_init_ops;
342 extern struct pv_time_ops pv_time_ops;
343 extern struct pv_cpu_ops pv_cpu_ops;
344 extern struct pv_irq_ops pv_irq_ops;
345 extern struct pv_apic_ops pv_apic_ops;
346 extern struct pv_mmu_ops pv_mmu_ops;
347 extern struct pv_lock_ops pv_lock_ops;
349 #define PARAVIRT_PATCH(x) \
350 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
352 #define paravirt_type(op) \
353 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
354 [paravirt_opptr] "i" (&(op))
355 #define paravirt_clobber(clobber) \
356 [paravirt_clobber] "i" (clobber)
359 * Generate some code, and mark it as patchable by the
360 * apply_paravirt() alternate instruction patcher.
362 #define _paravirt_alt(insn_string, type, clobber) \
363 "771:\n\t" insn_string "\n" "772:\n" \
364 ".pushsection .parainstructions,\"a\"\n" \
365 _ASM_ALIGN "\n" \
366 _ASM_PTR " 771b\n" \
367 " .byte " type "\n" \
368 " .byte 772b-771b\n" \
369 " .short " clobber "\n" \
370 ".popsection\n"
372 /* Generate patchable code, with the default asm parameters. */
373 #define paravirt_alt(insn_string) \
374 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
376 /* Simple instruction patching code. */
377 #define DEF_NATIVE(ops, name, code) \
378 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
379 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
381 unsigned paravirt_patch_nop(void);
382 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
383 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
384 unsigned paravirt_patch_ignore(unsigned len);
385 unsigned paravirt_patch_call(void *insnbuf,
386 const void *target, u16 tgt_clobbers,
387 unsigned long addr, u16 site_clobbers,
388 unsigned len);
389 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
390 unsigned long addr, unsigned len);
391 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
392 unsigned long addr, unsigned len);
394 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
395 const char *start, const char *end);
397 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
398 unsigned long addr, unsigned len);
400 int paravirt_disable_iospace(void);
403 * This generates an indirect call based on the operation type number.
404 * The type number, computed in PARAVIRT_PATCH, is derived from the
405 * offset into the paravirt_patch_template structure, and can therefore be
406 * freely converted back into a structure offset.
408 #define PARAVIRT_CALL "call *%c[paravirt_opptr];"
411 * These macros are intended to wrap calls through one of the paravirt
412 * ops structs, so that they can be later identified and patched at
413 * runtime.
415 * Normally, a call to a pv_op function is a simple indirect call:
416 * (pv_op_struct.operations)(args...).
418 * Unfortunately, this is a relatively slow operation for modern CPUs,
419 * because it cannot necessarily determine what the destination
420 * address is. In this case, the address is a runtime constant, so at
421 * the very least we can patch the call to e a simple direct call, or
422 * ideally, patch an inline implementation into the callsite. (Direct
423 * calls are essentially free, because the call and return addresses
424 * are completely predictable.)
426 * For i386, these macros rely on the standard gcc "regparm(3)" calling
427 * convention, in which the first three arguments are placed in %eax,
428 * %edx, %ecx (in that order), and the remaining arguments are placed
429 * on the stack. All caller-save registers (eax,edx,ecx) are expected
430 * to be modified (either clobbered or used for return values).
431 * X86_64, on the other hand, already specifies a register-based calling
432 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
433 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
434 * special handling for dealing with 4 arguments, unlike i386.
435 * However, x86_64 also have to clobber all caller saved registers, which
436 * unfortunately, are quite a bit (r8 - r11)
438 * The call instruction itself is marked by placing its start address
439 * and size into the .parainstructions section, so that
440 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
441 * appropriate patching under the control of the backend pv_init_ops
442 * implementation.
444 * Unfortunately there's no way to get gcc to generate the args setup
445 * for the call, and then allow the call itself to be generated by an
446 * inline asm. Because of this, we must do the complete arg setup and
447 * return value handling from within these macros. This is fairly
448 * cumbersome.
450 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
451 * It could be extended to more arguments, but there would be little
452 * to be gained from that. For each number of arguments, there are
453 * the two VCALL and CALL variants for void and non-void functions.
455 * When there is a return value, the invoker of the macro must specify
456 * the return type. The macro then uses sizeof() on that type to
457 * determine whether its a 32 or 64 bit value, and places the return
458 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
459 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
460 * the return value size.
462 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
463 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
464 * in low,high order
466 * Small structures are passed and returned in registers. The macro
467 * calling convention can't directly deal with this, so the wrapper
468 * functions must do this.
470 * These PVOP_* macros are only defined within this header. This
471 * means that all uses must be wrapped in inline functions. This also
472 * makes sure the incoming and outgoing types are always correct.
474 #ifdef CONFIG_X86_32
475 #define PVOP_VCALL_ARGS \
476 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
477 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
479 #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x))
480 #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x))
481 #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x))
483 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
484 "=c" (__ecx)
485 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
487 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx)
488 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
490 #define EXTRA_CLOBBERS
491 #define VEXTRA_CLOBBERS
492 #else /* CONFIG_X86_64 */
493 /* [re]ax isn't an arg, but the return val */
494 #define PVOP_VCALL_ARGS \
495 unsigned long __edi = __edi, __esi = __esi, \
496 __edx = __edx, __ecx = __ecx, __eax = __eax
497 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
499 #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x))
500 #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x))
501 #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x))
502 #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x))
504 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
505 "=S" (__esi), "=d" (__edx), \
506 "=c" (__ecx)
507 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
509 /* void functions are still allowed [re]ax for scratch */
510 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax)
511 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
513 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
514 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
515 #endif /* CONFIG_X86_32 */
517 #ifdef CONFIG_PARAVIRT_DEBUG
518 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
519 #else
520 #define PVOP_TEST_NULL(op) ((void)op)
521 #endif
523 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \
524 pre, post, ...) \
525 ({ \
526 rettype __ret; \
527 PVOP_CALL_ARGS; \
528 PVOP_TEST_NULL(op); \
529 /* This is 32-bit specific, but is okay in 64-bit */ \
530 /* since this condition will never hold */ \
531 if (sizeof(rettype) > sizeof(unsigned long)) { \
532 asm volatile(pre \
533 paravirt_alt(PARAVIRT_CALL) \
534 post \
535 : call_clbr \
536 : paravirt_type(op), \
537 paravirt_clobber(clbr), \
538 ##__VA_ARGS__ \
539 : "memory", "cc" extra_clbr); \
540 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
541 } else { \
542 asm volatile(pre \
543 paravirt_alt(PARAVIRT_CALL) \
544 post \
545 : call_clbr \
546 : paravirt_type(op), \
547 paravirt_clobber(clbr), \
548 ##__VA_ARGS__ \
549 : "memory", "cc" extra_clbr); \
550 __ret = (rettype)__eax; \
552 __ret; \
555 #define __PVOP_CALL(rettype, op, pre, post, ...) \
556 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \
557 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
559 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \
560 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
561 PVOP_CALLEE_CLOBBERS, , \
562 pre, post, ##__VA_ARGS__)
565 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
566 ({ \
567 PVOP_VCALL_ARGS; \
568 PVOP_TEST_NULL(op); \
569 asm volatile(pre \
570 paravirt_alt(PARAVIRT_CALL) \
571 post \
572 : call_clbr \
573 : paravirt_type(op), \
574 paravirt_clobber(clbr), \
575 ##__VA_ARGS__ \
576 : "memory", "cc" extra_clbr); \
579 #define __PVOP_VCALL(op, pre, post, ...) \
580 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \
581 VEXTRA_CLOBBERS, \
582 pre, post, ##__VA_ARGS__)
584 #define __PVOP_VCALLEESAVE(op, pre, post, ...) \
585 ____PVOP_VCALL(op.func, CLBR_RET_REG, \
586 PVOP_VCALLEE_CLOBBERS, , \
587 pre, post, ##__VA_ARGS__)
591 #define PVOP_CALL0(rettype, op) \
592 __PVOP_CALL(rettype, op, "", "")
593 #define PVOP_VCALL0(op) \
594 __PVOP_VCALL(op, "", "")
596 #define PVOP_CALLEE0(rettype, op) \
597 __PVOP_CALLEESAVE(rettype, op, "", "")
598 #define PVOP_VCALLEE0(op) \
599 __PVOP_VCALLEESAVE(op, "", "")
602 #define PVOP_CALL1(rettype, op, arg1) \
603 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
604 #define PVOP_VCALL1(op, arg1) \
605 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
607 #define PVOP_CALLEE1(rettype, op, arg1) \
608 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
609 #define PVOP_VCALLEE1(op, arg1) \
610 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
613 #define PVOP_CALL2(rettype, op, arg1, arg2) \
614 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
615 PVOP_CALL_ARG2(arg2))
616 #define PVOP_VCALL2(op, arg1, arg2) \
617 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
618 PVOP_CALL_ARG2(arg2))
620 #define PVOP_CALLEE2(rettype, op, arg1, arg2) \
621 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
622 PVOP_CALL_ARG2(arg2))
623 #define PVOP_VCALLEE2(op, arg1, arg2) \
624 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \
625 PVOP_CALL_ARG2(arg2))
628 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
629 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
630 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
631 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
632 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
633 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
635 /* This is the only difference in x86_64. We can make it much simpler */
636 #ifdef CONFIG_X86_32
637 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
638 __PVOP_CALL(rettype, op, \
639 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
640 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
641 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
642 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
643 __PVOP_VCALL(op, \
644 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
645 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
646 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
647 #else
648 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
649 __PVOP_CALL(rettype, op, "", "", \
650 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
651 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
652 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
653 __PVOP_VCALL(op, "", "", \
654 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
655 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
656 #endif
658 /* Lazy mode for batching updates / context switch */
659 enum paravirt_lazy_mode {
660 PARAVIRT_LAZY_NONE,
661 PARAVIRT_LAZY_MMU,
662 PARAVIRT_LAZY_CPU,
665 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
666 void paravirt_start_context_switch(struct task_struct *prev);
667 void paravirt_end_context_switch(struct task_struct *next);
669 void paravirt_enter_lazy_mmu(void);
670 void paravirt_leave_lazy_mmu(void);
672 void _paravirt_nop(void);
673 u32 _paravirt_ident_32(u32);
674 u64 _paravirt_ident_64(u64);
676 #define paravirt_nop ((void *)_paravirt_nop)
678 /* These all sit in the .parainstructions section to tell us what to patch. */
679 struct paravirt_patch_site {
680 u8 *instr; /* original instructions */
681 u8 instrtype; /* type of this instruction */
682 u8 len; /* length of original instruction */
683 u16 clobbers; /* what registers you may clobber */
686 extern struct paravirt_patch_site __parainstructions[],
687 __parainstructions_end[];
689 #endif /* __ASSEMBLY__ */
691 #endif /* _ASM_X86_PARAVIRT_TYPES_H */