GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / arch / x86 / include / asm / ipi.h
blob49d529bbc5a7650629a6df640568b0a1ce662f00
1 #ifndef _ASM_X86_IPI_H
2 #define _ASM_X86_IPI_H
4 #ifdef CONFIG_X86_LOCAL_APIC
6 /*
7 * Copyright 2004 James Cleverdon, IBM.
8 * Subject to the GNU Public License, v.2
10 * Generic APIC InterProcessor Interrupt code.
12 * Moved to include file by James Cleverdon from
13 * arch/x86-64/kernel/smp.c
15 * Copyrights from kernel/smp.c:
17 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
18 * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>
19 * (c) 2002,2003 Andi Kleen, SuSE Labs.
20 * Subject to the GNU Public License, v.2
23 #include <asm/hw_irq.h>
24 #include <asm/apic.h>
25 #include <asm/smp.h>
28 * the following functions deal with sending IPIs between CPUs.
30 * We use 'broadcast', CPU->CPU IPIs and self-IPIs too.
33 static inline unsigned int __prepare_ICR(unsigned int shortcut, int vector,
34 unsigned int dest)
36 unsigned int icr = shortcut | dest;
38 switch (vector) {
39 default:
40 icr |= APIC_DM_FIXED | vector;
41 break;
42 case NMI_VECTOR:
43 icr |= APIC_DM_NMI;
44 break;
46 return icr;
49 static inline int __prepare_ICR2(unsigned int mask)
51 return SET_APIC_DEST_FIELD(mask);
54 static inline void __xapic_wait_icr_idle(void)
56 while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY)
57 cpu_relax();
60 static inline void
61 __default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned int dest)
63 unsigned int cfg;
66 * Wait for idle.
68 __xapic_wait_icr_idle();
71 * No need to touch the target chip field
73 cfg = __prepare_ICR(shortcut, vector, dest);
76 * Send the IPI. The write to APIC_ICR fires this off.
78 native_apic_mem_write(APIC_ICR, cfg);
82 * This is used to send an IPI with no shorthand notation (the destination is
83 * specified in bits 56 to 63 of the ICR).
85 static inline void
86 __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest)
88 unsigned long cfg;
91 * Wait for idle.
93 if (unlikely(vector == NMI_VECTOR))
94 safe_apic_wait_icr_idle();
95 else
96 __xapic_wait_icr_idle();
99 * prepare target chip field
101 cfg = __prepare_ICR2(mask);
102 native_apic_mem_write(APIC_ICR2, cfg);
105 * program the ICR
107 cfg = __prepare_ICR(0, vector, dest);
110 * Send the IPI. The write to APIC_ICR fires this off.
112 native_apic_mem_write(APIC_ICR, cfg);
115 extern void default_send_IPI_mask_sequence_phys(const struct cpumask *mask,
116 int vector);
117 extern void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
118 int vector);
119 extern void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
120 int vector);
121 extern void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask,
122 int vector);
124 /* Avoid include hell */
125 #define NMI_VECTOR 0x02
127 extern int no_broadcast;
129 static inline void __default_local_send_IPI_allbutself(int vector)
131 if (no_broadcast || vector == NMI_VECTOR)
132 apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
133 else
134 __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector, apic->dest_logical);
137 static inline void __default_local_send_IPI_all(int vector)
139 if (no_broadcast || vector == NMI_VECTOR)
140 apic->send_IPI_mask(cpu_online_mask, vector);
141 else
142 __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector, apic->dest_logical);
145 #ifdef CONFIG_X86_32
146 extern void default_send_IPI_mask_logical(const struct cpumask *mask,
147 int vector);
148 extern void default_send_IPI_allbutself(int vector);
149 extern void default_send_IPI_all(int vector);
150 extern void default_send_IPI_self(int vector);
151 #endif
153 #endif
155 #endif /* _ASM_X86_IPI_H */