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[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / arch / x86 / include / asm / alternative.h
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1 #ifndef _ASM_X86_ALTERNATIVE_H
2 #define _ASM_X86_ALTERNATIVE_H
4 #include <linux/types.h>
5 #include <linux/stddef.h>
6 #include <linux/stringify.h>
7 #include <asm/asm.h>
9 /*
10 * Alternative inline assembly for SMP.
12 * The LOCK_PREFIX macro defined here replaces the LOCK and
13 * LOCK_PREFIX macros used everywhere in the source tree.
15 * SMP alternatives use the same data structures as the other
16 * alternatives and the X86_FEATURE_UP flag to indicate the case of a
17 * UP system running a SMP kernel. The existing apply_alternatives()
18 * works fine for patching a SMP kernel for UP.
20 * The SMP alternative tables can be kept after boot and contain both
21 * UP and SMP versions of the instructions to allow switching back to
22 * SMP at runtime, when hotplugging in a new CPU, which is especially
23 * useful in virtualized environments.
25 * The very common lock prefix is handled as special case in a
26 * separate table which is a pure address list without replacement ptr
27 * and size information. That keeps the table sizes small.
30 #ifdef CONFIG_SMP
31 #define LOCK_PREFIX_HERE \
32 ".section .smp_locks,\"a\"\n" \
33 ".balign 4\n" \
34 ".long 671f - .\n" /* offset */ \
35 ".previous\n" \
36 "671:"
38 #define LOCK_PREFIX LOCK_PREFIX_HERE "\n\tlock; "
40 #else /* ! CONFIG_SMP */
41 #define LOCK_PREFIX_HERE ""
42 #define LOCK_PREFIX ""
43 #endif
45 struct alt_instr {
46 u8 *instr; /* original instruction */
47 u8 *replacement;
48 u16 cpuid; /* cpuid bit set for replacement */
49 u8 instrlen; /* length of original instruction */
50 u8 replacementlen; /* length of new instruction, <= instrlen */
51 #ifdef CONFIG_X86_64
52 u32 pad2;
53 #endif
56 extern void alternative_instructions(void);
57 extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end);
59 struct module;
61 #ifdef CONFIG_SMP
62 extern void alternatives_smp_module_add(struct module *mod, char *name,
63 void *locks, void *locks_end,
64 void *text, void *text_end);
65 extern void alternatives_smp_module_del(struct module *mod);
66 extern void alternatives_smp_switch(int smp);
67 extern int alternatives_text_reserved(void *start, void *end);
68 #else
69 static inline void alternatives_smp_module_add(struct module *mod, char *name,
70 void *locks, void *locks_end,
71 void *text, void *text_end) {}
72 static inline void alternatives_smp_module_del(struct module *mod) {}
73 static inline void alternatives_smp_switch(int smp) {}
74 static inline int alternatives_text_reserved(void *start, void *end)
76 return 0;
78 #endif /* CONFIG_SMP */
80 /* alternative assembly primitive: */
81 #define ALTERNATIVE(oldinstr, newinstr, feature) \
83 "661:\n\t" oldinstr "\n662:\n" \
84 ".section .altinstructions,\"a\"\n" \
85 _ASM_ALIGN "\n" \
86 _ASM_PTR "661b\n" /* label */ \
87 _ASM_PTR "663f\n" /* new instruction */ \
88 " .word " __stringify(feature) "\n" /* feature bit */ \
89 " .byte 662b-661b\n" /* sourcelen */ \
90 " .byte 664f-663f\n" /* replacementlen */ \
91 ".previous\n" \
92 ".section .discard,\"aw\",@progbits\n" \
93 " .byte 0xff + (664f-663f) - (662b-661b)\n" /* rlen <= slen */ \
94 ".previous\n" \
95 ".section .altinstr_replacement, \"ax\"\n" \
96 "663:\n\t" newinstr "\n664:\n" /* replacement */ \
97 ".previous"
100 * This must be included *after* the definition of ALTERNATIVE due to
101 * <asm/arch_hweight.h>
103 #include <asm/cpufeature.h>
106 * Alternative instructions for different CPU types or capabilities.
108 * This allows to use optimized instructions even on generic binary
109 * kernels.
111 * length of oldinstr must be longer or equal the length of newinstr
112 * It can be padded with nops as needed.
114 * For non barrier like inlines please define new variants
115 * without volatile and memory clobber.
117 #define alternative(oldinstr, newinstr, feature) \
118 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory")
121 * Alternative inline assembly with input.
123 * Pecularities:
124 * No memory clobber here.
125 * Argument numbers start with 1.
126 * Best is to use constraints that are fixed size (like (%1) ... "r")
127 * If you use variable sized constraints like "m" or "g" in the
128 * replacement make sure to pad to the worst case length.
129 * Leaving an unused argument 0 to keep API compatibility.
131 #define alternative_input(oldinstr, newinstr, feature, input...) \
132 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \
133 : : "i" (0), ## input)
135 /* Like alternative_input, but with a single output argument */
136 #define alternative_io(oldinstr, newinstr, feature, output, input...) \
137 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \
138 : output : "i" (0), ## input)
140 /* Like alternative_io, but for replacing a direct call with another one. */
141 #define alternative_call(oldfunc, newfunc, feature, output, input...) \
142 asm volatile (ALTERNATIVE("call %P[old]", "call %P[new]", feature) \
143 : output : [old] "i" (oldfunc), [new] "i" (newfunc), ## input)
146 * use this macro(s) if you need more than one output parameter
147 * in alternative_io
149 #define ASM_OUTPUT2(a...) a
151 struct paravirt_patch_site;
152 #ifdef CONFIG_PARAVIRT
153 void apply_paravirt(struct paravirt_patch_site *start,
154 struct paravirt_patch_site *end);
155 #else
156 static inline void apply_paravirt(struct paravirt_patch_site *start,
157 struct paravirt_patch_site *end)
159 #define __parainstructions NULL
160 #define __parainstructions_end NULL
161 #endif
164 * Clear and restore the kernel write-protection flag on the local CPU.
165 * Allows the kernel to edit read-only pages.
166 * Side-effect: any interrupt handler running between save and restore will have
167 * the ability to write to read-only pages.
169 * Warning:
170 * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and
171 * no thread can be preempted in the instructions being modified (no iret to an
172 * invalid instruction possible) or if the instructions are changed from a
173 * consistent state to another consistent state atomically.
174 * More care must be taken when modifying code in the SMP case because of
175 * Intel's errata. text_poke_smp() takes care that errata, but still
176 * doesn't support NMI/MCE handler code modifying.
177 * On the local CPU you need to be protected again NMI or MCE handlers seeing an
178 * inconsistent instruction while you patch.
180 extern void *text_poke(void *addr, const void *opcode, size_t len);
181 extern void *text_poke_smp(void *addr, const void *opcode, size_t len);
183 #endif /* _ASM_X86_ALTERNATIVE_H */