2 * pcic.c: MicroSPARC-IIep PCI controller support
4 * Copyright (C) 1998 V. Roganov and G. Raiko
6 * Code is derived from Ultra/PCI PSYCHO controller support, see that
9 * Support for diverse IIep based platforms by Pete Zaitcev.
10 * CP-1200 by Eric Brower.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/init.h>
17 #include <linux/slab.h>
18 #include <linux/jiffies.h>
20 #include <asm/swift.h> /* for cache flushing. */
23 #include <linux/ctype.h>
24 #include <linux/pci.h>
25 #include <linux/time.h>
26 #include <linux/timex.h>
27 #include <linux/interrupt.h>
30 #include <asm/oplib.h>
33 #include <asm/timex.h>
34 #include <asm/timer.h>
35 #include <asm/uaccess.h>
36 #include <asm/irq_regs.h>
41 * I studied different documents and many live PROMs both from 2.30
42 * family and 3.xx versions. I came to the amazing conclusion: there is
43 * absolutely no way to route interrupts in IIep systems relying on
44 * information which PROM presents. We must hardcode interrupt routing
45 * schematics. And this actually sucks. -- zaitcev 1999/05/12
47 * To find irq for a device we determine which routing map
48 * is in effect or, in other words, on which machine we are running.
49 * We use PROM name for this although other techniques may be used
50 * in special cases (Gleb reports a PROMless IIep based system).
51 * Once we know the map we take device configuration address and
52 * find PCIC pin number where INT line goes. Then we may either program
53 * preferred irq into the PCIC or supply the preexisting irq to the device.
56 unsigned char busno
; /* PCI bus number */
57 unsigned char devfn
; /* Configuration address */
58 unsigned char pin
; /* PCIC external interrupt pin */
59 unsigned char irq
; /* Preferred IRQ (mappable in PCIC) */
60 unsigned int force
; /* Enforce preferred IRQ */
65 struct pcic_ca2irq
*intmap
;
70 * JavaEngine-1 apparently has different versions.
72 * According to communications with Sun folks, for P2 build 501-4628-03:
73 * pin 0 - parallel, audio;
76 * pin 3 - PS/2 kbd and mouse.
78 * OEM manual (805-1486):
82 * pin 3: Not connected
83 * OEM manual says that 501-4628 & 501-4811 are the same thing,
84 * only the latter has NAND flash in place.
86 * So far unofficial Sun wins over the OEM manual. Poor OEMs...
88 static struct pcic_ca2irq pcic_i_je1a
[] = { /* 501-4811-03 */
89 { 0, 0x00, 2, 12, 0 }, /* EBus: hogs all */
90 { 0, 0x01, 1, 6, 1 }, /* Happy Meal */
91 { 0, 0x80, 0, 7, 0 }, /* IGA (unused) */
94 static struct pcic_ca2irq pcic_i_jse
[] = {
95 { 0, 0x00, 0, 13, 0 }, /* Ebus - serial and keyboard */
96 { 0, 0x01, 1, 6, 0 }, /* hme */
97 { 0, 0x08, 2, 9, 0 }, /* VGA - we hope not used :) */
98 { 0, 0x10, 6, 8, 0 }, /* PCI INTA# in Slot 1 */
99 { 0, 0x18, 7, 12, 0 }, /* PCI INTA# in Slot 2, shared w. RTC */
100 { 0, 0x38, 4, 9, 0 }, /* All ISA devices. Read 8259. */
101 { 0, 0x80, 5, 11, 0 }, /* EIDE */
102 /* {0,0x88, 0,0,0} - unknown device... PMU? Probably no interrupt. */
103 { 0, 0xA0, 4, 9, 0 }, /* USB */
105 * Some pins belong to non-PCI devices, we hardcode them in drivers.
106 * sun4m timers - irq 10, 14
107 * PC style RTC - pin 7, irq 4 ?
108 * Smart card, Parallel - pin 4 shared with USB, ISA
109 * audio - pin 3, irq 5 ?
113 /* SPARCengine-6 was the original release name of CP1200.
114 * The documentation differs between the two versions
116 static struct pcic_ca2irq pcic_i_se6
[] = {
117 { 0, 0x08, 0, 2, 0 }, /* SCSI */
118 { 0, 0x01, 1, 6, 0 }, /* HME */
119 { 0, 0x00, 3, 13, 0 }, /* EBus */
123 * Krups (courtesy of Varol Kaptan)
124 * No documentation available, but it was easy to guess
125 * because it was very similar to Espresso.
127 * pin 0 - kbd, mouse, serial;
129 * pin 2 - igs (we do not use it);
131 * pin 4,5,6 - unused;
132 * pin 7 - RTC (from P2 onwards as David B. says).
134 static struct pcic_ca2irq pcic_i_jk
[] = {
135 { 0, 0x00, 0, 13, 0 }, /* Ebus - serial and keyboard */
136 { 0, 0x01, 1, 6, 0 }, /* hme */
140 * Several entries in this list may point to the same routing map
141 * as several PROMs may be installed on the same physical board.
143 #define SN2L_INIT(name, map) \
144 { name, map, ARRAY_SIZE(map) }
146 static struct pcic_sn2list pcic_known_sysnames
[] = {
147 SN2L_INIT("SUNW,JavaEngine1", pcic_i_je1a
), /* JE1, PROM 2.32 */
148 SN2L_INIT("SUNW,JS-E", pcic_i_jse
), /* PROLL JavaStation-E */
149 SN2L_INIT("SUNW,SPARCengine-6", pcic_i_se6
), /* SPARCengine-6/CP-1200 */
150 SN2L_INIT("SUNW,JS-NC", pcic_i_jk
), /* PROLL JavaStation-NC */
151 SN2L_INIT("SUNW,JSIIep", pcic_i_jk
), /* OBP JavaStation-NC */
156 * Only one PCIC per IIep,
157 * and since we have no SMP IIep, only one per system.
160 static struct linux_pcic pcic0
;
162 void __iomem
*pcic_regs
;
163 volatile int pcic_speculative
;
164 volatile int pcic_trapped
;
167 #define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (((unsigned int)bus) << 16) | (((unsigned int)device_fn) << 8) | (where & ~3))
169 static int pcic_read_config_dword(unsigned int busno
, unsigned int devfn
,
170 int where
, u32
*value
)
172 struct linux_pcic
*pcic
;
177 local_irq_save(flags
);
178 writel(CONFIG_CMD(busno
, devfn
, where
), pcic
->pcic_config_space_addr
);
179 pcic_speculative
= 2;
181 *value
= readl(pcic
->pcic_config_space_data
+ (where
&4));
184 pcic_speculative
= 0;
185 local_irq_restore(flags
);
189 pcic_speculative
= 0;
190 local_irq_restore(flags
);
194 static int pcic_read_config(struct pci_bus
*bus
, unsigned int devfn
,
195 int where
, int size
, u32
*val
)
199 if (bus
->number
!= 0) return -EINVAL
;
202 pcic_read_config_dword(bus
->number
, devfn
, where
&~3, &v
);
203 *val
= 0xff & (v
>> (8*(where
& 3)));
206 if (where
&1) return -EINVAL
;
207 pcic_read_config_dword(bus
->number
, devfn
, where
&~3, &v
);
208 *val
= 0xffff & (v
>> (8*(where
& 3)));
211 if (where
&3) return -EINVAL
;
212 pcic_read_config_dword(bus
->number
, devfn
, where
&~3, val
);
218 static int pcic_write_config_dword(unsigned int busno
, unsigned int devfn
,
219 int where
, u32 value
)
221 struct linux_pcic
*pcic
;
226 local_irq_save(flags
);
227 writel(CONFIG_CMD(busno
, devfn
, where
), pcic
->pcic_config_space_addr
);
228 writel(value
, pcic
->pcic_config_space_data
+ (where
&4));
229 local_irq_restore(flags
);
233 static int pcic_write_config(struct pci_bus
*bus
, unsigned int devfn
,
234 int where
, int size
, u32 val
)
238 if (bus
->number
!= 0) return -EINVAL
;
241 pcic_read_config_dword(bus
->number
, devfn
, where
&~3, &v
);
242 v
= (v
& ~(0xff << (8*(where
&3)))) |
243 ((0xff&val
) << (8*(where
&3)));
244 return pcic_write_config_dword(bus
->number
, devfn
, where
&~3, v
);
246 if (where
&1) return -EINVAL
;
247 pcic_read_config_dword(bus
->number
, devfn
, where
&~3, &v
);
248 v
= (v
& ~(0xffff << (8*(where
&3)))) |
249 ((0xffff&val
) << (8*(where
&3)));
250 return pcic_write_config_dword(bus
->number
, devfn
, where
&~3, v
);
252 if (where
&3) return -EINVAL
;
253 return pcic_write_config_dword(bus
->number
, devfn
, where
, val
);
258 static struct pci_ops pcic_ops
= {
259 .read
= pcic_read_config
,
260 .write
= pcic_write_config
,
264 * On sparc64 pcibios_init() calls pci_controller_probe().
265 * We want PCIC probed little ahead so that interrupt controller
266 * would be operational.
268 int __init
pcic_probe(void)
270 struct linux_pcic
*pcic
;
271 struct linux_prom_registers regs
[PROMREG_MAX
];
272 struct linux_pbm_info
* pbm
;
278 prom_printf("PCIC: called twice!\n");
283 node
= prom_getchild (prom_root_node
);
284 node
= prom_searchsiblings (node
, "pci");
288 * Map in PCIC register set, config space, and IO base
290 err
= prom_getproperty(node
, "reg", (char*)regs
, sizeof(regs
));
291 if (err
== 0 || err
== -1) {
292 prom_printf("PCIC: Error, cannot get PCIC registers "
299 pcic
->pcic_res_regs
.name
= "pcic_registers";
300 pcic
->pcic_regs
= ioremap(regs
[0].phys_addr
, regs
[0].reg_size
);
301 if (!pcic
->pcic_regs
) {
302 prom_printf("PCIC: Error, cannot map PCIC registers.\n");
306 pcic
->pcic_res_io
.name
= "pcic_io";
307 if ((pcic
->pcic_io
= (unsigned long)
308 ioremap(regs
[1].phys_addr
, 0x10000)) == 0) {
309 prom_printf("PCIC: Error, cannot map PCIC IO Base.\n");
313 pcic
->pcic_res_cfg_addr
.name
= "pcic_cfg_addr";
314 if ((pcic
->pcic_config_space_addr
=
315 ioremap(regs
[2].phys_addr
, regs
[2].reg_size
* 2)) == 0) {
316 prom_printf("PCIC: Error, cannot map "
317 "PCI Configuration Space Address.\n");
322 * Docs say three least significant bits in address and data
323 * must be the same. Thus, we need adjust size of data.
325 pcic
->pcic_res_cfg_data
.name
= "pcic_cfg_data";
326 if ((pcic
->pcic_config_space_data
=
327 ioremap(regs
[3].phys_addr
, regs
[3].reg_size
* 2)) == 0) {
328 prom_printf("PCIC: Error, cannot map "
329 "PCI Configuration Space Data.\n");
334 pbm
->prom_node
= node
;
335 prom_getstring(node
, "name", namebuf
, 63); namebuf
[63] = 0;
336 strcpy(pbm
->prom_name
, namebuf
);
339 extern volatile int t_nmi
[1];
340 extern int pcic_nmi_trap_patch
[1];
342 t_nmi
[0] = pcic_nmi_trap_patch
[0];
343 t_nmi
[1] = pcic_nmi_trap_patch
[1];
344 t_nmi
[2] = pcic_nmi_trap_patch
[2];
345 t_nmi
[3] = pcic_nmi_trap_patch
[3];
346 swift_flush_dcache();
347 pcic_regs
= pcic
->pcic_regs
;
350 prom_getstring(prom_root_node
, "name", namebuf
, 63); namebuf
[63] = 0;
352 struct pcic_sn2list
*p
;
354 for (p
= pcic_known_sysnames
; p
->sysname
!= NULL
; p
++) {
355 if (strcmp(namebuf
, p
->sysname
) == 0)
358 pcic
->pcic_imap
= p
->intmap
;
359 pcic
->pcic_imdim
= p
->mapdim
;
361 if (pcic
->pcic_imap
== NULL
) {
363 * We do not panic here for the sake of embedded systems.
365 printk("PCIC: System %s is unknown, cannot route interrupts\n",
372 static void __init
pcic_pbm_scan_bus(struct linux_pcic
*pcic
)
374 struct linux_pbm_info
*pbm
= &pcic
->pbm
;
376 pbm
->pci_bus
= pci_scan_bus(pbm
->pci_first_busno
, &pcic_ops
, pbm
);
380 * Main entry point from the PCI subsystem.
382 static int __init
pcic_init(void)
384 struct linux_pcic
*pcic
;
387 * PCIC should be initialized at start of the timer.
388 * So, here we report the presence of PCIC and do some magic passes.
395 * Switch off IOTLB translation.
397 writeb(PCI_DVMA_CONTROL_IOTLB_DISABLE
,
398 pcic
->pcic_regs
+PCI_DVMA_CONTROL
);
400 writel(0xF0000000UL
, pcic
->pcic_regs
+PCI_SIZE_0
);
401 writel(0+PCI_BASE_ADDRESS_SPACE_MEMORY
,
402 pcic
->pcic_regs
+PCI_BASE_ADDRESS_0
);
404 pcic_pbm_scan_bus(pcic
);
409 int pcic_present(void)
414 static int __devinit
pdev_to_pnode(struct linux_pbm_info
*pbm
,
415 struct pci_dev
*pdev
)
417 struct linux_prom_pci_registers regs
[PROMREG_MAX
];
419 int node
= prom_getchild(pbm
->prom_node
);
422 err
= prom_getproperty(node
, "reg",
423 (char *)®s
[0], sizeof(regs
));
424 if(err
!= 0 && err
!= -1) {
425 unsigned long devfn
= (regs
[0].which_io
>> 8) & 0xff;
426 if(devfn
== pdev
->devfn
)
429 node
= prom_getsibling(node
);
434 static inline struct pcidev_cookie
*pci_devcookie_alloc(void)
436 return kmalloc(sizeof(struct pcidev_cookie
), GFP_ATOMIC
);
439 static void pcic_map_pci_device(struct linux_pcic
*pcic
,
440 struct pci_dev
*dev
, int node
)
443 unsigned long address
;
447 if (node
== 0 || node
== -1) {
448 strcpy(namebuf
, "???");
450 prom_getstring(node
, "name", namebuf
, 63); namebuf
[63] = 0;
453 for (j
= 0; j
< 6; j
++) {
454 address
= dev
->resource
[j
].start
;
455 if (address
== 0) break; /* are sequential */
456 flags
= dev
->resource
[j
].flags
;
457 if ((flags
& IORESOURCE_IO
) != 0) {
458 if (address
< 0x10000) {
459 dev
->resource
[j
].start
=
460 pcic
->pcic_io
+ address
;
461 dev
->resource
[j
].end
= 1;
462 dev
->resource
[j
].flags
=
463 (flags
& ~IORESOURCE_IO
) | IORESOURCE_MEM
;
465 printk("PCIC: Skipping I/O space at 0x%lx, "
466 "this will Oops if a driver attaches "
467 "device '%s' at %02x:%02x)\n", address
,
468 namebuf
, dev
->bus
->number
, dev
->devfn
);
475 pcic_fill_irq(struct linux_pcic
*pcic
, struct pci_dev
*dev
, int node
)
477 struct pcic_ca2irq
*p
;
481 if (node
== 0 || node
== -1) {
482 strcpy(namebuf
, "???");
484 prom_getstring(node
, "name", namebuf
, sizeof(namebuf
));
487 if ((p
= pcic
->pcic_imap
) == 0) {
491 for (i
= 0; i
< pcic
->pcic_imdim
; i
++) {
492 if (p
->busno
== dev
->bus
->number
&& p
->devfn
== dev
->devfn
)
496 if (i
>= pcic
->pcic_imdim
) {
497 printk("PCIC: device %s devfn %02x:%02x not found in %d\n",
498 namebuf
, dev
->bus
->number
, dev
->devfn
, pcic
->pcic_imdim
);
504 if (i
>= 0 && i
< 4) {
505 ivec
= readw(pcic
->pcic_regs
+PCI_INT_SELECT_LO
);
506 dev
->irq
= ivec
>> (i
<< 2) & 0xF;
507 } else if (i
>= 4 && i
< 8) {
508 ivec
= readw(pcic
->pcic_regs
+PCI_INT_SELECT_HI
);
509 dev
->irq
= ivec
>> ((i
-4) << 2) & 0xF;
510 } else { /* Corrupted map */
511 printk("PCIC: BAD PIN %d\n", i
); for (;;) {}
513 /* P3 */ /* printk("PCIC: device %s pin %d ivec 0x%x irq %x\n", namebuf, i, ivec, dev->irq); */
516 * dev->irq=0 means PROM did not bother to program the upper
517 * half of PCIC. This happens on JS-E with PROM 3.11, for instance.
519 if (dev
->irq
== 0 || p
->force
) {
520 if (p
->irq
== 0 || p
->irq
>= 15) { /* Corrupted map */
521 printk("PCIC: BAD IRQ %d\n", p
->irq
); for (;;) {}
523 printk("PCIC: setting irq %d at pin %d for device %02x:%02x\n",
524 p
->irq
, p
->pin
, dev
->bus
->number
, dev
->devfn
);
529 ivec
= readw(pcic
->pcic_regs
+PCI_INT_SELECT_HI
);
530 ivec
&= ~(0xF << ((i
- 4) << 2));
531 ivec
|= p
->irq
<< ((i
- 4) << 2);
532 writew(ivec
, pcic
->pcic_regs
+PCI_INT_SELECT_HI
);
534 ivec
= readw(pcic
->pcic_regs
+PCI_INT_SELECT_LO
);
535 ivec
&= ~(0xF << (i
<< 2));
536 ivec
|= p
->irq
<< (i
<< 2);
537 writew(ivec
, pcic
->pcic_regs
+PCI_INT_SELECT_LO
);
543 * Normally called from {do_}pci_scan_bus...
545 void __devinit
pcibios_fixup_bus(struct pci_bus
*bus
)
548 int i
, has_io
, has_mem
;
550 struct linux_pcic
*pcic
;
551 /* struct linux_pbm_info* pbm = &pcic->pbm; */
553 struct pcidev_cookie
*pcp
;
556 printk("pcibios_fixup_bus: no PCIC\n");
562 * Next crud is an equivalent of pbm = pcic_bus_to_pbm(bus);
564 if (bus
->number
!= 0) {
565 printk("pcibios_fixup_bus: nonzero bus 0x%x\n", bus
->number
);
569 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
572 * Comment from i386 branch:
573 * There are buggy BIOSes that forget to enable I/O and memory
574 * access to PCI devices. We try to fix this, but we need to
575 * be sure that the BIOS didn't forget to assign an address
576 * to the device. [mj]
577 * OBP is a case of such BIOS :-)
579 has_io
= has_mem
= 0;
581 unsigned long f
= dev
->resource
[i
].flags
;
582 if (f
& IORESOURCE_IO
) {
584 } else if (f
& IORESOURCE_MEM
)
587 pcic_read_config(dev
->bus
, dev
->devfn
, PCI_COMMAND
, 2, &cmd
);
588 if (has_io
&& !(cmd
& PCI_COMMAND_IO
)) {
589 printk("PCIC: Enabling I/O for device %02x:%02x\n",
590 dev
->bus
->number
, dev
->devfn
);
591 cmd
|= PCI_COMMAND_IO
;
592 pcic_write_config(dev
->bus
, dev
->devfn
,
593 PCI_COMMAND
, 2, cmd
);
595 if (has_mem
&& !(cmd
& PCI_COMMAND_MEMORY
)) {
596 printk("PCIC: Enabling memory for device %02x:%02x\n",
597 dev
->bus
->number
, dev
->devfn
);
598 cmd
|= PCI_COMMAND_MEMORY
;
599 pcic_write_config(dev
->bus
, dev
->devfn
,
600 PCI_COMMAND
, 2, cmd
);
603 node
= pdev_to_pnode(&pcic
->pbm
, dev
);
608 pcp
= pci_devcookie_alloc();
609 pcp
->pbm
= &pcic
->pbm
;
610 pcp
->prom_node
= of_find_node_by_phandle(node
);
613 /* fixing I/O to look like memory */
614 if ((dev
->class>>16) != PCI_BASE_CLASS_BRIDGE
)
615 pcic_map_pci_device(pcic
, dev
, node
);
617 pcic_fill_irq(pcic
, dev
, node
);
622 * pcic_pin_to_irq() is exported to bus probing code
625 pcic_pin_to_irq(unsigned int pin
, const char *name
)
627 struct linux_pcic
*pcic
= &pcic0
;
632 ivec
= readw(pcic
->pcic_regs
+PCI_INT_SELECT_LO
);
633 irq
= ivec
>> (pin
<< 2) & 0xF;
634 } else if (pin
< 8) {
635 ivec
= readw(pcic
->pcic_regs
+PCI_INT_SELECT_HI
);
636 irq
= ivec
>> ((pin
-4) << 2) & 0xF;
637 } else { /* Corrupted map */
638 printk("PCIC: BAD PIN %d FOR %s\n", pin
, name
);
641 /* P3 */ /* printk("PCIC: dev %s pin %d ivec 0x%x irq %x\n", name, pin, ivec, irq); */
645 /* Makes compiler happy */
646 static volatile int pcic_timer_dummy
;
648 static void pcic_clear_clock_irq(void)
650 pcic_timer_dummy
= readl(pcic0
.pcic_regs
+PCI_SYS_LIMIT
);
653 static irqreturn_t
pcic_timer_handler (int irq
, void *h
)
655 write_seqlock(&xtime_lock
); /* Dummy, to show that we remember */
656 pcic_clear_clock_irq();
658 write_sequnlock(&xtime_lock
);
660 update_process_times(user_mode(get_irq_regs()));
665 #define USECS_PER_JIFFY 10000 /* We have 100HZ "standard" timer for sparc */
666 #define TICK_TIMER_LIMIT ((100*1000000/4)/100)
668 u32
pci_gettimeoffset(void)
671 * We divide all by 100
672 * to have microsecond resolution and to avoid overflow
674 unsigned long count
=
675 readl(pcic0
.pcic_regs
+PCI_SYS_COUNTER
) & ~PCI_SYS_COUNTER_OVERFLOW
;
676 count
= ((count
/100)*USECS_PER_JIFFY
) / (TICK_TIMER_LIMIT
/100);
681 void __init
pci_time_init(void)
683 struct linux_pcic
*pcic
= &pcic0
;
687 do_arch_gettimeoffset
= pci_gettimeoffset
;
691 writel (TICK_TIMER_LIMIT
, pcic
->pcic_regs
+PCI_SYS_LIMIT
);
692 /* PROM should set appropriate irq */
693 v
= readb(pcic
->pcic_regs
+PCI_COUNTER_IRQ
);
694 timer_irq
= PCI_COUNTER_IRQ_SYS(v
);
695 writel (PCI_COUNTER_IRQ_SET(timer_irq
, 0),
696 pcic
->pcic_regs
+PCI_COUNTER_IRQ
);
697 irq
= request_irq(timer_irq
, pcic_timer_handler
,
698 (IRQF_DISABLED
| SA_STATIC_ALLOC
), "timer", NULL
);
700 prom_printf("time_init: unable to attach IRQ%d\n", timer_irq
);
709 * Other archs parse arguments here.
711 char * __devinit
pcibios_setup(char *str
)
716 resource_size_t
pcibios_align_resource(void *data
, const struct resource
*res
,
717 resource_size_t size
, resource_size_t align
)
722 int pcibios_enable_device(struct pci_dev
*pdev
, int mask
)
730 void pcic_nmi(unsigned int pend
, struct pt_regs
*regs
)
733 pend
= flip_dword(pend
);
735 if (!pcic_speculative
|| (pend
& PCI_SYS_INT_PENDING_PIO
) == 0) {
736 printk("Aiee, NMI pend 0x%x pc 0x%x spec %d, hanging\n",
737 pend
, (int)regs
->pc
, pcic_speculative
);
740 pcic_speculative
= 0;
742 regs
->pc
= regs
->npc
;
746 static inline unsigned long get_irqmask(int irq_nr
)
751 static void pcic_disable_irq(unsigned int irq_nr
)
753 unsigned long mask
, flags
;
755 mask
= get_irqmask(irq_nr
);
756 local_irq_save(flags
);
757 writel(mask
, pcic0
.pcic_regs
+PCI_SYS_INT_TARGET_MASK_SET
);
758 local_irq_restore(flags
);
761 static void pcic_enable_irq(unsigned int irq_nr
)
763 unsigned long mask
, flags
;
765 mask
= get_irqmask(irq_nr
);
766 local_irq_save(flags
);
767 writel(mask
, pcic0
.pcic_regs
+PCI_SYS_INT_TARGET_MASK_CLEAR
);
768 local_irq_restore(flags
);
771 static void pcic_load_profile_irq(int cpu
, unsigned int limit
)
773 printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__
, __LINE__
);
776 /* We assume the caller has disabled local interrupts when these are called,
777 * or else very bizarre behavior will result.
779 static void pcic_disable_pil_irq(unsigned int pil
)
781 writel(get_irqmask(pil
), pcic0
.pcic_regs
+PCI_SYS_INT_TARGET_MASK_SET
);
784 static void pcic_enable_pil_irq(unsigned int pil
)
786 writel(get_irqmask(pil
), pcic0
.pcic_regs
+PCI_SYS_INT_TARGET_MASK_CLEAR
);
789 void __init
sun4m_pci_init_IRQ(void)
791 BTFIXUPSET_CALL(enable_irq
, pcic_enable_irq
, BTFIXUPCALL_NORM
);
792 BTFIXUPSET_CALL(disable_irq
, pcic_disable_irq
, BTFIXUPCALL_NORM
);
793 BTFIXUPSET_CALL(enable_pil_irq
, pcic_enable_pil_irq
, BTFIXUPCALL_NORM
);
794 BTFIXUPSET_CALL(disable_pil_irq
, pcic_disable_pil_irq
, BTFIXUPCALL_NORM
);
795 BTFIXUPSET_CALL(clear_clock_irq
, pcic_clear_clock_irq
, BTFIXUPCALL_NORM
);
796 BTFIXUPSET_CALL(load_profile_irq
, pcic_load_profile_irq
, BTFIXUPCALL_NORM
);
799 int pcibios_assign_resource(struct pci_dev
*pdev
, int resource
)
804 struct device_node
*pci_device_to_OF_node(struct pci_dev
*pdev
)
806 struct pcidev_cookie
*pc
= pdev
->sysdata
;
808 return pc
->prom_node
;
810 EXPORT_SYMBOL(pci_device_to_OF_node
);
813 * This probably belongs here rather than ioport.c because
814 * we do not want this crud linked into SBus kernels.
815 * Also, think for a moment about likes of floppy.c that
816 * include architecture specific parts. They may want to redefine ins/outs.
818 * We do not use horrible macros here because we want to
819 * advance pointer by sizeof(size).
821 void outsb(unsigned long addr
, const void *src
, unsigned long count
)
825 outb(*(const char *)src
, addr
);
830 EXPORT_SYMBOL(outsb
);
832 void outsw(unsigned long addr
, const void *src
, unsigned long count
)
836 outw(*(const short *)src
, addr
);
841 EXPORT_SYMBOL(outsw
);
843 void outsl(unsigned long addr
, const void *src
, unsigned long count
)
847 outl(*(const long *)src
, addr
);
852 EXPORT_SYMBOL(outsl
);
854 void insb(unsigned long addr
, void *dst
, unsigned long count
)
858 *(unsigned char *)dst
= inb(addr
);
865 void insw(unsigned long addr
, void *dst
, unsigned long count
)
869 *(unsigned short *)dst
= inw(addr
);
876 void insl(unsigned long addr
, void *dst
, unsigned long count
)
880 *(unsigned long *)dst
= inl(addr
);
887 subsys_initcall(pcic_init
);