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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / arch / powerpc / platforms / powermac / low_i2c.c
blobd115ab494942c9728f8e08062415eb8f9ec90f8d
1 /*
2 * arch/powerpc/platforms/powermac/low_i2c.c
3 *
4 * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * The linux i2c layer isn't completely suitable for our needs for various
12 * reasons ranging from too late initialisation to semantics not perfectly
13 * matching some requirements of the apple platform functions etc...
14 *
15 * This file thus provides a simple low level unified i2c interface for
16 * powermac that covers the various types of i2c busses used in Apple machines.
17 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
18 * banging busses found on older chipstes in earlier machines if we ever need
19 * one of them.
20 *
21 * The drivers in this file are synchronous/blocking. In addition, the
22 * keywest one is fairly slow due to the use of msleep instead of interrupts
23 * as the interrupt is currently used by i2c-keywest. In the long run, we
24 * might want to get rid of those high-level interfaces to linux i2c layer
25 * either completely (converting all drivers) or replacing them all with a
26 * single stub driver on top of this one. Once done, the interrupt will be
27 * available for our use.
28 */
29
30 #undef DEBUG
31 #undef DEBUG_LOW
32
33 #include <linux/types.h>
34 #include <linux/sched.h>
35 #include <linux/init.h>
36 #include <linux/module.h>
37 #include <linux/adb.h>
38 #include <linux/pmu.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/platform_device.h>
42 #include <linux/interrupt.h>
43 #include <linux/timer.h>
44 #include <linux/mutex.h>
45 #include <linux/i2c.h>
46 #include <linux/slab.h>
47 #include <asm/keylargo.h>
48 #include <asm/uninorth.h>
49 #include <asm/io.h>
50 #include <asm/prom.h>
51 #include <asm/machdep.h>
52 #include <asm/smu.h>
53 #include <asm/pmac_pfunc.h>
54 #include <asm/pmac_low_i2c.h>
55
56 #ifdef DEBUG
57 #define DBG(x...) do {\
58 printk(KERN_DEBUG "low_i2c:" x); \
59 } while(0)
60 #else
61 #define DBG(x...)
62 #endif
63
64 #ifdef DEBUG_LOW
65 #define DBG_LOW(x...) do {\
66 printk(KERN_DEBUG "low_i2c:" x); \
67 } while(0)
68 #else
69 #define DBG_LOW(x...)
70 #endif
71
72
73 static int pmac_i2c_force_poll = 1;
74
75 /*
76 * A bus structure. Each bus in the system has such a structure associated.
77 */
78 struct pmac_i2c_bus
79 {
80 struct list_head link;
81 struct device_node *controller;
82 struct device_node *busnode;
83 int type;
84 int flags;
85 struct i2c_adapter adapter;
86 void *hostdata;
87 int channel; /* some hosts have multiple */
88 int mode; /* current mode */
89 struct mutex mutex;
90 int opened;
91 int polled; /* open mode */
92 struct platform_device *platform_dev;
93
94 /* ops */
95 int (*open)(struct pmac_i2c_bus *bus);
96 void (*close)(struct pmac_i2c_bus *bus);
97 int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
98 u32 subaddr, u8 *data, int len);
99 };
100
101 static LIST_HEAD(pmac_i2c_busses);
102
103 /*
104 * Keywest implementation
105 */
106
107 struct pmac_i2c_host_kw
108 {
109 struct mutex mutex; /* Access mutex for use by
110 * i2c-keywest */
111 void __iomem *base; /* register base address */
112 int bsteps; /* register stepping */
113 int speed; /* speed */
114 int irq;
115 u8 *data;
116 unsigned len;
117 int state;
118 int rw;
119 int polled;
120 int result;
121 struct completion complete;
122 spinlock_t lock;
123 struct timer_list timeout_timer;
124 };
125
126 /* Register indices */
127 typedef enum {
128 reg_mode = 0,
129 reg_control,
130 reg_status,
131 reg_isr,
132 reg_ier,
133 reg_addr,
134 reg_subaddr,
135 reg_data
136 } reg_t;
137
138 /* The Tumbler audio equalizer can be really slow sometimes */
139 #define KW_POLL_TIMEOUT (2*HZ)
140
141 /* Mode register */
142 #define KW_I2C_MODE_100KHZ 0x00
143 #define KW_I2C_MODE_50KHZ 0x01
144 #define KW_I2C_MODE_25KHZ 0x02
145 #define KW_I2C_MODE_DUMB 0x00
146 #define KW_I2C_MODE_STANDARD 0x04
147 #define KW_I2C_MODE_STANDARDSUB 0x08
148 #define KW_I2C_MODE_COMBINED 0x0C
149 #define KW_I2C_MODE_MODE_MASK 0x0C
150 #define KW_I2C_MODE_CHAN_MASK 0xF0
151
152 /* Control register */
153 #define KW_I2C_CTL_AAK 0x01
154 #define KW_I2C_CTL_XADDR 0x02
155 #define KW_I2C_CTL_STOP 0x04
156 #define KW_I2C_CTL_START 0x08
157
158 /* Status register */
159 #define KW_I2C_STAT_BUSY 0x01
160 #define KW_I2C_STAT_LAST_AAK 0x02
161 #define KW_I2C_STAT_LAST_RW 0x04
162 #define KW_I2C_STAT_SDA 0x08
163 #define KW_I2C_STAT_SCL 0x10
164
165 /* IER & ISR registers */
166 #define KW_I2C_IRQ_DATA 0x01
167 #define KW_I2C_IRQ_ADDR 0x02
168 #define KW_I2C_IRQ_STOP 0x04
169 #define KW_I2C_IRQ_START 0x08
170 #define KW_I2C_IRQ_MASK 0x0F
171
172 /* State machine states */
173 enum {
174 state_idle,
175 state_addr,
176 state_read,
177 state_write,
178 state_stop,
179 state_dead
180 };
181
182 #define WRONG_STATE(name) do {\
183 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
184 "(isr: %02x)\n", \
185 name, __kw_state_names[host->state], isr); \
186 } while(0)
187
188 static const char *__kw_state_names[] = {
189 "state_idle",
190 "state_addr",
191 "state_read",
192 "state_write",
193 "state_stop",
194 "state_dead"
195 };
196
197 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
198 {
199 return readb(host->base + (((unsigned int)reg) << host->bsteps));
200 }
201
202 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
203 reg_t reg, u8 val)
204 {
205 writeb(val, host->base + (((unsigned)reg) << host->bsteps));
206 (void)__kw_read_reg(host, reg_subaddr);
207 }
208
209 #define kw_write_reg(reg, val) __kw_write_reg(host, reg, val)
210 #define kw_read_reg(reg) __kw_read_reg(host, reg)
211
212 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
213 {
214 int i, j;
215 u8 isr;
216
217 for (i = 0; i < 1000; i++) {
218 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
219 if (isr != 0)
220 return isr;
221
222 /* This code is used with the timebase frozen, we cannot rely
223 * on udelay nor schedule when in polled mode !
224 * For now, just use a bogus loop....
225 */
226 if (host->polled) {
227 for (j = 1; j < 100000; j++)
228 mb();
229 } else
230 msleep(1);
231 }
232 return isr;
233 }
234
235 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
236 {
237 kw_write_reg(reg_control, KW_I2C_CTL_STOP);
238 host->state = state_stop;
239 host->result = result;
240 }
241
242
243 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
244 {
245 u8 ack;
246
247 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
248 __kw_state_names[host->state], isr);
249
250 if (host->state == state_idle) {
251 printk(KERN_WARNING "low_i2c: Keywest got an out of state"
252 " interrupt, ignoring\n");
253 kw_write_reg(reg_isr, isr);
254 return;
255 }
256
257 if (isr == 0) {
258 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
259 " on keywest !\n");
260 if (host->state != state_stop) {
261 kw_i2c_do_stop(host, -EIO);
262 return;
263 }
264 ack = kw_read_reg(reg_status);
265 if (ack & KW_I2C_STAT_BUSY)
266 kw_write_reg(reg_status, 0);
267 host->state = state_idle;
268 kw_write_reg(reg_ier, 0x00);
269 if (!host->polled)
270 complete(&host->complete);
271 return;
272 }
273
274 if (isr & KW_I2C_IRQ_ADDR) {
275 ack = kw_read_reg(reg_status);
276 if (host->state != state_addr) {
277 WRONG_STATE("KW_I2C_IRQ_ADDR");
278 kw_i2c_do_stop(host, -EIO);
279 }
280 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
281 host->result = -ENXIO;
282 host->state = state_stop;
283 DBG_LOW("KW: NAK on address\n");
284 } else {
285 if (host->len == 0)
286 kw_i2c_do_stop(host, 0);
287 else if (host->rw) {
288 host->state = state_read;
289 if (host->len > 1)
290 kw_write_reg(reg_control,
291 KW_I2C_CTL_AAK);
292 } else {
293 host->state = state_write;
294 kw_write_reg(reg_data, *(host->data++));
295 host->len--;
296 }
297 }
298 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
299 }
300
301 if (isr & KW_I2C_IRQ_DATA) {
302 if (host->state == state_read) {
303 *(host->data++) = kw_read_reg(reg_data);
304 host->len--;
305 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
306 if (host->len == 0)
307 host->state = state_stop;
308 else if (host->len == 1)
309 kw_write_reg(reg_control, 0);
310 } else if (host->state == state_write) {
311 ack = kw_read_reg(reg_status);
312 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
313 DBG_LOW("KW: nack on data write\n");
314 host->result = -EFBIG;
315 host->state = state_stop;
316 } else if (host->len) {
317 kw_write_reg(reg_data, *(host->data++));
318 host->len--;
319 } else
320 kw_i2c_do_stop(host, 0);
321 } else {
322 WRONG_STATE("KW_I2C_IRQ_DATA");
323 if (host->state != state_stop)
324 kw_i2c_do_stop(host, -EIO);
325 }
326 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
327 }
328
329 if (isr & KW_I2C_IRQ_STOP) {
330 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
331 if (host->state != state_stop) {
332 WRONG_STATE("KW_I2C_IRQ_STOP");
333 host->result = -EIO;
334 }
335 host->state = state_idle;
336 if (!host->polled)
337 complete(&host->complete);
338 }
339
340 /* Below should only happen in manual mode which we don't use ... */
341 if (isr & KW_I2C_IRQ_START)
342 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
343
344 }
345
346 /* Interrupt handler */
347 static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
348 {
349 struct pmac_i2c_host_kw *host = dev_id;
350 unsigned long flags;
351
352 spin_lock_irqsave(&host->lock, flags);
353 del_timer(&host->timeout_timer);
354 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
355 if (host->state != state_idle) {
356 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
357 add_timer(&host->timeout_timer);
358 }
359 spin_unlock_irqrestore(&host->lock, flags);
360 return IRQ_HANDLED;
361 }
362
363 static void kw_i2c_timeout(unsigned long data)
364 {
365 struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data;
366 unsigned long flags;
367
368 spin_lock_irqsave(&host->lock, flags);
369 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
370 if (host->state != state_idle) {
371 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
372 add_timer(&host->timeout_timer);
373 }
374 spin_unlock_irqrestore(&host->lock, flags);
375 }
376
377 static int kw_i2c_open(struct pmac_i2c_bus *bus)
378 {
379 struct pmac_i2c_host_kw *host = bus->hostdata;
380 mutex_lock(&host->mutex);
381 return 0;
382 }
383
384 static void kw_i2c_close(struct pmac_i2c_bus *bus)
385 {
386 struct pmac_i2c_host_kw *host = bus->hostdata;
387 mutex_unlock(&host->mutex);
388 }
389
390 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
391 u32 subaddr, u8 *data, int len)
392 {
393 struct pmac_i2c_host_kw *host = bus->hostdata;
394 u8 mode_reg = host->speed;
395 int use_irq = host->irq != NO_IRQ && !bus->polled;
396
397 /* Setup mode & subaddress if any */
398 switch(bus->mode) {
399 case pmac_i2c_mode_dumb:
400 return -EINVAL;
401 case pmac_i2c_mode_std:
402 mode_reg |= KW_I2C_MODE_STANDARD;
403 if (subsize != 0)
404 return -EINVAL;
405 break;
406 case pmac_i2c_mode_stdsub:
407 mode_reg |= KW_I2C_MODE_STANDARDSUB;
408 if (subsize != 1)
409 return -EINVAL;
410 break;
411 case pmac_i2c_mode_combined:
412 mode_reg |= KW_I2C_MODE_COMBINED;
413 if (subsize != 1)
414 return -EINVAL;
415 break;
416 }
417
418 /* Setup channel & clear pending irqs */
419 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
420 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
421 kw_write_reg(reg_status, 0);
422
423 /* Set up address and r/w bit, strip possible stale bus number from
424 * address top bits
425 */
426 kw_write_reg(reg_addr, addrdir & 0xff);
427
428 /* Set up the sub address */
429 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
430 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
431 kw_write_reg(reg_subaddr, subaddr);
432
433 /* Prepare for async operations */
434 host->data = data;
435 host->len = len;
436 host->state = state_addr;
437 host->result = 0;
438 host->rw = (addrdir & 1);
439 host->polled = bus->polled;
440
441 /* Enable interrupt if not using polled mode and interrupt is
442 * available
443 */
444 if (use_irq) {
445 /* Clear completion */
446 INIT_COMPLETION(host->complete);
447 /* Ack stale interrupts */
448 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
449 /* Arm timeout */
450 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
451 add_timer(&host->timeout_timer);
452 /* Enable emission */
453 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
454 }
455
456 /* Start sending address */
457 kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
458
459 /* Wait for completion */
460 if (use_irq)
461 wait_for_completion(&host->complete);
462 else {
463 while(host->state != state_idle) {
464 unsigned long flags;
465
466 u8 isr = kw_i2c_wait_interrupt(host);
467 spin_lock_irqsave(&host->lock, flags);
468 kw_i2c_handle_interrupt(host, isr);
469 spin_unlock_irqrestore(&host->lock, flags);
470 }
471 }
472
473 /* Disable emission */
474 kw_write_reg(reg_ier, 0);
475
476 return host->result;
477 }
478
479 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
480 {
481 struct pmac_i2c_host_kw *host;
482 const u32 *psteps, *prate, *addrp;
483 u32 steps;
484
485 host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL);
486 if (host == NULL) {
487 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
488 np->full_name);
489 return NULL;
490 }
491
492 /* Apple is kind enough to provide a valid AAPL,address property
493 * on all i2c keywest nodes so far ... we would have to fallback
494 * to macio parsing if that wasn't the case
495 */
496 addrp = of_get_property(np, "AAPL,address", NULL);
497 if (addrp == NULL) {
498 printk(KERN_ERR "low_i2c: Can't find address for %s\n",
499 np->full_name);
500 kfree(host);
501 return NULL;
502 }
503 mutex_init(&host->mutex);
504 init_completion(&host->complete);
505 spin_lock_init(&host->lock);
506 init_timer(&host->timeout_timer);
507 host->timeout_timer.function = kw_i2c_timeout;
508 host->timeout_timer.data = (unsigned long)host;
509
510 psteps = of_get_property(np, "AAPL,address-step", NULL);
511 steps = psteps ? (*psteps) : 0x10;
512 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
513 steps >>= 1;
514 /* Select interface rate */
515 host->speed = KW_I2C_MODE_25KHZ;
516 prate = of_get_property(np, "AAPL,i2c-rate", NULL);
517 if (prate) switch(*prate) {
518 case 100:
519 host->speed = KW_I2C_MODE_100KHZ;
520 break;
521 case 50:
522 host->speed = KW_I2C_MODE_50KHZ;
523 break;
524 case 25:
525 host->speed = KW_I2C_MODE_25KHZ;
526 break;
527 }
528 host->irq = irq_of_parse_and_map(np, 0);
529 if (host->irq == NO_IRQ)
530 printk(KERN_WARNING
531 "low_i2c: Failed to map interrupt for %s\n",
532 np->full_name);
533
534 host->base = ioremap((*addrp), 0x1000);
535 if (host->base == NULL) {
536 printk(KERN_ERR "low_i2c: Can't map registers for %s\n",
537 np->full_name);
538 kfree(host);
539 return NULL;
540 }
541
542 /* Make sure IRQ is disabled */
543 kw_write_reg(reg_ier, 0);
544
545 /* Request chip interrupt. We set IRQF_NO_SUSPEND because we don't
546 * want that interrupt disabled between the 2 passes of driver
547 * suspend or we'll have issues running the pfuncs
548 */
549 if (request_irq(host->irq, kw_i2c_irq, IRQF_NO_SUSPEND,
550 "keywest i2c", host))
551 host->irq = NO_IRQ;
552
553 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n",
554 *addrp, host->irq, np->full_name);
555
556 return host;
557 }
558
559
560 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
561 struct device_node *controller,
562 struct device_node *busnode,
563 int channel)
564 {
565 struct pmac_i2c_bus *bus;
566
567 bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
568 if (bus == NULL)
569 return;
570
571 bus->controller = of_node_get(controller);
572 bus->busnode = of_node_get(busnode);
573 bus->type = pmac_i2c_bus_keywest;
574 bus->hostdata = host;
575 bus->channel = channel;
576 bus->mode = pmac_i2c_mode_std;
577 bus->open = kw_i2c_open;
578 bus->close = kw_i2c_close;
579 bus->xfer = kw_i2c_xfer;
580 mutex_init(&bus->mutex);
581 if (controller == busnode)
582 bus->flags = pmac_i2c_multibus;
583 list_add(&bus->link, &pmac_i2c_busses);
584
585 printk(KERN_INFO " channel %d bus %s\n", channel,
586 (controller == busnode) ? "<multibus>" : busnode->full_name);
587 }
588
589 static void __init kw_i2c_probe(void)
590 {
591 struct device_node *np, *child, *parent;
592
593 /* Probe keywest-i2c busses */
594 for_each_compatible_node(np, "i2c","keywest-i2c") {
595 struct pmac_i2c_host_kw *host;
596 int multibus;
597
598 /* Found one, init a host structure */
599 host = kw_i2c_host_init(np);
600 if (host == NULL)
601 continue;
602
603 child = of_get_next_child(np, NULL);
604 multibus = !child || strcmp(child->name, "i2c-bus");
605 of_node_put(child);
606
607 /* For a multibus setup, we get the bus count based on the
608 * parent type
609 */
610 if (multibus) {
611 int chans, i;
612
613 parent = of_get_parent(np);
614 if (parent == NULL)
615 continue;
616 chans = parent->name[0] == 'u' ? 2 : 1;
617 for (i = 0; i < chans; i++)
618 kw_i2c_add(host, np, np, i);
619 } else {
620 for (child = NULL;
621 (child = of_get_next_child(np, child)) != NULL;) {
622 const u32 *reg = of_get_property(child,
623 "reg", NULL);
624 if (reg == NULL)
625 continue;
626 kw_i2c_add(host, np, child, *reg);
627 }
628 }
629 }
630 }
631
632
633 /*
634 *
635 * PMU implementation
636 *
637 */
638
639 #ifdef CONFIG_ADB_PMU
640
641 /*
642 * i2c command block to the PMU
643 */
644 struct pmu_i2c_hdr {
645 u8 bus;
646 u8 mode;
647 u8 bus2;
648 u8 address;
649 u8 sub_addr;
650 u8 comb_addr;
651 u8 count;
652 u8 data[];
653 };
654
655 static void pmu_i2c_complete(struct adb_request *req)
656 {
657 complete(req->arg);
658 }
659
660 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
661 u32 subaddr, u8 *data, int len)
662 {
663 struct adb_request *req = bus->hostdata;
664 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
665 struct completion comp;
666 int read = addrdir & 1;
667 int retry;
668 int rc = 0;
669
670 /* For now, limit ourselves to 16 bytes transfers */
671 if (len > 16)
672 return -EINVAL;
673
674 init_completion(&comp);
675
676 for (retry = 0; retry < 16; retry++) {
677 memset(req, 0, sizeof(struct adb_request));
678 hdr->bus = bus->channel;
679 hdr->count = len;
680
681 switch(bus->mode) {
682 case pmac_i2c_mode_std:
683 if (subsize != 0)
684 return -EINVAL;
685 hdr->address = addrdir;
686 hdr->mode = PMU_I2C_MODE_SIMPLE;
687 break;
688 case pmac_i2c_mode_stdsub:
689 case pmac_i2c_mode_combined:
690 if (subsize != 1)
691 return -EINVAL;
692 hdr->address = addrdir & 0xfe;
693 hdr->comb_addr = addrdir;
694 hdr->sub_addr = subaddr;
695 if (bus->mode == pmac_i2c_mode_stdsub)
696 hdr->mode = PMU_I2C_MODE_STDSUB;
697 else
698 hdr->mode = PMU_I2C_MODE_COMBINED;
699 break;
700 default:
701 return -EINVAL;
702 }
703
704 INIT_COMPLETION(comp);
705 req->data[0] = PMU_I2C_CMD;
706 req->reply[0] = 0xff;
707 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
708 req->done = pmu_i2c_complete;
709 req->arg = &comp;
710 if (!read && len) {
711 memcpy(hdr->data, data, len);
712 req->nbytes += len;
713 }
714 rc = pmu_queue_request(req);
715 if (rc)
716 return rc;
717 wait_for_completion(&comp);
718 if (req->reply[0] == PMU_I2C_STATUS_OK)
719 break;
720 msleep(15);
721 }
722 if (req->reply[0] != PMU_I2C_STATUS_OK)
723 return -EIO;
724
725 for (retry = 0; retry < 16; retry++) {
726 memset(req, 0, sizeof(struct adb_request));
727
728 /* I know that looks like a lot, slow as hell, but darwin
729 * does it so let's be on the safe side for now
730 */
731 msleep(15);
732
733 hdr->bus = PMU_I2C_BUS_STATUS;
734
735 INIT_COMPLETION(comp);
736 req->data[0] = PMU_I2C_CMD;
737 req->reply[0] = 0xff;
738 req->nbytes = 2;
739 req->done = pmu_i2c_complete;
740 req->arg = &comp;
741 rc = pmu_queue_request(req);
742 if (rc)
743 return rc;
744 wait_for_completion(&comp);
745
746 if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
747 return 0;
748 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
749 int rlen = req->reply_len - 1;
750
751 if (rlen != len) {
752 printk(KERN_WARNING "low_i2c: PMU returned %d"
753 " bytes, expected %d !\n", rlen, len);
754 return -EIO;
755 }
756 if (len)
757 memcpy(data, &req->reply[1], len);
758 return 0;
759 }
760 }
761 return -EIO;
762 }
763
764 static void __init pmu_i2c_probe(void)
765 {
766 struct pmac_i2c_bus *bus;
767 struct device_node *busnode;
768 int channel, sz;
769
770 if (!pmu_present())
771 return;
772
773 /* There might or might not be a "pmu-i2c" node, we use that
774 * or via-pmu itself, whatever we find. I haven't seen a machine
775 * with separate bus nodes, so we assume a multibus setup
776 */
777 busnode = of_find_node_by_name(NULL, "pmu-i2c");
778 if (busnode == NULL)
779 busnode = of_find_node_by_name(NULL, "via-pmu");
780 if (busnode == NULL)
781 return;
782
783 printk(KERN_INFO "PMU i2c %s\n", busnode->full_name);
784
785 /*
786 * We add bus 1 and 2 only for now, bus 0 is "special"
787 */
788 for (channel = 1; channel <= 2; channel++) {
789 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
790 bus = kzalloc(sz, GFP_KERNEL);
791 if (bus == NULL)
792 return;
793
794 bus->controller = busnode;
795 bus->busnode = busnode;
796 bus->type = pmac_i2c_bus_pmu;
797 bus->channel = channel;
798 bus->mode = pmac_i2c_mode_std;
799 bus->hostdata = bus + 1;
800 bus->xfer = pmu_i2c_xfer;
801 mutex_init(&bus->mutex);
802 bus->flags = pmac_i2c_multibus;
803 list_add(&bus->link, &pmac_i2c_busses);
804
805 printk(KERN_INFO " channel %d bus <multibus>\n", channel);
806 }
807 }
808
809 #endif /* CONFIG_ADB_PMU */
810
811
812 /*
813 *
814 * SMU implementation
815 *
816 */
817
818 #ifdef CONFIG_PMAC_SMU
819
820 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
821 {
822 complete(misc);
823 }
824
825 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
826 u32 subaddr, u8 *data, int len)
827 {
828 struct smu_i2c_cmd *cmd = bus->hostdata;
829 struct completion comp;
830 int read = addrdir & 1;
831 int rc = 0;
832
833 if ((read && len > SMU_I2C_READ_MAX) ||
834 ((!read) && len > SMU_I2C_WRITE_MAX))
835 return -EINVAL;
836
837 memset(cmd, 0, sizeof(struct smu_i2c_cmd));
838 cmd->info.bus = bus->channel;
839 cmd->info.devaddr = addrdir;
840 cmd->info.datalen = len;
841
842 switch(bus->mode) {
843 case pmac_i2c_mode_std:
844 if (subsize != 0)
845 return -EINVAL;
846 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
847 break;
848 case pmac_i2c_mode_stdsub:
849 case pmac_i2c_mode_combined:
850 if (subsize > 3 || subsize < 1)
851 return -EINVAL;
852 cmd->info.sublen = subsize;
853 /* that's big-endian only but heh ! */
854 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
855 subsize);
856 if (bus->mode == pmac_i2c_mode_stdsub)
857 cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
858 else
859 cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
860 break;
861 default:
862 return -EINVAL;
863 }
864 if (!read && len)
865 memcpy(cmd->info.data, data, len);
866
867 init_completion(&comp);
868 cmd->done = smu_i2c_complete;
869 cmd->misc = &comp;
870 rc = smu_queue_i2c(cmd);
871 if (rc < 0)
872 return rc;
873 wait_for_completion(&comp);
874 rc = cmd->status;
875
876 if (read && len)
877 memcpy(data, cmd->info.data, len);
878 return rc < 0 ? rc : 0;
879 }
880
881 static void __init smu_i2c_probe(void)
882 {
883 struct device_node *controller, *busnode;
884 struct pmac_i2c_bus *bus;
885 const u32 *reg;
886 int sz;
887
888 if (!smu_present())
889 return;
890
891 controller = of_find_node_by_name(NULL, "smu-i2c-control");
892 if (controller == NULL)
893 controller = of_find_node_by_name(NULL, "smu");
894 if (controller == NULL)
895 return;
896
897 printk(KERN_INFO "SMU i2c %s\n", controller->full_name);
898
899 /* Look for childs, note that they might not be of the right
900 * type as older device trees mix i2c busses and other thigns
901 * at the same level
902 */
903 for (busnode = NULL;
904 (busnode = of_get_next_child(controller, busnode)) != NULL;) {
905 if (strcmp(busnode->type, "i2c") &&
906 strcmp(busnode->type, "i2c-bus"))
907 continue;
908 reg = of_get_property(busnode, "reg", NULL);
909 if (reg == NULL)
910 continue;
911
912 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
913 bus = kzalloc(sz, GFP_KERNEL);
914 if (bus == NULL)
915 return;
916
917 bus->controller = controller;
918 bus->busnode = of_node_get(busnode);
919 bus->type = pmac_i2c_bus_smu;
920 bus->channel = *reg;
921 bus->mode = pmac_i2c_mode_std;
922 bus->hostdata = bus + 1;
923 bus->xfer = smu_i2c_xfer;
924 mutex_init(&bus->mutex);
925 bus->flags = 0;
926 list_add(&bus->link, &pmac_i2c_busses);
927
928 printk(KERN_INFO " channel %x bus %s\n",
929 bus->channel, busnode->full_name);
930 }
931 }
932
933 #endif /* CONFIG_PMAC_SMU */
934
935 /*
936 *
937 * Core code
938 *
939 */
940
941
942 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
943 {
944 struct device_node *p = of_node_get(node);
945 struct device_node *prev = NULL;
946 struct pmac_i2c_bus *bus;
947
948 while(p) {
949 list_for_each_entry(bus, &pmac_i2c_busses, link) {
950 if (p == bus->busnode) {
951 if (prev && bus->flags & pmac_i2c_multibus) {
952 const u32 *reg;
953 reg = of_get_property(prev, "reg",
954 NULL);
955 if (!reg)
956 continue;
957 if (((*reg) >> 8) != bus->channel)
958 continue;
959 }
960 of_node_put(p);
961 of_node_put(prev);
962 return bus;
963 }
964 }
965 of_node_put(prev);
966 prev = p;
967 p = of_get_parent(p);
968 }
969 return NULL;
970 }
971 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
972
973 u8 pmac_i2c_get_dev_addr(struct device_node *device)
974 {
975 const u32 *reg = of_get_property(device, "reg", NULL);
976
977 if (reg == NULL)
978 return 0;
979
980 return (*reg) & 0xff;
981 }
982 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
983
984 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
985 {
986 return bus->controller;
987 }
988 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
989
990 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
991 {
992 return bus->busnode;
993 }
994 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
995
996 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
997 {
998 return bus->type;
999 }
1000 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1001
1002 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1003 {
1004 return bus->flags;
1005 }
1006 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1007
1008 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1009 {
1010 return bus->channel;
1011 }
1012 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1013
1014
1015 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1016 {
1017 return &bus->adapter;
1018 }
1019 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1020
1021 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1022 {
1023 struct pmac_i2c_bus *bus;
1024
1025 list_for_each_entry(bus, &pmac_i2c_busses, link)
1026 if (&bus->adapter == adapter)
1027 return bus;
1028 return NULL;
1029 }
1030 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1031
1032 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1033 {
1034 struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1035
1036 if (bus == NULL)
1037 return 0;
1038 return (&bus->adapter == adapter);
1039 }
1040 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1041
1042 int pmac_low_i2c_lock(struct device_node *np)
1043 {
1044 struct pmac_i2c_bus *bus, *found = NULL;
1045
1046 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1047 if (np == bus->controller) {
1048 found = bus;
1049 break;
1050 }
1051 }
1052 if (!found)
1053 return -ENODEV;
1054 return pmac_i2c_open(bus, 0);
1055 }
1056 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1057
1058 int pmac_low_i2c_unlock(struct device_node *np)
1059 {
1060 struct pmac_i2c_bus *bus, *found = NULL;
1061
1062 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1063 if (np == bus->controller) {
1064 found = bus;
1065 break;
1066 }
1067 }
1068 if (!found)
1069 return -ENODEV;
1070 pmac_i2c_close(bus);
1071 return 0;
1072 }
1073 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1074
1075
1076 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1077 {
1078 int rc;
1079
1080 mutex_lock(&bus->mutex);
1081 bus->polled = polled || pmac_i2c_force_poll;
1082 bus->opened = 1;
1083 bus->mode = pmac_i2c_mode_std;
1084 if (bus->open && (rc = bus->open(bus)) != 0) {
1085 bus->opened = 0;
1086 mutex_unlock(&bus->mutex);
1087 return rc;
1088 }
1089 return 0;
1090 }
1091 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1092
1093 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1094 {
1095 WARN_ON(!bus->opened);
1096 if (bus->close)
1097 bus->close(bus);
1098 bus->opened = 0;
1099 mutex_unlock(&bus->mutex);
1100 }
1101 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1102
1103 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1104 {
1105 WARN_ON(!bus->opened);
1106
1107 /* Report me if you see the error below as there might be a new
1108 * "combined4" mode that I need to implement for the SMU bus
1109 */
1110 if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1111 printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1112 " bus %s !\n", mode, bus->busnode->full_name);
1113 return -EINVAL;
1114 }
1115 bus->mode = mode;
1116
1117 return 0;
1118 }
1119 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1120
1121 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1122 u32 subaddr, u8 *data, int len)
1123 {
1124 int rc;
1125
1126 WARN_ON(!bus->opened);
1127
1128 DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1129 " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize,
1130 subaddr, len, bus->busnode->full_name);
1131
1132 rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1133
1134 #ifdef DEBUG
1135 if (rc)
1136 DBG("xfer error %d\n", rc);
1137 #endif
1138 return rc;
1139 }
1140 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1141
1142 /* some quirks for platform function decoding */
1143 enum {
1144 pmac_i2c_quirk_invmask = 0x00000001u,
1145 pmac_i2c_quirk_skip = 0x00000002u,
1146 };
1147
1148 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1149 int quirks))
1150 {
1151 struct pmac_i2c_bus *bus;
1152 struct device_node *np;
1153 static struct whitelist_ent {
1154 char *name;
1155 char *compatible;
1156 int quirks;
1157 } whitelist[] = {
1158 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1159 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1160 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1161 { "i2c-cpu-voltage", NULL, 0},
1162 { "temp-monitor", NULL, 0 },
1163 { "supply-monitor", NULL, 0 },
1164 { NULL, NULL, 0 },
1165 };
1166
1167 /* Only some devices need to have platform functions instanciated
1168 * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1169 * on Xserve, if we ever do a driver for them, will use their own
1170 * platform function instance
1171 */
1172 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1173 for (np = NULL;
1174 (np = of_get_next_child(bus->busnode, np)) != NULL;) {
1175 struct whitelist_ent *p;
1176 /* If multibus, check if device is on that bus */
1177 if (bus->flags & pmac_i2c_multibus)
1178 if (bus != pmac_i2c_find_bus(np))
1179 continue;
1180 for (p = whitelist; p->name != NULL; p++) {
1181 if (strcmp(np->name, p->name))
1182 continue;
1183 if (p->compatible &&
1184 !of_device_is_compatible(np, p->compatible))
1185 continue;
1186 if (p->quirks & pmac_i2c_quirk_skip)
1187 break;
1188 callback(np, p->quirks);
1189 break;
1190 }
1191 }
1192 }
1193 }
1194
1195 #define MAX_I2C_DATA 64
1196
1197 struct pmac_i2c_pf_inst
1198 {
1199 struct pmac_i2c_bus *bus;
1200 u8 addr;
1201 u8 buffer[MAX_I2C_DATA];
1202 u8 scratch[MAX_I2C_DATA];
1203 int bytes;
1204 int quirks;
1205 };
1206
1207 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1208 {
1209 struct pmac_i2c_pf_inst *inst;
1210 struct pmac_i2c_bus *bus;
1211
1212 bus = pmac_i2c_find_bus(func->node);
1213 if (bus == NULL) {
1214 printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n",
1215 func->node->full_name);
1216 return NULL;
1217 }
1218 if (pmac_i2c_open(bus, 0)) {
1219 printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n",
1220 func->node->full_name);
1221 return NULL;
1222 }
1223
1224 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1225 if (inst == NULL) {
1226 pmac_i2c_close(bus);
1227 return NULL;
1228 }
1229 inst->bus = bus;
1230 inst->addr = pmac_i2c_get_dev_addr(func->node);
1231 inst->quirks = (int)(long)func->driver_data;
1232 return inst;
1233 }
1234
1235 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1236 {
1237 struct pmac_i2c_pf_inst *inst = instdata;
1238
1239 if (inst == NULL)
1240 return;
1241 pmac_i2c_close(inst->bus);
1242 kfree(inst);
1243 }
1244
1245 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1246 {
1247 struct pmac_i2c_pf_inst *inst = instdata;
1248
1249 inst->bytes = len;
1250 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1251 inst->buffer, len);
1252 }
1253
1254 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1255 {
1256 struct pmac_i2c_pf_inst *inst = instdata;
1257
1258 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1259 (u8 *)data, len);
1260 }
1261
1262 /* This function is used to do the masking & OR'ing for the "rmw" type
1263 * callbacks. Ze should apply the mask and OR in the values in the
1264 * buffer before writing back. The problem is that it seems that
1265 * various darwin drivers implement the mask/or differently, thus
1266 * we need to check the quirks first
1267 */
1268 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1269 u32 len, const u8 *mask, const u8 *val)
1270 {
1271 int i;
1272
1273 if (inst->quirks & pmac_i2c_quirk_invmask) {
1274 for (i = 0; i < len; i ++)
1275 inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1276 } else {
1277 for (i = 0; i < len; i ++)
1278 inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1279 | (val[i] & mask[i]);
1280 }
1281 }
1282
1283 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1284 u32 totallen, const u8 *maskdata,
1285 const u8 *valuedata)
1286 {
1287 struct pmac_i2c_pf_inst *inst = instdata;
1288
1289 if (masklen > inst->bytes || valuelen > inst->bytes ||
1290 totallen > inst->bytes || valuelen > masklen)
1291 return -EINVAL;
1292
1293 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1294
1295 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1296 inst->scratch, totallen);
1297 }
1298
1299 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1300 {
1301 struct pmac_i2c_pf_inst *inst = instdata;
1302
1303 inst->bytes = len;
1304 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1305 inst->buffer, len);
1306 }
1307
1308 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1309 const u8 *data)
1310 {
1311 struct pmac_i2c_pf_inst *inst = instdata;
1312
1313 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1314 subaddr, (u8 *)data, len);
1315 }
1316
1317 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1318 {
1319 struct pmac_i2c_pf_inst *inst = instdata;
1320
1321 return pmac_i2c_setmode(inst->bus, mode);
1322 }
1323
1324 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1325 u32 valuelen, u32 totallen, const u8 *maskdata,
1326 const u8 *valuedata)
1327 {
1328 struct pmac_i2c_pf_inst *inst = instdata;
1329
1330 if (masklen > inst->bytes || valuelen > inst->bytes ||
1331 totallen > inst->bytes || valuelen > masklen)
1332 return -EINVAL;
1333
1334 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1335
1336 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1337 subaddr, inst->scratch, totallen);
1338 }
1339
1340 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1341 const u8 *maskdata,
1342 const u8 *valuedata)
1343 {
1344 struct pmac_i2c_pf_inst *inst = instdata;
1345 int i, match;
1346
1347 /* Get return value pointer, it's assumed to be a u32 */
1348 if (!args || !args->count || !args->u[0].p)
1349 return -EINVAL;
1350
1351 /* Check buffer */
1352 if (len > inst->bytes)
1353 return -EINVAL;
1354
1355 for (i = 0, match = 1; match && i < len; i ++)
1356 if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1357 match = 0;
1358 *args->u[0].p = match;
1359 return 0;
1360 }
1361
1362 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1363 {
1364 msleep((duration + 999) / 1000);
1365 return 0;
1366 }
1367
1368
1369 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1370 .begin = pmac_i2c_do_begin,
1371 .end = pmac_i2c_do_end,
1372 .read_i2c = pmac_i2c_do_read,
1373 .write_i2c = pmac_i2c_do_write,
1374 .rmw_i2c = pmac_i2c_do_rmw,
1375 .read_i2c_sub = pmac_i2c_do_read_sub,
1376 .write_i2c_sub = pmac_i2c_do_write_sub,
1377 .rmw_i2c_sub = pmac_i2c_do_rmw_sub,
1378 .set_i2c_mode = pmac_i2c_do_set_mode,
1379 .mask_and_compare = pmac_i2c_do_mask_and_comp,
1380 .delay = pmac_i2c_do_delay,
1381 };
1382
1383 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1384 {
1385 DBG("dev_create(%s)\n", np->full_name);
1386
1387 pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1388 (void *)(long)quirks);
1389 }
1390
1391 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1392 {
1393 DBG("dev_create(%s)\n", np->full_name);
1394
1395 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1396 }
1397
1398 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1399 {
1400 DBG("dev_suspend(%s)\n", np->full_name);
1401 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1402 }
1403
1404 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1405 {
1406 DBG("dev_resume(%s)\n", np->full_name);
1407 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1408 }
1409
1410 void pmac_pfunc_i2c_suspend(void)
1411 {
1412 pmac_i2c_devscan(pmac_i2c_dev_suspend);
1413 }
1414
1415 void pmac_pfunc_i2c_resume(void)
1416 {
1417 pmac_i2c_devscan(pmac_i2c_dev_resume);
1418 }
1419
1420 /*
1421 * Initialize us: probe all i2c busses on the machine, instantiate
1422 * busses and platform functions as needed.
1423 */
1424 /* This is non-static as it might be called early by smp code */
1425 int __init pmac_i2c_init(void)
1426 {
1427 static int i2c_inited;
1428
1429 if (i2c_inited)
1430 return 0;
1431 i2c_inited = 1;
1432
1433 /* Probe keywest-i2c busses */
1434 kw_i2c_probe();
1435
1436 #ifdef CONFIG_ADB_PMU
1437 /* Probe PMU i2c busses */
1438 pmu_i2c_probe();
1439 #endif
1440
1441 #ifdef CONFIG_PMAC_SMU
1442 /* Probe SMU i2c busses */
1443 smu_i2c_probe();
1444 #endif
1445
1446 /* Now add plaform functions for some known devices */
1447 pmac_i2c_devscan(pmac_i2c_dev_create);
1448
1449 return 0;
1450 }
1451 machine_arch_initcall(powermac, pmac_i2c_init);
1452
1453 /* Since pmac_i2c_init can be called too early for the platform device
1454 * registration, we need to do it at a later time. In our case, subsys
1455 * happens to fit well, though I agree it's a bit of a hack...
1456 */
1457 static int __init pmac_i2c_create_platform_devices(void)
1458 {
1459 struct pmac_i2c_bus *bus;
1460 int i = 0;
1461
1462 /* In the case where we are initialized from smp_init(), we must
1463 * not use the timer (and thus the irq). It's safe from now on
1464 * though
1465 */
1466 pmac_i2c_force_poll = 0;
1467
1468 /* Create platform devices */
1469 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1470 bus->platform_dev =
1471 platform_device_alloc("i2c-powermac", i++);
1472 if (bus->platform_dev == NULL)
1473 return -ENOMEM;
1474 bus->platform_dev->dev.platform_data = bus;
1475 platform_device_add(bus->platform_dev);
1476 }
1477
1478 /* Now call platform "init" functions */
1479 pmac_i2c_devscan(pmac_i2c_dev_init);
1480
1481 return 0;
1482 }
1483 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices);
Tomato firmware and modifications.