2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright SUSE Linux Products GmbH 2009
17 * Authors: Alexander Graf <agraf@suse.de>
20 #include <asm/kvm_ppc.h>
21 #include <asm/disassemble.h>
22 #include <asm/kvm_book3s.h>
25 #define OP_19_XOP_RFID 18
26 #define OP_19_XOP_RFI 50
28 #define OP_31_XOP_MFMSR 83
29 #define OP_31_XOP_MTMSR 146
30 #define OP_31_XOP_MTMSRD 178
31 #define OP_31_XOP_MTSR 210
32 #define OP_31_XOP_MTSRIN 242
33 #define OP_31_XOP_TLBIEL 274
34 #define OP_31_XOP_TLBIE 306
35 #define OP_31_XOP_SLBMTE 402
36 #define OP_31_XOP_SLBIE 434
37 #define OP_31_XOP_SLBIA 498
38 #define OP_31_XOP_MFSR 595
39 #define OP_31_XOP_MFSRIN 659
40 #define OP_31_XOP_DCBA 758
41 #define OP_31_XOP_SLBMFEV 851
42 #define OP_31_XOP_EIOIO 854
43 #define OP_31_XOP_SLBMFEE 915
45 /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
46 #define OP_31_XOP_DCBZ 1010
62 /* Book3S_32 defines mfsrin(v) - but that messes up our abstract
63 * function pointers, so let's just disable the define. */
66 int kvmppc_core_emulate_op(struct kvm_run
*run
, struct kvm_vcpu
*vcpu
,
67 unsigned int inst
, int *advance
)
69 int emulated
= EMULATE_DONE
;
71 switch (get_op(inst
)) {
73 switch (get_xop(inst
)) {
76 kvmppc_set_pc(vcpu
, vcpu
->arch
.srr0
);
77 kvmppc_set_msr(vcpu
, vcpu
->arch
.srr1
);
82 emulated
= EMULATE_FAIL
;
87 switch (get_xop(inst
)) {
89 kvmppc_set_gpr(vcpu
, get_rt(inst
), vcpu
->arch
.msr
);
91 case OP_31_XOP_MTMSRD
:
93 ulong rs
= kvmppc_get_gpr(vcpu
, get_rs(inst
));
95 vcpu
->arch
.msr
&= ~(MSR_RI
| MSR_EE
);
96 vcpu
->arch
.msr
|= rs
& (MSR_RI
| MSR_EE
);
98 kvmppc_set_msr(vcpu
, rs
);
101 case OP_31_XOP_MTMSR
:
102 kvmppc_set_msr(vcpu
, kvmppc_get_gpr(vcpu
, get_rs(inst
)));
108 srnum
= kvmppc_get_field(inst
, 12 + 32, 15 + 32);
109 if (vcpu
->arch
.mmu
.mfsrin
) {
111 sr
= vcpu
->arch
.mmu
.mfsrin(vcpu
, srnum
);
112 kvmppc_set_gpr(vcpu
, get_rt(inst
), sr
);
116 case OP_31_XOP_MFSRIN
:
120 srnum
= (kvmppc_get_gpr(vcpu
, get_rb(inst
)) >> 28) & 0xf;
121 if (vcpu
->arch
.mmu
.mfsrin
) {
123 sr
= vcpu
->arch
.mmu
.mfsrin(vcpu
, srnum
);
124 kvmppc_set_gpr(vcpu
, get_rt(inst
), sr
);
129 vcpu
->arch
.mmu
.mtsrin(vcpu
,
131 kvmppc_get_gpr(vcpu
, get_rs(inst
)));
133 case OP_31_XOP_MTSRIN
:
134 vcpu
->arch
.mmu
.mtsrin(vcpu
,
135 (kvmppc_get_gpr(vcpu
, get_rb(inst
)) >> 28) & 0xf,
136 kvmppc_get_gpr(vcpu
, get_rs(inst
)));
138 case OP_31_XOP_TLBIE
:
139 case OP_31_XOP_TLBIEL
:
141 bool large
= (inst
& 0x00200000) ? true : false;
142 ulong addr
= kvmppc_get_gpr(vcpu
, get_rb(inst
));
143 vcpu
->arch
.mmu
.tlbie(vcpu
, addr
, large
);
146 case OP_31_XOP_EIOIO
:
148 case OP_31_XOP_SLBMTE
:
149 if (!vcpu
->arch
.mmu
.slbmte
)
152 vcpu
->arch
.mmu
.slbmte(vcpu
,
153 kvmppc_get_gpr(vcpu
, get_rs(inst
)),
154 kvmppc_get_gpr(vcpu
, get_rb(inst
)));
156 case OP_31_XOP_SLBIE
:
157 if (!vcpu
->arch
.mmu
.slbie
)
160 vcpu
->arch
.mmu
.slbie(vcpu
,
161 kvmppc_get_gpr(vcpu
, get_rb(inst
)));
163 case OP_31_XOP_SLBIA
:
164 if (!vcpu
->arch
.mmu
.slbia
)
167 vcpu
->arch
.mmu
.slbia(vcpu
);
169 case OP_31_XOP_SLBMFEE
:
170 if (!vcpu
->arch
.mmu
.slbmfee
) {
171 emulated
= EMULATE_FAIL
;
175 rb
= kvmppc_get_gpr(vcpu
, get_rb(inst
));
176 t
= vcpu
->arch
.mmu
.slbmfee(vcpu
, rb
);
177 kvmppc_set_gpr(vcpu
, get_rt(inst
), t
);
180 case OP_31_XOP_SLBMFEV
:
181 if (!vcpu
->arch
.mmu
.slbmfev
) {
182 emulated
= EMULATE_FAIL
;
186 rb
= kvmppc_get_gpr(vcpu
, get_rb(inst
));
187 t
= vcpu
->arch
.mmu
.slbmfev(vcpu
, rb
);
188 kvmppc_set_gpr(vcpu
, get_rt(inst
), t
);
192 /* Gets treated as NOP */
196 ulong rb
= kvmppc_get_gpr(vcpu
, get_rb(inst
));
199 u32 zeros
[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
204 ra
= kvmppc_get_gpr(vcpu
, get_ra(inst
));
206 addr
= (ra
+ rb
) & ~31ULL;
207 if (!(vcpu
->arch
.msr
& MSR_SF
))
211 r
= kvmppc_st(vcpu
, &addr
, 32, zeros
, true);
212 if ((r
== -ENOENT
) || (r
== -EPERM
)) {
214 vcpu
->arch
.dear
= vaddr
;
215 to_svcpu(vcpu
)->fault_dar
= vaddr
;
217 dsisr
= DSISR_ISSTORE
;
219 dsisr
|= DSISR_NOHPTE
;
220 else if (r
== -EPERM
)
221 dsisr
|= DSISR_PROTFAULT
;
223 to_book3s(vcpu
)->dsisr
= dsisr
;
224 to_svcpu(vcpu
)->fault_dsisr
= dsisr
;
226 kvmppc_book3s_queue_irqprio(vcpu
,
227 BOOK3S_INTERRUPT_DATA_STORAGE
);
233 emulated
= EMULATE_FAIL
;
237 emulated
= EMULATE_FAIL
;
240 if (emulated
== EMULATE_FAIL
)
241 emulated
= kvmppc_emulate_paired_single(run
, vcpu
);
246 void kvmppc_set_bat(struct kvm_vcpu
*vcpu
, struct kvmppc_bat
*bat
, bool upper
,
251 u32 bl
= (val
>> 2) & 0x7ff;
252 bat
->bepi_mask
= (~bl
<< 17);
253 bat
->bepi
= val
& 0xfffe0000;
254 bat
->vs
= (val
& 2) ? 1 : 0;
255 bat
->vp
= (val
& 1) ? 1 : 0;
256 bat
->raw
= (bat
->raw
& 0xffffffff00000000ULL
) | val
;
259 bat
->brpn
= val
& 0xfffe0000;
260 bat
->wimg
= (val
>> 3) & 0xf;
262 bat
->raw
= (bat
->raw
& 0x00000000ffffffffULL
) | ((u64
)val
<< 32);
266 static u32
kvmppc_read_bat(struct kvm_vcpu
*vcpu
, int sprn
)
268 struct kvmppc_vcpu_book3s
*vcpu_book3s
= to_book3s(vcpu
);
269 struct kvmppc_bat
*bat
;
272 case SPRN_IBAT0U
... SPRN_IBAT3L
:
273 bat
= &vcpu_book3s
->ibat
[(sprn
- SPRN_IBAT0U
) / 2];
275 case SPRN_IBAT4U
... SPRN_IBAT7L
:
276 bat
= &vcpu_book3s
->ibat
[4 + ((sprn
- SPRN_IBAT4U
) / 2)];
278 case SPRN_DBAT0U
... SPRN_DBAT3L
:
279 bat
= &vcpu_book3s
->dbat
[(sprn
- SPRN_DBAT0U
) / 2];
281 case SPRN_DBAT4U
... SPRN_DBAT7L
:
282 bat
= &vcpu_book3s
->dbat
[4 + ((sprn
- SPRN_DBAT4U
) / 2)];
289 return bat
->raw
>> 32;
294 static void kvmppc_write_bat(struct kvm_vcpu
*vcpu
, int sprn
, u32 val
)
296 struct kvmppc_vcpu_book3s
*vcpu_book3s
= to_book3s(vcpu
);
297 struct kvmppc_bat
*bat
;
300 case SPRN_IBAT0U
... SPRN_IBAT3L
:
301 bat
= &vcpu_book3s
->ibat
[(sprn
- SPRN_IBAT0U
) / 2];
303 case SPRN_IBAT4U
... SPRN_IBAT7L
:
304 bat
= &vcpu_book3s
->ibat
[4 + ((sprn
- SPRN_IBAT4U
) / 2)];
306 case SPRN_DBAT0U
... SPRN_DBAT3L
:
307 bat
= &vcpu_book3s
->dbat
[(sprn
- SPRN_DBAT0U
) / 2];
309 case SPRN_DBAT4U
... SPRN_DBAT7L
:
310 bat
= &vcpu_book3s
->dbat
[4 + ((sprn
- SPRN_DBAT4U
) / 2)];
316 kvmppc_set_bat(vcpu
, bat
, !(sprn
% 2), val
);
319 int kvmppc_core_emulate_mtspr(struct kvm_vcpu
*vcpu
, int sprn
, int rs
)
321 int emulated
= EMULATE_DONE
;
322 ulong spr_val
= kvmppc_get_gpr(vcpu
, rs
);
326 to_book3s(vcpu
)->sdr1
= spr_val
;
329 to_book3s(vcpu
)->dsisr
= spr_val
;
332 vcpu
->arch
.dear
= spr_val
;
335 to_book3s(vcpu
)->hior
= spr_val
;
337 case SPRN_IBAT0U
... SPRN_IBAT3L
:
338 case SPRN_IBAT4U
... SPRN_IBAT7L
:
339 case SPRN_DBAT0U
... SPRN_DBAT3L
:
340 case SPRN_DBAT4U
... SPRN_DBAT7L
:
341 kvmppc_write_bat(vcpu
, sprn
, (u32
)spr_val
);
342 /* BAT writes happen so rarely that we're ok to flush
344 kvmppc_mmu_pte_flush(vcpu
, 0, 0);
345 kvmppc_mmu_flush_segments(vcpu
);
348 to_book3s(vcpu
)->hid
[0] = spr_val
;
351 to_book3s(vcpu
)->hid
[1] = spr_val
;
354 to_book3s(vcpu
)->hid
[2] = spr_val
;
356 case SPRN_HID2_GEKKO
:
357 to_book3s(vcpu
)->hid
[2] = spr_val
;
358 /* HID2.PSE controls paired single on gekko */
359 switch (vcpu
->arch
.pvr
) {
360 case 0x00080200: /* lonestar 2.0 */
361 case 0x00088202: /* lonestar 2.2 */
362 case 0x70000100: /* gekko 1.0 */
363 case 0x00080100: /* gekko 2.0 */
364 case 0x00083203: /* gekko 2.3a */
365 case 0x00083213: /* gekko 2.3b */
366 case 0x00083204: /* gekko 2.4 */
367 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
368 case 0x00087200: /* broadway */
369 if (vcpu
->arch
.hflags
& BOOK3S_HFLAG_NATIVE_PS
) {
370 /* Native paired singles */
371 } else if (spr_val
& (1 << 29)) { /* HID2.PSE */
372 vcpu
->arch
.hflags
|= BOOK3S_HFLAG_PAIRED_SINGLE
;
373 kvmppc_giveup_ext(vcpu
, MSR_FP
);
375 vcpu
->arch
.hflags
&= ~BOOK3S_HFLAG_PAIRED_SINGLE
;
381 case SPRN_HID4_GEKKO
:
382 to_book3s(vcpu
)->hid
[4] = spr_val
;
385 to_book3s(vcpu
)->hid
[5] = spr_val
;
386 /* guest HID5 set can change is_dcbz32 */
387 if (vcpu
->arch
.mmu
.is_dcbz32(vcpu
) &&
389 vcpu
->arch
.hflags
|= BOOK3S_HFLAG_DCBZ32
;
399 to_book3s(vcpu
)->gqr
[sprn
- SPRN_GQR0
] = spr_val
;
408 case SPRN_MMCR0_GEKKO
:
409 case SPRN_MMCR1_GEKKO
:
410 case SPRN_PMC1_GEKKO
:
411 case SPRN_PMC2_GEKKO
:
412 case SPRN_PMC3_GEKKO
:
413 case SPRN_PMC4_GEKKO
:
414 case SPRN_WPAR_GEKKO
:
417 printk(KERN_INFO
"KVM: invalid SPR write: %d\n", sprn
);
419 emulated
= EMULATE_FAIL
;
427 int kvmppc_core_emulate_mfspr(struct kvm_vcpu
*vcpu
, int sprn
, int rt
)
429 int emulated
= EMULATE_DONE
;
432 case SPRN_IBAT0U
... SPRN_IBAT3L
:
433 case SPRN_IBAT4U
... SPRN_IBAT7L
:
434 case SPRN_DBAT0U
... SPRN_DBAT3L
:
435 case SPRN_DBAT4U
... SPRN_DBAT7L
:
436 kvmppc_set_gpr(vcpu
, rt
, kvmppc_read_bat(vcpu
, sprn
));
439 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->sdr1
);
442 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->dsisr
);
445 kvmppc_set_gpr(vcpu
, rt
, vcpu
->arch
.dear
);
448 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hior
);
451 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[0]);
454 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[1]);
457 case SPRN_HID2_GEKKO
:
458 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[2]);
461 case SPRN_HID4_GEKKO
:
462 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[4]);
465 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[5]);
475 kvmppc_set_gpr(vcpu
, rt
,
476 to_book3s(vcpu
)->gqr
[sprn
- SPRN_GQR0
]);
484 case SPRN_MMCR0_GEKKO
:
485 case SPRN_MMCR1_GEKKO
:
486 case SPRN_PMC1_GEKKO
:
487 case SPRN_PMC2_GEKKO
:
488 case SPRN_PMC3_GEKKO
:
489 case SPRN_PMC4_GEKKO
:
490 case SPRN_WPAR_GEKKO
:
491 kvmppc_set_gpr(vcpu
, rt
, 0);
494 printk(KERN_INFO
"KVM: invalid SPR read: %d\n", sprn
);
496 emulated
= EMULATE_FAIL
;
504 u32
kvmppc_alignment_dsisr(struct kvm_vcpu
*vcpu
, unsigned int inst
)
509 * This is what the spec says about DSISR bits (not mentioned = 0):
511 * 12:13 [DS] Set to bits 30:31
512 * 15:16 [X] Set to bits 29:30
513 * 17 [X] Set to bit 25
514 * [D/DS] Set to bit 5
515 * 18:21 [X] Set to bits 21:24
516 * [D/DS] Set to bits 1:4
517 * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS)
518 * 27:31 Set to bits 11:15 (RA)
521 switch (get_op(inst
)) {
527 dsisr
|= (inst
>> 12) & 0x4000; /* bit 17 */
528 dsisr
|= (inst
>> 17) & 0x3c00; /* bits 18:21 */
532 dsisr
|= (inst
<< 14) & 0x18000; /* bits 15:16 */
533 dsisr
|= (inst
<< 8) & 0x04000; /* bit 17 */
534 dsisr
|= (inst
<< 3) & 0x03c00; /* bits 18:21 */
537 printk(KERN_INFO
"KVM: Unaligned instruction 0x%x\n", inst
);
541 dsisr
|= (inst
>> 16) & 0x03ff; /* bits 22:31 */
546 ulong
kvmppc_alignment_dar(struct kvm_vcpu
*vcpu
, unsigned int inst
)
551 switch (get_op(inst
)) {
558 dar
= kvmppc_get_gpr(vcpu
, ra
);
559 dar
+= (s32
)((s16
)inst
);
564 dar
= kvmppc_get_gpr(vcpu
, ra
);
565 dar
+= kvmppc_get_gpr(vcpu
, get_rb(inst
));
568 printk(KERN_INFO
"KVM: Unaligned instruction 0x%x\n", inst
);