release/src-rt-6.x.4708/linux/linux-2.6.36/arch/powerpc/include/asm/processor.h

   1 #ifndef _ASM_POWERPC_PROCESSOR_H
   2 #define _ASM_POWERPC_PROCESSOR_H
   3
   4 /*
   5  * Copyright (C) 2001 PPC 64 Team, IBM Corp
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * as published by the Free Software Foundation; either version
  10  * 2 of the License, or (at your option) any later version.
  11  */
  12
  13 #include <asm/reg.h>
  14
  15 #ifdef CONFIG_VSX
  16 #define TS_FPRWIDTH 2
  17 #else
  18 #define TS_FPRWIDTH 1
  19 #endif
  20
  21 #ifndef __ASSEMBLY__
  22 #include <linux/compiler.h>
  23 #include <asm/ptrace.h>
  24 #include <asm/types.h>
  25
  26 /* We do _not_ want to define new machine types at all, those must die
  27  * in favor of using the device-tree
  28  * -- BenH.
  29  */
  30
  31 /* PREP sub-platform types see residual.h for these */
  32 #define _PREP_Motorola  0x01    /* motorola prep */
  33 #define _PREP_Firm      0x02    /* firmworks prep */
  34 #define _PREP_IBM       0x00    /* ibm prep */
  35 #define _PREP_Bull      0x03    /* bull prep */
  36
  37 /* CHRP sub-platform types. These are arbitrary */
  38 #define _CHRP_Motorola  0x04    /* motorola chrp, the cobra */
  39 #define _CHRP_IBM       0x05    /* IBM chrp, the longtrail and longtrail 2 */
  40 #define _CHRP_Pegasos   0x06    /* Genesi/bplan's Pegasos and Pegasos2 */
  41 #define _CHRP_briq      0x07    /* TotalImpact's briQ */
  42
  43 #if defined(__KERNEL__) && defined(CONFIG_PPC32)
  44
  45 extern int _chrp_type;
  46
  47 #ifdef CONFIG_PPC_PREP
  48
  49 /* what kind of prep workstation we are */
  50 extern int _prep_type;
  51
  52 #endif /* CONFIG_PPC_PREP */
  53
  54 #endif /* defined(__KERNEL__) && defined(CONFIG_PPC32) */
  55
  56 /*
  57  * Default implementation of macro that returns current
  58  * instruction pointer ("program counter").
  59  */
  60 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
  61
  62 /* Macros for adjusting thread priority (hardware multi-threading) */
  63 #define HMT_very_low()   asm volatile("or 31,31,31   # very low priority")
  64 #define HMT_low()        asm volatile("or 1,1,1      # low priority")
  65 #define HMT_medium_low() asm volatile("or 6,6,6      # medium low priority")
  66 #define HMT_medium()     asm volatile("or 2,2,2      # medium priority")
  67 #define HMT_medium_high() asm volatile("or 5,5,5      # medium high priority")
  68 #define HMT_high()       asm volatile("or 3,3,3      # high priority")
  69
  70 #ifdef __KERNEL__
  71
  72 struct task_struct;
  73 void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp);
  74 void release_thread(struct task_struct *);
  75
  76 /* Prepare to copy thread state - unlazy all lazy status */
  77 extern void prepare_to_copy(struct task_struct *tsk);
  78
  79 /* Create a new kernel thread. */
  80 extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
  81
  82 /* Lazy FPU handling on uni-processor */
  83 extern struct task_struct *last_task_used_math;
  84 extern struct task_struct *last_task_used_altivec;
  85 extern struct task_struct *last_task_used_vsx;
  86 extern struct task_struct *last_task_used_spe;
  87
  88 #ifdef CONFIG_PPC32
  89
  90 #if CONFIG_TASK_SIZE > CONFIG_KERNEL_START
  91 #error User TASK_SIZE overlaps with KERNEL_START address
  92 #endif
  93 #define TASK_SIZE       (CONFIG_TASK_SIZE)
  94
  95 /* This decides where the kernel will search for a free chunk of vm
  96  * space during mmap's.
  97  */
  98 #define TASK_UNMAPPED_BASE      (TASK_SIZE / 8 * 3)
  99 #endif
 100
 101 #ifdef CONFIG_PPC64
 102 /* 64-bit user address space is 44-bits (16TB user VM) */
 103 #define TASK_SIZE_USER64 (0x0000100000000000UL)
 104
 105 /*
 106  * 32-bit user address space is 4GB - 1 page
 107  * (this 1 page is needed so referencing of 0xFFFFFFFF generates EFAULT
 108  */
 109 #define TASK_SIZE_USER32 (0x0000000100000000UL - (1*PAGE_SIZE))
 110
 111 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
 112                 TASK_SIZE_USER32 : TASK_SIZE_USER64)
 113 #define TASK_SIZE         TASK_SIZE_OF(current)
 114
 115 /* This decides where the kernel will search for a free chunk of vm
 116  * space during mmap's.
 117  */
 118 #define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4))
 119 #define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(TASK_SIZE_USER64 / 4))
 120
 121 #define TASK_UNMAPPED_BASE ((test_thread_flag(TIF_32BIT)) ? \
 122                 TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 )
 123 #endif
 124
 125 #ifdef __KERNEL__
 126 #ifdef __powerpc64__
 127
 128 #define STACK_TOP_USER64 TASK_SIZE_USER64
 129 #define STACK_TOP_USER32 TASK_SIZE_USER32
 130
 131 #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
 132                    STACK_TOP_USER32 : STACK_TOP_USER64)
 133
 134 #define STACK_TOP_MAX STACK_TOP_USER64
 135
 136 #else /* __powerpc64__ */
 137
 138 #define STACK_TOP TASK_SIZE
 139 #define STACK_TOP_MAX   STACK_TOP
 140
 141 #endif /* __powerpc64__ */
 142 #endif /* __KERNEL__ */
 143
 144 typedef struct {
 145         unsigned long seg;
 146 } mm_segment_t;
 147
 148 #define TS_FPROFFSET 0
 149 #define TS_VSRLOWOFFSET 1
 150 #define TS_FPR(i) fpr[i][TS_FPROFFSET]
 151
 152 struct thread_struct {
 153         unsigned long   ksp;            /* Kernel stack pointer */
 154         unsigned long   ksp_limit;      /* if ksp <= ksp_limit stack overflow */
 155
 156 #ifdef CONFIG_PPC64
 157         unsigned long   ksp_vsid;
 158 #endif
 159         struct pt_regs  *regs;          /* Pointer to saved register state */
 160         mm_segment_t    fs;             /* for get_fs() validation */
 161 #ifdef CONFIG_PPC32
 162         void            *pgdir;         /* root of page-table tree */
 163 #endif
 164 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 165         /*
 166          * The following help to manage the use of Debug Control Registers
 167          * om the BookE platforms.
 168          */
 169         unsigned long   dbcr0;
 170         unsigned long   dbcr1;
 171 #ifdef CONFIG_BOOKE
 172         unsigned long   dbcr2;
 173 #endif
 174         /*
 175          * The stored value of the DBSR register will be the value at the
 176          * last debug interrupt. This register can only be read from the
 177          * user (will never be written to) and has value while helping to
 178          * describe the reason for the last debug trap.  Torez
 179          */
 180         unsigned long   dbsr;
 181         /*
 182          * The following will contain addresses used by debug applications
 183          * to help trace and trap on particular address locations.
 184          * The bits in the Debug Control Registers above help define which
 185          * of the following registers will contain valid data and/or addresses.
 186          */
 187         unsigned long   iac1;
 188         unsigned long   iac2;
 189 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
 190         unsigned long   iac3;
 191         unsigned long   iac4;
 192 #endif
 193         unsigned long   dac1;
 194         unsigned long   dac2;
 195 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
 196         unsigned long   dvc1;
 197         unsigned long   dvc2;
 198 #endif
 199 #endif
 200         /* FP and VSX 0-31 register set */
 201         double          fpr[32][TS_FPRWIDTH];
 202         struct {
 203
 204                 unsigned int pad;
 205                 unsigned int val;       /* Floating point status */
 206         } fpscr;
 207         int             fpexc_mode;     /* floating-point exception mode */
 208         unsigned int    align_ctl;      /* alignment handling control */
 209 #ifdef CONFIG_PPC64
 210         unsigned long   start_tb;       /* Start purr when proc switched in */
 211         unsigned long   accum_tb;       /* Total accumilated purr for process */
 212 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 213         struct perf_event *ptrace_bps[HBP_NUM];
 214         /*
 215          * Helps identify source of single-step exception and subsequent
 216          * hw-breakpoint enablement
 217          */
 218         struct perf_event *last_hit_ubp;
 219 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 220 #endif
 221         unsigned long   dabr;           /* Data address breakpoint register */
 222 #ifdef CONFIG_ALTIVEC
 223         /* Complete AltiVec register set */
 224         vector128       vr[32] __attribute__((aligned(16)));
 225         /* AltiVec status */
 226         vector128       vscr __attribute__((aligned(16)));
 227         unsigned long   vrsave;
 228         int             used_vr;        /* set if process has used altivec */
 229 #endif /* CONFIG_ALTIVEC */
 230 #ifdef CONFIG_VSX
 231         /* VSR status */
 232         int             used_vsr;       /* set if process has used altivec */
 233 #endif /* CONFIG_VSX */
 234 #ifdef CONFIG_SPE
 235         unsigned long   evr[32];        /* upper 32-bits of SPE regs */
 236         u64             acc;            /* Accumulator */
 237         unsigned long   spefscr;        /* SPE & eFP status */
 238         int             used_spe;       /* set if process has used spe */
 239 #endif /* CONFIG_SPE */
 240 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
 241         void*           kvm_shadow_vcpu; /* KVM internal data */
 242 #endif /* CONFIG_KVM_BOOK3S_32_HANDLER */
 243 };
 244
 245 #define ARCH_MIN_TASKALIGN 16
 246
 247 #define INIT_SP         (sizeof(init_stack) + (unsigned long) &init_stack)
 248 #define INIT_SP_LIMIT \
 249         (_ALIGN_UP(sizeof(init_thread_info), 16) + (unsigned long) &init_stack)
 250
 251 #ifdef CONFIG_SPE
 252 #define SPEFSCR_INIT .spefscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | SPEFSCR_FUNFE | SPEFSCR_FOVFE,
 253 #else
 254 #define SPEFSCR_INIT
 255 #endif
 256
 257 #ifdef CONFIG_PPC32
 258 #define INIT_THREAD { \
 259         .ksp = INIT_SP, \
 260         .ksp_limit = INIT_SP_LIMIT, \
 261         .fs = KERNEL_DS, \
 262         .pgdir = swapper_pg_dir, \
 263         .fpexc_mode = MSR_FE0 | MSR_FE1, \
 264         SPEFSCR_INIT \
 265 }
 266 #else
 267 #define INIT_THREAD  { \
 268         .ksp = INIT_SP, \
 269         .ksp_limit = INIT_SP_LIMIT, \
 270         .regs = (struct pt_regs *)INIT_SP - 1, \
 271         .fs = KERNEL_DS, \
 272         .fpr = {{0}}, \
 273         .fpscr = { .val = 0, }, \
 274         .fpexc_mode = 0, \
 275 }
 276 #endif
 277
 278 /*
 279  * Return saved PC of a blocked thread. For now, this is the "user" PC
 280  */
 281 #define thread_saved_pc(tsk)    \
 282         ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
 283
 284 #define task_pt_regs(tsk)       ((struct pt_regs *)(tsk)->thread.regs)
 285
 286 unsigned long get_wchan(struct task_struct *p);
 287
 288 #define KSTK_EIP(tsk)  ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
 289 #define KSTK_ESP(tsk)  ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0)
 290
 291 /* Get/set floating-point exception mode */
 292 #define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr))
 293 #define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val))
 294
 295 extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr);
 296 extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val);
 297
 298 #define GET_ENDIAN(tsk, adr) get_endian((tsk), (adr))
 299 #define SET_ENDIAN(tsk, val) set_endian((tsk), (val))
 300
 301 extern int get_endian(struct task_struct *tsk, unsigned long adr);
 302 extern int set_endian(struct task_struct *tsk, unsigned int val);
 303
 304 #define GET_UNALIGN_CTL(tsk, adr)       get_unalign_ctl((tsk), (adr))
 305 #define SET_UNALIGN_CTL(tsk, val)       set_unalign_ctl((tsk), (val))
 306
 307 extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr);
 308 extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val);
 309
 310 static inline unsigned int __unpack_fe01(unsigned long msr_bits)
 311 {
 312         return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8);
 313 }
 314
 315 static inline unsigned long __pack_fe01(unsigned int fpmode)
 316 {
 317         return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1);
 318 }
 319
 320 #ifdef CONFIG_PPC64
 321 #define cpu_relax()     do { HMT_low(); HMT_medium(); barrier(); } while (0)
 322 #else
 323 #define cpu_relax()     barrier()
 324 #endif
 325
 326 /* Check that a certain kernel stack pointer is valid in task_struct p */
 327 int validate_sp(unsigned long sp, struct task_struct *p,
 328                        unsigned long nbytes);
 329
 330 /*
 331  * Prefetch macros.
 332  */
 333 #define ARCH_HAS_PREFETCH
 334 #define ARCH_HAS_PREFETCHW
 335 #define ARCH_HAS_SPINLOCK_PREFETCH
 336
 337 static inline void prefetch(const void *x)
 338 {
 339         if (unlikely(!x))
 340                 return;
 341
 342         __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x));
 343 }
 344
 345 static inline void prefetchw(const void *x)
 346 {
 347         if (unlikely(!x))
 348                 return;
 349
 350         __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x));
 351 }
 352
 353 #define spin_lock_prefetch(x)   prefetchw(x)
 354
 355 #ifdef CONFIG_PPC64
 356 #define HAVE_ARCH_PICK_MMAP_LAYOUT
 357 #endif
 358
 359 #ifdef CONFIG_PPC64
 360 static inline unsigned long get_clean_sp(struct pt_regs *regs, int is_32)
 361 {
 362         unsigned long sp;
 363
 364         if (is_32)
 365                 sp = regs->gpr[1] & 0x0ffffffffUL;
 366         else
 367                 sp = regs->gpr[1];
 368
 369         return sp;
 370 }
 371 #else
 372 static inline unsigned long get_clean_sp(struct pt_regs *regs, int is_32)
 373 {
 374         return regs->gpr[1];
 375 }
 376 #endif
 377
 378 #endif /* __KERNEL__ */
 379 #endif /* __ASSEMBLY__ */
 380 #endif /* _ASM_POWERPC_PROCESSOR_H */