release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/octeon/cvmx-ipd-defs.h

   1 /***********************license start***************
   2  * Author: Cavium Networks
   3  *
   4  * Contact: support@caviumnetworks.com
   5  * This file is part of the OCTEON SDK
   6  *
   7  * Copyright (c) 2003-2008 Cavium Networks
   8  *
   9  * This file is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License, Version 2, as
  11  * published by the Free Software Foundation.
  12  *
  13  * This file is distributed in the hope that it will be useful, but
  14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16  * NONINFRINGEMENT.  See the GNU General Public License for more
  17  * details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this file; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  22  * or visit http://www.gnu.org/licenses/.
  23  *
  24  * This file may also be available under a different license from Cavium.
  25  * Contact Cavium Networks for more information
  26  ***********************license end**************************************/
  27
  28 #ifndef __CVMX_IPD_DEFS_H__
  29 #define __CVMX_IPD_DEFS_H__
  30
  31 #define CVMX_IPD_1ST_MBUFF_SKIP \
  32          CVMX_ADD_IO_SEG(0x00014F0000000000ull)
  33 #define CVMX_IPD_1st_NEXT_PTR_BACK \
  34          CVMX_ADD_IO_SEG(0x00014F0000000150ull)
  35 #define CVMX_IPD_2nd_NEXT_PTR_BACK \
  36          CVMX_ADD_IO_SEG(0x00014F0000000158ull)
  37 #define CVMX_IPD_BIST_STATUS \
  38          CVMX_ADD_IO_SEG(0x00014F00000007F8ull)
  39 #define CVMX_IPD_BP_PRT_RED_END \
  40          CVMX_ADD_IO_SEG(0x00014F0000000328ull)
  41 #define CVMX_IPD_CLK_COUNT \
  42          CVMX_ADD_IO_SEG(0x00014F0000000338ull)
  43 #define CVMX_IPD_CTL_STATUS \
  44          CVMX_ADD_IO_SEG(0x00014F0000000018ull)
  45 #define CVMX_IPD_INT_ENB \
  46          CVMX_ADD_IO_SEG(0x00014F0000000160ull)
  47 #define CVMX_IPD_INT_SUM \
  48          CVMX_ADD_IO_SEG(0x00014F0000000168ull)
  49 #define CVMX_IPD_NOT_1ST_MBUFF_SKIP \
  50          CVMX_ADD_IO_SEG(0x00014F0000000008ull)
  51 #define CVMX_IPD_PACKET_MBUFF_SIZE \
  52          CVMX_ADD_IO_SEG(0x00014F0000000010ull)
  53 #define CVMX_IPD_PKT_PTR_VALID \
  54          CVMX_ADD_IO_SEG(0x00014F0000000358ull)
  55 #define CVMX_IPD_PORTX_BP_PAGE_CNT(offset) \
  56          CVMX_ADD_IO_SEG(0x00014F0000000028ull + (((offset) & 63) * 8))
  57 #define CVMX_IPD_PORTX_BP_PAGE_CNT2(offset) \
  58          CVMX_ADD_IO_SEG(0x00014F0000000368ull + (((offset) & 63) * 8) - 8 * 36)
  59 #define CVMX_IPD_PORT_BP_COUNTERS2_PAIRX(offset) \
  60          CVMX_ADD_IO_SEG(0x00014F0000000388ull + (((offset) & 63) * 8) - 8 * 36)
  61 #define CVMX_IPD_PORT_BP_COUNTERS_PAIRX(offset) \
  62          CVMX_ADD_IO_SEG(0x00014F00000001B8ull + (((offset) & 63) * 8))
  63 #define CVMX_IPD_PORT_QOS_INTX(offset) \
  64          CVMX_ADD_IO_SEG(0x00014F0000000808ull + (((offset) & 7) * 8))
  65 #define CVMX_IPD_PORT_QOS_INT_ENBX(offset) \
  66          CVMX_ADD_IO_SEG(0x00014F0000000848ull + (((offset) & 7) * 8))
  67 #define CVMX_IPD_PORT_QOS_X_CNT(offset) \
  68          CVMX_ADD_IO_SEG(0x00014F0000000888ull + (((offset) & 511) * 8))
  69 #define CVMX_IPD_PRC_HOLD_PTR_FIFO_CTL \
  70          CVMX_ADD_IO_SEG(0x00014F0000000348ull)
  71 #define CVMX_IPD_PRC_PORT_PTR_FIFO_CTL \
  72          CVMX_ADD_IO_SEG(0x00014F0000000350ull)
  73 #define CVMX_IPD_PTR_COUNT \
  74          CVMX_ADD_IO_SEG(0x00014F0000000320ull)
  75 #define CVMX_IPD_PWP_PTR_FIFO_CTL \
  76          CVMX_ADD_IO_SEG(0x00014F0000000340ull)
  77 #define CVMX_IPD_QOS0_RED_MARKS \
  78          CVMX_ADD_IO_SEG(0x00014F0000000178ull)
  79 #define CVMX_IPD_QOS1_RED_MARKS \
  80          CVMX_ADD_IO_SEG(0x00014F0000000180ull)
  81 #define CVMX_IPD_QOS2_RED_MARKS \
  82          CVMX_ADD_IO_SEG(0x00014F0000000188ull)
  83 #define CVMX_IPD_QOS3_RED_MARKS \
  84          CVMX_ADD_IO_SEG(0x00014F0000000190ull)
  85 #define CVMX_IPD_QOS4_RED_MARKS \
  86          CVMX_ADD_IO_SEG(0x00014F0000000198ull)
  87 #define CVMX_IPD_QOS5_RED_MARKS \
  88          CVMX_ADD_IO_SEG(0x00014F00000001A0ull)
  89 #define CVMX_IPD_QOS6_RED_MARKS \
  90          CVMX_ADD_IO_SEG(0x00014F00000001A8ull)
  91 #define CVMX_IPD_QOS7_RED_MARKS \
  92          CVMX_ADD_IO_SEG(0x00014F00000001B0ull)
  93 #define CVMX_IPD_QOSX_RED_MARKS(offset) \
  94          CVMX_ADD_IO_SEG(0x00014F0000000178ull + (((offset) & 7) * 8))
  95 #define CVMX_IPD_QUE0_FREE_PAGE_CNT \
  96          CVMX_ADD_IO_SEG(0x00014F0000000330ull)
  97 #define CVMX_IPD_RED_PORT_ENABLE \
  98          CVMX_ADD_IO_SEG(0x00014F00000002D8ull)
  99 #define CVMX_IPD_RED_PORT_ENABLE2 \
 100          CVMX_ADD_IO_SEG(0x00014F00000003A8ull)
 101 #define CVMX_IPD_RED_QUE0_PARAM \
 102          CVMX_ADD_IO_SEG(0x00014F00000002E0ull)
 103 #define CVMX_IPD_RED_QUE1_PARAM \
 104          CVMX_ADD_IO_SEG(0x00014F00000002E8ull)
 105 #define CVMX_IPD_RED_QUE2_PARAM \
 106          CVMX_ADD_IO_SEG(0x00014F00000002F0ull)
 107 #define CVMX_IPD_RED_QUE3_PARAM \
 108          CVMX_ADD_IO_SEG(0x00014F00000002F8ull)
 109 #define CVMX_IPD_RED_QUE4_PARAM \
 110          CVMX_ADD_IO_SEG(0x00014F0000000300ull)
 111 #define CVMX_IPD_RED_QUE5_PARAM \
 112          CVMX_ADD_IO_SEG(0x00014F0000000308ull)
 113 #define CVMX_IPD_RED_QUE6_PARAM \
 114          CVMX_ADD_IO_SEG(0x00014F0000000310ull)
 115 #define CVMX_IPD_RED_QUE7_PARAM \
 116          CVMX_ADD_IO_SEG(0x00014F0000000318ull)
 117 #define CVMX_IPD_RED_QUEX_PARAM(offset) \
 118          CVMX_ADD_IO_SEG(0x00014F00000002E0ull + (((offset) & 7) * 8))
 119 #define CVMX_IPD_SUB_PORT_BP_PAGE_CNT \
 120          CVMX_ADD_IO_SEG(0x00014F0000000148ull)
 121 #define CVMX_IPD_SUB_PORT_FCS \
 122          CVMX_ADD_IO_SEG(0x00014F0000000170ull)
 123 #define CVMX_IPD_SUB_PORT_QOS_CNT \
 124          CVMX_ADD_IO_SEG(0x00014F0000000800ull)
 125 #define CVMX_IPD_WQE_FPA_QUEUE \
 126          CVMX_ADD_IO_SEG(0x00014F0000000020ull)
 127 #define CVMX_IPD_WQE_PTR_VALID \
 128          CVMX_ADD_IO_SEG(0x00014F0000000360ull)
 129
 130 union cvmx_ipd_1st_mbuff_skip {
 131         uint64_t u64;
 132         struct cvmx_ipd_1st_mbuff_skip_s {
 133                 uint64_t reserved_6_63:58;
 134                 uint64_t skip_sz:6;
 135         } s;
 136         struct cvmx_ipd_1st_mbuff_skip_s cn30xx;
 137         struct cvmx_ipd_1st_mbuff_skip_s cn31xx;
 138         struct cvmx_ipd_1st_mbuff_skip_s cn38xx;
 139         struct cvmx_ipd_1st_mbuff_skip_s cn38xxp2;
 140         struct cvmx_ipd_1st_mbuff_skip_s cn50xx;
 141         struct cvmx_ipd_1st_mbuff_skip_s cn52xx;
 142         struct cvmx_ipd_1st_mbuff_skip_s cn52xxp1;
 143         struct cvmx_ipd_1st_mbuff_skip_s cn56xx;
 144         struct cvmx_ipd_1st_mbuff_skip_s cn56xxp1;
 145         struct cvmx_ipd_1st_mbuff_skip_s cn58xx;
 146         struct cvmx_ipd_1st_mbuff_skip_s cn58xxp1;
 147 };
 148
 149 union cvmx_ipd_1st_next_ptr_back {
 150         uint64_t u64;
 151         struct cvmx_ipd_1st_next_ptr_back_s {
 152                 uint64_t reserved_4_63:60;
 153                 uint64_t back:4;
 154         } s;
 155         struct cvmx_ipd_1st_next_ptr_back_s cn30xx;
 156         struct cvmx_ipd_1st_next_ptr_back_s cn31xx;
 157         struct cvmx_ipd_1st_next_ptr_back_s cn38xx;
 158         struct cvmx_ipd_1st_next_ptr_back_s cn38xxp2;
 159         struct cvmx_ipd_1st_next_ptr_back_s cn50xx;
 160         struct cvmx_ipd_1st_next_ptr_back_s cn52xx;
 161         struct cvmx_ipd_1st_next_ptr_back_s cn52xxp1;
 162         struct cvmx_ipd_1st_next_ptr_back_s cn56xx;
 163         struct cvmx_ipd_1st_next_ptr_back_s cn56xxp1;
 164         struct cvmx_ipd_1st_next_ptr_back_s cn58xx;
 165         struct cvmx_ipd_1st_next_ptr_back_s cn58xxp1;
 166 };
 167
 168 union cvmx_ipd_2nd_next_ptr_back {
 169         uint64_t u64;
 170         struct cvmx_ipd_2nd_next_ptr_back_s {
 171                 uint64_t reserved_4_63:60;
 172                 uint64_t back:4;
 173         } s;
 174         struct cvmx_ipd_2nd_next_ptr_back_s cn30xx;
 175         struct cvmx_ipd_2nd_next_ptr_back_s cn31xx;
 176         struct cvmx_ipd_2nd_next_ptr_back_s cn38xx;
 177         struct cvmx_ipd_2nd_next_ptr_back_s cn38xxp2;
 178         struct cvmx_ipd_2nd_next_ptr_back_s cn50xx;
 179         struct cvmx_ipd_2nd_next_ptr_back_s cn52xx;
 180         struct cvmx_ipd_2nd_next_ptr_back_s cn52xxp1;
 181         struct cvmx_ipd_2nd_next_ptr_back_s cn56xx;
 182         struct cvmx_ipd_2nd_next_ptr_back_s cn56xxp1;
 183         struct cvmx_ipd_2nd_next_ptr_back_s cn58xx;
 184         struct cvmx_ipd_2nd_next_ptr_back_s cn58xxp1;
 185 };
 186
 187 union cvmx_ipd_bist_status {
 188         uint64_t u64;
 189         struct cvmx_ipd_bist_status_s {
 190                 uint64_t reserved_18_63:46;
 191                 uint64_t csr_mem:1;
 192                 uint64_t csr_ncmd:1;
 193                 uint64_t pwq_wqed:1;
 194                 uint64_t pwq_wp1:1;
 195                 uint64_t pwq_pow:1;
 196                 uint64_t ipq_pbe1:1;
 197                 uint64_t ipq_pbe0:1;
 198                 uint64_t pbm3:1;
 199                 uint64_t pbm2:1;
 200                 uint64_t pbm1:1;
 201                 uint64_t pbm0:1;
 202                 uint64_t pbm_word:1;
 203                 uint64_t pwq1:1;
 204                 uint64_t pwq0:1;
 205                 uint64_t prc_off:1;
 206                 uint64_t ipd_old:1;
 207                 uint64_t ipd_new:1;
 208                 uint64_t pwp:1;
 209         } s;
 210         struct cvmx_ipd_bist_status_cn30xx {
 211                 uint64_t reserved_16_63:48;
 212                 uint64_t pwq_wqed:1;
 213                 uint64_t pwq_wp1:1;
 214                 uint64_t pwq_pow:1;
 215                 uint64_t ipq_pbe1:1;
 216                 uint64_t ipq_pbe0:1;
 217                 uint64_t pbm3:1;
 218                 uint64_t pbm2:1;
 219                 uint64_t pbm1:1;
 220                 uint64_t pbm0:1;
 221                 uint64_t pbm_word:1;
 222                 uint64_t pwq1:1;
 223                 uint64_t pwq0:1;
 224                 uint64_t prc_off:1;
 225                 uint64_t ipd_old:1;
 226                 uint64_t ipd_new:1;
 227                 uint64_t pwp:1;
 228         } cn30xx;
 229         struct cvmx_ipd_bist_status_cn30xx cn31xx;
 230         struct cvmx_ipd_bist_status_cn30xx cn38xx;
 231         struct cvmx_ipd_bist_status_cn30xx cn38xxp2;
 232         struct cvmx_ipd_bist_status_cn30xx cn50xx;
 233         struct cvmx_ipd_bist_status_s cn52xx;
 234         struct cvmx_ipd_bist_status_s cn52xxp1;
 235         struct cvmx_ipd_bist_status_s cn56xx;
 236         struct cvmx_ipd_bist_status_s cn56xxp1;
 237         struct cvmx_ipd_bist_status_cn30xx cn58xx;
 238         struct cvmx_ipd_bist_status_cn30xx cn58xxp1;
 239 };
 240
 241 union cvmx_ipd_bp_prt_red_end {
 242         uint64_t u64;
 243         struct cvmx_ipd_bp_prt_red_end_s {
 244                 uint64_t reserved_40_63:24;
 245                 uint64_t prt_enb:40;
 246         } s;
 247         struct cvmx_ipd_bp_prt_red_end_cn30xx {
 248                 uint64_t reserved_36_63:28;
 249                 uint64_t prt_enb:36;
 250         } cn30xx;
 251         struct cvmx_ipd_bp_prt_red_end_cn30xx cn31xx;
 252         struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xx;
 253         struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xxp2;
 254         struct cvmx_ipd_bp_prt_red_end_cn30xx cn50xx;
 255         struct cvmx_ipd_bp_prt_red_end_s cn52xx;
 256         struct cvmx_ipd_bp_prt_red_end_s cn52xxp1;
 257         struct cvmx_ipd_bp_prt_red_end_s cn56xx;
 258         struct cvmx_ipd_bp_prt_red_end_s cn56xxp1;
 259         struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xx;
 260         struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xxp1;
 261 };
 262
 263 union cvmx_ipd_clk_count {
 264         uint64_t u64;
 265         struct cvmx_ipd_clk_count_s {
 266                 uint64_t clk_cnt:64;
 267         } s;
 268         struct cvmx_ipd_clk_count_s cn30xx;
 269         struct cvmx_ipd_clk_count_s cn31xx;
 270         struct cvmx_ipd_clk_count_s cn38xx;
 271         struct cvmx_ipd_clk_count_s cn38xxp2;
 272         struct cvmx_ipd_clk_count_s cn50xx;
 273         struct cvmx_ipd_clk_count_s cn52xx;
 274         struct cvmx_ipd_clk_count_s cn52xxp1;
 275         struct cvmx_ipd_clk_count_s cn56xx;
 276         struct cvmx_ipd_clk_count_s cn56xxp1;
 277         struct cvmx_ipd_clk_count_s cn58xx;
 278         struct cvmx_ipd_clk_count_s cn58xxp1;
 279 };
 280
 281 union cvmx_ipd_ctl_status {
 282         uint64_t u64;
 283         struct cvmx_ipd_ctl_status_s {
 284                 uint64_t reserved_15_63:49;
 285                 uint64_t no_wptr:1;
 286                 uint64_t pq_apkt:1;
 287                 uint64_t pq_nabuf:1;
 288                 uint64_t ipd_full:1;
 289                 uint64_t pkt_off:1;
 290                 uint64_t len_m8:1;
 291                 uint64_t reset:1;
 292                 uint64_t addpkt:1;
 293                 uint64_t naddbuf:1;
 294                 uint64_t pkt_lend:1;
 295                 uint64_t wqe_lend:1;
 296                 uint64_t pbp_en:1;
 297                 uint64_t opc_mode:2;
 298                 uint64_t ipd_en:1;
 299         } s;
 300         struct cvmx_ipd_ctl_status_cn30xx {
 301                 uint64_t reserved_10_63:54;
 302                 uint64_t len_m8:1;
 303                 uint64_t reset:1;
 304                 uint64_t addpkt:1;
 305                 uint64_t naddbuf:1;
 306                 uint64_t pkt_lend:1;
 307                 uint64_t wqe_lend:1;
 308                 uint64_t pbp_en:1;
 309                 uint64_t opc_mode:2;
 310                 uint64_t ipd_en:1;
 311         } cn30xx;
 312         struct cvmx_ipd_ctl_status_cn30xx cn31xx;
 313         struct cvmx_ipd_ctl_status_cn30xx cn38xx;
 314         struct cvmx_ipd_ctl_status_cn38xxp2 {
 315                 uint64_t reserved_9_63:55;
 316                 uint64_t reset:1;
 317                 uint64_t addpkt:1;
 318                 uint64_t naddbuf:1;
 319                 uint64_t pkt_lend:1;
 320                 uint64_t wqe_lend:1;
 321                 uint64_t pbp_en:1;
 322                 uint64_t opc_mode:2;
 323                 uint64_t ipd_en:1;
 324         } cn38xxp2;
 325         struct cvmx_ipd_ctl_status_s cn50xx;
 326         struct cvmx_ipd_ctl_status_s cn52xx;
 327         struct cvmx_ipd_ctl_status_s cn52xxp1;
 328         struct cvmx_ipd_ctl_status_s cn56xx;
 329         struct cvmx_ipd_ctl_status_s cn56xxp1;
 330         struct cvmx_ipd_ctl_status_cn58xx {
 331                 uint64_t reserved_12_63:52;
 332                 uint64_t ipd_full:1;
 333                 uint64_t pkt_off:1;
 334                 uint64_t len_m8:1;
 335                 uint64_t reset:1;
 336                 uint64_t addpkt:1;
 337                 uint64_t naddbuf:1;
 338                 uint64_t pkt_lend:1;
 339                 uint64_t wqe_lend:1;
 340                 uint64_t pbp_en:1;
 341                 uint64_t opc_mode:2;
 342                 uint64_t ipd_en:1;
 343         } cn58xx;
 344         struct cvmx_ipd_ctl_status_cn58xx cn58xxp1;
 345 };
 346
 347 union cvmx_ipd_int_enb {
 348         uint64_t u64;
 349         struct cvmx_ipd_int_enb_s {
 350                 uint64_t reserved_12_63:52;
 351                 uint64_t pq_sub:1;
 352                 uint64_t pq_add:1;
 353                 uint64_t bc_ovr:1;
 354                 uint64_t d_coll:1;
 355                 uint64_t c_coll:1;
 356                 uint64_t cc_ovr:1;
 357                 uint64_t dc_ovr:1;
 358                 uint64_t bp_sub:1;
 359                 uint64_t prc_par3:1;
 360                 uint64_t prc_par2:1;
 361                 uint64_t prc_par1:1;
 362                 uint64_t prc_par0:1;
 363         } s;
 364         struct cvmx_ipd_int_enb_cn30xx {
 365                 uint64_t reserved_5_63:59;
 366                 uint64_t bp_sub:1;
 367                 uint64_t prc_par3:1;
 368                 uint64_t prc_par2:1;
 369                 uint64_t prc_par1:1;
 370                 uint64_t prc_par0:1;
 371         } cn30xx;
 372         struct cvmx_ipd_int_enb_cn30xx cn31xx;
 373         struct cvmx_ipd_int_enb_cn38xx {
 374                 uint64_t reserved_10_63:54;
 375                 uint64_t bc_ovr:1;
 376                 uint64_t d_coll:1;
 377                 uint64_t c_coll:1;
 378                 uint64_t cc_ovr:1;
 379                 uint64_t dc_ovr:1;
 380                 uint64_t bp_sub:1;
 381                 uint64_t prc_par3:1;
 382                 uint64_t prc_par2:1;
 383                 uint64_t prc_par1:1;
 384                 uint64_t prc_par0:1;
 385         } cn38xx;
 386         struct cvmx_ipd_int_enb_cn30xx cn38xxp2;
 387         struct cvmx_ipd_int_enb_cn38xx cn50xx;
 388         struct cvmx_ipd_int_enb_s cn52xx;
 389         struct cvmx_ipd_int_enb_s cn52xxp1;
 390         struct cvmx_ipd_int_enb_s cn56xx;
 391         struct cvmx_ipd_int_enb_s cn56xxp1;
 392         struct cvmx_ipd_int_enb_cn38xx cn58xx;
 393         struct cvmx_ipd_int_enb_cn38xx cn58xxp1;
 394 };
 395
 396 union cvmx_ipd_int_sum {
 397         uint64_t u64;
 398         struct cvmx_ipd_int_sum_s {
 399                 uint64_t reserved_12_63:52;
 400                 uint64_t pq_sub:1;
 401                 uint64_t pq_add:1;
 402                 uint64_t bc_ovr:1;
 403                 uint64_t d_coll:1;
 404                 uint64_t c_coll:1;
 405                 uint64_t cc_ovr:1;
 406                 uint64_t dc_ovr:1;
 407                 uint64_t bp_sub:1;
 408                 uint64_t prc_par3:1;
 409                 uint64_t prc_par2:1;
 410                 uint64_t prc_par1:1;
 411                 uint64_t prc_par0:1;
 412         } s;
 413         struct cvmx_ipd_int_sum_cn30xx {
 414                 uint64_t reserved_5_63:59;
 415                 uint64_t bp_sub:1;
 416                 uint64_t prc_par3:1;
 417                 uint64_t prc_par2:1;
 418                 uint64_t prc_par1:1;
 419                 uint64_t prc_par0:1;
 420         } cn30xx;
 421         struct cvmx_ipd_int_sum_cn30xx cn31xx;
 422         struct cvmx_ipd_int_sum_cn38xx {
 423                 uint64_t reserved_10_63:54;
 424                 uint64_t bc_ovr:1;
 425                 uint64_t d_coll:1;
 426                 uint64_t c_coll:1;
 427                 uint64_t cc_ovr:1;
 428                 uint64_t dc_ovr:1;
 429                 uint64_t bp_sub:1;
 430                 uint64_t prc_par3:1;
 431                 uint64_t prc_par2:1;
 432                 uint64_t prc_par1:1;
 433                 uint64_t prc_par0:1;
 434         } cn38xx;
 435         struct cvmx_ipd_int_sum_cn30xx cn38xxp2;
 436         struct cvmx_ipd_int_sum_cn38xx cn50xx;
 437         struct cvmx_ipd_int_sum_s cn52xx;
 438         struct cvmx_ipd_int_sum_s cn52xxp1;
 439         struct cvmx_ipd_int_sum_s cn56xx;
 440         struct cvmx_ipd_int_sum_s cn56xxp1;
 441         struct cvmx_ipd_int_sum_cn38xx cn58xx;
 442         struct cvmx_ipd_int_sum_cn38xx cn58xxp1;
 443 };
 444
 445 union cvmx_ipd_not_1st_mbuff_skip {
 446         uint64_t u64;
 447         struct cvmx_ipd_not_1st_mbuff_skip_s {
 448                 uint64_t reserved_6_63:58;
 449                 uint64_t skip_sz:6;
 450         } s;
 451         struct cvmx_ipd_not_1st_mbuff_skip_s cn30xx;
 452         struct cvmx_ipd_not_1st_mbuff_skip_s cn31xx;
 453         struct cvmx_ipd_not_1st_mbuff_skip_s cn38xx;
 454         struct cvmx_ipd_not_1st_mbuff_skip_s cn38xxp2;
 455         struct cvmx_ipd_not_1st_mbuff_skip_s cn50xx;
 456         struct cvmx_ipd_not_1st_mbuff_skip_s cn52xx;
 457         struct cvmx_ipd_not_1st_mbuff_skip_s cn52xxp1;
 458         struct cvmx_ipd_not_1st_mbuff_skip_s cn56xx;
 459         struct cvmx_ipd_not_1st_mbuff_skip_s cn56xxp1;
 460         struct cvmx_ipd_not_1st_mbuff_skip_s cn58xx;
 461         struct cvmx_ipd_not_1st_mbuff_skip_s cn58xxp1;
 462 };
 463
 464 union cvmx_ipd_packet_mbuff_size {
 465         uint64_t u64;
 466         struct cvmx_ipd_packet_mbuff_size_s {
 467                 uint64_t reserved_12_63:52;
 468                 uint64_t mb_size:12;
 469         } s;
 470         struct cvmx_ipd_packet_mbuff_size_s cn30xx;
 471         struct cvmx_ipd_packet_mbuff_size_s cn31xx;
 472         struct cvmx_ipd_packet_mbuff_size_s cn38xx;
 473         struct cvmx_ipd_packet_mbuff_size_s cn38xxp2;
 474         struct cvmx_ipd_packet_mbuff_size_s cn50xx;
 475         struct cvmx_ipd_packet_mbuff_size_s cn52xx;
 476         struct cvmx_ipd_packet_mbuff_size_s cn52xxp1;
 477         struct cvmx_ipd_packet_mbuff_size_s cn56xx;
 478         struct cvmx_ipd_packet_mbuff_size_s cn56xxp1;
 479         struct cvmx_ipd_packet_mbuff_size_s cn58xx;
 480         struct cvmx_ipd_packet_mbuff_size_s cn58xxp1;
 481 };
 482
 483 union cvmx_ipd_pkt_ptr_valid {
 484         uint64_t u64;
 485         struct cvmx_ipd_pkt_ptr_valid_s {
 486                 uint64_t reserved_29_63:35;
 487                 uint64_t ptr:29;
 488         } s;
 489         struct cvmx_ipd_pkt_ptr_valid_s cn30xx;
 490         struct cvmx_ipd_pkt_ptr_valid_s cn31xx;
 491         struct cvmx_ipd_pkt_ptr_valid_s cn38xx;
 492         struct cvmx_ipd_pkt_ptr_valid_s cn50xx;
 493         struct cvmx_ipd_pkt_ptr_valid_s cn52xx;
 494         struct cvmx_ipd_pkt_ptr_valid_s cn52xxp1;
 495         struct cvmx_ipd_pkt_ptr_valid_s cn56xx;
 496         struct cvmx_ipd_pkt_ptr_valid_s cn56xxp1;
 497         struct cvmx_ipd_pkt_ptr_valid_s cn58xx;
 498         struct cvmx_ipd_pkt_ptr_valid_s cn58xxp1;
 499 };
 500
 501 union cvmx_ipd_portx_bp_page_cnt {
 502         uint64_t u64;
 503         struct cvmx_ipd_portx_bp_page_cnt_s {
 504                 uint64_t reserved_18_63:46;
 505                 uint64_t bp_enb:1;
 506                 uint64_t page_cnt:17;
 507         } s;
 508         struct cvmx_ipd_portx_bp_page_cnt_s cn30xx;
 509         struct cvmx_ipd_portx_bp_page_cnt_s cn31xx;
 510         struct cvmx_ipd_portx_bp_page_cnt_s cn38xx;
 511         struct cvmx_ipd_portx_bp_page_cnt_s cn38xxp2;
 512         struct cvmx_ipd_portx_bp_page_cnt_s cn50xx;
 513         struct cvmx_ipd_portx_bp_page_cnt_s cn52xx;
 514         struct cvmx_ipd_portx_bp_page_cnt_s cn52xxp1;
 515         struct cvmx_ipd_portx_bp_page_cnt_s cn56xx;
 516         struct cvmx_ipd_portx_bp_page_cnt_s cn56xxp1;
 517         struct cvmx_ipd_portx_bp_page_cnt_s cn58xx;
 518         struct cvmx_ipd_portx_bp_page_cnt_s cn58xxp1;
 519 };
 520
 521 union cvmx_ipd_portx_bp_page_cnt2 {
 522         uint64_t u64;
 523         struct cvmx_ipd_portx_bp_page_cnt2_s {
 524                 uint64_t reserved_18_63:46;
 525                 uint64_t bp_enb:1;
 526                 uint64_t page_cnt:17;
 527         } s;
 528         struct cvmx_ipd_portx_bp_page_cnt2_s cn52xx;
 529         struct cvmx_ipd_portx_bp_page_cnt2_s cn52xxp1;
 530         struct cvmx_ipd_portx_bp_page_cnt2_s cn56xx;
 531         struct cvmx_ipd_portx_bp_page_cnt2_s cn56xxp1;
 532 };
 533
 534 union cvmx_ipd_port_bp_counters2_pairx {
 535         uint64_t u64;
 536         struct cvmx_ipd_port_bp_counters2_pairx_s {
 537                 uint64_t reserved_25_63:39;
 538                 uint64_t cnt_val:25;
 539         } s;
 540         struct cvmx_ipd_port_bp_counters2_pairx_s cn52xx;
 541         struct cvmx_ipd_port_bp_counters2_pairx_s cn52xxp1;
 542         struct cvmx_ipd_port_bp_counters2_pairx_s cn56xx;
 543         struct cvmx_ipd_port_bp_counters2_pairx_s cn56xxp1;
 544 };
 545
 546 union cvmx_ipd_port_bp_counters_pairx {
 547         uint64_t u64;
 548         struct cvmx_ipd_port_bp_counters_pairx_s {
 549                 uint64_t reserved_25_63:39;
 550                 uint64_t cnt_val:25;
 551         } s;
 552         struct cvmx_ipd_port_bp_counters_pairx_s cn30xx;
 553         struct cvmx_ipd_port_bp_counters_pairx_s cn31xx;
 554         struct cvmx_ipd_port_bp_counters_pairx_s cn38xx;
 555         struct cvmx_ipd_port_bp_counters_pairx_s cn38xxp2;
 556         struct cvmx_ipd_port_bp_counters_pairx_s cn50xx;
 557         struct cvmx_ipd_port_bp_counters_pairx_s cn52xx;
 558         struct cvmx_ipd_port_bp_counters_pairx_s cn52xxp1;
 559         struct cvmx_ipd_port_bp_counters_pairx_s cn56xx;
 560         struct cvmx_ipd_port_bp_counters_pairx_s cn56xxp1;
 561         struct cvmx_ipd_port_bp_counters_pairx_s cn58xx;
 562         struct cvmx_ipd_port_bp_counters_pairx_s cn58xxp1;
 563 };
 564
 565 union cvmx_ipd_port_qos_x_cnt {
 566         uint64_t u64;
 567         struct cvmx_ipd_port_qos_x_cnt_s {
 568                 uint64_t wmark:32;
 569                 uint64_t cnt:32;
 570         } s;
 571         struct cvmx_ipd_port_qos_x_cnt_s cn52xx;
 572         struct cvmx_ipd_port_qos_x_cnt_s cn52xxp1;
 573         struct cvmx_ipd_port_qos_x_cnt_s cn56xx;
 574         struct cvmx_ipd_port_qos_x_cnt_s cn56xxp1;
 575 };
 576
 577 union cvmx_ipd_port_qos_intx {
 578         uint64_t u64;
 579         struct cvmx_ipd_port_qos_intx_s {
 580                 uint64_t intr:64;
 581         } s;
 582         struct cvmx_ipd_port_qos_intx_s cn52xx;
 583         struct cvmx_ipd_port_qos_intx_s cn52xxp1;
 584         struct cvmx_ipd_port_qos_intx_s cn56xx;
 585         struct cvmx_ipd_port_qos_intx_s cn56xxp1;
 586 };
 587
 588 union cvmx_ipd_port_qos_int_enbx {
 589         uint64_t u64;
 590         struct cvmx_ipd_port_qos_int_enbx_s {
 591                 uint64_t enb:64;
 592         } s;
 593         struct cvmx_ipd_port_qos_int_enbx_s cn52xx;
 594         struct cvmx_ipd_port_qos_int_enbx_s cn52xxp1;
 595         struct cvmx_ipd_port_qos_int_enbx_s cn56xx;
 596         struct cvmx_ipd_port_qos_int_enbx_s cn56xxp1;
 597 };
 598
 599 union cvmx_ipd_prc_hold_ptr_fifo_ctl {
 600         uint64_t u64;
 601         struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s {
 602                 uint64_t reserved_39_63:25;
 603                 uint64_t max_pkt:3;
 604                 uint64_t praddr:3;
 605                 uint64_t ptr:29;
 606                 uint64_t cena:1;
 607                 uint64_t raddr:3;
 608         } s;
 609         struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn30xx;
 610         struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn31xx;
 611         struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn38xx;
 612         struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn50xx;
 613         struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn52xx;
 614         struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn52xxp1;
 615         struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xx;
 616         struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xxp1;
 617         struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xx;
 618         struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xxp1;
 619 };
 620
 621 union cvmx_ipd_prc_port_ptr_fifo_ctl {
 622         uint64_t u64;
 623         struct cvmx_ipd_prc_port_ptr_fifo_ctl_s {
 624                 uint64_t reserved_44_63:20;
 625                 uint64_t max_pkt:7;
 626                 uint64_t ptr:29;
 627                 uint64_t cena:1;
 628                 uint64_t raddr:7;
 629         } s;
 630         struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn30xx;
 631         struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn31xx;
 632         struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn38xx;
 633         struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn50xx;
 634         struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn52xx;
 635         struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn52xxp1;
 636         struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xx;
 637         struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xxp1;
 638         struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xx;
 639         struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xxp1;
 640 };
 641
 642 union cvmx_ipd_ptr_count {
 643         uint64_t u64;
 644         struct cvmx_ipd_ptr_count_s {
 645                 uint64_t reserved_19_63:45;
 646                 uint64_t pktv_cnt:1;
 647                 uint64_t wqev_cnt:1;
 648                 uint64_t pfif_cnt:3;
 649                 uint64_t pkt_pcnt:7;
 650                 uint64_t wqe_pcnt:7;
 651         } s;
 652         struct cvmx_ipd_ptr_count_s cn30xx;
 653         struct cvmx_ipd_ptr_count_s cn31xx;
 654         struct cvmx_ipd_ptr_count_s cn38xx;
 655         struct cvmx_ipd_ptr_count_s cn38xxp2;
 656         struct cvmx_ipd_ptr_count_s cn50xx;
 657         struct cvmx_ipd_ptr_count_s cn52xx;
 658         struct cvmx_ipd_ptr_count_s cn52xxp1;
 659         struct cvmx_ipd_ptr_count_s cn56xx;
 660         struct cvmx_ipd_ptr_count_s cn56xxp1;
 661         struct cvmx_ipd_ptr_count_s cn58xx;
 662         struct cvmx_ipd_ptr_count_s cn58xxp1;
 663 };
 664
 665 union cvmx_ipd_pwp_ptr_fifo_ctl {
 666         uint64_t u64;
 667         struct cvmx_ipd_pwp_ptr_fifo_ctl_s {
 668                 uint64_t reserved_61_63:3;
 669                 uint64_t max_cnts:7;
 670                 uint64_t wraddr:8;
 671                 uint64_t praddr:8;
 672                 uint64_t ptr:29;
 673                 uint64_t cena:1;
 674                 uint64_t raddr:8;
 675         } s;
 676         struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn30xx;
 677         struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn31xx;
 678         struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn38xx;
 679         struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn50xx;
 680         struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn52xx;
 681         struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn52xxp1;
 682         struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xx;
 683         struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xxp1;
 684         struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xx;
 685         struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xxp1;
 686 };
 687
 688 union cvmx_ipd_qosx_red_marks {
 689         uint64_t u64;
 690         struct cvmx_ipd_qosx_red_marks_s {
 691                 uint64_t drop:32;
 692                 uint64_t pass:32;
 693         } s;
 694         struct cvmx_ipd_qosx_red_marks_s cn30xx;
 695         struct cvmx_ipd_qosx_red_marks_s cn31xx;
 696         struct cvmx_ipd_qosx_red_marks_s cn38xx;
 697         struct cvmx_ipd_qosx_red_marks_s cn38xxp2;
 698         struct cvmx_ipd_qosx_red_marks_s cn50xx;
 699         struct cvmx_ipd_qosx_red_marks_s cn52xx;
 700         struct cvmx_ipd_qosx_red_marks_s cn52xxp1;
 701         struct cvmx_ipd_qosx_red_marks_s cn56xx;
 702         struct cvmx_ipd_qosx_red_marks_s cn56xxp1;
 703         struct cvmx_ipd_qosx_red_marks_s cn58xx;
 704         struct cvmx_ipd_qosx_red_marks_s cn58xxp1;
 705 };
 706
 707 union cvmx_ipd_que0_free_page_cnt {
 708         uint64_t u64;
 709         struct cvmx_ipd_que0_free_page_cnt_s {
 710                 uint64_t reserved_32_63:32;
 711                 uint64_t q0_pcnt:32;
 712         } s;
 713         struct cvmx_ipd_que0_free_page_cnt_s cn30xx;
 714         struct cvmx_ipd_que0_free_page_cnt_s cn31xx;
 715         struct cvmx_ipd_que0_free_page_cnt_s cn38xx;
 716         struct cvmx_ipd_que0_free_page_cnt_s cn38xxp2;
 717         struct cvmx_ipd_que0_free_page_cnt_s cn50xx;
 718         struct cvmx_ipd_que0_free_page_cnt_s cn52xx;
 719         struct cvmx_ipd_que0_free_page_cnt_s cn52xxp1;
 720         struct cvmx_ipd_que0_free_page_cnt_s cn56xx;
 721         struct cvmx_ipd_que0_free_page_cnt_s cn56xxp1;
 722         struct cvmx_ipd_que0_free_page_cnt_s cn58xx;
 723         struct cvmx_ipd_que0_free_page_cnt_s cn58xxp1;
 724 };
 725
 726 union cvmx_ipd_red_port_enable {
 727         uint64_t u64;
 728         struct cvmx_ipd_red_port_enable_s {
 729                 uint64_t prb_dly:14;
 730                 uint64_t avg_dly:14;
 731                 uint64_t prt_enb:36;
 732         } s;
 733         struct cvmx_ipd_red_port_enable_s cn30xx;
 734         struct cvmx_ipd_red_port_enable_s cn31xx;
 735         struct cvmx_ipd_red_port_enable_s cn38xx;
 736         struct cvmx_ipd_red_port_enable_s cn38xxp2;
 737         struct cvmx_ipd_red_port_enable_s cn50xx;
 738         struct cvmx_ipd_red_port_enable_s cn52xx;
 739         struct cvmx_ipd_red_port_enable_s cn52xxp1;
 740         struct cvmx_ipd_red_port_enable_s cn56xx;
 741         struct cvmx_ipd_red_port_enable_s cn56xxp1;
 742         struct cvmx_ipd_red_port_enable_s cn58xx;
 743         struct cvmx_ipd_red_port_enable_s cn58xxp1;
 744 };
 745
 746 union cvmx_ipd_red_port_enable2 {
 747         uint64_t u64;
 748         struct cvmx_ipd_red_port_enable2_s {
 749                 uint64_t reserved_4_63:60;
 750                 uint64_t prt_enb:4;
 751         } s;
 752         struct cvmx_ipd_red_port_enable2_s cn52xx;
 753         struct cvmx_ipd_red_port_enable2_s cn52xxp1;
 754         struct cvmx_ipd_red_port_enable2_s cn56xx;
 755         struct cvmx_ipd_red_port_enable2_s cn56xxp1;
 756 };
 757
 758 union cvmx_ipd_red_quex_param {
 759         uint64_t u64;
 760         struct cvmx_ipd_red_quex_param_s {
 761                 uint64_t reserved_49_63:15;
 762                 uint64_t use_pcnt:1;
 763                 uint64_t new_con:8;
 764                 uint64_t avg_con:8;
 765                 uint64_t prb_con:32;
 766         } s;
 767         struct cvmx_ipd_red_quex_param_s cn30xx;
 768         struct cvmx_ipd_red_quex_param_s cn31xx;
 769         struct cvmx_ipd_red_quex_param_s cn38xx;
 770         struct cvmx_ipd_red_quex_param_s cn38xxp2;
 771         struct cvmx_ipd_red_quex_param_s cn50xx;
 772         struct cvmx_ipd_red_quex_param_s cn52xx;
 773         struct cvmx_ipd_red_quex_param_s cn52xxp1;
 774         struct cvmx_ipd_red_quex_param_s cn56xx;
 775         struct cvmx_ipd_red_quex_param_s cn56xxp1;
 776         struct cvmx_ipd_red_quex_param_s cn58xx;
 777         struct cvmx_ipd_red_quex_param_s cn58xxp1;
 778 };
 779
 780 union cvmx_ipd_sub_port_bp_page_cnt {
 781         uint64_t u64;
 782         struct cvmx_ipd_sub_port_bp_page_cnt_s {
 783                 uint64_t reserved_31_63:33;
 784                 uint64_t port:6;
 785                 uint64_t page_cnt:25;
 786         } s;
 787         struct cvmx_ipd_sub_port_bp_page_cnt_s cn30xx;
 788         struct cvmx_ipd_sub_port_bp_page_cnt_s cn31xx;
 789         struct cvmx_ipd_sub_port_bp_page_cnt_s cn38xx;
 790         struct cvmx_ipd_sub_port_bp_page_cnt_s cn38xxp2;
 791         struct cvmx_ipd_sub_port_bp_page_cnt_s cn50xx;
 792         struct cvmx_ipd_sub_port_bp_page_cnt_s cn52xx;
 793         struct cvmx_ipd_sub_port_bp_page_cnt_s cn52xxp1;
 794         struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xx;
 795         struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xxp1;
 796         struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xx;
 797         struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xxp1;
 798 };
 799
 800 union cvmx_ipd_sub_port_fcs {
 801         uint64_t u64;
 802         struct cvmx_ipd_sub_port_fcs_s {
 803                 uint64_t reserved_40_63:24;
 804                 uint64_t port_bit2:4;
 805                 uint64_t reserved_32_35:4;
 806                 uint64_t port_bit:32;
 807         } s;
 808         struct cvmx_ipd_sub_port_fcs_cn30xx {
 809                 uint64_t reserved_3_63:61;
 810                 uint64_t port_bit:3;
 811         } cn30xx;
 812         struct cvmx_ipd_sub_port_fcs_cn30xx cn31xx;
 813         struct cvmx_ipd_sub_port_fcs_cn38xx {
 814                 uint64_t reserved_32_63:32;
 815                 uint64_t port_bit:32;
 816         } cn38xx;
 817         struct cvmx_ipd_sub_port_fcs_cn38xx cn38xxp2;
 818         struct cvmx_ipd_sub_port_fcs_cn30xx cn50xx;
 819         struct cvmx_ipd_sub_port_fcs_s cn52xx;
 820         struct cvmx_ipd_sub_port_fcs_s cn52xxp1;
 821         struct cvmx_ipd_sub_port_fcs_s cn56xx;
 822         struct cvmx_ipd_sub_port_fcs_s cn56xxp1;
 823         struct cvmx_ipd_sub_port_fcs_cn38xx cn58xx;
 824         struct cvmx_ipd_sub_port_fcs_cn38xx cn58xxp1;
 825 };
 826
 827 union cvmx_ipd_sub_port_qos_cnt {
 828         uint64_t u64;
 829         struct cvmx_ipd_sub_port_qos_cnt_s {
 830                 uint64_t reserved_41_63:23;
 831                 uint64_t port_qos:9;
 832                 uint64_t cnt:32;
 833         } s;
 834         struct cvmx_ipd_sub_port_qos_cnt_s cn52xx;
 835         struct cvmx_ipd_sub_port_qos_cnt_s cn52xxp1;
 836         struct cvmx_ipd_sub_port_qos_cnt_s cn56xx;
 837         struct cvmx_ipd_sub_port_qos_cnt_s cn56xxp1;
 838 };
 839
 840 union cvmx_ipd_wqe_fpa_queue {
 841         uint64_t u64;
 842         struct cvmx_ipd_wqe_fpa_queue_s {
 843                 uint64_t reserved_3_63:61;
 844                 uint64_t wqe_pool:3;
 845         } s;
 846         struct cvmx_ipd_wqe_fpa_queue_s cn30xx;
 847         struct cvmx_ipd_wqe_fpa_queue_s cn31xx;
 848         struct cvmx_ipd_wqe_fpa_queue_s cn38xx;
 849         struct cvmx_ipd_wqe_fpa_queue_s cn38xxp2;
 850         struct cvmx_ipd_wqe_fpa_queue_s cn50xx;
 851         struct cvmx_ipd_wqe_fpa_queue_s cn52xx;
 852         struct cvmx_ipd_wqe_fpa_queue_s cn52xxp1;
 853         struct cvmx_ipd_wqe_fpa_queue_s cn56xx;
 854         struct cvmx_ipd_wqe_fpa_queue_s cn56xxp1;
 855         struct cvmx_ipd_wqe_fpa_queue_s cn58xx;
 856         struct cvmx_ipd_wqe_fpa_queue_s cn58xxp1;
 857 };
 858
 859 union cvmx_ipd_wqe_ptr_valid {
 860         uint64_t u64;
 861         struct cvmx_ipd_wqe_ptr_valid_s {
 862                 uint64_t reserved_29_63:35;
 863                 uint64_t ptr:29;
 864         } s;
 865         struct cvmx_ipd_wqe_ptr_valid_s cn30xx;
 866         struct cvmx_ipd_wqe_ptr_valid_s cn31xx;
 867         struct cvmx_ipd_wqe_ptr_valid_s cn38xx;
 868         struct cvmx_ipd_wqe_ptr_valid_s cn50xx;
 869         struct cvmx_ipd_wqe_ptr_valid_s cn52xx;
 870         struct cvmx_ipd_wqe_ptr_valid_s cn52xxp1;
 871         struct cvmx_ipd_wqe_ptr_valid_s cn56xx;
 872         struct cvmx_ipd_wqe_ptr_valid_s cn56xxp1;
 873         struct cvmx_ipd_wqe_ptr_valid_s cn58xx;
 874         struct cvmx_ipd_wqe_ptr_valid_s cn58xxp1;
 875 };
 876
 877 #endif