| blob | d5556fe05cd8d8e265df7204be7246b15a4c3a37 |
1 /* -*- mode: asm -*-
2 **
3 ** head.S -- This file contains the initial boot code for the
4 ** Linux/68k kernel.
5 **
6 ** Copyright 1993 by Hamish Macdonald
7 **
8 ** 68040 fixes by Michael Rausch
9 ** 68060 fixes by Roman Hodek
10 ** MMU cleanup by Randy Thelen
11 ** Final MMU cleanup by Roman Zippel
12 **
13 ** Atari support by Andreas Schwab, using ideas of Robert de Vries
14 ** and Bjoern Brauel
15 ** VME Support by Richard Hirst
16 **
17 ** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
18 ** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
19 ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
20 ** 95/11/18 Richard Hirst: Added MVME166 support
21 ** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
22 ** Magnum- and FX-alternate ram
23 ** 98/04/25 Phil Blundell: added HP300 support
24 ** 1998/08/30 David Kilzer: Added support for font_desc structures
25 ** for linux-2.1.115
26 ** 9/02/11 Richard Zidlicky: added Q40 support (initial vesion 99/01/01)
27 ** 2004/05/13 Kars de Jong: Finalised HP300 support
28 **
29 ** This file is subject to the terms and conditions of the GNU General Public
30 ** License. See the file README.legal in the main directory of this archive
31 ** for more details.
32 **
33 */
35 /*
36 * Linux startup code.
37 *
38 * At this point, the boot loader has:
39 * Disabled interrupts
40 * Disabled caches
41 * Put us in supervisor state.
42 *
43 * The kernel setup code takes the following steps:
44 * . Raise interrupt level
45 * . Set up initial kernel memory mapping.
46 * . This sets up a mapping of the 4M of memory the kernel is located in.
47 * . It also does a mapping of any initial machine specific areas.
48 * . Enable the MMU
49 * . Enable cache memories
50 * . Jump to kernel startup
51 *
52 * Much of the file restructuring was to accomplish:
53 * 1) Remove register dependency through-out the file.
54 * 2) Increase use of subroutines to perform functions
55 * 3) Increase readability of the code
56 *
57 * Of course, readability is a subjective issue, so it will never be
58 * argued that that goal was accomplished. It was merely a goal.
59 * A key way to help make code more readable is to give good
60 * documentation. So, the first thing you will find is exaustive
61 * write-ups on the structure of the file, and the features of the
62 * functional subroutines.
63 *
64 * General Structure:
65 * ------------------
66 * Without a doubt the single largest chunk of head.S is spent
67 * mapping the kernel and I/O physical space into the logical range
68 * for the kernel.
69 * There are new subroutines and data structures to make MMU
70 * support cleaner and easier to understand.
71 * First, you will find a routine call "mmu_map" which maps
72 * a logical to a physical region for some length given a cache
73 * type on behalf of the caller. This routine makes writing the
74 * actual per-machine specific code very simple.
75 * A central part of the code, but not a subroutine in itself,
76 * is the mmu_init code which is broken down into mapping the kernel
77 * (the same for all machines) and mapping machine-specific I/O
78 * regions.
79 * Also, there will be a description of engaging the MMU and
80 * caches.
81 * You will notice that there is a chunk of code which
82 * can emit the entire MMU mapping of the machine. This is present
83 * only in debug modes and can be very helpful.
84 * Further, there is a new console driver in head.S that is
85 * also only engaged in debug mode. Currently, it's only supported
86 * on the Macintosh class of machines. However, it is hoped that
87 * others will plug-in support for specific machines.
88 *
89 * ######################################################################
90 *
91 * mmu_map
92 * -------
93 * mmu_map was written for two key reasons. First, it was clear
94 * that it was very difficult to read the previous code for mapping
95 * regions of memory. Second, the Macintosh required such extensive
96 * memory allocations that it didn't make sense to propagate the
97 * existing code any further.
98 * mmu_map requires some parameters:
99 *
100 * mmu_map (logical, physical, length, cache_type)
101 *
102 * While this essentially describes the function in the abstract, you'll
103 * find more indepth description of other parameters at the implementation site.
104 *
105 * mmu_get_root_table_entry
106 * ------------------------
107 * mmu_get_ptr_table_entry
108 * -----------------------
109 * mmu_get_page_table_entry
110 * ------------------------
111 *
112 * These routines are used by other mmu routines to get a pointer into
113 * a table, if necessary a new table is allocated. These routines are working
114 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
115 * table needs of course only to be allocated once in mmu_get_root_table_entry,
116 * so that here also some mmu specific initialization is done. The second page
117 * at the start of the kernel (the first page is unmapped later) is used for
118 * the kernel_pg_dir. It must be at a position known at link time (as it's used
119 * to initialize the init task struct) and since it needs special cache
120 * settings, it's the easiest to use this page, the rest of the page is used
121 * for further pointer tables.
122 * mmu_get_page_table_entry allocates always a whole page for page tables, this
123 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
124 * to manage page tables in smaller pieces as nearly all mappings have that
125 * size.
126 *
127 * ######################################################################
128 *
129 *
130 * ######################################################################
131 *
132 * mmu_engage
133 * ----------
134 * Thanks to a small helping routine enabling the mmu got quite simple
135 * and there is only one way left. mmu_engage makes a complete a new mapping
136 * that only includes the absolute necessary to be able to jump to the final
137 * postion and to restore the original mapping.
138 * As this code doesn't need a transparent translation register anymore this
139 * means all registers are free to be used by machines that needs them for
140 * other purposes.
141 *
142 * ######################################################################
143 *
144 * mmu_print
145 * ---------
146 * This algorithm will print out the page tables of the system as
147 * appropriate for an 030 or an 040. This is useful for debugging purposes
148 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
149 *
150 * ######################################################################
151 *
152 * console_init
153 * ------------
154 * The console is also able to be turned off. The console in head.S
155 * is specifically for debugging and can be very useful. It is surrounded by
156 * #ifdef CONSOLE/#endif clauses so it doesn't have to ship in known-good
157 * kernels. It's basic algorithm is to determine the size of the screen
158 * (in height/width and bit depth) and then use that information for
159 * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for
160 * debugging so I can see more good data. But it was trivial to add support
161 * for both fonts, so I included it.
162 * Also, the algorithm for plotting pixels is abstracted so that in
163 * theory other platforms could add support for different kinds of frame
164 * buffers. This could be very useful.
165 *
166 * console_put_penguin
167 * -------------------
168 * An important part of any Linux bring up is the penguin and there's
169 * nothing like getting the Penguin on the screen! This algorithm will work
170 * on any machine for which there is a console_plot_pixel.
171 *
172 * console_scroll
173 * --------------
174 * My hope is that the scroll algorithm does the right thing on the
175 * various platforms, but it wouldn't be hard to add the test conditions
176 * and new code if it doesn't.
177 *
178 * console_putc
179 * -------------
180 *
181 * ######################################################################
182 *
183 * Register usage has greatly simplified within head.S. Every subroutine
184 * saves and restores all registers that it modifies (except it returns a
185 * value in there of course). So the only register that needs to be initialized
186 * is the stack pointer.
187 * All other init code and data is now placed in the init section, so it will
188 * be automatically freed at the end of the kernel initialization.
189 *
190 * ######################################################################
191 *
192 * options
193 * -------
194 * There are many options available in a build of this file. I've
195 * taken the time to describe them here to save you the time of searching
196 * for them and trying to understand what they mean.
197 *
198 * CONFIG_xxx: These are the obvious machine configuration defines created
199 * during configuration. These are defined in autoconf.h.
200 *
201 * CONSOLE: There is support for head.S console in this file. This
202 * console can talk to a Mac frame buffer, but could easily be extrapolated
203 * to extend it to support other platforms.
204 *
205 * TEST_MMU: This is a test harness for running on any given machine but
206 * getting an MMU dump for another class of machine. The classes of machines
207 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
208 * and any of the models (030, 040, 060, etc.).
209 *
210 * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed
211 * When head.S boots on Atari, Amiga, Macintosh, and VME
212 * machines. At that point the underlying logic will be
213 * believed to be solid enough to be trusted, and TEST_MMU
214 * can be dropped. Do note that that will clean up the
215 * head.S code significantly as large blocks of #if/#else
216 * clauses can be removed.
217 *
218 * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into
219 * determing why devices don't appear to work. A test case was to remove
220 * the cacheability of the kernel bits.
221 *
222 * MMU_PRINT: There is a routine built into head.S that can display the
223 * MMU data structures. It outputs its result through the serial_putc
224 * interface. So where ever that winds up driving data, that's where the
225 * mmu struct will appear. On the Macintosh that's typically the console.
226 *
227 * SERIAL_DEBUG: There are a series of putc() macro statements
228 * scattered through out the code to give progress of status to the
229 * person sitting at the console. This constant determines whether those
230 * are used.
231 *
232 * DEBUG: This is the standard DEBUG flag that can be set for building
233 * the kernel. It has the effect adding additional tests into
234 * the code.
235 *
236 * FONT_6x11:
237 * FONT_8x8:
238 * FONT_8x16:
239 * In theory these could be determined at run time or handed
240 * over by the booter. But, let's be real, it's a fine hard
241 * coded value. (But, you will notice the code is run-time
242 * flexible!) A pointer to the font's struct font_desc
243 * is kept locally in Lconsole_font. It is used to determine
244 * font size information dynamically.
245 *
246 * Atari constants:
247 * USE_PRINTER: Use the printer port for serial debug.
248 * USE_SCC_B: Use the SCC port A (Serial2) for serial debug.
249 * USE_SCC_A: Use the SCC port B (Modem2) for serial debug.
250 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug.
251 *
252 * Macintosh constants:
253 * MAC_SERIAL_DEBUG: Turns on serial debug output for the Macintosh.
254 * MAC_USE_SCC_A: Use the SCC port A (modem) for serial debug.
255 * MAC_USE_SCC_B: Use the SCC port B (printer) for serial debug (default).
256 */
258 #include <linux/linkage.h>
259 #include <linux/init.h>
260 #include <asm/bootinfo.h>
261 #include <asm/setup.h>
262 #include <asm/entry.h>
263 #include <asm/pgtable.h>
264 #include <asm/page.h>
265 #include <asm/asm-offsets.h>
267 #ifdef CONFIG_MAC
269 #include <asm/machw.h>
271 /*
272 * Macintosh console support
273 */
275 #ifdef CONFIG_FRAMEBUFFER_CONSOLE
276 #define CONSOLE
277 #define CONSOLE_PENGUIN
278 #endif
280 /*
281 * Macintosh serial debug support; outputs boot info to the printer
282 * and/or modem serial ports
283 */
284 #undef MAC_SERIAL_DEBUG
286 /*
287 * Macintosh serial debug port selection; define one or both;
288 * requires MAC_SERIAL_DEBUG to be defined
289 */
290 #define MAC_USE_SCC_A /* Macintosh modem serial port */
291 #define MAC_USE_SCC_B /* Macintosh printer serial port */
293 #endif /* CONFIG_MAC */
295 #undef MMU_PRINT
296 #undef MMU_NOCACHE_KERNEL
297 #define SERIAL_DEBUG
298 #undef DEBUG
300 /*
301 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
302 * The 8x8 font is harder to read but fits more on the screen.
303 */
304 #define FONT_8x8 /* default */
305 /* #define FONT_8x16 */ /* 2nd choice */
306 /* #define FONT_6x11 */ /* 3rd choice */
308 .globl kernel_pg_dir
309 .globl availmem
310 .globl m68k_pgtable_cachemode
311 .globl m68k_supervisor_cachemode
312 #ifdef CONFIG_MVME16x
313 .globl mvme_bdid
314 #endif
315 #ifdef CONFIG_Q40
316 .globl q40_mem_cptr
317 #endif
319 CPUTYPE_040 = 1 /* indicates an 040 */
320 CPUTYPE_060 = 2 /* indicates an 060 */
321 CPUTYPE_0460 = 3 /* if either above are set, this is set */
322 CPUTYPE_020 = 4 /* indicates an 020 */
324 /* Translation control register */
325 TC_ENABLE = 0x8000
326 TC_PAGE8K = 0x4000
327 TC_PAGE4K = 0x0000
329 /* Transparent translation registers */
330 TTR_ENABLE = 0x8000 /* enable transparent translation */
331 TTR_ANYMODE = 0x4000 /* user and kernel mode access */
332 TTR_KERNELMODE = 0x2000 /* only kernel mode access */
333 TTR_USERMODE = 0x0000 /* only user mode access */
334 TTR_CI = 0x0400 /* inhibit cache */
335 TTR_RW = 0x0200 /* read/write mode */
336 TTR_RWM = 0x0100 /* read/write mask */
337 TTR_FCB2 = 0x0040 /* function code base bit 2 */
338 TTR_FCB1 = 0x0020 /* function code base bit 1 */
339 TTR_FCB0 = 0x0010 /* function code base bit 0 */
340 TTR_FCM2 = 0x0004 /* function code mask bit 2 */
341 TTR_FCM1 = 0x0002 /* function code mask bit 1 */
342 TTR_FCM0 = 0x0001 /* function code mask bit 0 */
344 /* Cache Control registers */
345 CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */
346 CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */
347 CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */
348 CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */
349 CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */
350 CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */
351 CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */
352 CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */
353 CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */
354 CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */
355 CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */
356 CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */
357 CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */
358 CC3_CLR_D = 0x00000800 /* clear data cache (68030) */
359 CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */
360 CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */
361 CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */
362 CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */
363 CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */
364 CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */
365 CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */
366 CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */
368 /* Miscellaneous definitions */
369 PAGESIZE = 4096
370 PAGESHIFT = 12
372 ROOT_TABLE_SIZE = 128
373 PTR_TABLE_SIZE = 128
374 PAGE_TABLE_SIZE = 64
375 ROOT_INDEX_SHIFT = 25
376 PTR_INDEX_SHIFT = 18
377 PAGE_INDEX_SHIFT = 12
379 #ifdef DEBUG
380 /* When debugging use readable names for labels */
381 #ifdef __STDC__
382 #define L(name) .head.S.##name
383 #else
384 #define L(name) .head.S./**/name
385 #endif
386 #else
387 #ifdef __STDC__
388 #define L(name) .L##name
389 #else
390 #define L(name) .L/**/name
391 #endif
392 #endif
394 /* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
395 #ifndef __INITDATA
396 #define __INITDATA .data
397 #define __FINIT .previous
398 #endif
400 /* Several macros to make the writing of subroutines easier:
401 * - func_start marks the beginning of the routine which setups the frame
402 * register and saves the registers, it also defines another macro
403 * to automatically restore the registers again.
404 * - func_return marks the end of the routine and simply calls the prepared
405 * macro to restore registers and jump back to the caller.
406 * - func_define generates another macro to automatically put arguments
407 * onto the stack call the subroutine and cleanup the stack again.
408 */
410 /* Within subroutines these macros can be used to access the arguments
411 * on the stack. With STACK some allocated memory on the stack can be
412 * accessed and ARG0 points to the return address (used by mmu_engage).
413 */
414 #define STACK %a6@(stackstart)
415 #define ARG0 %a6@(4)
416 #define ARG1 %a6@(8)
417 #define ARG2 %a6@(12)
418 #define ARG3 %a6@(16)
419 #define ARG4 %a6@(20)
421 .macro func_start name,saveregs,stack=0
422 L(\name):
423 linkw %a6,#-\stack
424 moveml \saveregs,%sp@-
425 .set stackstart,-\stack
427 .macro func_return_\name
428 moveml %sp@+,\saveregs
429 unlk %a6
430 rts
431 .endm
432 .endm
434 .macro func_return name
435 func_return_\name
436 .endm
438 .macro func_call name
439 jbsr L(\name)
440 .endm
442 .macro move_stack nr,arg1,arg2,arg3,arg4
443 .if \nr
444 move_stack "(\nr-1)",\arg2,\arg3,\arg4
445 movel \arg1,%sp@-
446 .endif
447 .endm
449 .macro func_define name,nr=0
450 .macro \name arg1,arg2,arg3,arg4
451 move_stack \nr,\arg1,\arg2,\arg3,\arg4
452 func_call \name
453 .if \nr
454 lea %sp@(\nr*4),%sp
455 .endif
456 .endm
457 .endm
459 func_define mmu_map,4
460 func_define mmu_map_tt,4
461 func_define mmu_fixup_page_mmu_cache,1
462 func_define mmu_temp_map,2
463 func_define mmu_engage
464 func_define mmu_get_root_table_entry,1
465 func_define mmu_get_ptr_table_entry,2
466 func_define mmu_get_page_table_entry,2
467 func_define mmu_print
468 func_define get_new_page
469 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
470 func_define set_leds
471 #endif
473 .macro mmu_map_eq arg1,arg2,arg3
474 mmu_map \arg1,\arg1,\arg2,\arg3
475 .endm
477 .macro get_bi_record record
478 pea \record
479 func_call get_bi_record
480 addql #4,%sp
481 .endm
483 func_define serial_putc,1
484 func_define console_putc,1
486 func_define console_init
487 func_define console_put_stats
488 func_define console_put_penguin
489 func_define console_plot_pixel,3
490 func_define console_scroll
492 .macro putc ch
493 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
494 pea \ch
495 #endif
496 #ifdef CONSOLE
497 func_call console_putc
498 #endif
499 #ifdef SERIAL_DEBUG
500 func_call serial_putc
501 #endif
502 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
503 addql #4,%sp
504 #endif
505 .endm
507 .macro dputc ch
508 #ifdef DEBUG
509 putc \ch
510 #endif
511 .endm
513 func_define putn,1
515 .macro dputn nr
516 #ifdef DEBUG
517 putn \nr
518 #endif
519 .endm
521 .macro puts string
522 #if defined(CONSOLE) || defined(SERIAL_DEBUG)
523 __INITDATA
524 .Lstr\@:
525 .string "\string"
526 __FINIT
527 pea %pc@(.Lstr\@)
528 func_call puts
529 addql #4,%sp
530 #endif
531 .endm
533 .macro dputs string
534 #ifdef DEBUG
535 puts "\string"
536 #endif
537 .endm
539 #define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
540 #define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
541 #define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
542 #define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
543 #define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
544 #define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
545 #define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
546 #define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
547 #define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
548 #define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
549 #define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
550 #define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
551 #define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
553 #define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
554 jeq 42f; \
555 cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
556 jne lab ;\
557 42:\
559 #define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
560 #define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
561 #define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
562 #define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
563 #define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
564 #define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
565 #define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab
567 /* On the HP300 we use the on-board LEDs for debug output before
568 the console is running. Writing a 1 bit turns the corresponding LED
569 _off_ - on the 340 bit 7 is towards the back panel of the machine. */
570 .macro leds mask
571 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
572 hasnt_leds(.Lled\@)
573 pea \mask
574 func_call set_leds
575 addql #4,%sp
576 .Lled\@:
577 #endif
578 .endm
580 __HEAD
581 ENTRY(_stext)
582 /*
583 * Version numbers of the bootinfo interface
584 * The area from _stext to _start will later be used as kernel pointer table
585 */
586 bras 1f /* Jump over bootinfo version numbers */
588 .long BOOTINFOV_MAGIC
589 .long MACH_AMIGA, AMIGA_BOOTI_VERSION
590 .long MACH_ATARI, ATARI_BOOTI_VERSION
591 .long MACH_MVME147, MVME147_BOOTI_VERSION
592 .long MACH_MVME16x, MVME16x_BOOTI_VERSION
593 .long MACH_BVME6000, BVME6000_BOOTI_VERSION
594 .long MACH_MAC, MAC_BOOTI_VERSION
595 .long MACH_Q40, Q40_BOOTI_VERSION
596 .long MACH_HP300, HP300_BOOTI_VERSION
597 .long 0
598 1: jra __start
600 .equ kernel_pg_dir,_stext
602 .equ .,_stext+PAGESIZE
604 ENTRY(_start)
605 jra __start
606 __INIT
607 ENTRY(__start)
608 /*
609 * Setup initial stack pointer
610 */
611 lea %pc@(_stext),%sp
613 /*
614 * Record the CPU and machine type.
615 */
616 get_bi_record BI_MACHTYPE
617 lea %pc@(m68k_machtype),%a1
618 movel %a0@,%a1@
620 get_bi_record BI_FPUTYPE
621 lea %pc@(m68k_fputype),%a1
622 movel %a0@,%a1@
624 get_bi_record BI_MMUTYPE
625 lea %pc@(m68k_mmutype),%a1
626 movel %a0@,%a1@
628 get_bi_record BI_CPUTYPE
629 lea %pc@(m68k_cputype),%a1
630 movel %a0@,%a1@
632 leds 0x1
634 #ifdef CONFIG_MAC
635 /*
636 * For Macintosh, we need to determine the display parameters early (at least
637 * while debugging it).
638 */
640 is_not_mac(L(test_notmac))
642 get_bi_record BI_MAC_VADDR
643 lea %pc@(L(mac_videobase)),%a1
644 movel %a0@,%a1@
646 get_bi_record BI_MAC_VDEPTH
647 lea %pc@(L(mac_videodepth)),%a1
648 movel %a0@,%a1@
650 get_bi_record BI_MAC_VDIM
651 lea %pc@(L(mac_dimensions)),%a1
652 movel %a0@,%a1@
654 get_bi_record BI_MAC_VROW
655 lea %pc@(L(mac_rowbytes)),%a1
656 movel %a0@,%a1@
658 #ifdef MAC_SERIAL_DEBUG
659 get_bi_record BI_MAC_SCCBASE
660 lea %pc@(L(mac_sccbase)),%a1
661 movel %a0@,%a1@
662 #endif /* MAC_SERIAL_DEBUG */
665 L(test_notmac):
666 #endif /* CONFIG_MAC */
669 /*
670 * There are ultimately two pieces of information we want for all kinds of
671 * processors CpuType and CacheBits. The CPUTYPE was passed in from booter
672 * and is converted here from a booter type definition to a separate bit
673 * number which allows for the standard is_0x0 macro tests.
674 */
675 movel %pc@(m68k_cputype),%d0
676 /*
677 * Assume it's an 030
678 */
679 clrl %d1
681 /*
682 * Test the BootInfo cputype for 060
683 */
684 btst #CPUB_68060,%d0
685 jeq 1f
686 bset #CPUTYPE_060,%d1
687 bset #CPUTYPE_0460,%d1
688 jra 3f
689 1:
690 /*
691 * Test the BootInfo cputype for 040
692 */
693 btst #CPUB_68040,%d0
694 jeq 2f
695 bset #CPUTYPE_040,%d1
696 bset #CPUTYPE_0460,%d1
697 jra 3f
698 2:
699 /*
700 * Test the BootInfo cputype for 020
701 */
702 btst #CPUB_68020,%d0
703 jeq 3f
704 bset #CPUTYPE_020,%d1
705 jra 3f
706 3:
707 /*
708 * Record the cpu type
709 */
710 lea %pc@(L(cputype)),%a0
711 movel %d1,%a0@
713 /*
714 * NOTE:
715 *
716 * Now the macros are valid:
717 * is_040_or_060
718 * is_not_040_or_060
719 * is_040
720 * is_060
721 * is_not_060
722 */
724 /*
725 * Determine the cache mode for pages holding MMU tables
726 * and for supervisor mode, unused for '020 and '030
727 */
728 clrl %d0
729 clrl %d1
731 is_not_040_or_060(L(save_cachetype))
733 /*
734 * '040 or '060
735 * d1 := cacheable write-through
736 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
737 * but we have been using write-through since at least 2.0.29 so I
738 * guess it is OK.
739 */
740 #ifdef CONFIG_060_WRITETHROUGH
741 /*
742 * If this is a 68060 board using drivers with cache coherency
743 * problems, then supervisor memory accesses need to be write-through
744 * also; otherwise, we want copyback.
745 */
747 is_not_060(1f)
748 movel #_PAGE_CACHE040W,%d0
749 jra L(save_cachetype)
750 #endif /* CONFIG_060_WRITETHROUGH */
751 1:
752 movew #_PAGE_CACHE040,%d0
754 movel #_PAGE_CACHE040W,%d1
756 L(save_cachetype):
757 /* Save cache mode for supervisor mode and page tables
758 */
759 lea %pc@(m68k_supervisor_cachemode),%a0
760 movel %d0,%a0@
761 lea %pc@(m68k_pgtable_cachemode),%a0
762 movel %d1,%a0@
764 /*
765 * raise interrupt level
766 */
767 movew #0x2700,%sr
769 /*
770 If running on an Atari, determine the I/O base of the
771 serial port and test if we are running on a Medusa or Hades.
772 This test is necessary here, because on the Hades the serial
773 port is only accessible in the high I/O memory area.
775 The test whether it is a Medusa is done by writing to the byte at
776 phys. 0x0. This should result in a bus error on all other machines.
778 ...should, but doesn't. The Afterburner040 for the Falcon has the
779 same behaviour (0x0..0x7 are no ROM shadow). So we have to do
780 another test to distinguish Medusa and AB040. This is a
781 read attempt for 0x00ff82fe phys. that should bus error on a Falcon
782 (+AB040), but is in the range where the Medusa always asserts DTACK.
784 The test for the Hades is done by reading address 0xb0000000. This
785 should give a bus error on the Medusa.
786 */
788 #ifdef CONFIG_ATARI
789 is_not_atari(L(notypetest))
791 /* get special machine type (Medusa/Hades/AB40) */
792 moveq #0,%d3 /* default if tag doesn't exist */
793 get_bi_record BI_ATARI_MCH_TYPE
794 tstl %d0
795 jbmi 1f
796 movel %a0@,%d3
797 lea %pc@(atari_mch_type),%a0
798 movel %d3,%a0@
799 1:
800 /* On the Hades, the iobase must be set up before opening the
801 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
802 moveq #0,%d0
803 cmpl #ATARI_MACH_HADES,%d3
804 jbne 1f
805 movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */
806 1: lea %pc@(L(iobase)),%a0
807 movel %d0,%a0@
809 L(notypetest):
810 #endif
812 #ifdef CONFIG_VME
813 is_mvme147(L(getvmetype))
814 is_bvme6000(L(getvmetype))
815 is_not_mvme16x(L(gvtdone))
817 /* See if the loader has specified the BI_VME_TYPE tag. Recent
818 * versions of VMELILO and TFTPLILO do this. We have to do this
819 * early so we know how to handle console output. If the tag
820 * doesn't exist then we use the Bug for output on MVME16x.
821 */
822 L(getvmetype):
823 get_bi_record BI_VME_TYPE
824 tstl %d0
825 jbmi 1f
826 movel %a0@,%d3
827 lea %pc@(vme_brdtype),%a0
828 movel %d3,%a0@
829 1:
830 #ifdef CONFIG_MVME16x
831 is_not_mvme16x(L(gvtdone))
833 /* Need to get the BRD_ID info to differentiate between 162, 167,
834 * etc. This is available as a BI_VME_BRDINFO tag with later
835 * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
836 */
837 get_bi_record BI_VME_BRDINFO
838 tstl %d0
839 jpl 1f
841 /* Get pointer to board ID data from Bug */
842 movel %d2,%sp@-
843 trap #15
844 .word 0x70 /* trap 0x70 - .BRD_ID */
845 movel %sp@+,%a0
846 1:
847 lea %pc@(mvme_bdid),%a1
848 /* Structure is 32 bytes long */
849 movel %a0@+,%a1@+
850 movel %a0@+,%a1@+
851 movel %a0@+,%a1@+
852 movel %a0@+,%a1@+
853 movel %a0@+,%a1@+
854 movel %a0@+,%a1@+
855 movel %a0@+,%a1@+
856 movel %a0@+,%a1@+
857 #endif
859 L(gvtdone):
861 #endif
863 #ifdef CONFIG_HP300
864 is_not_hp300(L(nothp))
866 /* Get the address of the UART for serial debugging */
867 get_bi_record BI_HP300_UART_ADDR
868 tstl %d0
869 jbmi 1f
870 movel %a0@,%d3
871 lea %pc@(L(uartbase)),%a0
872 movel %d3,%a0@
873 get_bi_record BI_HP300_UART_SCODE
874 tstl %d0
875 jbmi 1f
876 movel %a0@,%d3
877 lea %pc@(L(uart_scode)),%a0
878 movel %d3,%a0@
879 1:
880 L(nothp):
881 #endif
883 /*
884 * Initialize serial port
885 */
886 jbsr L(serial_init)
888 /*
889 * Initialize console
890 */
891 #ifdef CONFIG_MAC
892 is_not_mac(L(nocon))
893 #ifdef CONSOLE
894 console_init
895 #ifdef CONSOLE_PENGUIN
896 console_put_penguin
897 #endif /* CONSOLE_PENGUIN */
898 console_put_stats
899 #endif /* CONSOLE */
900 L(nocon):
901 #endif /* CONFIG_MAC */
904 putc '\n'
905 putc 'A'
906 leds 0x2
907 dputn %pc@(L(cputype))
908 dputn %pc@(m68k_supervisor_cachemode)
909 dputn %pc@(m68k_pgtable_cachemode)
910 dputc '\n'
912 /*
913 * Save physical start address of kernel
914 */
915 lea %pc@(L(phys_kernel_start)),%a0
916 lea %pc@(_stext),%a1
917 subl #_stext,%a1
918 addl #PAGE_OFFSET,%a1
919 movel %a1,%a0@
921 putc 'B'
923 leds 0x4
925 /*
926 * mmu_init
927 *
928 * This block of code does what's necessary to map in the various kinds
929 * of machines for execution of Linux.
930 * First map the first 4 MB of kernel code & data
931 */
933 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),#4*1024*1024,\
934 %pc@(m68k_supervisor_cachemode)
936 putc 'C'
938 #ifdef CONFIG_AMIGA
940 L(mmu_init_amiga):
942 is_not_amiga(L(mmu_init_not_amiga))
943 /*
944 * mmu_init_amiga
945 */
947 putc 'D'
949 is_not_040_or_060(1f)
951 /*
952 * 040: Map the 16Meg range physical 0x0 upto logical 0x8000.0000
953 */
954 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
955 /*
956 * Map the Zorro III I/O space with transparent translation
957 * for frame buffer memory etc.
958 */
959 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S
961 jbra L(mmu_init_done)
963 1:
964 /*
965 * 030: Map the 32Meg range physical 0x0 upto logical 0x8000.0000
966 */
967 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
968 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
970 jbra L(mmu_init_done)
972 L(mmu_init_not_amiga):
973 #endif
975 #ifdef CONFIG_ATARI
977 L(mmu_init_atari):
979 is_not_atari(L(mmu_init_not_atari))
981 putc 'E'
983 /* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
984 the last 16 MB of virtual address space to the first 16 MB (i.e.
985 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
986 needed. I/O ranges are marked non-cachable.
988 For the Medusa it is better to map the I/O region transparently
989 (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
990 accessible only in the high area.
992 On the Hades all I/O registers are only accessible in the high
993 area.
994 */
996 /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
997 moveq #0,%d0
998 movel %pc@(atari_mch_type),%d3
999 cmpl #ATARI_MACH_MEDUSA,%d3
1000 jbeq 2f
1001 cmpl #ATARI_MACH_HADES,%d3
1002 jbne 1f
1003 2: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
1004 1: movel %d0,%d3
1006 is_040_or_060(L(spata68040))
1008 /* Map everything non-cacheable, though not all parts really
1009 * need to disable caches (crucial only for 0xff8000..0xffffff
1010 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
1011 * isn't really used, except for sometimes peeking into the
1012 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
1013 * this. */
1014 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030
1016 jbra L(mmu_init_done)
1018 L(spata68040):
1020 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S
1022 jbra L(mmu_init_done)
1024 L(mmu_init_not_atari):
1025 #endif
1027 #ifdef CONFIG_Q40
1028 is_not_q40(L(notq40))
1029 /*
1030 * add transparent mapping for 0xff00 0000 - 0xffff ffff
1031 * non-cached serialized etc..
1032 * this includes master chip, DAC, RTC and ISA ports
1033 * 0xfe000000-0xfeffffff is for screen and ROM
1034 */
1036 putc 'Q'
1038 mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
1039 mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
1041 jbra L(mmu_init_done)
1043 L(notq40):
1044 #endif
1046 #ifdef CONFIG_HP300
1047 is_not_hp300(L(nothp300))
1049 /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
1050 * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx).
1051 * The ROM mapping is needed because the LEDs are mapped there too.
1052 */
1054 is_040(1f)
1056 /*
1057 * 030: Map the 32Meg range physical 0x0 upto logical 0xf000.0000
1058 */
1059 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
1061 jbra L(mmu_init_done)
1063 1:
1064 /*
1065 * 040: Map the 16Meg range physical 0x0 upto logical 0xf000.0000
1066 */
1067 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S
1069 jbra L(mmu_init_done)
1071 L(nothp300):
1072 #endif /* CONFIG_HP300 */
1074 #ifdef CONFIG_MVME147
1076 is_not_mvme147(L(not147))
1078 /*
1079 * On MVME147 we have already created kernel page tables for
1080 * 4MB of RAM at address 0, so now need to do a transparent
1081 * mapping of the top of memory space. Make it 0.5GByte for now,
1082 * so we can access on-board i/o areas.
1083 */
1085 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030
1087 jbra L(mmu_init_done)
1089 L(not147):
1090 #endif /* CONFIG_MVME147 */
1092 #ifdef CONFIG_MVME16x
1094 is_not_mvme16x(L(not16x))
1096 /*
1097 * On MVME16x we have already created kernel page tables for
1098 * 4MB of RAM at address 0, so now need to do a transparent
1099 * mapping of the top of memory space. Make it 0.5GByte for now.
1100 * Supervisor only access, so transparent mapping doesn't
1101 * clash with User code virtual address space.
1102 * this covers IO devices, PROM and SRAM. The PROM and SRAM
1103 * mapping is needed to allow 167Bug to run.
1104 * IO is in the range 0xfff00000 to 0xfffeffff.
1105 * PROM is 0xff800000->0xffbfffff and SRAM is
1106 * 0xffe00000->0xffe1ffff.
1107 */
1109 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1111 jbra L(mmu_init_done)
1113 L(not16x):
1114 #endif /* CONFIG_MVME162 | CONFIG_MVME167 */
1116 #ifdef CONFIG_BVME6000
1118 is_not_bvme6000(L(not6000))
1120 /*
1121 * On BVME6000 we have already created kernel page tables for
1122 * 4MB of RAM at address 0, so now need to do a transparent
1123 * mapping of the top of memory space. Make it 0.5GByte for now,
1124 * so we can access on-board i/o areas.
1125 * Supervisor only access, so transparent mapping doesn't
1126 * clash with User code virtual address space.
1127 */
1129 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1131 jbra L(mmu_init_done)
1133 L(not6000):
1134 #endif /* CONFIG_BVME6000 */
1136 /*
1137 * mmu_init_mac
1138 *
1139 * The Macintosh mappings are less clear.
1140 *
1141 * Even as of this writing, it is unclear how the
1142 * Macintosh mappings will be done. However, as
1143 * the first author of this code I'm proposing the
1144 * following model:
1145 *
1146 * Map the kernel (that's already done),
1147 * Map the I/O (on most machines that's the
1148 * 0x5000.0000 ... 0x5300.0000 range,
1149 * Map the video frame buffer using as few pages
1150 * as absolutely (this requirement mostly stems from
1151 * the fact that when the frame buffer is at
1152 * 0x0000.0000 then we know there is valid RAM just
1153 * above the screen that we don't want to waste!).
1154 *
1155 * By the way, if the frame buffer is at 0x0000.0000
1156 * then the Macintosh is known as an RBV based Mac.
1157 *
1158 * By the way 2, the code currently maps in a bunch of
1159 * regions. But I'd like to cut that out. (And move most
1160 * of the mappings up into the kernel proper ... or only
1161 * map what's necessary.)
1162 */
1164 #ifdef CONFIG_MAC
1166 L(mmu_init_mac):
1168 is_not_mac(L(mmu_init_not_mac))
1170 putc 'F'
1172 is_not_040_or_060(1f)
1174 moveq #_PAGE_NOCACHE_S,%d3
1175 jbra 2f
1176 1:
1177 moveq #_PAGE_NOCACHE030,%d3
1178 2:
1179 /*
1180 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
1181 * we simply map the 4MB that contains the videomem
1182 */
1184 movel #VIDEOMEMMASK,%d0
1185 andl %pc@(L(mac_videobase)),%d0
1187 mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
1188 /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
1189 mmu_map_eq #0x40000000,#0x02000000,%d3
1190 /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
1191 mmu_map_eq #0x50000000,#0x03000000,%d3
1192 /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
1193 mmu_map_tt #1,#0xf8000000,#0x08000000,%d3
1195 jbra L(mmu_init_done)
1197 L(mmu_init_not_mac):
1198 #endif
1200 #ifdef CONFIG_SUN3X
1201 is_not_sun3x(L(notsun3x))
1203 /* oh, the pain.. We're gonna want the prom code after
1204 * starting the MMU, so we copy the mappings, translating
1205 * from 8k -> 4k pages as we go.
1206 */
1208 /* copy maps from 0xfee00000 to 0xff000000 */
1209 movel #0xfee00000, %d0
1210 moveq #ROOT_INDEX_SHIFT, %d1
1211 lsrl %d1,%d0
1212 mmu_get_root_table_entry %d0
1214 movel #0xfee00000, %d0
1215 moveq #PTR_INDEX_SHIFT, %d1
1216 lsrl %d1,%d0
1217 andl #PTR_TABLE_SIZE-1, %d0
1218 mmu_get_ptr_table_entry %a0,%d0
1220 movel #0xfee00000, %d0
1221 moveq #PAGE_INDEX_SHIFT, %d1
1222 lsrl %d1,%d0
1223 andl #PAGE_TABLE_SIZE-1, %d0
1224 mmu_get_page_table_entry %a0,%d0
1226 /* this is where the prom page table lives */
1227 movel 0xfefe00d4, %a1
1228 movel %a1@, %a1
1230 movel #((0x200000 >> 13)-1), %d1
1232 1:
1233 movel %a1@+, %d3
1234 movel %d3,%a0@+
1235 addl #0x1000,%d3
1236 movel %d3,%a0@+
1238 dbra %d1,1b
1240 /* setup tt1 for I/O */
1241 mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S
1242 jbra L(mmu_init_done)
1244 L(notsun3x):
1245 #endif
1247 #ifdef CONFIG_APOLLO
1248 is_not_apollo(L(notapollo))
1250 putc 'P'
1251 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
1253 L(notapollo):
1254 jbra L(mmu_init_done)
1255 #endif
1257 L(mmu_init_done):
1259 putc 'G'
1260 leds 0x8
1262 /*
1263 * mmu_fixup
1264 *
1265 * On the 040 class machines, all pages that are used for the
1266 * mmu have to be fixed up. According to Motorola, pages holding mmu
1267 * tables should be non-cacheable on a '040 and write-through on a
1268 * '060. But analysis of the reasons for this, and practical
1269 * experience, showed that write-through also works on a '040.
1270 *
1271 * Allocated memory so far goes from kernel_end to memory_start that
1272 * is used for all kind of tables, for that the cache attributes
1273 * are now fixed.
1274 */
1275 L(mmu_fixup):
1277 is_not_040_or_060(L(mmu_fixup_done))
1279 #ifdef MMU_NOCACHE_KERNEL
1280 jbra L(mmu_fixup_done)
1281 #endif
1283 /* first fix the page at the start of the kernel, that
1284 * contains also kernel_pg_dir.
1285 */
1286 movel %pc@(L(phys_kernel_start)),%d0
1287 subl #PAGE_OFFSET,%d0
1288 lea %pc@(_stext),%a0
1289 subl %d0,%a0
1290 mmu_fixup_page_mmu_cache %a0
1292 movel %pc@(L(kernel_end)),%a0
1293 subl %d0,%a0
1294 movel %pc@(L(memory_start)),%a1
1295 subl %d0,%a1
1296 bra 2f
1297 1:
1298 mmu_fixup_page_mmu_cache %a0
1299 addw #PAGESIZE,%a0
1300 2:
1301 cmpl %a0,%a1
1302 jgt 1b
1304 L(mmu_fixup_done):
1306 #ifdef MMU_PRINT
1307 mmu_print
1308 #endif
1310 /*
1311 * mmu_engage
1312 *
1313 * This chunk of code performs the gruesome task of engaging the MMU.
1314 * The reason its gruesome is because when the MMU becomes engaged it
1315 * maps logical addresses to physical addresses. The Program Counter
1316 * register is then passed through the MMU before the next instruction
1317 * is fetched (the instruction following the engage MMU instruction).
1318 * This may mean one of two things:
1319 * 1. The Program Counter falls within the logical address space of
1320 * the kernel of which there are two sub-possibilities:
1321 * A. The PC maps to the correct instruction (logical PC == physical
1322 * code location), or
1323 * B. The PC does not map through and the processor will read some
1324 * data (or instruction) which is not the logically next instr.
1325 * As you can imagine, A is good and B is bad.
1326 * Alternatively,
1327 * 2. The Program Counter does not map through the MMU. The processor
1328 * will take a Bus Error.
1329 * Clearly, 2 is bad.
1330 * It doesn't take a wiz kid to figure you want 1.A.
1331 * This code creates that possibility.
1332 * There are two possible 1.A. states (we now ignore the other above states):
1333 * A. The kernel is located at physical memory addressed the same as
1334 * the logical memory for the kernel, i.e., 0x01000.
1335 * B. The kernel is located some where else. e.g., 0x0400.0000
1336 *
1337 * Under some conditions the Macintosh can look like A or B.
1338 * [A friend and I once noted that Apple hardware engineers should be
1339 * wacked twice each day: once when they show up at work (as in, Whack!,
1340 * "This is for the screwy hardware we know you're going to design today."),
1341 * and also at the end of the day (as in, Whack! "I don't know what
1342 * you designed today, but I'm sure it wasn't good."). -- rst]
1343 *
1344 * This code works on the following premise:
1345 * If the kernel start (%d5) is within the first 16 Meg of RAM,
1346 * then create a mapping for the kernel at logical 0x8000.0000 to
1347 * the physical location of the pc. And, create a transparent
1348 * translation register for the first 16 Meg. Then, after the MMU
1349 * is engaged, the PC can be moved up into the 0x8000.0000 range
1350 * and then the transparent translation can be turned off and then
1351 * the PC can jump to the correct logical location and it will be
1352 * home (finally). This is essentially the code that the Amiga used
1353 * to use. Now, it's generalized for all processors. Which means
1354 * that a fresh (but temporary) mapping has to be created. The mapping
1355 * is made in page 0 (an as of yet unused location -- except for the
1356 * stack!). This temporary mapping will only require 1 pointer table
1357 * and a single page table (it can map 256K).
1358 *
1359 * OK, alternatively, imagine that the Program Counter is not within
1360 * the first 16 Meg. Then, just use Transparent Translation registers
1361 * to do the right thing.
1362 *
1363 * Last, if _start is already at 0x01000, then there's nothing special
1364 * to do (in other words, in a degenerate case of the first case above,
1365 * do nothing).
1366 *
1367 * Let's do it.
1368 *
1369 *
1370 */
1372 putc 'H'
1374 mmu_engage
1376 /*
1377 * After this point no new memory is allocated and
1378 * the start of available memory is stored in availmem.
1379 * (The bootmem allocator requires now the physicall address.)
1380 */
1382 movel L(memory_start),availmem
1384 #ifdef CONFIG_AMIGA
1385 is_not_amiga(1f)
1386 /* fixup the Amiga custom register location before printing */
1387 clrl L(custom)
1388 1:
1389 #endif
1391 #ifdef CONFIG_ATARI
1392 is_not_atari(1f)
1393 /* fixup the Atari iobase register location before printing */
1394 movel #0xff000000,L(iobase)
1395 1:
1396 #endif
1398 #ifdef CONFIG_MAC
1399 is_not_mac(1f)
1400 movel #~VIDEOMEMMASK,%d0
1401 andl L(mac_videobase),%d0
1402 addl #VIDEOMEMBASE,%d0
1403 movel %d0,L(mac_videobase)
1404 #if defined(CONSOLE)
1405 movel %pc@(L(phys_kernel_start)),%d0
1406 subl #PAGE_OFFSET,%d0
1407 subl %d0,L(console_font)
1408 subl %d0,L(console_font_data)
1409 #endif
1410 #ifdef MAC_SERIAL_DEBUG
1411 orl #0x50000000,L(mac_sccbase)
1412 #endif
1413 1:
1414 #endif
1416 #ifdef CONFIG_HP300
1417 is_not_hp300(2f)
1418 /*
1419 * Fix up the iobase register to point to the new location of the LEDs.
1420 */
1421 movel #0xf0000000,L(iobase)
1423 /*
1424 * Energise the FPU and caches.
1425 */
1426 is_040(1f)
1427 movel #0x60,0xf05f400c
1428 jbra 2f
1430 /*
1431 * 040: slightly different, apparently.
1432 */
1433 1: movew #0,0xf05f400e
1434 movew #0x64,0xf05f400e
1435 2:
1436 #endif
1438 #ifdef CONFIG_SUN3X
1439 is_not_sun3x(1f)
1441 /* enable copro */
1442 oriw #0x4000,0x61000000
1443 1:
1444 #endif
1446 #ifdef CONFIG_APOLLO
1447 is_not_apollo(1f)
1449 /*
1450 * Fix up the iobase before printing
1451 */
1452 movel #0x80000000,L(iobase)
1453 1:
1454 #endif
1456 putc 'I'
1457 leds 0x10
1459 /*
1460 * Enable caches
1461 */
1463 is_not_040_or_060(L(cache_not_680460))
1465 L(cache680460):
1466 .chip 68040
1467 nop
1468 cpusha %bc
1469 nop
1471 is_060(L(cache68060))
1473 movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0
1474 /* MMU stuff works in copyback mode now, so enable the cache */
1475 movec %d0,%cacr
1476 jra L(cache_done)
1478 L(cache68060):
1479 movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
1480 /* MMU stuff works in copyback mode now, so enable the cache */
1481 movec %d0,%cacr
1482 /* enable superscalar dispatch in PCR */
1483 moveq #1,%d0
1484 .chip 68060
1485 movec %d0,%pcr
1487 jbra L(cache_done)
1488 L(cache_not_680460):
1489 L(cache68030):
1490 .chip 68030
1491 movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
1492 movec %d0,%cacr
1494 jra L(cache_done)
1495 .chip 68k
1496 L(cache_done):
1498 putc 'J'
1500 /*
1501 * Setup initial stack pointer
1502 */
1503 lea init_task,%curptr
1504 lea init_thread_union+THREAD_SIZE,%sp
1506 putc 'K'
1508 subl %a6,%a6 /* clear a6 for gdb */
1510 /*
1511 * The new 64bit printf support requires an early exception initialization.
1512 */
1513 jbsr base_trap_init
1515 /* jump to the kernel start */
1517 putc '\n'
1518 leds 0x55
1520 jbsr start_kernel
1522 /*
1523 * Find a tag record in the bootinfo structure
1524 * The bootinfo structure is located right after the kernel bss
1525 * Returns: d0: size (-1 if not found)
1526 * a0: data pointer (end-of-records if not found)
1527 */
1528 func_start get_bi_record,%d1
1530 movel ARG1,%d0
1531 lea %pc@(_end),%a0
1532 1: tstw %a0@(BIR_TAG)
1533 jeq 3f
1534 cmpw %a0@(BIR_TAG),%d0
1535 jeq 2f
1536 addw %a0@(BIR_SIZE),%a0
1537 jra 1b
1538 2: moveq #0,%d0
1539 movew %a0@(BIR_SIZE),%d0
1540 lea %a0@(BIR_DATA),%a0
1541 jra 4f
1542 3: moveq #-1,%d0
1543 lea %a0@(BIR_SIZE),%a0
1544 4:
1545 func_return get_bi_record
1548 /*
1549 * MMU Initialization Begins Here
1550 *
1551 * The structure of the MMU tables on the 68k machines
1552 * is thus:
1553 * Root Table
1554 * Logical addresses are translated through
1555 * a hierarchical translation mechanism where the high-order
1556 * seven bits of the logical address (LA) are used as an
1557 * index into the "root table." Each entry in the root
1558 * table has a bit which specifies if it's a valid pointer to a
1559 * pointer table. Each entry defines a 32KMeg range of memory.
1560 * If an entry is invalid then that logical range of 32M is
1561 * invalid and references to that range of memory (when the MMU
1562 * is enabled) will fault. If the entry is valid, then it does
1563 * one of two things. On 040/060 class machines, it points to
1564 * a pointer table which then describes more finely the memory
1565 * within that 32M range. On 020/030 class machines, a technique
1566 * called "early terminating descriptors" are used. This technique
1567 * allows an entire 32Meg to be described by a single entry in the
1568 * root table. Thus, this entry in the root table, contains the
1569 * physical address of the memory or I/O at the logical address
1570 * which the entry represents and it also contains the necessary
1571 * cache bits for this region.
1572 *
1573 * Pointer Tables
1574 * Per the Root Table, there will be one or more
1575 * pointer tables. Each pointer table defines a 32M range.
1576 * Not all of the 32M range need be defined. Again, the next
1577 * seven bits of the logical address are used an index into
1578 * the pointer table to point to page tables (if the pointer
1579 * is valid). There will undoubtedly be more than one
1580 * pointer table for the kernel because each pointer table
1581 * defines a range of only 32M. Valid pointer table entries
1582 * point to page tables, or are early terminating entries
1583 * themselves.
1584 *
1585 * Page Tables
1586 * Per the Pointer Tables, each page table entry points
1587 * to the physical page in memory that supports the logical
1588 * address that translates to the particular index.
1589 *
1590 * In short, the Logical Address gets translated as follows:
1591 * bits 31..26 - index into the Root Table
1592 * bits 25..18 - index into the Pointer Table
1593 * bits 17..12 - index into the Page Table
1594 * bits 11..0 - offset into a particular 4K page
1595 *
1596 * The algorithms which follows do one thing: they abstract
1597 * the MMU hardware. For example, there are three kinds of
1598 * cache settings that are relevant. Either, memory is
1599 * being mapped in which case it is either Kernel Code (or
1600 * the RamDisk) or it is MMU data. On the 030, the MMU data
1601 * option also describes the kernel. Or, I/O is being mapped
1602 * in which case it has its own kind of cache bits. There
1603 * are constants which abstract these notions from the code that
1604 * actually makes the call to map some range of memory.
1605 *
1606 *
1607 *
1608 */
1610 #ifdef MMU_PRINT
1611 /*
1612 * mmu_print
1613 *
1614 * This algorithm will print out the current MMU mappings.
1615 *
1616 * Input:
1617 * %a5 points to the root table. Everything else is calculated
1618 * from this.
1619 */
1621 #define mmu_next_valid 0
1622 #define mmu_start_logical 4
1623 #define mmu_next_logical 8
1624 #define mmu_start_physical 12
1625 #define mmu_next_physical 16
1627 #define MMU_PRINT_INVALID -1
1628 #define MMU_PRINT_VALID 1
1629 #define MMU_PRINT_UNINITED 0
1631 #define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2:
1633 func_start mmu_print,%a0-%a6/%d0-%d7
1635 movel %pc@(L(kernel_pgdir_ptr)),%a5
1636 lea %pc@(L(mmu_print_data)),%a0
1637 movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
1639 is_not_040_or_060(mmu_030_print)
1641 mmu_040_print:
1642 puts "\nMMU040\n"
1643 puts "rp:"
1644 putn %a5
1645 putc '\n'
1647 lea %pc@(kernel_pg_dir),%a5
1648 movel %a5,%a0 /* a0 has the address of the root table ptr */
1649 movel #0x00000000,%a4 /* logical address */
1650 moveql #0,%d0
1651 40:
1652 /* Increment the logical address and preserve in d5 */
1653 movel %a4,%d5
1654 addil #PAGESIZE<<13,%d5
1655 movel %a0@+,%d6
1656 btst #1,%d6
1657 jbne 41f
1658 jbsr mmu_print_tuple_invalidate
1659 jbra 48f
1660 41:
1661 movel #0,%d1
1662 andil #0xfffffe00,%d6
1663 movel %d6,%a1
1664 42:
1665 movel %a4,%d5
1666 addil #PAGESIZE<<6,%d5
1667 movel %a1@+,%d6
1668 btst #1,%d6
1669 jbne 43f
1670 jbsr mmu_print_tuple_invalidate
1671 jbra 47f
1672 43:
1673 movel #0,%d2
1674 andil #0xffffff00,%d6
1675 movel %d6,%a2
1676 44:
1677 movel %a4,%d5
1678 addil #PAGESIZE,%d5
1679 movel %a2@+,%d6
1680 btst #0,%d6
1681 jbne 45f
1682 jbsr mmu_print_tuple_invalidate
1683 jbra 46f
1684 45:
1685 moveml %d0-%d1,%sp@-
1686 movel %a4,%d0
1687 movel %d6,%d1
1688 andil #0xfffff4e0,%d1
1689 lea %pc@(mmu_040_print_flags),%a6
1690 jbsr mmu_print_tuple
1691 moveml %sp@+,%d0-%d1
1692 46:
1693 movel %d5,%a4
1694 addq #1,%d2
1695 cmpib #64,%d2
1696 jbne 44b
1697 47:
1698 movel %d5,%a4
1699 addq #1,%d1
1700 cmpib #128,%d1
1701 jbne 42b
1702 48:
1703 movel %d5,%a4 /* move to the next logical address */
1704 addq #1,%d0
1705 cmpib #128,%d0
1706 jbne 40b
1708 .chip 68040
1709 movec %dtt1,%d0
1710 movel %d0,%d1
1711 andiw #0x8000,%d1 /* is it valid ? */
1712 jbeq 1f /* No, bail out */
1714 movel %d0,%d1
1715 andil #0xff000000,%d1 /* Get the address */
1716 putn %d1
1717 puts "=="
1718 putn %d1
1720 movel %d0,%d6
1721 jbsr mmu_040_print_flags_tt
1722 1:
1723 movec %dtt0,%d0
1724 movel %d0,%d1
1725 andiw #0x8000,%d1 /* is it valid ? */
1726 jbeq 1f /* No, bail out */
1728 movel %d0,%d1
1729 andil #0xff000000,%d1 /* Get the address */
1730 putn %d1
1731 puts "=="
1732 putn %d1
1734 movel %d0,%d6
1735 jbsr mmu_040_print_flags_tt
1736 1:
1737 .chip 68k
1739 jbra mmu_print_done
1741 mmu_040_print_flags:
1742 btstl #10,%d6
1743 putZc(' ','G') /* global bit */
1744 btstl #7,%d6
1745 putZc(' ','S') /* supervisor bit */
1746 mmu_040_print_flags_tt:
1747 btstl #6,%d6
1748 jbne 3f
1749 putc 'C'
1750 btstl #5,%d6
1751 putZc('w','c') /* write through or copy-back */
1752 jbra 4f
1753 3:
1754 putc 'N'
1755 btstl #5,%d6
1756 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */
1757 4:
1758 rts
1760 mmu_030_print_flags:
1761 btstl #6,%d6
1762 putZc('C','I') /* write through or copy-back */
1763 rts
1765 mmu_030_print:
1766 puts "\nMMU030\n"
1767 puts "\nrp:"
1768 putn %a5
1769 putc '\n'
1770 movel %a5,%d0
1771 andil #0xfffffff0,%d0
1772 movel %d0,%a0
1773 movel #0x00000000,%a4 /* logical address */
1774 movel #0,%d0
1775 30:
1776 movel %a4,%d5
1777 addil #PAGESIZE<<13,%d5
1778 movel %a0@+,%d6
1779 btst #1,%d6 /* is it a table ptr? */
1780 jbne 31f /* yes */
1781 btst #0,%d6 /* is it early terminating? */
1782 jbeq 1f /* no */
1783 jbsr mmu_030_print_helper
1784 jbra 38f
1785 1:
1786 jbsr mmu_print_tuple_invalidate
1787 jbra 38f
1788 31:
1789 movel #0,%d1
1790 andil #0xfffffff0,%d6
1791 movel %d6,%a1
1792 32:
1793 movel %a4,%d5
1794 addil #PAGESIZE<<6,%d5
1795 movel %a1@+,%d6
1796 btst #1,%d6 /* is it a table ptr? */
1797 jbne 33f /* yes */
1798 btst #0,%d6 /* is it a page descriptor? */
1799 jbeq 1f /* no */
1800 jbsr mmu_030_print_helper
1801 jbra 37f
1802 1:
1803 jbsr mmu_print_tuple_invalidate
1804 jbra 37f
1805 33:
1806 movel #0,%d2
1807 andil #0xfffffff0,%d6
1808 movel %d6,%a2
1809 34:
1810 movel %a4,%d5
1811 addil #PAGESIZE,%d5
1812 movel %a2@+,%d6
1813 btst #0,%d6
1814 jbne 35f
1815 jbsr mmu_print_tuple_invalidate
1816 jbra 36f
1817 35:
1818 jbsr mmu_030_print_helper
1819 36:
1820 movel %d5,%a4
1821 addq #1,%d2
1822 cmpib #64,%d2
1823 jbne 34b
1824 37:
1825 movel %d5,%a4
1826 addq #1,%d1
1827 cmpib #128,%d1
1828 jbne 32b
1829 38:
1830 movel %d5,%a4 /* move to the next logical address */
1831 addq #1,%d0
1832 cmpib #128,%d0
1833 jbne 30b
1835 mmu_print_done:
1836 puts "\n\n"
1838 func_return mmu_print
1841 mmu_030_print_helper:
1842 moveml %d0-%d1,%sp@-
1843 movel %a4,%d0
1844 movel %d6,%d1
1845 lea %pc@(mmu_030_print_flags),%a6
1846 jbsr mmu_print_tuple
1847 moveml %sp@+,%d0-%d1
1848 rts
1850 mmu_print_tuple_invalidate:
1851 moveml %a0/%d7,%sp@-
1853 lea %pc@(L(mmu_print_data)),%a0
1854 tstl %a0@(mmu_next_valid)
1855 jbmi mmu_print_tuple_invalidate_exit
1857 movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid)
1859 putn %a4
1861 puts "##\n"
1863 mmu_print_tuple_invalidate_exit:
1864 moveml %sp@+,%a0/%d7
1865 rts
1868 mmu_print_tuple:
1869 moveml %d0-%d7/%a0,%sp@-
1871 lea %pc@(L(mmu_print_data)),%a0
1873 tstl %a0@(mmu_next_valid)
1874 jble mmu_print_tuple_print
1876 cmpl %a0@(mmu_next_physical),%d1
1877 jbeq mmu_print_tuple_increment
1879 mmu_print_tuple_print:
1880 putn %d0
1881 puts "->"
1882 putn %d1
1884 movel %d1,%d6
1885 jbsr %a6@
1887 mmu_print_tuple_record:
1888 movel #MMU_PRINT_VALID,%a0@(mmu_next_valid)
1890 movel %d1,%a0@(mmu_next_physical)
1892 mmu_print_tuple_increment:
1893 movel %d5,%d7
1894 subl %a4,%d7
1895 addl %d7,%a0@(mmu_next_physical)
1897 mmu_print_tuple_exit:
1898 moveml %sp@+,%d0-%d7/%a0
1899 rts
1901 mmu_print_machine_cpu_types:
1902 puts "machine: "
1904 is_not_amiga(1f)
1905 puts "amiga"
1906 jbra 9f
1907 1:
1908 is_not_atari(2f)
1909 puts "atari"
1910 jbra 9f
1911 2:
1912 is_not_mac(3f)
1913 puts "macintosh"
1914 jbra 9f
1915 3: puts "unknown"
1916 9: putc '\n'
1918 puts "cputype: 0"
1919 is_not_060(1f)
1920 putc '6'
1921 jbra 9f
1922 1:
1923 is_not_040_or_060(2f)
1924 putc '4'
1925 jbra 9f
1926 2: putc '3'
1927 9: putc '0'
1928 putc '\n'
1930 rts
1931 #endif /* MMU_PRINT */
1933 /*
1934 * mmu_map_tt
1935 *
1936 * This is a specific function which works on all 680x0 machines.
1937 * On 030, 040 & 060 it will attempt to use Transparent Translation
1938 * registers (tt1).
1939 * On 020 it will call the standard mmu_map which will use early
1940 * terminating descriptors.
1941 */
1942 func_start mmu_map_tt,%d0/%d1/%a0,4
1944 dputs "mmu_map_tt:"
1945 dputn ARG1
1946 dputn ARG2
1947 dputn ARG3
1948 dputn ARG4
1949 dputc '\n'
1951 is_020(L(do_map))
1953 /* Extract the highest bit set
1954 */
1955 bfffo ARG3{#0,#32},%d1
1956 cmpw #8,%d1
1957 jcc L(do_map)
1959 /* And get the mask
1960 */
1961 moveq #-1,%d0
1962 lsrl %d1,%d0
1963 lsrl #1,%d0
1965 /* Mask the address
1966 */
1967 movel %d0,%d1
1968 notl %d1
1969 andl ARG2,%d1
1971 /* Generate the upper 16bit of the tt register
1972 */
1973 lsrl #8,%d0
1974 orl %d0,%d1
1975 clrw %d1
1977 is_040_or_060(L(mmu_map_tt_040))
1979 /* set 030 specific bits (read/write access for supervisor mode
1980 * (highest function code set, lower two bits masked))
1981 */
1982 orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
1983 movel ARG4,%d0
1984 btst #6,%d0
1985 jeq 1f
1986 orw #TTR_CI,%d1
1988 1: lea STACK,%a0
1989 dputn %d1
1990 movel %d1,%a0@
1991 .chip 68030
1992 tstl ARG1
1993 jne 1f
1994 pmove %a0@,%tt0
1995 jra 2f
1996 1: pmove %a0@,%tt1
1997 2: .chip 68k
1998 jra L(mmu_map_tt_done)
2000 /* set 040 specific bits
2001 */
2002 L(mmu_map_tt_040):
2003 orw #TTR_ENABLE+TTR_KERNELMODE,%d1
2004 orl ARG4,%d1
2005 dputn %d1
2007 .chip 68040
2008 tstl ARG1
2009 jne 1f
2010 movec %d1,%itt0
2011 movec %d1,%dtt0
2012 jra 2f
2013 1: movec %d1,%itt1
2014 movec %d1,%dtt1
2015 2: .chip 68k
2017 jra L(mmu_map_tt_done)
2019 L(do_map):
2020 mmu_map_eq ARG2,ARG3,ARG4
2022 L(mmu_map_tt_done):
2024 func_return mmu_map_tt
2026 /*
2027 * mmu_map
2028 *
2029 * This routine will map a range of memory using a pointer
2030 * table and allocating the pages on the fly from the kernel.
2031 * The pointer table does not have to be already linked into
2032 * the root table, this routine will do that if necessary.
2033 *
2034 * NOTE
2035 * This routine will assert failure and use the serial_putc
2036 * routines in the case of a run-time error. For example,
2037 * if the address is already mapped.
2038 *
2039 * NOTE-2
2040 * This routine will use early terminating descriptors
2041 * where possible for the 68020+68851 and 68030 type
2042 * processors.
2043 */
2044 func_start mmu_map,%d0-%d4/%a0-%a4
2046 dputs "\nmmu_map:"
2047 dputn ARG1
2048 dputn ARG2
2049 dputn ARG3
2050 dputn ARG4
2051 dputc '\n'
2053 /* Get logical address and round it down to 256KB
2054 */
2055 movel ARG1,%d0
2056 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2057 movel %d0,%a3
2059 /* Get the end address
2060 */
2061 movel ARG1,%a4
2062 addl ARG3,%a4
2063 subql #1,%a4
2065 /* Get physical address and round it down to 256KB
2066 */
2067 movel ARG2,%d0
2068 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2069 movel %d0,%a2
2071 /* Add page attributes to the physical address
2072 */
2073 movel ARG4,%d0
2074 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2075 addw %d0,%a2
2077 dputn %a2
2078 dputn %a3
2079 dputn %a4
2081 is_not_040_or_060(L(mmu_map_030))
2083 addw #_PAGE_GLOBAL040,%a2
2084 /*
2085 * MMU 040 & 060 Support
2086 *
2087 * The MMU usage for the 040 and 060 is different enough from
2088 * the 030 and 68851 that there is separate code. This comment
2089 * block describes the data structures and algorithms built by
2090 * this code.
2091 *
2092 * The 040 does not support early terminating descriptors, as
2093 * the 030 does. Therefore, a third level of table is needed
2094 * for the 040, and that would be the page table. In Linux,
2095 * page tables are allocated directly from the memory above the
2096 * kernel.
2097 *
2098 */
2100 L(mmu_map_040):
2101 /* Calculate the offset into the root table
2102 */
2103 movel %a3,%d0
2104 moveq #ROOT_INDEX_SHIFT,%d1
2105 lsrl %d1,%d0
2106 mmu_get_root_table_entry %d0
2108 /* Calculate the offset into the pointer table
2109 */
2110 movel %a3,%d0
2111 moveq #PTR_INDEX_SHIFT,%d1
2112 lsrl %d1,%d0
2113 andl #PTR_TABLE_SIZE-1,%d0
2114 mmu_get_ptr_table_entry %a0,%d0
2116 /* Calculate the offset into the page table
2117 */
2118 movel %a3,%d0
2119 moveq #PAGE_INDEX_SHIFT,%d1
2120 lsrl %d1,%d0
2121 andl #PAGE_TABLE_SIZE-1,%d0
2122 mmu_get_page_table_entry %a0,%d0
2124 /* The page table entry must not no be busy
2125 */
2126 tstl %a0@
2127 jne L(mmu_map_error)
2129 /* Do the mapping and advance the pointers
2130 */
2131 movel %a2,%a0@
2132 2:
2133 addw #PAGESIZE,%a2
2134 addw #PAGESIZE,%a3
2136 /* Ready with mapping?
2137 */
2138 lea %a3@(-1),%a0
2139 cmpl %a0,%a4
2140 jhi L(mmu_map_040)
2141 jra L(mmu_map_done)
2143 L(mmu_map_030):
2144 /* Calculate the offset into the root table
2145 */
2146 movel %a3,%d0
2147 moveq #ROOT_INDEX_SHIFT,%d1
2148 lsrl %d1,%d0
2149 mmu_get_root_table_entry %d0
2151 /* Check if logical address 32MB aligned,
2152 * so we can try to map it once
2153 */
2154 movel %a3,%d0
2155 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
2156 jne 1f
2158 /* Is there enough to map for 32MB at once
2159 */
2160 lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
2161 cmpl %a1,%a4
2162 jcs 1f
2164 addql #1,%a1
2166 /* The root table entry must not no be busy
2167 */
2168 tstl %a0@
2169 jne L(mmu_map_error)
2171 /* Do the mapping and advance the pointers
2172 */
2173 dputs "early term1"
2174 dputn %a2
2175 dputn %a3
2176 dputn %a1
2177 dputc '\n'
2178 movel %a2,%a0@
2180 movel %a1,%a3
2181 lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
2182 jra L(mmu_mapnext_030)
2183 1:
2184 /* Calculate the offset into the pointer table
2185 */
2186 movel %a3,%d0
2187 moveq #PTR_INDEX_SHIFT,%d1
2188 lsrl %d1,%d0
2189 andl #PTR_TABLE_SIZE-1,%d0
2190 mmu_get_ptr_table_entry %a0,%d0
2192 /* The pointer table entry must not no be busy
2193 */
2194 tstl %a0@
2195 jne L(mmu_map_error)
2197 /* Do the mapping and advance the pointers
2198 */
2199 dputs "early term2"
2200 dputn %a2
2201 dputn %a3
2202 dputc '\n'
2203 movel %a2,%a0@
2205 addl #PAGE_TABLE_SIZE*PAGESIZE,%a2
2206 addl #PAGE_TABLE_SIZE*PAGESIZE,%a3
2208 L(mmu_mapnext_030):
2209 /* Ready with mapping?
2210 */
2211 lea %a3@(-1),%a0
2212 cmpl %a0,%a4
2213 jhi L(mmu_map_030)
2214 jra L(mmu_map_done)
2216 L(mmu_map_error):
2218 dputs "mmu_map error:"
2219 dputn %a2
2220 dputn %a3
2221 dputc '\n'
2223 L(mmu_map_done):
2225 func_return mmu_map
2227 /*
2228 * mmu_fixup
2229 *
2230 * On the 040 class machines, all pages that are used for the
2231 * mmu have to be fixed up.
2232 */
2234 func_start mmu_fixup_page_mmu_cache,%d0/%a0
2236 dputs "mmu_fixup_page_mmu_cache"
2237 dputn ARG1
2239 /* Calculate the offset into the root table
2240 */
2241 movel ARG1,%d0
2242 moveq #ROOT_INDEX_SHIFT,%d1
2243 lsrl %d1,%d0
2244 mmu_get_root_table_entry %d0
2246 /* Calculate the offset into the pointer table
2247 */
2248 movel ARG1,%d0
2249 moveq #PTR_INDEX_SHIFT,%d1
2250 lsrl %d1,%d0
2251 andl #PTR_TABLE_SIZE-1,%d0
2252 mmu_get_ptr_table_entry %a0,%d0
2254 /* Calculate the offset into the page table
2255 */
2256 movel ARG1,%d0
2257 moveq #PAGE_INDEX_SHIFT,%d1
2258 lsrl %d1,%d0
2259 andl #PAGE_TABLE_SIZE-1,%d0
2260 mmu_get_page_table_entry %a0,%d0
2262 movel %a0@,%d0
2263 andil #_CACHEMASK040,%d0
2264 orl %pc@(m68k_pgtable_cachemode),%d0
2265 movel %d0,%a0@
2267 dputc '\n'
2269 func_return mmu_fixup_page_mmu_cache
2271 /*
2272 * mmu_temp_map
2273 *
2274 * create a temporary mapping to enable the mmu,
2275 * this we don't need any transparation translation tricks.
2276 */
2278 func_start mmu_temp_map,%d0/%d1/%a0/%a1
2280 dputs "mmu_temp_map"
2281 dputn ARG1
2282 dputn ARG2
2283 dputc '\n'
2285 lea %pc@(L(temp_mmap_mem)),%a1
2287 /* Calculate the offset in the root table
2288 */
2289 movel ARG2,%d0
2290 moveq #ROOT_INDEX_SHIFT,%d1
2291 lsrl %d1,%d0
2292 mmu_get_root_table_entry %d0
2294 /* Check if the table is temporary allocated, so we have to reuse it
2295 */
2296 movel %a0@,%d0
2297 cmpl %pc@(L(memory_start)),%d0
2298 jcc 1f
2300 /* Temporary allocate a ptr table and insert it into the root table
2301 */
2302 movel %a1@,%d0
2303 addl #PTR_TABLE_SIZE*4,%a1@
2304 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2305 movel %d0,%a0@
2306 dputs " (new)"
2307 1:
2308 dputn %d0
2309 /* Mask the root table entry for the ptr table
2310 */
2311 andw #-ROOT_TABLE_SIZE,%d0
2312 movel %d0,%a0
2314 /* Calculate the offset into the pointer table
2315 */
2316 movel ARG2,%d0
2317 moveq #PTR_INDEX_SHIFT,%d1
2318 lsrl %d1,%d0
2319 andl #PTR_TABLE_SIZE-1,%d0
2320 lea %a0@(%d0*4),%a0
2321 dputn %a0
2323 /* Check if a temporary page table is already allocated
2324 */
2325 movel %a0@,%d0
2326 jne 1f
2328 /* Temporary allocate a page table and insert it into the ptr table
2329 */
2330 movel %a1@,%d0
2331 /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
2332 alignment restriction for pointer tables on the '0[46]0. */
2333 addl #512,%a1@
2334 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2335 movel %d0,%a0@
2336 dputs " (new)"
2337 1:
2338 dputn %d0
2339 /* Mask the ptr table entry for the page table
2340 */
2341 andw #-PTR_TABLE_SIZE,%d0
2342 movel %d0,%a0
2344 /* Calculate the offset into the page table
2345 */
2346 movel ARG2,%d0
2347 moveq #PAGE_INDEX_SHIFT,%d1
2348 lsrl %d1,%d0
2349 andl #PAGE_TABLE_SIZE-1,%d0
2350 lea %a0@(%d0*4),%a0
2351 dputn %a0
2353 /* Insert the address into the page table
2354 */
2355 movel ARG1,%d0
2356 andw #-PAGESIZE,%d0
2357 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2358 movel %d0,%a0@
2359 dputn %d0
2361 dputc '\n'
2363 func_return mmu_temp_map
2365 func_start mmu_engage,%d0-%d2/%a0-%a3
2367 moveq #ROOT_TABLE_SIZE-1,%d0
2368 /* Temporarily use a different root table. */
2369 lea %pc@(L(kernel_pgdir_ptr)),%a0
2370 movel %a0@,%a2
2371 movel %pc@(L(memory_start)),%a1
2372 movel %a1,%a0@
2373 movel %a2,%a0
2374 1:
2375 movel %a0@+,%a1@+
2376 dbra %d0,1b
2378 lea %pc@(L(temp_mmap_mem)),%a0
2379 movel %a1,%a0@
2381 movew #PAGESIZE-1,%d0
2382 1:
2383 clrl %a1@+
2384 dbra %d0,1b
2386 lea %pc@(1b),%a0
2387 movel #1b,%a1
2388 /* Skip temp mappings if phys == virt */
2389 cmpl %a0,%a1
2390 jeq 1f
2392 mmu_temp_map %a0,%a0
2393 mmu_temp_map %a0,%a1
2395 addw #PAGESIZE,%a0
2396 addw #PAGESIZE,%a1
2397 mmu_temp_map %a0,%a0
2398 mmu_temp_map %a0,%a1
2399 1:
2400 movel %pc@(L(memory_start)),%a3
2401 movel %pc@(L(phys_kernel_start)),%d2
2403 is_not_040_or_060(L(mmu_engage_030))
2405 L(mmu_engage_040):
2406 .chip 68040
2407 nop
2408 cinva %bc
2409 nop
2410 pflusha
2411 nop
2412 movec %a3,%srp
2413 movel #TC_ENABLE+TC_PAGE4K,%d0
2414 movec %d0,%tc /* enable the MMU */
2415 jmp 1f:l
2416 1: nop
2417 movec %a2,%srp
2418 nop
2419 cinva %bc
2420 nop
2421 pflusha
2422 .chip 68k
2423 jra L(mmu_engage_cleanup)
2425 L(mmu_engage_030_temp):
2426 .space 12
2427 L(mmu_engage_030):
2428 .chip 68030
2429 lea %pc@(L(mmu_engage_030_temp)),%a0
2430 movel #0x80000002,%a0@
2431 movel %a3,%a0@(4)
2432 movel #0x0808,%d0
2433 movec %d0,%cacr
2434 pmove %a0@,%srp
2435 pflusha
2436 /*
2437 * enable,super root enable,4096 byte pages,7 bit root index,
2438 * 7 bit pointer index, 6 bit page table index.
2439 */
2440 movel #0x82c07760,%a0@(8)
2441 pmove %a0@(8),%tc /* enable the MMU */
2442 jmp 1f:l
2443 1: movel %a2,%a0@(4)
2444 movel #0x0808,%d0
2445 movec %d0,%cacr
2446 pmove %a0@,%srp
2447 pflusha
2448 .chip 68k
2450 L(mmu_engage_cleanup):
2451 subl #PAGE_OFFSET,%d2
2452 subl %d2,%a2
2453 movel %a2,L(kernel_pgdir_ptr)
2454 subl %d2,%fp
2455 subl %d2,%sp
2456 subl %d2,ARG0
2458 func_return mmu_engage
2460 func_start mmu_get_root_table_entry,%d0/%a1
2463 movel %pc@(L(kernel_pgdir_ptr)),%a0
2464 tstl %a0
2465 jne 2f
2467 dputs "\nmmu_init:"
2469 /* Find the start of free memory, get_bi_record does this for us,
2470 * as the bootinfo structure is located directly behind the kernel
2471 * and and we simply search for the last entry.
2472 */
2473 get_bi_record BI_LAST
2474 addw #PAGESIZE-1,%a0
2475 movel %a0,%d0
2476 andw #-PAGESIZE,%d0
2478 dputn %d0
2480 lea %pc@(L(memory_start)),%a0
2481 movel %d0,%a0@
2482 lea %pc@(L(kernel_end)),%a0
2483 movel %d0,%a0@
2485 /* we have to return the first page at _stext since the init code
2486 * in mm/init.c simply expects kernel_pg_dir there, the rest of
2487 * page is used for further ptr tables in get_ptr_table.
2488 */
2489 lea %pc@(_stext),%a0
2490 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2491 movel %a0,%a1@
2492 addl #ROOT_TABLE_SIZE*4,%a1@
2494 lea %pc@(L(mmu_num_pointer_tables)),%a1
2495 addql #1,%a1@
2497 /* clear the page
2498 */
2499 movel %a0,%a1
2500 movew #PAGESIZE/4-1,%d0
2501 1:
2502 clrl %a1@+
2503 dbra %d0,1b
2505 lea %pc@(L(kernel_pgdir_ptr)),%a1
2506 movel %a0,%a1@
2508 dputn %a0
2509 dputc '\n'
2510 2:
2511 movel ARG1,%d0
2512 lea %a0@(%d0*4),%a0
2515 func_return mmu_get_root_table_entry
2519 func_start mmu_get_ptr_table_entry,%d0/%a1
2522 movel ARG1,%a0
2523 movel %a0@,%d0
2524 jne 2f
2526 /* Keep track of the number of pointer tables we use
2527 */
2528 dputs "\nmmu_get_new_ptr_table:"
2529 lea %pc@(L(mmu_num_pointer_tables)),%a0
2530 movel %a0@,%d0
2531 addql #1,%a0@
2533 /* See if there is a free pointer table in our cache of pointer tables
2534 */
2535 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2536 andw #7,%d0
2537 jne 1f
2539 /* Get a new pointer table page from above the kernel memory
2540 */
2541 get_new_page
2542 movel %a0,%a1@
2543 1:
2544 /* There is an unused pointer table in our cache... use it
2545 */
2546 movel %a1@,%d0
2547 addl #PTR_TABLE_SIZE*4,%a1@
2549 dputn %d0
2550 dputc '\n'
2552 /* Insert the new pointer table into the root table
2553 */
2554 movel ARG1,%a0
2555 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2556 movel %d0,%a0@
2557 2:
2558 /* Extract the pointer table entry
2559 */
2560 andw #-PTR_TABLE_SIZE,%d0
2561 movel %d0,%a0
2562 movel ARG2,%d0
2563 lea %a0@(%d0*4),%a0
2566 func_return mmu_get_ptr_table_entry
2569 func_start mmu_get_page_table_entry,%d0/%a1
2572 movel ARG1,%a0
2573 movel %a0@,%d0
2574 jne 2f
2576 /* If the page table entry doesn't exist, we allocate a complete new
2577 * page and use it as one continues big page table which can cover
2578 * 4MB of memory, nearly almost all mappings have that alignment.
2579 */
2580 get_new_page
2581 addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0
2583 /* align pointer table entry for a page of page tables
2584 */
2585 movel ARG1,%d0
2586 andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0
2587 movel %d0,%a1
2589 /* Insert the page tables into the pointer entries
2590 */
2591 moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
2592 1:
2593 movel %a0,%a1@+
2594 lea %a0@(PAGE_TABLE_SIZE*4),%a0
2595 dbra %d0,1b
2597 /* Now we can get the initialized pointer table entry
2598 */
2599 movel ARG1,%a0
2600 movel %a0@,%d0
2601 2:
2602 /* Extract the page table entry
2603 */
2604 andw #-PAGE_TABLE_SIZE,%d0
2605 movel %d0,%a0
2606 movel ARG2,%d0
2607 lea %a0@(%d0*4),%a0
2610 func_return mmu_get_page_table_entry
2612 /*
2613 * get_new_page
2614 *
2615 * Return a new page from the memory start and clear it.
2616 */
2617 func_start get_new_page,%d0/%a1
2619 dputs "\nget_new_page:"
2621 /* allocate the page and adjust memory_start
2622 */
2623 lea %pc@(L(memory_start)),%a0
2624 movel %a0@,%a1
2625 addl #PAGESIZE,%a0@
2627 /* clear the new page
2628 */
2629 movel %a1,%a0
2630 movew #PAGESIZE/4-1,%d0
2631 1:
2632 clrl %a1@+
2633 dbra %d0,1b
2635 dputn %a0
2636 dputc '\n'
2638 func_return get_new_page
2642 /*
2643 * Debug output support
2644 * Atarians have a choice between the parallel port, the serial port
2645 * from the MFP or a serial port of the SCC
2646 */
2648 #ifdef CONFIG_MAC
2650 L(scc_initable_mac):
2651 .byte 9,12 /* Reset */
2652 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2653 .byte 3,0xc0 /* receiver: 8 bpc */
2654 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2655 .byte 9,0 /* no interrupts */
2656 .byte 10,0 /* NRZ */
2657 .byte 11,0x50 /* use baud rate generator */
2658 .byte 12,10,13,0 /* 9600 baud */
2659 .byte 14,1 /* Baud rate generator enable */
2660 .byte 3,0xc1 /* enable receiver */
2661 .byte 5,0xea /* enable transmitter */
2662 .byte -1
2663 .even
2664 #endif
2666 #ifdef CONFIG_ATARI
2667 /* #define USE_PRINTER */
2668 /* #define USE_SCC_B */
2669 /* #define USE_SCC_A */
2670 #define USE_MFP
2672 #if defined(USE_SCC_A) || defined(USE_SCC_B)
2673 #define USE_SCC
2674 /* Initialisation table for SCC */
2675 L(scc_initable):
2676 .byte 9,12 /* Reset */
2677 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2678 .byte 3,0xc0 /* receiver: 8 bpc */
2679 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2680 .byte 9,0 /* no interrupts */
2681 .byte 10,0 /* NRZ */
2682 .byte 11,0x50 /* use baud rate generator */
2683 .byte 12,24,13,0 /* 9600 baud */
2684 .byte 14,2,14,3 /* use master clock for BRG, enable */
2685 .byte 3,0xc1 /* enable receiver */
2686 .byte 5,0xea /* enable transmitter */
2687 .byte -1
2688 .even
2689 #endif
2691 #ifdef USE_PRINTER
2693 LPSG_SELECT = 0xff8800
2694 LPSG_READ = 0xff8800
2695 LPSG_WRITE = 0xff8802
2696 LPSG_IO_A = 14
2697 LPSG_IO_B = 15
2698 LPSG_CONTROL = 7
2699 LSTMFP_GPIP = 0xfffa01
2700 LSTMFP_DDR = 0xfffa05
2701 LSTMFP_IERB = 0xfffa09
2703 #elif defined(USE_SCC_B)
2705 LSCC_CTRL = 0xff8c85
2706 LSCC_DATA = 0xff8c87
2708 #elif defined(USE_SCC_A)
2710 LSCC_CTRL = 0xff8c81
2711 LSCC_DATA = 0xff8c83
2713 #elif defined(USE_MFP)
2715 LMFP_UCR = 0xfffa29
2716 LMFP_TDCDR = 0xfffa1d
2717 LMFP_TDDR = 0xfffa25
2718 LMFP_TSR = 0xfffa2d
2719 LMFP_UDR = 0xfffa2f
2721 #endif
2722 #endif /* CONFIG_ATARI */
2724 /*
2725 * Serial port output support.
2726 */
2728 /*
2729 * Initialize serial port hardware for 9600/8/1
2730 */
2731 func_start serial_init,%d0/%d1/%a0/%a1
2732 /*
2733 * Some of the register usage that follows
2734 * CONFIG_AMIGA
2735 * a0 = pointer to boot info record
2736 * d0 = boot info offset
2737 * CONFIG_ATARI
2738 * a0 = address of SCC
2739 * a1 = Liobase address/address of scc_initable
2740 * d0 = init data for serial port
2741 * CONFIG_MAC
2742 * a0 = address of SCC
2743 * a1 = address of scc_initable_mac
2744 * d0 = init data for serial port
2745 */
2747 #ifdef CONFIG_AMIGA
2748 #define SERIAL_DTR 7
2749 #define SERIAL_CNTRL CIABBASE+C_PRA
2751 is_not_amiga(1f)
2752 lea %pc@(L(custom)),%a0
2753 movel #-ZTWOBASE,%a0@
2754 bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
2755 get_bi_record BI_AMIGA_SERPER
2756 movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
2757 | movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE
2758 1:
2759 #endif
2760 #ifdef CONFIG_ATARI
2761 is_not_atari(4f)
2762 movel %pc@(L(iobase)),%a1
2763 #if defined(USE_PRINTER)
2764 bclr #0,%a1@(LSTMFP_IERB)
2765 bclr #0,%a1@(LSTMFP_DDR)
2766 moveb #LPSG_CONTROL,%a1@(LPSG_SELECT)
2767 moveb #0xff,%a1@(LPSG_WRITE)
2768 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
2769 clrb %a1@(LPSG_WRITE)
2770 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
2771 moveb %a1@(LPSG_READ),%d0
2772 bset #5,%d0
2773 moveb %d0,%a1@(LPSG_WRITE)
2774 #elif defined(USE_SCC)
2775 lea %a1@(LSCC_CTRL),%a0
2776 lea %pc@(L(scc_initable)),%a1
2777 2: moveb %a1@+,%d0
2778 jmi 3f
2779 moveb %d0,%a0@
2780 moveb %a1@+,%a0@
2781 jra 2b
2782 3: clrb %a0@
2783 #elif defined(USE_MFP)
2784 bclr #1,%a1@(LMFP_TSR)
2785 moveb #0x88,%a1@(LMFP_UCR)
2786 andb #0x70,%a1@(LMFP_TDCDR)
2787 moveb #2,%a1@(LMFP_TDDR)
2788 orb #1,%a1@(LMFP_TDCDR)
2789 bset #1,%a1@(LMFP_TSR)
2790 #endif
2791 jra L(serial_init_done)
2792 4:
2793 #endif
2794 #ifdef CONFIG_MAC
2795 is_not_mac(L(serial_init_not_mac))
2796 #ifdef MAC_SERIAL_DEBUG
2797 #if !defined(MAC_USE_SCC_A) && !defined(MAC_USE_SCC_B)
2798 #define MAC_USE_SCC_B
2799 #endif
2800 #define mac_scc_cha_b_ctrl_offset 0x0
2801 #define mac_scc_cha_a_ctrl_offset 0x2
2802 #define mac_scc_cha_b_data_offset 0x4
2803 #define mac_scc_cha_a_data_offset 0x6
2805 #ifdef MAC_USE_SCC_A
2806 /* Initialize channel A */
2807 movel %pc@(L(mac_sccbase)),%a0
2808 lea %pc@(L(scc_initable_mac)),%a1
2809 5: moveb %a1@+,%d0
2810 jmi 6f
2811 moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset)
2812 moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
2813 jra 5b
2814 6:
2815 #endif /* MAC_USE_SCC_A */
2817 #ifdef MAC_USE_SCC_B
2818 /* Initialize channel B */
2819 #ifndef MAC_USE_SCC_A /* Load mac_sccbase only if needed */
2820 movel %pc@(L(mac_sccbase)),%a0
2821 #endif /* MAC_USE_SCC_A */
2822 lea %pc@(L(scc_initable_mac)),%a1
2823 7: moveb %a1@+,%d0
2824 jmi 8f
2825 moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset)
2826 moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
2827 jra 7b
2828 8:
2829 #endif /* MAC_USE_SCC_B */
2830 #endif /* MAC_SERIAL_DEBUG */
2832 jra L(serial_init_done)
2833 L(serial_init_not_mac):
2834 #endif /* CONFIG_MAC */
2836 #ifdef CONFIG_Q40
2837 is_not_q40(2f)
2838 /* debug output goes into SRAM, so we don't do it unless requested
2839 - check for '%LX$' signature in SRAM */
2840 lea %pc@(q40_mem_cptr),%a1
2841 move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */
2842 move.l #0xff020000,%a1
2843 cmp.b #'%',%a1@
2844 bne 2f /*nodbg*/
2845 addq.w #4,%a1
2846 cmp.b #'L',%a1@
2847 bne 2f /*nodbg*/
2848 addq.w #4,%a1
2849 cmp.b #'X',%a1@
2850 bne 2f /*nodbg*/
2851 addq.w #4,%a1
2852 cmp.b #'$',%a1@
2853 bne 2f /*nodbg*/
2854 /* signature OK */
2855 lea %pc@(L(q40_do_debug)),%a1
2856 tas %a1@
2857 /*nodbg: q40_do_debug is 0 by default*/
2858 2:
2859 #endif
2861 #ifdef CONFIG_APOLLO
2862 /* We count on the PROM initializing SIO1 */
2863 #endif
2865 #ifdef CONFIG_HP300
2866 /* We count on the boot loader initialising the UART */
2867 #endif
2869 L(serial_init_done):
2870 func_return serial_init
2872 /*
2873 * Output character on serial port.
2874 */
2875 func_start serial_putc,%d0/%d1/%a0/%a1
2877 movel ARG1,%d0
2878 cmpib #'\n',%d0
2879 jbne 1f
2881 /* A little safe recursion is good for the soul */
2882 serial_putc #'\r'
2883 1:
2885 #ifdef CONFIG_AMIGA
2886 is_not_amiga(2f)
2887 andw #0x00ff,%d0
2888 oriw #0x0100,%d0
2889 movel %pc@(L(custom)),%a0
2890 movew %d0,%a0@(CUSTOMBASE+C_SERDAT)
2891 1: movew %a0@(CUSTOMBASE+C_SERDATR),%d0
2892 andw #0x2000,%d0
2893 jeq 1b
2894 jra L(serial_putc_done)
2895 2:
2896 #endif
2898 #ifdef CONFIG_MAC
2899 is_not_mac(5f)
2901 #ifdef MAC_SERIAL_DEBUG
2903 #ifdef MAC_USE_SCC_A
2904 movel %pc@(L(mac_sccbase)),%a1
2905 3: btst #2,%a1@(mac_scc_cha_a_ctrl_offset)
2906 jeq 3b
2907 moveb %d0,%a1@(mac_scc_cha_a_data_offset)
2908 #endif /* MAC_USE_SCC_A */
2910 #ifdef MAC_USE_SCC_B
2911 #ifndef MAC_USE_SCC_A /* Load mac_sccbase only if needed */
2912 movel %pc@(L(mac_sccbase)),%a1
2913 #endif /* MAC_USE_SCC_A */
2914 4: btst #2,%a1@(mac_scc_cha_b_ctrl_offset)
2915 jeq 4b
2916 moveb %d0,%a1@(mac_scc_cha_b_data_offset)
2917 #endif /* MAC_USE_SCC_B */
2919 #endif /* MAC_SERIAL_DEBUG */
2921 jra L(serial_putc_done)
2922 5:
2923 #endif /* CONFIG_MAC */
2925 #ifdef CONFIG_ATARI
2926 is_not_atari(4f)
2927 movel %pc@(L(iobase)),%a1
2928 #if defined(USE_PRINTER)
2929 3: btst #0,%a1@(LSTMFP_GPIP)
2930 jne 3b
2931 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
2932 moveb %d0,%a1@(LPSG_WRITE)
2933 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
2934 moveb %a1@(LPSG_READ),%d0
2935 bclr #5,%d0
2936 moveb %d0,%a1@(LPSG_WRITE)
2937 nop
2938 nop
2939 bset #5,%d0
2940 moveb %d0,%a1@(LPSG_WRITE)
2941 #elif defined(USE_SCC)
2942 3: btst #2,%a1@(LSCC_CTRL)
2943 jeq 3b
2944 moveb %d0,%a1@(LSCC_DATA)
2945 #elif defined(USE_MFP)
2946 3: btst #7,%a1@(LMFP_TSR)
2947 jeq 3b
2948 moveb %d0,%a1@(LMFP_UDR)
2949 #endif
2950 jra L(serial_putc_done)
2951 4:
2952 #endif /* CONFIG_ATARI */
2954 #ifdef CONFIG_MVME147
2955 is_not_mvme147(2f)
2956 1: btst #2,M147_SCC_CTRL_A
2957 jeq 1b
2958 moveb %d0,M147_SCC_DATA_A
2959 jbra L(serial_putc_done)
2960 2:
2961 #endif
2963 #ifdef CONFIG_MVME16x
2964 is_not_mvme16x(2f)
2965 /*
2966 * If the loader gave us a board type then we can use that to
2967 * select an appropriate output routine; otherwise we just use
2968 * the Bug code. If we haev to use the Bug that means the Bug
2969 * workspace has to be valid, which means the Bug has to use
2970 * the SRAM, which is non-standard.
2971 */
2972 moveml %d0-%d7/%a2-%a6,%sp@-
2973 movel vme_brdtype,%d1
2974 jeq 1f | No tag - use the Bug
2975 cmpi #VME_TYPE_MVME162,%d1
2976 jeq 6f
2977 cmpi #VME_TYPE_MVME172,%d1
2978 jne 5f
2979 /* 162/172; it's an SCC */
2980 6: btst #2,M162_SCC_CTRL_A
2981 nop
2982 nop
2983 nop
2984 jeq 6b
2985 moveb #8,M162_SCC_CTRL_A
2986 nop
2987 nop
2988 nop
2989 moveb %d0,M162_SCC_CTRL_A
2990 jra 3f
2991 5:
2992 /* 166/167/177; it's a CD2401 */
2993 moveb #0,M167_CYCAR
2994 moveb M167_CYIER,%d2
2995 moveb #0x02,M167_CYIER
2996 7:
2997 btst #5,M167_PCSCCTICR
2998 jeq 7b
2999 moveb M167_PCTPIACKR,%d1
3000 moveb M167_CYLICR,%d1
3001 jeq 8f
3002 moveb #0x08,M167_CYTEOIR
3003 jra 7b
3004 8:
3005 moveb %d0,M167_CYTDR
3006 moveb #0,M167_CYTEOIR
3007 moveb %d2,M167_CYIER
3008 jra 3f
3009 1:
3010 moveb %d0,%sp@-
3011 trap #15
3012 .word 0x0020 /* TRAP 0x020 */
3013 3:
3014 moveml %sp@+,%d0-%d7/%a2-%a6
3015 jbra L(serial_putc_done)
3016 2:
3017 #endif /* CONFIG_MVME16x */
3019 #ifdef CONFIG_BVME6000
3020 is_not_bvme6000(2f)
3021 /*
3022 * The BVME6000 machine has a serial port ...
3023 */
3024 1: btst #2,BVME_SCC_CTRL_A
3025 jeq 1b
3026 moveb %d0,BVME_SCC_DATA_A
3027 jbra L(serial_putc_done)
3028 2:
3029 #endif
3031 #ifdef CONFIG_SUN3X
3032 is_not_sun3x(2f)
3033 movel %d0,-(%sp)
3034 movel 0xFEFE0018,%a1
3035 jbsr (%a1)
3036 addq #4,%sp
3037 jbra L(serial_putc_done)
3038 2:
3039 #endif
3041 #ifdef CONFIG_Q40
3042 is_not_q40(2f)
3043 tst.l %pc@(L(q40_do_debug)) /* only debug if requested */
3044 beq 2f
3045 lea %pc@(q40_mem_cptr),%a1
3046 move.l %a1@,%a0
3047 move.b %d0,%a0@
3048 addq.l #4,%a0
3049 move.l %a0,%a1@
3050 jbra L(serial_putc_done)
3051 2:
3052 #endif
3054 #ifdef CONFIG_APOLLO
3055 is_not_apollo(2f)
3056 movl %pc@(L(iobase)),%a1
3057 moveb %d0,%a1@(LTHRB0)
3058 1: moveb %a1@(LSRB0),%d0
3059 andb #0x4,%d0
3060 beq 1b
3061 jbra L(serial_putc_done)
3062 2:
3063 #endif
3065 #ifdef CONFIG_HP300
3066 is_not_hp300(3f)
3067 movl %pc@(L(iobase)),%a1
3068 addl %pc@(L(uartbase)),%a1
3069 movel %pc@(L(uart_scode)),%d1 /* Check the scode */
3070 jmi 3f /* Unset? Exit */
3071 cmpi #256,%d1 /* APCI scode? */
3072 jeq 2f
3073 1: moveb %a1@(DCALSR),%d1 /* Output to DCA */
3074 andb #0x20,%d1
3075 beq 1b
3076 moveb %d0,%a1@(DCADATA)
3077 jbra L(serial_putc_done)
3078 2: moveb %a1@(APCILSR),%d1 /* Output to APCI */
3079 andb #0x20,%d1
3080 beq 2b
3081 moveb %d0,%a1@(APCIDATA)
3082 jbra L(serial_putc_done)
3083 3:
3084 #endif
3086 L(serial_putc_done):
3087 func_return serial_putc
3089 /*
3090 * Output a string.
3091 */
3092 func_start puts,%d0/%a0
3094 movel ARG1,%a0
3095 jra 2f
3096 1:
3097 #ifdef CONSOLE
3098 console_putc %d0
3099 #endif
3100 #ifdef SERIAL_DEBUG
3101 serial_putc %d0
3102 #endif
3103 2: moveb %a0@+,%d0
3104 jne 1b
3106 func_return puts
3108 /*
3109 * Output number in hex notation.
3110 */
3112 func_start putn,%d0-%d2
3114 putc ' '
3116 movel ARG1,%d0
3117 moveq #7,%d1
3118 1: roll #4,%d0
3119 move %d0,%d2
3120 andb #0x0f,%d2
3121 addb #'0',%d2
3122 cmpb #'9',%d2
3123 jls 2f
3124 addb #'A'-('9'+1),%d2
3125 2:
3126 #ifdef CONSOLE
3127 console_putc %d2
3128 #endif
3129 #ifdef SERIAL_DEBUG
3130 serial_putc %d2
3131 #endif
3132 dbra %d1,1b
3134 func_return putn
3136 #ifdef CONFIG_MAC
3137 /*
3138 * mac_serial_print
3139 *
3140 * This routine takes its parameters on the stack. It then
3141 * turns around and calls the internal routine. This routine
3142 * is used until the Linux console driver initializes itself.
3143 *
3144 * The calling parameters are:
3145 * void mac_serial_print(const char *str);
3146 *
3147 * This routine does NOT understand variable arguments only
3148 * simple strings!
3149 */
3150 ENTRY(mac_serial_print)
3151 moveml %d0/%a0,%sp@-
3152 move %sr,%sp@-
3153 ori #0x0700,%sr
3154 movel %sp@(10),%a0 /* fetch parameter */
3155 jra 2f
3156 1: serial_putc %d0
3157 2: moveb %a0@+,%d0
3158 jne 1b
3159 move %sp@+,%sr
3160 moveml %sp@+,%d0/%a0
3161 rts
3162 #endif /* CONFIG_MAC */
3164 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3165 func_start set_leds,%d0/%a0
3166 movel ARG1,%d0
3167 #ifdef CONFIG_HP300
3168 is_not_hp300(1f)
3169 movel %pc@(L(iobase)),%a0
3170 moveb %d0,%a0@(0x1ffff)
3171 jra 2f
3172 #endif
3173 1:
3174 #ifdef CONFIG_APOLLO
3175 movel %pc@(L(iobase)),%a0
3176 lsll #8,%d0
3177 eorw #0xff00,%d0
3178 moveb %d0,%a0@(LCPUCTRL)
3179 #endif
3180 2:
3181 func_return set_leds
3182 #endif
3184 #ifdef CONSOLE
3185 /*
3186 * For continuity, see the data alignment
3187 * to which this structure is tied.
3188 */
3189 #define Lconsole_struct_cur_column 0
3190 #define Lconsole_struct_cur_row 4
3191 #define Lconsole_struct_num_columns 8
3192 #define Lconsole_struct_num_rows 12
3193 #define Lconsole_struct_left_edge 16
3194 #define Lconsole_struct_penguin_putc 20
3196 func_start console_init,%a0-%a4/%d0-%d7
3197 /*
3198 * Some of the register usage that follows
3199 * a0 = pointer to boot_info
3200 * a1 = pointer to screen
3201 * a2 = pointer to Lconsole_globals
3202 * d3 = pixel width of screen
3203 * d4 = pixel height of screen
3204 * (d3,d4) ~= (x,y) of a point just below
3205 * and to the right of the screen
3206 * NOT on the screen!
3207 * d5 = number of bytes per scan line
3208 * d6 = number of bytes on the entire screen
3209 */
3211 lea %pc@(L(console_globals)),%a2
3212 movel %pc@(L(mac_videobase)),%a1
3213 movel %pc@(L(mac_rowbytes)),%d5
3214 movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */
3215 movel %d3,%d4
3216 swap %d4 /* -> high byte */
3217 andl #0xffff,%d3 /* d3 = screen width in pixels */
3218 andl #0xffff,%d4 /* d4 = screen height in pixels */
3220 movel %d5,%d6
3221 | subl #20,%d6
3222 mulul %d4,%d6 /* scan line bytes x num scan lines */
3223 divul #8,%d6 /* we'll clear 8 bytes at a time */
3224 moveq #-1,%d0 /* Mac_black */
3225 subq #1,%d6
3227 L(console_clear_loop):
3228 movel %d0,%a1@+
3229 movel %d0,%a1@+
3230 dbra %d6,L(console_clear_loop)
3232 /* Calculate font size */
3234 #if defined(FONT_8x8) && defined(CONFIG_FONT_8x8)
3235 lea %pc@(font_vga_8x8),%a0
3236 #elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16)
3237 lea %pc@(font_vga_8x16),%a0
3238 #elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11)
3239 lea %pc@(font_vga_6x11),%a0
3240 #elif defined(CONFIG_FONT_8x8) /* default */
3241 lea %pc@(font_vga_8x8),%a0
3242 #else /* no compiled-in font */
3243 lea 0,%a0
3244 #endif
3246 /*
3247 * At this point we make a shift in register usage
3248 * a1 = address of console_font pointer
3249 */
3250 lea %pc@(L(console_font)),%a1
3251 movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */
3252 tstl %a0
3253 jeq 1f
3254 lea %pc@(L(console_font_data)),%a4
3255 movel %a0@(FONT_DESC_DATA),%d0
3256 subl #L(console_font),%a1
3257 addl %a1,%d0
3258 movel %d0,%a4@
3260 /*
3261 * Calculate global maxs
3262 * Note - we can use either an
3263 * 8 x 16 or 8 x 8 character font
3264 * 6 x 11 also supported
3265 */
3266 /* ASSERT: a0 = contents of Lconsole_font */
3267 movel %d3,%d0 /* screen width in pixels */
3268 divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */
3270 movel %d4,%d1 /* screen height in pixels */
3271 divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */
3273 movel %d0,%a2@(Lconsole_struct_num_columns)
3274 movel %d1,%a2@(Lconsole_struct_num_rows)
3276 /*
3277 * Clear the current row and column
3278 */
3279 clrl %a2@(Lconsole_struct_cur_column)
3280 clrl %a2@(Lconsole_struct_cur_row)
3281 clrl %a2@(Lconsole_struct_left_edge)
3283 /*
3284 * Initialization is complete
3285 */
3286 1:
3287 func_return console_init
3289 func_start console_put_stats,%a0/%d7
3290 /*
3291 * Some of the register usage that follows
3292 * a0 = pointer to boot_info
3293 * d7 = value of boot_info fields
3294 */
3295 puts "\nMacLinux\n\n"
3297 #ifdef SERIAL_DEBUG
3298 puts " vidaddr:"
3299 putn %pc@(L(mac_videobase)) /* video addr. */
3301 puts "\n _stext:"
3302 lea %pc@(_stext),%a0
3303 putn %a0
3305 puts "\nbootinfo:"
3306 lea %pc@(_end),%a0
3307 putn %a0
3309 puts "\ncpuid:"
3310 putn %pc@(L(cputype))
3311 putc '\n'
3313 #ifdef MAC_SERIAL_DEBUG
3314 putn %pc@(L(mac_sccbase))
3315 putc '\n'
3316 #endif
3317 # if defined(MMU_PRINT)
3318 jbsr mmu_print_machine_cpu_types
3319 # endif /* MMU_PRINT */
3320 #endif /* SERIAL_DEBUG */
3322 func_return console_put_stats
3324 #ifdef CONSOLE_PENGUIN
3325 func_start console_put_penguin,%a0-%a1/%d0-%d7
3326 /*
3327 * Get 'that_penguin' onto the screen in the upper right corner
3328 * penguin is 64 x 74 pixels, align against right edge of screen
3329 */
3330 lea %pc@(L(mac_dimensions)),%a0
3331 movel %a0@,%d0
3332 andil #0xffff,%d0
3333 subil #64,%d0 /* snug up against the right edge */
3334 clrl %d1 /* start at the top */
3335 movel #73,%d7
3336 lea %pc@(L(that_penguin)),%a1
3337 L(console_penguin_row):
3338 movel #31,%d6
3339 L(console_penguin_pixel_pair):
3340 moveb %a1@,%d2
3341 lsrb #4,%d2
3342 console_plot_pixel %d0,%d1,%d2
3343 addq #1,%d0
3344 moveb %a1@+,%d2
3345 console_plot_pixel %d0,%d1,%d2
3346 addq #1,%d0
3347 dbra %d6,L(console_penguin_pixel_pair)
3349 subil #64,%d0
3350 addq #1,%d1
3351 dbra %d7,L(console_penguin_row)
3353 func_return console_put_penguin
3355 /* include penguin bitmap */
3356 L(that_penguin):
3357 #include "../mac/mac_penguin.S"
3358 #endif
3360 /*
3361 * Calculate source and destination addresses
3362 * output a1 = dest
3363 * a2 = source
3364 */
3366 func_start console_scroll,%a0-%a4/%d0-%d7
3367 lea %pc@(L(mac_videobase)),%a0
3368 movel %a0@,%a1
3369 movel %a1,%a2
3370 lea %pc@(L(mac_rowbytes)),%a0
3371 movel %a0@,%d5
3372 movel %pc@(L(console_font)),%a0
3373 tstl %a0
3374 jeq 1f
3375 mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */
3376 addal %d5,%a2
3378 /*
3379 * Get dimensions
3380 */
3381 lea %pc@(L(mac_dimensions)),%a0
3382 movel %a0@,%d3
3383 movel %d3,%d4
3384 swap %d4
3385 andl #0xffff,%d3 /* d3 = screen width in pixels */
3386 andl #0xffff,%d4 /* d4 = screen height in pixels */
3388 /*
3389 * Calculate number of bytes to move
3390 */
3391 lea %pc@(L(mac_rowbytes)),%a0
3392 movel %a0@,%d6
3393 movel %pc@(L(console_font)),%a0
3394 subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */
3395 mulul %d4,%d6 /* scan line bytes x num scan lines */
3396 divul #32,%d6 /* we'll move 8 longs at a time */
3397 subq #1,%d6
3399 L(console_scroll_loop):
3400 movel %a2@+,%a1@+
3401 movel %a2@+,%a1@+
3402 movel %a2@+,%a1@+
3403 movel %a2@+,%a1@+
3404 movel %a2@+,%a1@+
3405 movel %a2@+,%a1@+
3406 movel %a2@+,%a1@+
3407 movel %a2@+,%a1@+
3408 dbra %d6,L(console_scroll_loop)
3410 lea %pc@(L(mac_rowbytes)),%a0
3411 movel %a0@,%d6
3412 movel %pc@(L(console_font)),%a0
3413 mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */
3414 divul #32,%d6 /* we'll move 8 words at a time */
3415 subq #1,%d6
3417 moveq #-1,%d0
3418 L(console_scroll_clear_loop):
3419 movel %d0,%a1@+
3420 movel %d0,%a1@+
3421 movel %d0,%a1@+
3422 movel %d0,%a1@+
3423 movel %d0,%a1@+
3424 movel %d0,%a1@+
3425 movel %d0,%a1@+
3426 movel %d0,%a1@+
3427 dbra %d6,L(console_scroll_clear_loop)
3429 1:
3430 func_return console_scroll
3433 func_start console_putc,%a0/%a1/%d0-%d7
3435 is_not_mac(L(console_exit))
3436 tstl %pc@(L(console_font))
3437 jeq L(console_exit)
3439 /* Output character in d7 on console.
3440 */
3441 movel ARG1,%d7
3442 cmpib #'\n',%d7
3443 jbne 1f
3445 /* A little safe recursion is good for the soul */
3446 console_putc #'\r'
3447 1:
3448 lea %pc@(L(console_globals)),%a0
3450 cmpib #10,%d7
3451 jne L(console_not_lf)
3452 movel %a0@(Lconsole_struct_cur_row),%d0
3453 addil #1,%d0
3454 movel %d0,%a0@(Lconsole_struct_cur_row)
3455 movel %a0@(Lconsole_struct_num_rows),%d1
3456 cmpl %d1,%d0
3457 jcs 1f
3458 subil #1,%d0
3459 movel %d0,%a0@(Lconsole_struct_cur_row)
3460 console_scroll
3461 1:
3462 jra L(console_exit)
3464 L(console_not_lf):
3465 cmpib #13,%d7
3466 jne L(console_not_cr)
3467 clrl %a0@(Lconsole_struct_cur_column)
3468 jra L(console_exit)
3470 L(console_not_cr):
3471 cmpib #1,%d7
3472 jne L(console_not_home)
3473 clrl %a0@(Lconsole_struct_cur_row)
3474 clrl %a0@(Lconsole_struct_cur_column)
3475 jra L(console_exit)
3477 /*
3478 * At this point we know that the %d7 character is going to be
3479 * rendered on the screen. Register usage is -
3480 * a0 = pointer to console globals
3481 * a1 = font data
3482 * d0 = cursor column
3483 * d1 = cursor row to draw the character
3484 * d7 = character number
3485 */
3486 L(console_not_home):
3487 movel %a0@(Lconsole_struct_cur_column),%d0
3488 addql #1,%a0@(Lconsole_struct_cur_column)
3489 movel %a0@(Lconsole_struct_num_columns),%d1
3490 cmpl %d1,%d0
3491 jcs 1f
3492 console_putc #'\n' /* recursion is OK! */
3493 1:
3494 movel %a0@(Lconsole_struct_cur_row),%d1
3496 /*
3497 * At this point we make a shift in register usage
3498 * a0 = address of pointer to font data (fbcon_font_desc)
3499 */
3500 movel %pc@(L(console_font)),%a0
3501 movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */
3502 andl #0x000000ff,%d7
3503 /* ASSERT: a0 = contents of Lconsole_font */
3504 mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */
3505 addl %d7,%a1 /* a1 = points to char image */
3507 /*
3508 * At this point we make a shift in register usage
3509 * d0 = pixel coordinate, x
3510 * d1 = pixel coordinate, y
3511 * d2 = (bit 0) 1/0 for white/black (!) pixel on screen
3512 * d3 = font scan line data (8 pixels)
3513 * d6 = count down for the font's pixel width (8)
3514 * d7 = count down for the font's pixel count in height
3515 */
3516 /* ASSERT: a0 = contents of Lconsole_font */
3517 mulul %a0@(FONT_DESC_WIDTH),%d0
3518 mulul %a0@(FONT_DESC_HEIGHT),%d1
3519 movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */
3520 subq #1,%d7
3521 L(console_read_char_scanline):
3522 moveb %a1@+,%d3
3524 /* ASSERT: a0 = contents of Lconsole_font */
3525 movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */
3526 subql #1,%d6
3528 L(console_do_font_scanline):
3529 lslb #1,%d3
3530 scsb %d2 /* convert 1 bit into a byte */
3531 console_plot_pixel %d0,%d1,%d2
3532 addq #1,%d0
3533 dbra %d6,L(console_do_font_scanline)
3535 /* ASSERT: a0 = contents of Lconsole_font */
3536 subl %a0@(FONT_DESC_WIDTH),%d0
3537 addq #1,%d1
3538 dbra %d7,L(console_read_char_scanline)
3540 L(console_exit):
3541 func_return console_putc
3543 /*
3544 * Input:
3545 * d0 = x coordinate
3546 * d1 = y coordinate
3547 * d2 = (bit 0) 1/0 for white/black (!)
3548 * All registers are preserved
3549 */
3550 func_start console_plot_pixel,%a0-%a1/%d0-%d4
3552 movel %pc@(L(mac_videobase)),%a1
3553 movel %pc@(L(mac_videodepth)),%d3
3554 movel ARG1,%d0
3555 movel ARG2,%d1
3556 mulul %pc@(L(mac_rowbytes)),%d1
3557 movel ARG3,%d2
3559 /*
3560 * Register usage:
3561 * d0 = x coord becomes byte offset into frame buffer
3562 * d1 = y coord
3563 * d2 = black or white (0/1)
3564 * d3 = video depth
3565 * d4 = temp of x (d0) for many bit depths
3566 */
3567 L(test_1bit):
3568 cmpb #1,%d3
3569 jbne L(test_2bit)
3570 movel %d0,%d4 /* we need the low order 3 bits! */
3571 divul #8,%d0
3572 addal %d0,%a1
3573 addal %d1,%a1
3574 andb #7,%d4
3575 eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */
3576 andb #1,%d2
3577 jbne L(white_1)
3578 bsetb %d4,%a1@
3579 jbra L(console_plot_pixel_exit)
3580 L(white_1):
3581 bclrb %d4,%a1@
3582 jbra L(console_plot_pixel_exit)
3584 L(test_2bit):
3585 cmpb #2,%d3
3586 jbne L(test_4bit)
3587 movel %d0,%d4 /* we need the low order 2 bits! */
3588 divul #4,%d0
3589 addal %d0,%a1
3590 addal %d1,%a1
3591 andb #3,%d4
3592 eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */
3593 lsll #1,%d4 /* ! */
3594 andb #1,%d2
3595 jbne L(white_2)
3596 bsetb %d4,%a1@
3597 addq #1,%d4
3598 bsetb %d4,%a1@
3599 jbra L(console_plot_pixel_exit)
3600 L(white_2):
3601 bclrb %d4,%a1@
3602 addq #1,%d4
3603 bclrb %d4,%a1@
3604 jbra L(console_plot_pixel_exit)
3606 L(test_4bit):
3607 cmpb #4,%d3
3608 jbne L(test_8bit)
3609 movel %d0,%d4 /* we need the low order bit! */
3610 divul #2,%d0
3611 addal %d0,%a1
3612 addal %d1,%a1
3613 andb #1,%d4
3614 eorb #1,%d4
3615 lsll #2,%d4 /* ! */
3616 andb #1,%d2
3617 jbne L(white_4)
3618 bsetb %d4,%a1@
3619 addq #1,%d4
3620 bsetb %d4,%a1@
3621 addq #1,%d4
3622 bsetb %d4,%a1@
3623 addq #1,%d4
3624 bsetb %d4,%a1@
3625 jbra L(console_plot_pixel_exit)
3626 L(white_4):
3627 bclrb %d4,%a1@
3628 addq #1,%d4
3629 bclrb %d4,%a1@
3630 addq #1,%d4
3631 bclrb %d4,%a1@
3632 addq #1,%d4
3633 bclrb %d4,%a1@
3634 jbra L(console_plot_pixel_exit)
3636 L(test_8bit):
3637 cmpb #8,%d3
3638 jbne L(test_16bit)
3639 addal %d0,%a1
3640 addal %d1,%a1
3641 andb #1,%d2
3642 jbne L(white_8)
3643 moveb #0xff,%a1@
3644 jbra L(console_plot_pixel_exit)
3645 L(white_8):
3646 clrb %a1@
3647 jbra L(console_plot_pixel_exit)
3649 L(test_16bit):
3650 cmpb #16,%d3
3651 jbne L(console_plot_pixel_exit)
3652 addal %d0,%a1
3653 addal %d0,%a1
3654 addal %d1,%a1
3655 andb #1,%d2
3656 jbne L(white_16)
3657 clrw %a1@
3658 jbra L(console_plot_pixel_exit)
3659 L(white_16):
3660 movew #0x0fff,%a1@
3661 jbra L(console_plot_pixel_exit)
3663 L(console_plot_pixel_exit):
3664 func_return console_plot_pixel
3665 #endif /* CONSOLE */
3668 __INITDATA
3669 .align 4
3671 #if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || defined(CONFIG_HP300) || \
3672 defined(CONFIG_APOLLO)
3673 L(custom):
3674 L(iobase):
3675 .long 0
3676 #endif
3678 #if defined(CONSOLE)
3679 L(console_globals):
3680 .long 0 /* cursor column */
3681 .long 0 /* cursor row */
3682 .long 0 /* max num columns */
3683 .long 0 /* max num rows */
3684 .long 0 /* left edge */
3685 .long 0 /* mac putc */
3686 L(console_font):
3687 .long 0 /* pointer to console font (struct font_desc) */
3688 L(console_font_data):
3689 .long 0 /* pointer to console font data */
3690 #endif /* CONSOLE */
3692 #if defined(MMU_PRINT)
3693 L(mmu_print_data):
3694 .long 0 /* valid flag */
3695 .long 0 /* start logical */
3696 .long 0 /* next logical */
3697 .long 0 /* start physical */
3698 .long 0 /* next physical */
3699 #endif /* MMU_PRINT */
3701 L(cputype):
3702 .long 0
3703 L(mmu_cached_pointer_tables):
3704 .long 0
3705 L(mmu_num_pointer_tables):
3706 .long 0
3707 L(phys_kernel_start):
3708 .long 0
3709 L(kernel_end):
3710 .long 0
3711 L(memory_start):
3712 .long 0
3713 L(kernel_pgdir_ptr):
3714 .long 0
3715 L(temp_mmap_mem):
3716 .long 0
3718 #if defined(CONFIG_MVME147)
3719 M147_SCC_CTRL_A = 0xfffe3002
3720 M147_SCC_DATA_A = 0xfffe3003
3721 #endif
3723 #if defined(CONFIG_MVME16x)
3724 M162_SCC_CTRL_A = 0xfff45005
3725 M167_CYCAR = 0xfff450ee
3726 M167_CYIER = 0xfff45011
3727 M167_CYLICR = 0xfff45026
3728 M167_CYTEOIR = 0xfff45085
3729 M167_CYTDR = 0xfff450f8
3730 M167_PCSCCTICR = 0xfff4201e
3731 M167_PCTPIACKR = 0xfff42025
3732 #endif
3734 #if defined(CONFIG_BVME6000)
3735 BVME_SCC_CTRL_A = 0xffb0000b
3736 BVME_SCC_DATA_A = 0xffb0000f
3737 #endif
3739 #if defined(CONFIG_MAC)
3740 L(mac_booter_data):
3741 .long 0
3742 L(mac_videobase):
3743 .long 0
3744 L(mac_videodepth):
3745 .long 0
3746 L(mac_dimensions):
3747 .long 0
3748 L(mac_rowbytes):
3749 .long 0
3750 #ifdef MAC_SERIAL_DEBUG
3751 L(mac_sccbase):
3752 .long 0
3753 #endif /* MAC_SERIAL_DEBUG */
3754 #endif
3756 #if defined(CONFIG_APOLLO)
3757 LSRB0 = 0x10412
3758 LTHRB0 = 0x10416
3759 LCPUCTRL = 0x10100
3760 #endif
3762 #if defined(CONFIG_HP300)
3763 DCADATA = 0x11
3764 DCALSR = 0x1b
3765 APCIDATA = 0x00
3766 APCILSR = 0x14
3767 L(uartbase):
3768 .long 0
3769 L(uart_scode):
3770 .long -1
3771 #endif
3773 __FINIT
3774 .data
3775 .align 4
3777 availmem:
3778 .long 0
3779 m68k_pgtable_cachemode:
3780 .long 0
3781 m68k_supervisor_cachemode:
3782 .long 0
3783 #if defined(CONFIG_MVME16x)
3784 mvme_bdid:
3785 .long 0,0,0,0,0,0,0,0
3786 #endif
3787 #if defined(CONFIG_Q40)
3788 q40_mem_cptr:
3789 .long 0
3790 L(q40_do_debug):
3791 .long 0
3792 #endif