release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/arch-v32/lib/string.c

   1 /* A memcpy for CRIS.
   2    Copyright (C) 1994-2005 Axis Communications.
   3    All rights reserved.
   4
   5    Redistribution and use in source and binary forms, with or without
   6    modification, are permitted provided that the following conditions
   7    are met:
   8
   9    1. Redistributions of source code must retain the above copyright
  10       notice, this list of conditions and the following disclaimer.
  11
  12    2. Neither the name of Axis Communications nor the names of its
  13       contributors may be used to endorse or promote products derived
  14       from this software without specific prior written permission.
  15
  16    THIS SOFTWARE IS PROVIDED BY AXIS COMMUNICATIONS AND ITS CONTRIBUTORS
  17    ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL AXIS
  20    COMMUNICATIONS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  21    INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  22    (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  23    SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24    HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  25    STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  26    IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  27    POSSIBILITY OF SUCH DAMAGE.  */
  28
  29
  30 #include <stddef.h>
  31
  32 /* Break even between movem and move16 is really at 38.7 * 2, but
  33    modulo 44, so up to the next multiple of 44, we use ordinary code.  */
  34 #define MEMCPY_BY_BLOCK_THRESHOLD (44 * 2)
  35
  36 /* No name ambiguities in this file.  */
  37 __asm__ (".syntax no_register_prefix");
  38
  39 void *
  40 memcpy(void *pdst, const void *psrc, size_t pn)
  41 {
  42   /* Now we want the parameters put in special registers.
  43      Make sure the compiler is able to make something useful of this.
  44      As it is now: r10 -> r13; r11 -> r11 (nop); r12 -> r12 (nop).
  45
  46      If gcc was allright, it really would need no temporaries, and no
  47      stack space to save stuff on.  */
  48
  49   register void *return_dst __asm__ ("r10") = pdst;
  50   register unsigned char *dst __asm__ ("r13") = pdst;
  51   register unsigned const char *src __asm__ ("r11") = psrc;
  52   register int n __asm__ ("r12") = pn;
  53
  54   /* When src is aligned but not dst, this makes a few extra needless
  55      cycles.  I believe it would take as many to check that the
  56      re-alignment was unnecessary.  */
  57   if (((unsigned long) dst & 3) != 0
  58       /* Don't align if we wouldn't copy more than a few bytes; so we
  59          don't have to check further for overflows.  */
  60       && n >= 3)
  61   {
  62     if ((unsigned long) dst & 1)
  63       {
  64         n--;
  65         *dst = *src;
  66         src++;
  67         dst++;
  68       }
  69
  70     if ((unsigned long) dst & 2)
  71       {
  72         n -= 2;
  73         *(short *) dst = *(short *) src;
  74         src += 2;
  75         dst += 2;
  76       }
  77   }
  78
  79   /* Decide which copying method to use.  */
  80   if (n >= MEMCPY_BY_BLOCK_THRESHOLD)
  81     {
  82       /* It is not optimal to tell the compiler about clobbering any
  83          registers; that will move the saving/restoring of those registers
  84          to the function prologue/epilogue, and make non-movem sizes
  85          suboptimal.  */
  86       __asm__ volatile
  87         ("\
  88          ;; GCC does promise correct register allocations, but let's    \n\
  89          ;; make sure it keeps its promises.                            \n\
  90          .ifnc %0-%1-%2,$r13-$r11-$r12                                  \n\
  91          .error \"GCC reg alloc bug: %0-%1-%4 != $r13-$r12-$r11\"       \n\
  92          .endif                                                         \n\
  93                                                                         \n\
  94          ;; Save the registers we'll use in the movem process           \n\
  95          ;; on the stack.                                               \n\
  96          subq   11*4,sp                                                 \n\
  97          movem  r10,[sp]                                                \n\
  98                                                                         \n\
  99          ;; Now we've got this:                                         \n\
 100          ;; r11 - src                                                   \n\
 101          ;; r13 - dst                                                   \n\
 102          ;; r12 - n                                                     \n\
 103                                                                         \n\
 104          ;; Update n for the first loop.                                \n\
 105          subq    44,r12                                                 \n\
 106 0:                                                                      \n\
 107 "
 108 #ifdef __arch_common_v10_v32
 109          /* Cater to branch offset difference between v32 and v10.  We
 110             assume the branch below has an 8-bit offset.  */
 111 "        setf\n"
 112 #endif
 113 "        movem  [r11+],r10                                              \n\
 114          subq   44,r12                                                  \n\
 115          bge     0b                                                     \n\
 116          movem  r10,[r13+]                                              \n\
 117                                                                         \n\
 118          ;; Compensate for last loop underflowing n.                    \n\
 119          addq   44,r12                                                  \n\
 120                                                                         \n\
 121          ;; Restore registers from stack.                               \n\
 122          movem [sp+],r10"
 123
 124          /* Outputs.  */
 125          : "=r" (dst), "=r" (src), "=r" (n)
 126
 127          /* Inputs.  */
 128          : "0" (dst), "1" (src), "2" (n));
 129     }
 130
 131   while (n >= 16)
 132     {
 133       *(long *) dst = *(long *) src; dst += 4; src += 4;
 134       *(long *) dst = *(long *) src; dst += 4; src += 4;
 135       *(long *) dst = *(long *) src; dst += 4; src += 4;
 136       *(long *) dst = *(long *) src; dst += 4; src += 4;
 137
 138       n -= 16;
 139     }
 140
 141   switch (n)
 142     {
 143     case 0:
 144       break;
 145
 146     case 1:
 147       *dst = *src;
 148       break;
 149
 150     case 2:
 151       *(short *) dst = *(short *) src;
 152       break;
 153
 154     case 3:
 155       *(short *) dst = *(short *) src; dst += 2; src += 2;
 156       *dst = *src;
 157       break;
 158
 159     case 4:
 160       *(long *) dst = *(long *) src;
 161       break;
 162
 163     case 5:
 164       *(long *) dst = *(long *) src; dst += 4; src += 4;
 165       *dst = *src;
 166       break;
 167
 168     case 6:
 169       *(long *) dst = *(long *) src; dst += 4; src += 4;
 170       *(short *) dst = *(short *) src;
 171       break;
 172
 173     case 7:
 174       *(long *) dst = *(long *) src; dst += 4; src += 4;
 175       *(short *) dst = *(short *) src; dst += 2; src += 2;
 176       *dst = *src;
 177       break;
 178
 179     case 8:
 180       *(long *) dst = *(long *) src; dst += 4; src += 4;
 181       *(long *) dst = *(long *) src;
 182       break;
 183
 184     case 9:
 185       *(long *) dst = *(long *) src; dst += 4; src += 4;
 186       *(long *) dst = *(long *) src; dst += 4; src += 4;
 187       *dst = *src;
 188       break;
 189
 190     case 10:
 191       *(long *) dst = *(long *) src; dst += 4; src += 4;
 192       *(long *) dst = *(long *) src; dst += 4; src += 4;
 193       *(short *) dst = *(short *) src;
 194       break;
 195
 196     case 11:
 197       *(long *) dst = *(long *) src; dst += 4; src += 4;
 198       *(long *) dst = *(long *) src; dst += 4; src += 4;
 199       *(short *) dst = *(short *) src; dst += 2; src += 2;
 200       *dst = *src;
 201       break;
 202
 203     case 12:
 204       *(long *) dst = *(long *) src; dst += 4; src += 4;
 205       *(long *) dst = *(long *) src; dst += 4; src += 4;
 206       *(long *) dst = *(long *) src;
 207       break;
 208
 209     case 13:
 210       *(long *) dst = *(long *) src; dst += 4; src += 4;
 211       *(long *) dst = *(long *) src; dst += 4; src += 4;
 212       *(long *) dst = *(long *) src; dst += 4; src += 4;
 213       *dst = *src;
 214       break;
 215
 216     case 14:
 217       *(long *) dst = *(long *) src; dst += 4; src += 4;
 218       *(long *) dst = *(long *) src; dst += 4; src += 4;
 219       *(long *) dst = *(long *) src; dst += 4; src += 4;
 220       *(short *) dst = *(short *) src;
 221       break;
 222
 223     case 15:
 224       *(long *) dst = *(long *) src; dst += 4; src += 4;
 225       *(long *) dst = *(long *) src; dst += 4; src += 4;
 226       *(long *) dst = *(long *) src; dst += 4; src += 4;
 227       *(short *) dst = *(short *) src; dst += 2; src += 2;
 228       *dst = *src;
 229       break;
 230     }
 231
 232   return return_dst;
 233 }