release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf518/boards/tcm-bf518.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/etherdevice.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/mtd/mtd.h>
  13 #include <linux/mtd/partitions.h>
  14 #include <linux/mtd/physmap.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/spi/flash.h>
  17
  18 #include <linux/i2c.h>
  19 #include <linux/irq.h>
  20 #include <linux/interrupt.h>
  21 #include <asm/dma.h>
  22 #include <asm/bfin5xx_spi.h>
  23 #include <asm/reboot.h>
  24 #include <asm/portmux.h>
  25 #include <asm/dpmc.h>
  26 #include <asm/bfin_sdh.h>
  27 #include <linux/spi/ad7877.h>
  28 #include <net/dsa.h>
  29
  30 /*
  31  * Name the Board for the /proc/cpuinfo
  32  */
  33 const char bfin_board_name[] = "Bluetechnix TCM-BF518";
  34
  35 /*
  36  *  Driver needs to know address, irq and flag pin.
  37  */
  38
  39 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  40 static struct mtd_partition tcm_partitions[] = {
  41         {
  42                 .name       = "bootloader(nor)",
  43                 .size       = 0x40000,
  44                 .offset     = 0,
  45         },
  46         {
  47                 .name       = "linux(nor)",
  48                 .size       = 0x1C0000,
  49                 .offset     = MTDPART_OFS_APPEND,
  50         }
  51 };
  52
  53 static struct physmap_flash_data tcm_flash_data = {
  54         .width      = 2,
  55         .parts      = tcm_partitions,
  56         .nr_parts   = ARRAY_SIZE(tcm_partitions),
  57 };
  58
  59 static struct resource tcm_flash_resource = {
  60         .start = 0x20000000,
  61         .end   = 0x201fffff,
  62         .flags = IORESOURCE_MEM,
  63 };
  64
  65 static struct platform_device tcm_flash_device = {
  66         .name          = "physmap-flash",
  67         .id            = 0,
  68         .dev = {
  69                 .platform_data = &tcm_flash_data,
  70         },
  71         .num_resources = 1,
  72         .resource      = &tcm_flash_resource,
  73 };
  74 #endif
  75
  76 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  77 static struct platform_device rtc_device = {
  78         .name = "rtc-bfin",
  79         .id   = -1,
  80 };
  81 #endif
  82
  83 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  84 static struct platform_device bfin_mii_bus = {
  85         .name = "bfin_mii_bus",
  86 };
  87
  88 static struct platform_device bfin_mac_device = {
  89         .name = "bfin_mac",
  90         .dev.platform_data = &bfin_mii_bus,
  91 };
  92 #endif
  93
  94 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  95 static struct mtd_partition bfin_spi_flash_partitions[] = {
  96         {
  97                 .name = "bootloader(spi)",
  98                 .size = 0x00040000,
  99                 .offset = 0,
 100                 .mask_flags = MTD_CAP_ROM
 101         }, {
 102                 .name = "linux kernel(spi)",
 103                 .size = MTDPART_SIZ_FULL,
 104                 .offset = MTDPART_OFS_APPEND,
 105         }
 106 };
 107
 108 static struct flash_platform_data bfin_spi_flash_data = {
 109         .name = "m25p80",
 110         .parts = bfin_spi_flash_partitions,
 111         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 112         .type = "m25p16",
 113 };
 114
 115 /* SPI flash chip (m25p64) */
 116 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 117         .enable_dma = 0,         /* use dma transfer with this chip*/
 118         .bits_per_word = 8,
 119 };
 120 #endif
 121
 122 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 123 /* SPI ADC chip */
 124 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 125         .enable_dma = 1,         /* use dma transfer with this chip*/
 126         .bits_per_word = 16,
 127 };
 128 #endif
 129
 130 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 131 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 132         .enable_dma = 0,
 133         .bits_per_word = 8,
 134 };
 135 #endif
 136
 137 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 138 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 139         .enable_dma = 0,
 140         .bits_per_word = 16,
 141 };
 142
 143 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 144         .model                  = 7877,
 145         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 146         .x_plate_ohms           = 419,
 147         .y_plate_ohms           = 486,
 148         .pressure_max           = 1000,
 149         .pressure_min           = 0,
 150         .stopacq_polarity       = 1,
 151         .first_conversion_delay = 3,
 152         .acquisition_time       = 1,
 153         .averaging              = 1,
 154         .pen_down_acc_interval  = 1,
 155 };
 156 #endif
 157
 158 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) && \
 159         defined(CONFIG_SND_SOC_WM8731_SPI)
 160 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 161         .enable_dma = 0,
 162         .bits_per_word = 16,
 163 };
 164 #endif
 165
 166 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 167 static struct bfin5xx_spi_chip spidev_chip_info = {
 168         .enable_dma = 0,
 169         .bits_per_word = 8,
 170 };
 171 #endif
 172
 173 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 174 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
 175         {
 176                 /* the modalias must be the same as spi device driver name */
 177                 .modalias = "m25p80", /* Name of spi_driver for this device */
 178                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 179                 .bus_num = 0, /* Framework bus number */
 180                 .chip_select = 2, /* SPI0_SSEL2 */
 181                 .platform_data = &bfin_spi_flash_data,
 182                 .controller_data = &spi_flash_chip_info,
 183                 .mode = SPI_MODE_3,
 184         },
 185 #endif
 186
 187 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 188         {
 189                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 190                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 191                 .bus_num = 0, /* Framework bus number */
 192                 .chip_select = 1, /* Framework chip select. */
 193                 .platform_data = NULL, /* No spi_driver specific config */
 194                 .controller_data = &spi_adc_chip_info,
 195         },
 196 #endif
 197
 198 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 199         {
 200                 .modalias = "mmc_spi",
 201                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 202                 .bus_num = 0,
 203                 .chip_select = 5,
 204                 .controller_data = &mmc_spi_chip_info,
 205                 .mode = SPI_MODE_3,
 206         },
 207 #endif
 208 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 209         {
 210                 .modalias               = "ad7877",
 211                 .platform_data          = &bfin_ad7877_ts_info,
 212                 .irq                    = IRQ_PF8,
 213                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 214                 .bus_num        = 0,
 215                 .chip_select  = 2,
 216                 .controller_data = &spi_ad7877_chip_info,
 217         },
 218 #endif
 219 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) && \
 220         defined(CONFIG_SND_SOC_WM8731_SPI)
 221         {
 222                 .modalias       = "wm8731",
 223                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 224                 .bus_num        = 0,
 225                 .chip_select    = 5,
 226                 .controller_data = &spi_wm8731_chip_info,
 227                 .mode = SPI_MODE_0,
 228         },
 229 #endif
 230 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 231         {
 232                 .modalias = "spidev",
 233                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 234                 .bus_num = 0,
 235                 .chip_select = 1,
 236                 .controller_data = &spidev_chip_info,
 237         },
 238 #endif
 239 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 240         {
 241                 .modalias = "bfin-lq035q1-spi",
 242                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 243                 .bus_num = 0,
 244                 .chip_select = 1,
 245                 .controller_data = &lq035q1_spi_chip_info,
 246                 .mode = SPI_CPHA | SPI_CPOL,
 247         },
 248 #endif
 249 };
 250
 251 /* SPI controller data */
 252 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 253 /* SPI (0) */
 254 static struct bfin5xx_spi_master bfin_spi0_info = {
 255         .num_chipselect = 6,
 256         .enable_dma = 1,  /* master has the ability to do dma transfer */
 257         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 258 };
 259
 260 static struct resource bfin_spi0_resource[] = {
 261         [0] = {
 262                 .start = SPI0_REGBASE,
 263                 .end   = SPI0_REGBASE + 0xFF,
 264                 .flags = IORESOURCE_MEM,
 265                 },
 266         [1] = {
 267                 .start = CH_SPI0,
 268                 .end   = CH_SPI0,
 269                 .flags = IORESOURCE_DMA,
 270         },
 271         [2] = {
 272                 .start = IRQ_SPI0,
 273                 .end   = IRQ_SPI0,
 274                 .flags = IORESOURCE_IRQ,
 275         },
 276 };
 277
 278 static struct platform_device bfin_spi0_device = {
 279         .name = "bfin-spi",
 280         .id = 0, /* Bus number */
 281         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 282         .resource = bfin_spi0_resource,
 283         .dev = {
 284                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 285         },
 286 };
 287
 288 /* SPI (1) */
 289 static struct bfin5xx_spi_master bfin_spi1_info = {
 290         .num_chipselect = 5,
 291         .enable_dma = 1,  /* master has the ability to do dma transfer */
 292         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 293 };
 294
 295 static struct resource bfin_spi1_resource[] = {
 296         [0] = {
 297                 .start = SPI1_REGBASE,
 298                 .end   = SPI1_REGBASE + 0xFF,
 299                 .flags = IORESOURCE_MEM,
 300                 },
 301         [1] = {
 302                 .start = CH_SPI1,
 303                 .end   = CH_SPI1,
 304                 .flags = IORESOURCE_DMA,
 305         },
 306         [2] = {
 307                 .start = IRQ_SPI1,
 308                 .end   = IRQ_SPI1,
 309                 .flags = IORESOURCE_IRQ,
 310         },
 311 };
 312
 313 static struct platform_device bfin_spi1_device = {
 314         .name = "bfin-spi",
 315         .id = 1, /* Bus number */
 316         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
 317         .resource = bfin_spi1_resource,
 318         .dev = {
 319                 .platform_data = &bfin_spi1_info, /* Passed to driver */
 320         },
 321 };
 322 #endif  /* spi master and devices */
 323
 324 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 325 #ifdef CONFIG_SERIAL_BFIN_UART0
 326 static struct resource bfin_uart0_resources[] = {
 327         {
 328                 .start = UART0_THR,
 329                 .end = UART0_GCTL+2,
 330                 .flags = IORESOURCE_MEM,
 331         },
 332         {
 333                 .start = IRQ_UART0_RX,
 334                 .end = IRQ_UART0_RX+1,
 335                 .flags = IORESOURCE_IRQ,
 336         },
 337         {
 338                 .start = IRQ_UART0_ERROR,
 339                 .end = IRQ_UART0_ERROR,
 340                 .flags = IORESOURCE_IRQ,
 341         },
 342         {
 343                 .start = CH_UART0_TX,
 344                 .end = CH_UART0_TX,
 345                 .flags = IORESOURCE_DMA,
 346         },
 347         {
 348                 .start = CH_UART0_RX,
 349                 .end = CH_UART0_RX,
 350                 .flags = IORESOURCE_DMA,
 351         },
 352 };
 353
 354 unsigned short bfin_uart0_peripherals[] = {
 355         P_UART0_TX, P_UART0_RX, 0
 356 };
 357
 358 static struct platform_device bfin_uart0_device = {
 359         .name = "bfin-uart",
 360         .id = 0,
 361         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 362         .resource = bfin_uart0_resources,
 363         .dev = {
 364                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 365         },
 366 };
 367 #endif
 368 #ifdef CONFIG_SERIAL_BFIN_UART1
 369 static struct resource bfin_uart1_resources[] = {
 370         {
 371                 .start = UART1_THR,
 372                 .end = UART1_GCTL+2,
 373                 .flags = IORESOURCE_MEM,
 374         },
 375         {
 376                 .start = IRQ_UART1_RX,
 377                 .end = IRQ_UART1_RX+1,
 378                 .flags = IORESOURCE_IRQ,
 379         },
 380         {
 381                 .start = IRQ_UART1_ERROR,
 382                 .end = IRQ_UART1_ERROR,
 383                 .flags = IORESOURCE_IRQ,
 384         },
 385         {
 386                 .start = CH_UART1_TX,
 387                 .end = CH_UART1_TX,
 388                 .flags = IORESOURCE_DMA,
 389         },
 390         {
 391                 .start = CH_UART1_RX,
 392                 .end = CH_UART1_RX,
 393                 .flags = IORESOURCE_DMA,
 394         },
 395 };
 396
 397 unsigned short bfin_uart1_peripherals[] = {
 398         P_UART1_TX, P_UART1_RX, 0
 399 };
 400
 401 static struct platform_device bfin_uart1_device = {
 402         .name = "bfin-uart",
 403         .id = 1,
 404         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 405         .resource = bfin_uart1_resources,
 406         .dev = {
 407                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 408         },
 409 };
 410 #endif
 411 #endif
 412
 413 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 414 #ifdef CONFIG_BFIN_SIR0
 415 static struct resource bfin_sir0_resources[] = {
 416         {
 417                 .start = 0xFFC00400,
 418                 .end = 0xFFC004FF,
 419                 .flags = IORESOURCE_MEM,
 420         },
 421         {
 422                 .start = IRQ_UART0_RX,
 423                 .end = IRQ_UART0_RX+1,
 424                 .flags = IORESOURCE_IRQ,
 425         },
 426         {
 427                 .start = CH_UART0_RX,
 428                 .end = CH_UART0_RX+1,
 429                 .flags = IORESOURCE_DMA,
 430         },
 431 };
 432
 433 static struct platform_device bfin_sir0_device = {
 434         .name = "bfin_sir",
 435         .id = 0,
 436         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 437         .resource = bfin_sir0_resources,
 438 };
 439 #endif
 440 #ifdef CONFIG_BFIN_SIR1
 441 static struct resource bfin_sir1_resources[] = {
 442         {
 443                 .start = 0xFFC02000,
 444                 .end = 0xFFC020FF,
 445                 .flags = IORESOURCE_MEM,
 446         },
 447         {
 448                 .start = IRQ_UART1_RX,
 449                 .end = IRQ_UART1_RX+1,
 450                 .flags = IORESOURCE_IRQ,
 451         },
 452         {
 453                 .start = CH_UART1_RX,
 454                 .end = CH_UART1_RX+1,
 455                 .flags = IORESOURCE_DMA,
 456         },
 457 };
 458
 459 static struct platform_device bfin_sir1_device = {
 460         .name = "bfin_sir",
 461         .id = 1,
 462         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 463         .resource = bfin_sir1_resources,
 464 };
 465 #endif
 466 #endif
 467
 468 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 469 static struct resource bfin_twi0_resource[] = {
 470         [0] = {
 471                 .start = TWI0_REGBASE,
 472                 .end   = TWI0_REGBASE,
 473                 .flags = IORESOURCE_MEM,
 474         },
 475         [1] = {
 476                 .start = IRQ_TWI,
 477                 .end   = IRQ_TWI,
 478                 .flags = IORESOURCE_IRQ,
 479         },
 480 };
 481
 482 static struct platform_device i2c_bfin_twi_device = {
 483         .name = "i2c-bfin-twi",
 484         .id = 0,
 485         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 486         .resource = bfin_twi0_resource,
 487 };
 488 #endif
 489
 490 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 491 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 492         {
 493                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 494         },
 495 #endif
 496 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 497         {
 498                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 499                 .irq = IRQ_PF8,
 500         },
 501 #endif
 502 };
 503
 504 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 505 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 506 static struct resource bfin_sport0_uart_resources[] = {
 507         {
 508                 .start = SPORT0_TCR1,
 509                 .end = SPORT0_MRCS3+4,
 510                 .flags = IORESOURCE_MEM,
 511         },
 512         {
 513                 .start = IRQ_SPORT0_RX,
 514                 .end = IRQ_SPORT0_RX+1,
 515                 .flags = IORESOURCE_IRQ,
 516         },
 517         {
 518                 .start = IRQ_SPORT0_ERROR,
 519                 .end = IRQ_SPORT0_ERROR,
 520                 .flags = IORESOURCE_IRQ,
 521         },
 522 };
 523
 524 unsigned short bfin_sport0_peripherals[] = {
 525         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 526         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 527 };
 528
 529 static struct platform_device bfin_sport0_uart_device = {
 530         .name = "bfin-sport-uart",
 531         .id = 0,
 532         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 533         .resource = bfin_sport0_uart_resources,
 534         .dev = {
 535                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 536         },
 537 };
 538 #endif
 539 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 540 static struct resource bfin_sport1_uart_resources[] = {
 541         {
 542                 .start = SPORT1_TCR1,
 543                 .end = SPORT1_MRCS3+4,
 544                 .flags = IORESOURCE_MEM,
 545         },
 546         {
 547                 .start = IRQ_SPORT1_RX,
 548                 .end = IRQ_SPORT1_RX+1,
 549                 .flags = IORESOURCE_IRQ,
 550         },
 551         {
 552                 .start = IRQ_SPORT1_ERROR,
 553                 .end = IRQ_SPORT1_ERROR,
 554                 .flags = IORESOURCE_IRQ,
 555         },
 556 };
 557
 558 unsigned short bfin_sport1_peripherals[] = {
 559         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 560         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 561 };
 562
 563 static struct platform_device bfin_sport1_uart_device = {
 564         .name = "bfin-sport-uart",
 565         .id = 1,
 566         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 567         .resource = bfin_sport1_uart_resources,
 568         .dev = {
 569                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 570         },
 571 };
 572 #endif
 573 #endif
 574
 575 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 576 #include <linux/input.h>
 577 #include <linux/gpio_keys.h>
 578
 579 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 580         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 581         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 582 };
 583
 584 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 585         .buttons        = bfin_gpio_keys_table,
 586         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 587 };
 588
 589 static struct platform_device bfin_device_gpiokeys = {
 590         .name      = "gpio-keys",
 591         .dev = {
 592                 .platform_data = &bfin_gpio_keys_data,
 593         },
 594 };
 595 #endif
 596
 597 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 598
 599 static struct bfin_sd_host bfin_sdh_data = {
 600         .dma_chan = CH_RSI,
 601         .irq_int0 = IRQ_RSI_INT0,
 602         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 603 };
 604
 605 static struct platform_device bf51x_sdh_device = {
 606         .name = "bfin-sdh",
 607         .id = 0,
 608         .dev = {
 609                 .platform_data = &bfin_sdh_data,
 610         },
 611 };
 612 #endif
 613
 614 static const unsigned int cclk_vlev_datasheet[] =
 615 {
 616         VRPAIR(VLEV_100, 400000000),
 617         VRPAIR(VLEV_105, 426000000),
 618         VRPAIR(VLEV_110, 500000000),
 619         VRPAIR(VLEV_115, 533000000),
 620         VRPAIR(VLEV_120, 600000000),
 621 };
 622
 623 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 624         .tuple_tab = cclk_vlev_datasheet,
 625         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 626         .vr_settling_time = 25 /* us */,
 627 };
 628
 629 static struct platform_device bfin_dpmc = {
 630         .name = "bfin dpmc",
 631         .dev = {
 632                 .platform_data = &bfin_dmpc_vreg_data,
 633         },
 634 };
 635
 636 static struct platform_device *tcm_devices[] __initdata = {
 637
 638         &bfin_dpmc,
 639
 640 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 641         &rtc_device,
 642 #endif
 643
 644 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 645         &bfin_mii_bus,
 646         &bfin_mac_device,
 647 #endif
 648
 649 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 650         &bfin_spi0_device,
 651         &bfin_spi1_device,
 652 #endif
 653
 654 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 655 #ifdef CONFIG_SERIAL_BFIN_UART0
 656         &bfin_uart0_device,
 657 #endif
 658 #ifdef CONFIG_SERIAL_BFIN_UART1
 659         &bfin_uart1_device,
 660 #endif
 661 #endif
 662
 663 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 664 #ifdef CONFIG_BFIN_SIR0
 665         &bfin_sir0_device,
 666 #endif
 667 #ifdef CONFIG_BFIN_SIR1
 668         &bfin_sir1_device,
 669 #endif
 670 #endif
 671
 672 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 673         &i2c_bfin_twi_device,
 674 #endif
 675
 676 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 677 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 678         &bfin_sport0_uart_device,
 679 #endif
 680 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 681         &bfin_sport1_uart_device,
 682 #endif
 683 #endif
 684
 685 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 686         &bfin_device_gpiokeys,
 687 #endif
 688
 689 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 690         &bf51x_sdh_device,
 691 #endif
 692
 693 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 694         &tcm_flash_device,
 695 #endif
 696 };
 697
 698 static int __init tcm_init(void)
 699 {
 700         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 701         i2c_register_board_info(0, bfin_i2c_board_info,
 702                                 ARRAY_SIZE(bfin_i2c_board_info));
 703         platform_add_devices(tcm_devices, ARRAY_SIZE(tcm_devices));
 704         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 705         return 0;
 706 }
 707
 708 arch_initcall(tcm_init);
 709
 710 static struct platform_device *tcm_early_devices[] __initdata = {
 711 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 712 #ifdef CONFIG_SERIAL_BFIN_UART0
 713         &bfin_uart0_device,
 714 #endif
 715 #ifdef CONFIG_SERIAL_BFIN_UART1
 716         &bfin_uart1_device,
 717 #endif
 718 #endif
 719
 720 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 721 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 722         &bfin_sport0_uart_device,
 723 #endif
 724 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 725         &bfin_sport1_uart_device,
 726 #endif
 727 #endif
 728 };
 729
 730 void __init native_machine_early_platform_add_devices(void)
 731 {
 732         printk(KERN_INFO "register early platform devices\n");
 733         early_platform_add_devices(tcm_early_devices,
 734                 ARRAY_SIZE(tcm_early_devices));
 735 }
 736
 737 void native_machine_restart(char *cmd)
 738 {
 739         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 740                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 741 }
 742
 743 void bfin_get_ether_addr(char *addr)
 744 {
 745         random_ether_addr(addr);
 746         printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
 747 }
 748 EXPORT_SYMBOL(bfin_get_ether_addr);