release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-samsung/irq-vic-timer.c

   1 /* arch/arm/plat-samsung/irq-vic-timer.c
   2  *      originally part of arch/arm/plat-s3c64xx/irq.c
   3  *
   4  * Copyright 2008 Openmoko, Inc.
   5  * Copyright 2008 Simtec Electronics
   6  *      Ben Dooks <ben@simtec.co.uk>
   7  *      http://armlinux.simtec.co.uk/
   8  *
   9  * S3C64XX - Interrupt handling
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/kernel.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/irq.h>
  19 #include <linux/io.h>
  20
  21 #include <mach/map.h>
  22 #include <plat/irq-vic-timer.h>
  23 #include <plat/regs-timer.h>
  24
  25 static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
  26 {
  27         generic_handle_irq((int)desc->handler_data);
  28 }
  29
  30 /* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
  31
  32 static void s3c_irq_timer_mask(unsigned int irq)
  33 {
  34         u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
  35
  36         reg &= 0x1f;  /* mask out pending interrupts */
  37         reg &= ~(1 << (irq - IRQ_TIMER0));
  38         __raw_writel(reg, S3C64XX_TINT_CSTAT);
  39 }
  40
  41 static void s3c_irq_timer_unmask(unsigned int irq)
  42 {
  43         u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
  44
  45         reg &= 0x1f;  /* mask out pending interrupts */
  46         reg |= 1 << (irq - IRQ_TIMER0);
  47         __raw_writel(reg, S3C64XX_TINT_CSTAT);
  48 }
  49
  50 static void s3c_irq_timer_ack(unsigned int irq)
  51 {
  52         u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
  53
  54         reg &= 0x1f;
  55         reg |= (1 << 5) << (irq - IRQ_TIMER0);
  56         __raw_writel(reg, S3C64XX_TINT_CSTAT);
  57 }
  58
  59 static struct irq_chip s3c_irq_timer = {
  60         .name           = "s3c-timer",
  61         .mask           = s3c_irq_timer_mask,
  62         .unmask         = s3c_irq_timer_unmask,
  63         .ack            = s3c_irq_timer_ack,
  64 };
  65
  66 /**
  67  * s3c_init_vic_timer_irq() - initialise timer irq chanined off VIC.\
  68  * @parent_irq: The parent IRQ on the VIC for the timer.
  69  * @timer_irq: The IRQ to be used for the timer.
  70  *
  71  * Register the necessary IRQ chaining and support for the timer IRQs
  72  * chained of the VIC.
  73  */
  74 void __init s3c_init_vic_timer_irq(unsigned int parent_irq,
  75                                    unsigned int timer_irq)
  76 {
  77         struct irq_desc *desc = irq_to_desc(parent_irq);
  78
  79         set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer);
  80
  81         set_irq_chip(timer_irq, &s3c_irq_timer);
  82         set_irq_handler(timer_irq, handle_level_irq);
  83         set_irq_flags(timer_irq, IRQF_VALID);
  84
  85         desc->handler_data = (void *)timer_irq;
  86 }