release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-pxa/include/mach/zeus.h

   1 /*
   2  *  arch/arm/mach-pxa/include/mach/zeus.h
   3  *
   4  *  Author:     David Vrabel
   5  *  Created:    Sept 28, 2005
   6  *  Copyright:  Arcom Control Systems Ltd.
   7  *
   8  *  Maintained by: Marc Zyngier <maz@misterjones.org>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #ifndef _MACH_ZEUS_H
  16 #define _MACH_ZEUS_H
  17
  18 /* Physical addresses */
  19 #define ZEUS_FLASH_PHYS         PXA_CS0_PHYS
  20 #define ZEUS_ETH0_PHYS          PXA_CS1_PHYS
  21 #define ZEUS_ETH1_PHYS          PXA_CS2_PHYS
  22 #define ZEUS_CPLD_PHYS          (PXA_CS4_PHYS+0x2000000)
  23 #define ZEUS_SRAM_PHYS          PXA_CS5_PHYS
  24 #define ZEUS_PC104IO_PHYS       (0x30000000)
  25
  26 #define ZEUS_CPLD_VERSION_PHYS  (ZEUS_CPLD_PHYS + 0x00000000)
  27 #define ZEUS_CPLD_ISA_IRQ_PHYS  (ZEUS_CPLD_PHYS + 0x00800000)
  28 #define ZEUS_CPLD_CONTROL_PHYS  (ZEUS_CPLD_PHYS + 0x01000000)
  29 #define ZEUS_CPLD_EXTWDOG_PHYS  (ZEUS_CPLD_PHYS + 0x01800000)
  30
  31 /* GPIOs */
  32 #define ZEUS_AC97_GPIO          0
  33 #define ZEUS_WAKEUP_GPIO        1
  34 #define ZEUS_UARTA_GPIO         9
  35 #define ZEUS_UARTB_GPIO         10
  36 #define ZEUS_UARTC_GPIO         12
  37 #define ZEUS_UARTD_GPIO         11
  38 #define ZEUS_ETH0_GPIO          14
  39 #define ZEUS_ISA_GPIO           17
  40 #define ZEUS_BKLEN_GPIO         19
  41 #define ZEUS_USB2_PWREN_GPIO    22
  42 #define ZEUS_PTT_GPIO           27
  43 #define ZEUS_CF_CD_GPIO         35
  44 #define ZEUS_MMC_WP_GPIO        52
  45 #define ZEUS_MMC_CD_GPIO        53
  46 #define ZEUS_EXTGPIO_GPIO       91
  47 #define ZEUS_CF_PWEN_GPIO       97
  48 #define ZEUS_CF_RDY_GPIO        99
  49 #define ZEUS_LCD_EN_GPIO        101
  50 #define ZEUS_ETH1_GPIO          113
  51 #define ZEUS_CAN_GPIO           116
  52
  53 #define ZEUS_EXT0_GPIO_BASE     128
  54 #define ZEUS_EXT1_GPIO_BASE     160
  55 #define ZEUS_USER_GPIO_BASE     192
  56
  57 #define ZEUS_EXT0_GPIO(x)       (ZEUS_EXT0_GPIO_BASE + (x))
  58 #define ZEUS_EXT1_GPIO(x)       (ZEUS_EXT1_GPIO_BASE + (x))
  59 #define ZEUS_USER_GPIO(x)       (ZEUS_USER_GPIO_BASE + (x))
  60
  61 #define ZEUS_CAN_SHDN_GPIO      ZEUS_EXT1_GPIO(2)
  62
  63 /*
  64  * CPLD registers:
  65  * Only 4 registers, but spreaded over a 32MB address space.
  66  * Be gentle, and remap that over 32kB...
  67  */
  68
  69 #define ZEUS_CPLD               (0xf0000000)
  70 #define ZEUS_CPLD_VERSION       (ZEUS_CPLD + 0x0000)
  71 #define ZEUS_CPLD_ISA_IRQ       (ZEUS_CPLD + 0x1000)
  72 #define ZEUS_CPLD_CONTROL       (ZEUS_CPLD + 0x2000)
  73
  74 /* CPLD register bits */
  75 #define ZEUS_CPLD_CONTROL_CF_RST        0x01
  76
  77 #define ZEUS_PC104IO            (0xf1000000)
  78
  79 #define ZEUS_SRAM_SIZE          (256 * 1024)
  80
  81 #endif