2 * OMAP Power Management debug routines
4 * Copyright (C) 2005 Texas Instruments, Inc.
5 * Copyright (C) 2006-2008 Nokia Corporation
8 * Richard Woodruff <r-woodruff2@ti.com>
11 * Amit Kucheria <amit.kucheria@nokia.com>
12 * Igor Stoppa <igor.stoppa@nokia.com>
15 * Based on pm.c for omap2
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
22 #include <linux/kernel.h>
23 #include <linux/sched.h>
24 #include <linux/clk.h>
25 #include <linux/err.h>
27 #include <linux/module.h>
28 #include <linux/slab.h>
30 #include <plat/clock.h>
31 #include <plat/board.h>
32 #include <plat/powerdomain.h>
33 #include <plat/clockdomain.h>
41 #define DUMP_PRM_MOD_REG(mod, reg) \
42 regs[reg_count].name = #mod "." #reg; \
43 regs[reg_count++].val = prm_read_mod_reg(mod, reg)
44 #define DUMP_CM_MOD_REG(mod, reg) \
45 regs[reg_count].name = #mod "." #reg; \
46 regs[reg_count++].val = cm_read_mod_reg(mod, reg)
47 #define DUMP_PRM_REG(reg) \
48 regs[reg_count].name = #reg; \
49 regs[reg_count++].val = __raw_readl(reg)
50 #define DUMP_CM_REG(reg) \
51 regs[reg_count].name = #reg; \
52 regs[reg_count++].val = __raw_readl(reg)
53 #define DUMP_INTC_REG(reg, off) \
54 regs[reg_count].name = #reg; \
55 regs[reg_count++].val = \
56 __raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off)))
58 void omap2_pm_dump(int mode
, int resume
, unsigned int us
)
65 const char *s1
= NULL
, *s2
= NULL
;
69 DUMP_PRM_MOD_REG(CORE_MOD
, PM_WKST1
);
70 if (cpu_is_omap24xx())
71 DUMP_PRM_MOD_REG(CORE_MOD
, OMAP24XX_PM_WKST2
);
72 DUMP_PRM_MOD_REG(WKUP_MOD
, PM_WKST
);
73 DUMP_PRM_MOD_REG(OCP_MOD
, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET
);
74 DUMP_INTC_REG(INTC_PENDING_IRQ0
, 0x0098);
75 DUMP_INTC_REG(INTC_PENDING_IRQ1
, 0x00b8);
76 DUMP_INTC_REG(INTC_PENDING_IRQ2
, 0x00d8);
97 "--- Going to %s %s (next timer after %u ms)\n", s1
, s2
,
98 jiffies_to_msecs(get_next_timer_interrupt(jiffies
) -
101 printk(KERN_INFO
"--- Going to %s %s\n", s1
, s2
);
104 printk(KERN_INFO
"--- Woke up (slept for %u.%03u ms)\n",
105 us
/ 1000, us
% 1000);
107 for (i
= 0; i
< reg_count
; i
++)
108 printk(KERN_INFO
"%-20s: 0x%08x\n", regs
[i
].name
, regs
[i
].val
);
111 #ifdef CONFIG_DEBUG_FS
112 #include <linux/debugfs.h>
113 #include <linux/seq_file.h>
115 static void pm_dbg_regset_store(u32
*ptr
);
117 struct dentry
*pm_dbg_dir
;
119 static int pm_dbg_init_done
;
121 static int __init
pm_dbg_init(void);
124 DEBUG_FILE_COUNTERS
= 0,
128 struct pm_module_def
{
129 char name
[8]; /* Name of the module */
130 short type
; /* CM or PRM */
131 unsigned short offset
;
132 int low
; /* First register address on this module */
133 int high
; /* Last register address on this module */
139 static const struct pm_module_def
*pm_dbg_reg_modules
;
140 static const struct pm_module_def omap3_pm_reg_modules
[] = {
141 { "IVA2", MOD_CM
, OMAP3430_IVA2_MOD
, 0, 0x4c },
142 { "OCP", MOD_CM
, OCP_MOD
, 0, 0x10 },
143 { "MPU", MOD_CM
, MPU_MOD
, 4, 0x4c },
144 { "CORE", MOD_CM
, CORE_MOD
, 0, 0x4c },
145 { "SGX", MOD_CM
, OMAP3430ES2_SGX_MOD
, 0, 0x4c },
146 { "WKUP", MOD_CM
, WKUP_MOD
, 0, 0x40 },
147 { "CCR", MOD_CM
, PLL_MOD
, 0, 0x70 },
148 { "DSS", MOD_CM
, OMAP3430_DSS_MOD
, 0, 0x4c },
149 { "CAM", MOD_CM
, OMAP3430_CAM_MOD
, 0, 0x4c },
150 { "PER", MOD_CM
, OMAP3430_PER_MOD
, 0, 0x4c },
151 { "EMU", MOD_CM
, OMAP3430_EMU_MOD
, 0x40, 0x54 },
152 { "NEON", MOD_CM
, OMAP3430_NEON_MOD
, 0x20, 0x48 },
153 { "USB", MOD_CM
, OMAP3430ES2_USBHOST_MOD
, 0, 0x4c },
155 { "IVA2", MOD_PRM
, OMAP3430_IVA2_MOD
, 0x50, 0xfc },
156 { "OCP", MOD_PRM
, OCP_MOD
, 4, 0x1c },
157 { "MPU", MOD_PRM
, MPU_MOD
, 0x58, 0xe8 },
158 { "CORE", MOD_PRM
, CORE_MOD
, 0x58, 0xf8 },
159 { "SGX", MOD_PRM
, OMAP3430ES2_SGX_MOD
, 0x58, 0xe8 },
160 { "WKUP", MOD_PRM
, WKUP_MOD
, 0xa0, 0xb0 },
161 { "CCR", MOD_PRM
, PLL_MOD
, 0x40, 0x70 },
162 { "DSS", MOD_PRM
, OMAP3430_DSS_MOD
, 0x58, 0xe8 },
163 { "CAM", MOD_PRM
, OMAP3430_CAM_MOD
, 0x58, 0xe8 },
164 { "PER", MOD_PRM
, OMAP3430_PER_MOD
, 0x58, 0xe8 },
165 { "EMU", MOD_PRM
, OMAP3430_EMU_MOD
, 0x58, 0xe4 },
166 { "GLBL", MOD_PRM
, OMAP3430_GR_MOD
, 0x20, 0xe4 },
167 { "NEON", MOD_PRM
, OMAP3430_NEON_MOD
, 0x58, 0xe8 },
168 { "USB", MOD_PRM
, OMAP3430ES2_USBHOST_MOD
, 0x58, 0xe8 },
172 #define PM_DBG_MAX_REG_SETS 4
174 static void *pm_dbg_reg_set
[PM_DBG_MAX_REG_SETS
];
176 static int pm_dbg_get_regset_size(void)
178 static int regset_size
;
180 if (regset_size
== 0) {
183 while (pm_dbg_reg_modules
[i
].name
[0] != 0) {
184 regset_size
+= pm_dbg_reg_modules
[i
].high
+
185 4 - pm_dbg_reg_modules
[i
].low
;
192 static int pm_dbg_show_regs(struct seq_file
*s
, void *unused
)
196 int reg_set
= (int)s
->private;
203 store
= kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL
);
205 pm_dbg_regset_store(ptr
);
207 ptr
= pm_dbg_reg_set
[reg_set
- 1];
212 while (pm_dbg_reg_modules
[i
].name
[0] != 0) {
215 if (pm_dbg_reg_modules
[i
].type
== MOD_CM
)
216 seq_printf(s
, "MOD: CM_%s (%08x)\n",
217 pm_dbg_reg_modules
[i
].name
,
218 (u32
)(OMAP3430_CM_BASE
+
219 pm_dbg_reg_modules
[i
].offset
));
221 seq_printf(s
, "MOD: PRM_%s (%08x)\n",
222 pm_dbg_reg_modules
[i
].name
,
223 (u32
)(OMAP3430_PRM_BASE
+
224 pm_dbg_reg_modules
[i
].offset
));
226 for (j
= pm_dbg_reg_modules
[i
].low
;
227 j
<= pm_dbg_reg_modules
[i
].high
; j
+= 4) {
235 seq_printf(s
, " %02x => %08lx", j
, val
);
250 static void pm_dbg_regset_store(u32
*ptr
)
257 while (pm_dbg_reg_modules
[i
].name
[0] != 0) {
258 for (j
= pm_dbg_reg_modules
[i
].low
;
259 j
<= pm_dbg_reg_modules
[i
].high
; j
+= 4) {
260 if (pm_dbg_reg_modules
[i
].type
== MOD_CM
)
261 val
= cm_read_mod_reg(
262 pm_dbg_reg_modules
[i
].offset
, j
);
264 val
= prm_read_mod_reg(
265 pm_dbg_reg_modules
[i
].offset
, j
);
272 int pm_dbg_regset_save(int reg_set
)
274 if (pm_dbg_reg_set
[reg_set
-1] == NULL
)
277 pm_dbg_regset_store(pm_dbg_reg_set
[reg_set
-1]);
282 static const char pwrdm_state_names
[][PWRDM_MAX_PWRSTS
] = {
289 void pm_dbg_update_time(struct powerdomain
*pwrdm
, int prev
)
293 if (!pm_dbg_init_done
)
296 /* Update timer for previous state */
299 pwrdm
->state_timer
[prev
] += t
- pwrdm
->timer
;
304 static int clkdm_dbg_show_counter(struct clockdomain
*clkdm
, void *user
)
306 struct seq_file
*s
= (struct seq_file
*)user
;
308 if (strcmp(clkdm
->name
, "emu_clkdm") == 0 ||
309 strcmp(clkdm
->name
, "wkup_clkdm") == 0 ||
310 strncmp(clkdm
->name
, "dpll", 4) == 0)
313 seq_printf(s
, "%s->%s (%d)", clkdm
->name
,
314 clkdm
->pwrdm
.ptr
->name
,
315 atomic_read(&clkdm
->usecount
));
321 static int pwrdm_dbg_show_counter(struct powerdomain
*pwrdm
, void *user
)
323 struct seq_file
*s
= (struct seq_file
*)user
;
326 if (strcmp(pwrdm
->name
, "emu_pwrdm") == 0 ||
327 strcmp(pwrdm
->name
, "wkup_pwrdm") == 0 ||
328 strncmp(pwrdm
->name
, "dpll", 4) == 0)
331 if (pwrdm
->state
!= pwrdm_read_pwrst(pwrdm
))
332 printk(KERN_ERR
"pwrdm state mismatch(%s) %d != %d\n",
333 pwrdm
->name
, pwrdm
->state
, pwrdm_read_pwrst(pwrdm
));
335 seq_printf(s
, "%s (%s)", pwrdm
->name
,
336 pwrdm_state_names
[pwrdm
->state
]);
337 for (i
= 0; i
< PWRDM_MAX_PWRSTS
; i
++)
338 seq_printf(s
, ",%s:%d", pwrdm_state_names
[i
],
339 pwrdm
->state_counter
[i
]);
341 seq_printf(s
, ",RET-LOGIC-OFF:%d", pwrdm
->ret_logic_off_counter
);
342 for (i
= 0; i
< pwrdm
->banks
; i
++)
343 seq_printf(s
, ",RET-MEMBANK%d-OFF:%d", i
+ 1,
344 pwrdm
->ret_mem_off_counter
[i
]);
351 static int pwrdm_dbg_show_timer(struct powerdomain
*pwrdm
, void *user
)
353 struct seq_file
*s
= (struct seq_file
*)user
;
356 if (strcmp(pwrdm
->name
, "emu_pwrdm") == 0 ||
357 strcmp(pwrdm
->name
, "wkup_pwrdm") == 0 ||
358 strncmp(pwrdm
->name
, "dpll", 4) == 0)
361 pwrdm_state_switch(pwrdm
);
363 seq_printf(s
, "%s (%s)", pwrdm
->name
,
364 pwrdm_state_names
[pwrdm
->state
]);
366 for (i
= 0; i
< 4; i
++)
367 seq_printf(s
, ",%s:%lld", pwrdm_state_names
[i
],
368 pwrdm
->state_timer
[i
]);
374 static int pm_dbg_show_counters(struct seq_file
*s
, void *unused
)
376 pwrdm_for_each(pwrdm_dbg_show_counter
, s
);
377 clkdm_for_each(clkdm_dbg_show_counter
, s
);
382 static int pm_dbg_show_timers(struct seq_file
*s
, void *unused
)
384 pwrdm_for_each(pwrdm_dbg_show_timer
, s
);
388 static int pm_dbg_open(struct inode
*inode
, struct file
*file
)
390 switch ((int)inode
->i_private
) {
391 case DEBUG_FILE_COUNTERS
:
392 return single_open(file
, pm_dbg_show_counters
,
394 case DEBUG_FILE_TIMERS
:
396 return single_open(file
, pm_dbg_show_timers
,
401 static int pm_dbg_reg_open(struct inode
*inode
, struct file
*file
)
403 return single_open(file
, pm_dbg_show_regs
, inode
->i_private
);
406 static const struct file_operations debug_fops
= {
410 .release
= single_release
,
413 static const struct file_operations debug_reg_fops
= {
414 .open
= pm_dbg_reg_open
,
417 .release
= single_release
,
420 int pm_dbg_regset_init(int reg_set
)
424 if (!pm_dbg_init_done
)
427 if (reg_set
< 1 || reg_set
> PM_DBG_MAX_REG_SETS
||
428 pm_dbg_reg_set
[reg_set
-1] != NULL
)
431 pm_dbg_reg_set
[reg_set
-1] =
432 kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL
);
434 if (pm_dbg_reg_set
[reg_set
-1] == NULL
)
437 if (pm_dbg_dir
!= NULL
) {
438 sprintf(name
, "%d", reg_set
);
440 (void) debugfs_create_file(name
, S_IRUGO
,
441 pm_dbg_dir
, (void *)reg_set
, &debug_reg_fops
);
447 static int pwrdm_suspend_get(void *data
, u64
*val
)
450 ret
= omap3_pm_get_suspend_state((struct powerdomain
*)data
);
458 static int pwrdm_suspend_set(void *data
, u64 val
)
460 return omap3_pm_set_suspend_state((struct powerdomain
*)data
, (int)val
);
463 DEFINE_SIMPLE_ATTRIBUTE(pwrdm_suspend_fops
, pwrdm_suspend_get
,
464 pwrdm_suspend_set
, "%llu\n");
466 static int __init
pwrdms_setup(struct powerdomain
*pwrdm
, void *dir
)
474 for (i
= 0; i
< 4; i
++)
475 pwrdm
->state_timer
[i
] = 0;
479 if (strncmp(pwrdm
->name
, "dpll", 4) == 0)
482 d
= debugfs_create_dir(pwrdm
->name
, (struct dentry
*)dir
);
484 (void) debugfs_create_file("suspend", S_IRUGO
|S_IWUSR
, d
,
485 (void *)pwrdm
, &pwrdm_suspend_fops
);
490 static int option_get(void *data
, u64
*val
)
499 static int option_set(void *data
, u64 val
)
503 if (option
== &wakeup_timer_milliseconds
&& val
>= 1000)
508 if (option
== &enable_off_mode
)
509 omap3_pm_off_mode_enable(val
);
514 DEFINE_SIMPLE_ATTRIBUTE(pm_dbg_option_fops
, option_get
, option_set
, "%llu\n");
516 static int __init
pm_dbg_init(void)
522 if (pm_dbg_init_done
)
525 if (cpu_is_omap34xx())
526 pm_dbg_reg_modules
= omap3_pm_reg_modules
;
528 printk(KERN_ERR
"%s: only OMAP3 supported\n", __func__
);
532 d
= debugfs_create_dir("pm_debug", NULL
);
536 (void) debugfs_create_file("count", S_IRUGO
,
537 d
, (void *)DEBUG_FILE_COUNTERS
, &debug_fops
);
538 (void) debugfs_create_file("time", S_IRUGO
,
539 d
, (void *)DEBUG_FILE_TIMERS
, &debug_fops
);
541 pwrdm_for_each(pwrdms_setup
, (void *)d
);
543 pm_dbg_dir
= debugfs_create_dir("registers", d
);
544 if (IS_ERR(pm_dbg_dir
))
545 return PTR_ERR(pm_dbg_dir
);
547 (void) debugfs_create_file("current", S_IRUGO
,
548 pm_dbg_dir
, (void *)0, &debug_reg_fops
);
550 for (i
= 0; i
< PM_DBG_MAX_REG_SETS
; i
++)
551 if (pm_dbg_reg_set
[i
] != NULL
) {
552 sprintf(name
, "%d", i
+1);
553 (void) debugfs_create_file(name
, S_IRUGO
,
554 pm_dbg_dir
, (void *)(i
+1), &debug_reg_fops
);
558 (void) debugfs_create_file("enable_off_mode", S_IRUGO
| S_IWUGO
, d
,
559 &enable_off_mode
, &pm_dbg_option_fops
);
560 (void) debugfs_create_file("sleep_while_idle", S_IRUGO
| S_IWUGO
, d
,
561 &sleep_while_idle
, &pm_dbg_option_fops
);
562 (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO
| S_IWUGO
, d
,
563 &wakeup_timer_seconds
, &pm_dbg_option_fops
);
564 pm_dbg_init_done
= 1;
568 arch_initcall(pm_dbg_init
);